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Eduardo Sanchez
Compteur 4 bits
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity counter is
port (Clk
:
Reset
:
Load
:
MaxCount :
Zero
:
Count
:
end counter;
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in std_logic;
in std_logic;
in std_logic;
in std_logic_vector(3 downto 0);
out std_logic;
out std_logic_vector(3 downto 0));
Eduardo Sanchez
Ecole Polytechnique Fdrale de Lausanne
Eduardo Sanchez
Ecole Polytechnique Fdrale de Lausanne
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Eduardo Sanchez
Ecole Polytechnique Fdrale de Lausanne
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Eduardo Sanchez
Ecole Polytechnique Fdrale de Lausanne
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in std_logic;
in std_logic;
in std_logic;
in std_logic_vector(7 downto 0);
in std_logic;
out std_logic);
Eduardo Sanchez
Ecole Polytechnique Fdrale de Lausanne
Eduardo Sanchez
Ecole Polytechnique Fdrale de Lausanne
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Eduardo Sanchez
Ecole Polytechnique Fdrale de Lausanne
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Eduardo Sanchez
Ecole Polytechnique Fdrale de Lausanne
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Eduardo Sanchez
Ecole Polytechnique Fdrale de Lausanne
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Eduardo Sanchez
Ecole Polytechnique Fdrale de Lausanne
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Eduardo Sanchez
Ecole Polytechnique Fdrale de Lausanne
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Eduardo Sanchez
Ecole Polytechnique Fdrale de Lausanne
case ctrl_state is
when state_init =>
if (Start = '1')
then next_ctrl_state <= state_got_1;
else memory_write <= '0';
end if;
when state_got_1 => next_ctrl_state <= state_got_2;
when state_got_2 => next_ctrl_state <= state_got_3;
when state_got_3 => next_ctrl_state <= state_got_4;
when state_got_4 => next_ctrl_state <= state_got_5;
when state_got_5 => next_ctrl_state <= state_got_6;
when state_got_6 => next_ctrl_state <= state_got_7;
when state_got_7 => next_ctrl_state <= state_valid;
when state_valid =>
Valid <= '1';
if (Start = '1')
then next_ctrl_state <= state_got_1;
else memory_write <= '0';
end if;
end case;
end process CTRL_BEHAVIOR;
end behavioral;
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Eduardo Sanchez
Ecole Polytechnique Fdrale de Lausanne
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Eduardo Sanchez
Ecole Polytechnique Fdrale de Lausanne