Intelbras I30 - Compal La-3961p - Rev 0.3

A
PJP1
PJP1
14W_DCIN
15W_DCIN
14W_45@
15W_45@
ZZZ1
PCB
<BOM Structure>
Compal Confidential
JFWXX Schematics Document
Intel Merom Processor with SiSM672MX + DDRII + SiS968 + SiS307LV
2007-09-06
REV: 0.3
3
Title
Cover Page
Size
B
Date:
Document Number
Rev
0.2
JFWXX M/B LA-3961P Schematic
ai
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
nf
@
ho
tm
2007/8/18
Deciphered Date
Thursday, September 06, 2007
Sheet
he
x
2006/08/18
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
ai
l.c
om
of
49
Compal Confidential
Model Name : JFWXX
File Name : LA-3961P
Intel Merom Processor
Fan Control
Thermal Sensor
Clock Generator
ADM1032
ICS9LPRS600C+
ICS9P935
page 4
page 4
uPGA-478 Package
page 14,15
page 4,5,6
FSB
667/800MHz
H_A#(3..35)
CRT & TV-out
H_D#(0..63)
page 17
Memory BUS(DDRII)
SiS M672MX
LCD Conn.
SiS 307LV
page 17
Single Channel
PCI-Express
page 12,13
BANK 0, 1, 2, 3
1.8V DDRII 533/667
TEBGA-847
page 18
200pin DDRII-SO-DIMM X2
page 7,8,9,10,11
USB conn x2
TO M/B
1GB/s MuTIOL IO Link
USB conn x2
TO I/O/B
page 33
2
SiS968
3.3V 24.576MHz/48Mhz
3.3V ATA-100
TEBGA-570
PCI BUS
S-ATA
page 19,20,21,22,23
3.3V 33 MHz
page 30
page 37
HD Audio
IDE
port 0
CDROM
Conn.
page 24
IDSEL:AD22
(PIRQG#,PIRQH#,
GNT#0, REQ#0)
LAN
33
USB
3.3V 48MHz
MII
page 29
page 37
Web Camera
2
PCI-Express
New Card MINI Card x1

Socket
WLAN
Bluetooth
Conn page
page 28
MDC 1.5
Conn
page 37
HDA Codec
ALC268
page 35
S-ATA HDD
Conn.page 24
Card Reader
R5C833
Audio AMP
page 26
RJ45
page 36
LPC BUS
page 28
13 94
Conn.
page 26
RTC CKT.
3 in 1
socket
page 27
ENE KB926
page 20
page 31
Power On/Off CKT.
Switch/B Conn.
page 34
Int.KBD
Touch Pad
page 32
page 33
page 32
DC/DC Interface CKT.

page 40
Power Circuit DC/DC
page 34
Deciphered Date
2007/8/18
A
Title
Block Diagrams
Size
B
Date:
Document Number
ai
nf
@
ho
tm
2006/08/18
Issued Date
Compal Secret Data
page 43
Rev
0.1

Sheet
ai
CHARGER
l.c
om
page 41,42,44,458
46,47,48
page 33
he
x
BIOS
I/O Conn.
FRONT LCD /B.
LID SW
of
49
Voltage Rails
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Power Plane
Description
VIN
Adapter power supply (19V)
N/A
N/A
N/A
B+
AC or battery power rail for power circuit.
N/A
N/A
N/A
S1
S3
S5
+CPU_CORE
Core voltage for CPU
ON
OFF
OFF
+0.9VS ( Actual +0.9V )
0.9V switched power rail for DDR terminator
ON
ON
OFF
+1.05VS
1.05V switched power rail
ON
OFF
OFF
+1.25VS
ON
OFF
OFF
+1.5VS
ON
OFF
OFF
External PCI Devices

DEVICE
IDSEL #
REQ/GNT #
PIRQ
CARD BUS CB1410
AD20
C,D
1394+Cardreader
AD22
G,H
+1.8V
1.8V power rail for DDR
ON
ON
OFF
+1.8VS
ON
OFF
OFF
+2.5VS
ON
OFF
OFF
Device
Address
Device
Address
+3VALW
3.3V always on power rail
ON
ON
ON*
Smart Battery
0001 011X b
ADI ADM1032
1001 100X b
+3VS
ON
OFF
OFF
EEPROM(24C16/02)
1010 000X b
NVIDIA NB8X
+5VALW
5V always on power rail
ON
ON
ON*
EC SM Bus1 address
+5VS
5V switched power rail
ON
OFF
OFF
+VSB
VSB always on power rail
ON
ON
ON*
+RTCVCC
RTC power
ON
ON
ON
ICH8M SM Bus address
Device
SIGNAL
STATE
SLP_S1# SLP_S3# SLP_S4# SLP_S5#
+VALW
+V
+VS
Clock
ON
ON
HIGH
HIGH
HIGH
HIGH
ON
ON
S1(Power On Suspend)
LOW
HIGH
HIGH
HIGH
ON
ON
ON
LOW
S3 (Suspend to RAM)
LOW
LOW
HIGH
HIGH
ON
ON
OFF
OFF
S4 (Suspend to Disk)
LOW
LOW
LOW
HIGH
ON
OFF
OFF
OFF
S5 (Soft OFF)
LOW
LOW
LOW
LOW
ON
OFF
OFF
OFF
Full ON
EC SM Bus2 address
Address
Clock Generator
(ICS9LPRS325AKLFT_MLF72)
1101 001Xb
DDR DIMM0
1010 000Xb
DDR DIMM1
1010 010Xb
PROJECT ID Table
3
PROJECT_ID
14W
R424 (Pull low)
15W
NA
SKU ID Table
Vcc
Ra
(Internal Pull High)
Ra~ R312
Rb~ R311
Board ID
0
1
2
3
4
5
6
7
R311
R311
R311
R311
R311
8.2K_0402_5%
14_B@
18K_0402_5%
14_C@
33K_0402_5%
14_MP@
56K_0402_5%
15_A@
100K_0402_5%
15_B@
200K_0402_5%
15_C@
Rb
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC
V AD_BID min
0 V
0.217 V
0.439 V
0.721 V
1.054 V
1.489 V
2.019 V
3.135V
V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V
V AD_BID max
0 V
0.288 V
0.575 V
0.926 V
1.325 V
1.819 V
2.386 V
3.465 V
Rb BOM Structure
14_A@
14_B@
14_C@
14_MP@
15_A@
15_B@
15_C@
15_MP@
Notes List
Size
B
Date:
Document Number
nf
@
ho
tm
Title
Rev
0.1
ai
2007/8/18
Deciphered Date
Sheet
he
x
2006/08/18
Issued Date
Compal Secret Data
ai
l.c
om
R311
3.3V +/- 5%
100K +/- 5%
of
49
Trace length must short
H_A#[3..35]
H_A#[3..35]
Place close to CPU within 500mil
H_REQ#[0..4]
<7> H_REQ#[0..4]
JP36A
<7>
H_ADSTB#0
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADSTB#1
<20>
<20>
<20>
H_A20M#
H_FERR#
H_IGNNE#
BR0#
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#
H_A20M#
H_FERR#
H_IGNNE#
A6
A5
C4
A20M#
FERR#
IGNNE#
H_STPCLK#
H_INTR
H_NMI
H_SMI#
D5
C6
B4
A3
STPCLK#
LINT0
LINT1
SMI#
M4
N5
T2
V3
B2
C3
D2
D22
D3
F6
RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
RSVD[10]
H1
E2
G5
H_ADS# <7>
H_BNR# <7>
H_BPRI# <7>
H5
F21
E1
H_DEFER# <7>
H_DRDY# <7>
H_DBSY# <7>
F1
IERR#
INIT#
D20
B3
LOCK#
H4
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
C1
F3
F4
G3
G2
HIT#
HITM#
G6
E4
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
THERMTRIP#
H_RESET#
H_RS#0
H_RS#1
H_RS#2
<7>
H_INIT#
<20>
Intel :Pull-up 56ohm (Un-Mount) SiS : Pull-up 56ohm (Mount)

Intel :Pull-up 56ohm (Mount) SiS : Pull-up 54.9ohm (Mount)
H_PREQ#
R85
H_IERR#
R115 1
2 @ 56_0402_5%
2
56_0402_5%
ITP_TMS
R84
56_0402_5%
ITP_TDI
R83
150_0402_1%
H_PROCHOT#
R113 1
56_0402_5%
H_LOCK# <7>
ITP_TCK
R69
27.4_0402_1%
H_RESET# <7>
ITP_TRST#
R61
680_0402_5%
Intel :Pull-up 56ohm (Mount) SiS : Pull-up 75ohm (Mount)
H_HIT#
H_HITM#
Checklist recommend 39 Ohm CRB pull 75 Ohm
H_TRDY# <7>
<7>
<7>
ADM1032
+3VS
C112 1
2 0.1U_0402_16V4Z
H_PREQ#
ITP_TCK
ITP_TDI
ITP_TMS
ITP_TRST#
ITP_DBRESET#
C111
H_PROCHOT# <20>
D21
A24
B25
THERMDA
THERMDC
C7
H_THERMTRIP#
C114 1
2 0.1U_0402_16V4Z
U7
2200P_0402_50V7K
2
ITP_DBRESET#
H_PROCHOT#
THERMAL
PROCHOT#
THERMDA
THERMDC
H_IERR#
H_INIT#
H_BR0#
+1.05VS
VDD
SCLK
EC_SMB_CK2 <31>
THERMDA
D+
SDATA
EC_SMB_DA2 <31>
THERMDC
D-
ALERT#
THERM#
GND
Connect SB SYS_RESET# or just left NC
ADM1032ARMZ_MSOP8
F75383M_MSOP8
H_THERMTRIP# <20>
H CLK
BCLK[0]
BCLK[1]
A22
A21
H_CLK_DP0 <14>
H_CLK_DN0 <14>
FAN1 Conn
+5VS
H_THERMDA, H_THERMDC routing together,

Trace width / Spacing = 10 / 10 mil
+5VS
C58
2 10U_0805_10V4Z
<20> H_STPCLK#
<20>
H_INTR
<20>
H_NMI
<20>
H_SMI#
DEFER#
DRDY#
DBSY#
ICH
<7>
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
ADS#
BNR#
BPRI#
ADDR GROUP 1
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
K3
H2
K2
J3
L1
A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
CONTROL
J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
ADDR GROUP 0
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
XDP/ITP SIGNALS
H_RS#[0..2]
<7> H_RS#[0..2]
RESERVED
<7>
U3
<31> EN_FAN1
1
2
3
4
+VCC_FAN1
EN_FAN1
D12
VEN
VIN
VO
VSET
GND
GND
GND
GND
8
7
6
5
1SS355_SOD323
Merom Ball-out Rev 1a

conn@
D11
1
G993P1UF_SOP8
BAS16_SOT23-3
C52
+1.05VS
CPU to SB interface
R141 1
2 56_0402_5%
H_INIT#
Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)
R128 1
2 56_0402_5%
H_IGNNE#
R144 1
2 56_0402_5%
H_SMI#
R148 1
2 56_0402_5%
H_A20M#
R137 1
2 56_0402_5%
H_NMI
R140 1
2 56_0402_5%
H_INTR
C55
1000P_0402_50V7K
1
2
R31
10K_0402_5%
40mil
JP6
+VCC_FAN1
1
2
3
<31> FAN_SPEED1
R127 1
2 56_0402_5%
H_THERMTRIP#
Intel : Pull-up 56ohm (Mount) SiS : Pull-up 56ohm (Mount)
R214 1
2 56_0402_5%
H_FERR#
Intel : Pull-up 56ohm (Mount) SiS : Pull-up 56ohm (Mount)
2 51_0402_1%
H_BR0#
2 56_0402_5%
H_RESET#
Intel :Don't Pull-up SiS : Pull-up 56ohm (Un-Mount)
2 150_0402_1%
ITP_DBRESET#
C54
1
2
3
4
5
1000P_0402_50V7K
GND
GND
ACES_85205-03001
ME@
om

1
H_STPCLK#
2 56_0402_5%
R112 1
2006/08/18
Issued Date
Deciphered Date
ai
Compal Secret Data
2007/8/18
3
nf
@
ho
tm
R136 1
Title
Merom (1/3)
Size
B
Date:
Document Number
Rev
0.1

ai
R114 1
l.c
+1.05VS
he
x
+3VS
R120 1
10U_0805_10V4Z
2
Sheet
of
49
GTL_REF
C368
C369
H_D#[0..63]
+CPU_CORE
JP36B
SiS Recommend
<7>
<7>
<7>
H_DSTBN#0
H_DSTBP#0
H_DINV#0
+1.05VS
<7>
<7>
<7>
R321
R111 2
R98 2
1K_0402_1%
Width=20 mil
R319
H_DSTBN#1
H_DSTBP#1
H_DINV#1
GTL_REF
TEST1
1 @ 1K_0402_5%
TEST2
1 @ 1K_0402_5%
TEST3
PAD
T3
2 @ 0.1U_0402_16V4Z TEST4
TEST5
PAD
T2
TEST6
T23 PAD
C364 1
N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
AD26
C23
D25
C24
AF26
AF1
A26
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
<14>
<14>
<14>
H_BSEL0
H_BSEL1
H_BSEL2
B22
B23
C21
BSEL[0]
BSEL[1]
BSEL[2]
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
COMP[0]
COMP[1]
COMP[2]
COMP[3]
R26
U26
AA1
Y1
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
E5
B5
D24
D6
D7
AE6
MISC
2K_0402_1%
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
DATA GRP 1
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
Close to CPU pin AD26

within 500mils.
E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25
DATA GRP 0
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#2 <7>
H_DSTBP#2 <7>
H_DINV#2 <7>
H_DSTBN#3 <7>
H_DSTBP#3 <7>
H_DINV#3 <7>
COMP0
COMP1
COMP2
COMP3
R324
R323
R42
R44
1
1
1
1
H_DPSLP#
H_DPWR#_R
H_PWRGOOD
H_CPUSLP#
2
2
2
2
27.4_0402_1%
54.9_0402_1%
27.4_0402_1%
54.9_0402_1%
H_DPRSTP# <25,48>
H_DPSLP# <25>
H_PWRGOOD <7>
H_CPUSLP# <20>
H_PSI#
<48>

conn@
JP36C
H_D#[0..63] <7>
220P_0402_50V7K
DATA GRP 2
DATA GRP 3
1U_0603_10V4Z
Resistor placed within

0.5" of CPU pin.Trace
should be at least 25
mils away from any other
toggling signal.
COMP[0,2] trace width is
18 mils. COMP[1,3] trace
width is 4 mils.
layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs
CPU_BSEL
CPU_BSEL2
CPU_BSEL1
CPU_BSEL0
133
166
200
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
VCCA[01]
VCCA[02]
B26
C26
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
AD6
AF5
AE5
AF4
AE3
AF3
AE2
VCCSENSE
AF7
VCCSENSE
VSSSENSE
AE7
VSSSENSE

conn@
H_DPWR#_R
@
1
R126
H_DPWR#
2
0_0402_5%
+CPU_CORE
D
Place this cap more close to

B26/C26 rather than 10UF
+1.05VS
1
+ C80
330U_D2E_2.5VM_R9
20mils
+1.5VS
1
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
1
R27
<48>
<48>
<48>
<48>
<48>
<48>
<48>
C438
0.01U_0402_16V7K
2 100_0402_1%
C432
10U_0805_10V4Z
+CPU_CORE
VCCSENSE <48>
VSSSENSE <48>
R24
2 100_0402_1%
H_DPWR# <7>
R131
10_0402_5%
Length match within 25 mils.

The trace width/space/other is
20/7/25.
+1.05VS
H_CPUSLP#
2 56_0402_5%
H_DPSLP#
Intel :Pull-up 56ohm (Un-Mount) SiS : Pull-up 56ohm (Mount)
Close to CPU pin

within 500mils.
2 56_0402_5%
H_PWRGOOD
Intel :Don't Pull-up (Connecte to ICH) SiS : Pull-up 56ohm (Un-Mount)
2 56_0402_5%
H_DPWR#
Intel :Don't Pull-up SiS : Pull-up 56ohm (Un-Mount)
2 @
0.1U_0402_16V4Z H_PWRGOOD
Intel :Don't Pull-down SiS :Pull-down Cap (Un-Mount)
Compal Secret Data
C650 1
l.c
R119 1
2006/08/18
Issued Date
Deciphered Date
ai
R133 1
2007/8/18
5
om
SiS Recommend
nf
@
ho
tm
2 56_0402_5%
R143 1
Title
Merom (2/3)
Size
B
Date:
Document Number
Rev
0.1

ai
R121 1
he
x
Sheet
of
49
+CPU_CORE
+CPU_CORE
3 x 330uF(9mOhm/3)
JP36D
A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
1
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
C390 +
C347 +
C155 +
C169 +
@
@
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9 330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
2
2
2
2
2
2
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
C47
3 x 330uF(9mOhm/3)
C350
South Side Secondary
North Side Secondary
+CPU_CORE
CRB no stuff. Reserved!

1
C394
C383
C408
C409
C410
C411
C412
C392
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
(Place these capacitors on South side,Secondary Layer)

+CPU_CORE
C379
C378
C377
C376
C375
C385
C393
C384
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
C
(Place these capacitors on North side,Secondary Layer)

+CPU_CORE
C107
C106
C105
C104
C103
C89
C46
C90
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
(Place these capacitors on South side,Primary Layer)

+CPU_CORE
C77
C76
C75
C74
C84
C78
C88
C85
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
(Place these capacitors on North side,Primary Layer)
+CPU-CORE
Decoupling
SPCAP,Polymer
MLCC 0805 X5R
C,uF
ESR, mohm
ESL,nH
6X330uF
9m ohm/6
1.8nH/6
32X22uF
3m ohm/32
0.6nH/32
32X10uF
3m ohm/32
0.6nH/32
+1.05VS

conn@
.
C97
C87
C81
C96
C83
C73
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
Title
Merom (3/3)
Size
B
Date:
Document Number
Rev
0.1

Sheet
1
of
49
+1.05VS
+1.2VS
U30C
R210
B16
C17
C1XAVDD
C1XAVSS
C4XAVDD
C4XAVSS
A17
B18
C4XAVDD
C4XAVSS
C191
0.01U_0402_16V7K
NB_GTLREF
W24
U24
R24
N24
L21
HVREF
HVREF
HVREF
HVREF
HVREF
PCREQ#
EDRDY#
R34
P32
PCREQ#
EDRDY#
H_DPWR#
E21
DPWR#
H_CLK_DP1
H_CLK_DN1
F18
G18
CPUCLK
CPUCLK#
H_LOCK#
H_DEFER#
H_TRDY#
H_RESET#
H_PWRGOOD
H_BPRI#
H_BR0#
L32
P30
P31
F21
P28
N30
P33
HLOCK#
DEFER#
HTRDY#
CPURST#
CPUPWRGD
BPRI#
BREQ0#
H_RS#0
H_RS#1
H_RS#2
K34
M31
K33
RS0#
RS1#
RS2#
H_ADS#
H_HITM#
H_HIT#
H_DRD Y#
H_DBSY#
H_BNR#
M34
N34
N32
M33
L34
M32
ADS#
HITM#
HIT#
DRDY#
DBSY#
BNR#
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
T34
R30
R29
R32
P34
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
75_0402_1%
C1XAVDD
C1XAVSS
R202
150_0402_1%
C212
C200
0.1U_0402_16V4Z
T30 PAD
T5 PAD
0.01U_0402_16V7K
<5> H_DPWR#
<14> H_CLK_DP1
<14> H_CLK_DN1
<4>
H_LOCK#
<4> H_DEFER#
<4> H_TRDY#
<4> H_RESET#
<5> H_PWRGOOD
<4>
H_BPRI#
<4> H_BR0#
<4> H_RS#[0..2]
<4>
H_ADS#
<4>
H_HITM#
<4>
H_HIT#
<4>
H_DRDY#
<4>
H_DBSY#
<4>
H_BNR#
<4> H_REQ#[0..4]
<4> H_ADSTB#0
<4> H_ADSTB#1
<4> H_A#[3..35]
H_ADSTB#0
H_ADSTB#1
U34
AA34
HASTB0#
HASTB1#
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
T32
T28
T31
T33
T30
U32
U30
V34
U29
V33
V32
V28
V31
W34
Y33
W32
V30
W30
Y34
Y28
W29
Y32
Y30
Y31
AA32
AA30
AA29
AB33
AB34
AB32
AC34
AB30
AB31
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HA32#
HA33#
HA34#
HA35#
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
N29
M30
M28
L30
L29
K28
K31
K30
H31
G34
H32
G32
K32
F34
F33
F32
H28
J30
H30
G29
J29
G30
F30
D33
D34
B32
B33
C34
D31
A32
A31
C31
B30
C30
A30
D28
G28
C29
C28
E28
E27
C27
G26
E26
D26
B26
A26
C26
G22
C24
A25
B24
C25
A24
E23
E25
G24
D22
C22
E22
C23
A23
A22
B22
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
DBI0#
DBI1#
DBI2#
DBI3#
J32
E32
F27
F23
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
H33
E31
B28
D24
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#
H34
D32
A28
E24
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
HPCOMP
HNCOMP
A21
C21
H_PCOMP
H_NCOMP
Host
V_AVDD_PCIE_1.2V
H_D#[0..63] <5>
L22
1
2
MBK1608121YZF_0603
1
+1.8VS
1
2
MBK1608121YZF_0603
1
1
C454
C472
2
10U_0805_10V4Z
1
R399
0.1U_0402_16V4Z
C1XAVDD
C481
0.01U_0402_16V7K
C1XAVSS
2
0_0402_5%
1
R400
<21,29,30> SB_PCIE_WAKE#
<9,19> INT_N_A
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
<5>
<5>
<5>
<5>
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
<5>
<5>
<5>
<5>
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
<5>
<5>
<5>
<5>
R175
R188
SB_PCIE_WAKE#
INT_N_A
10_0402_5%
110_0402_1%
PCIEAVDD
PCIEAVDD
PCIEAVDD
PCIEAVDD
PCIEAVDD
D7
G16
PME#
INTX#
E4
E5
F1
G1
H3
H2
H1
J1
K1
K2
L1
M1
N1
N2
P1
R1
T1
T2
U1
V1
W1
W2
Y1
AA1
AB1
AB2
AC1
AD1
AE1
AE2
AF1
AG1
PERP0
PERN0
PERP1
PERN1
PERP2
PERN2
PERP3
PERN3
PERP4
PERN4
PERP5
PERN5
PERP6
PERN6
PERP7
PERN7
PERP8
PERN8
PERP9
PERN9
PERP10
PERN10
PERP11
PERN11
PERP12
PERN12
PERP13
PERN13
PERP14
PERN14
PERP15
PERN15
0.01U_0402_16V7K
REFCLK+
REFCLK-
T5
T4
PCIE_CLK_NB
PCIE_CLK_NB#
PCIE_CLK_NB <14>
PCIE_CLK_NB# <14>
PETP0
PETN0
PETP1
PETN1
PETP2
PETN2
PETP3
PETN3
PETP4
PCIE
PETN4
PETP5
PETN5
PETP6
PETN6
PETP7
PETN7
PETP8
PETN8
PETP9(HDVBP2)
PETN9(HDVBN2)
PETP10(HDVBP1)
PETN10(HDVBN1)
PETP11(HDVBP0)
PETN11(HDVBN0)
PETP12
PETN12
PETP13(HDVAP2)
PETN13(HDVAN2)
PETP14(HDVAP1)
PETN14(HDVAN1)
PETP15(HDVAP0)
PETN15(HDVAN0)
G6
H6
G4
G5
J6
K6
J4
J5
L6
M6
M4
M5
P6
R6
P4
P5
V6
W6
W4
W5
Y6
AA6
AA4
AA5
AB6
AC6
AC4
AC5
AD6
AE6
AE4
AE5
HDVBP2
HDVBN2
HDVBP1
HDVBN1
HDVBP0
HDVBN0
B
HDVAP2
HDVAN2
HDVAP1
HDVAN1
HDVAP0
HDVAN0
SISM672MX-A1_TEBGA_847P
+1.05VS
HDVBP2
HDVBN2
HDVBP1
HDVBN1
HDVBP0
HDVBN0
C653
C660
C662
C654
C655
C656
2
2
2
2
2
2
1
1
1
1
1
1
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
HDVBP2_C
HDVBN2_C
HDVBP1_C
HDVBN1_C
HDVBP0_C
HDVBN0_C
HDVAP2
HDVAN2
HDVAP1
HDVAN1
HDVAP0
HDVAN0
C658
C657
C652
C651
C659
C661
2
2
2
2
2
2
1
1
1
1
1
1
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
HDVAP2_C
HDVAN2_C
HDVAP1_C
HDVAN1_C
HDVAP0_C
HDVAN0_C
HDVBP2_C
HDVBN2_C
HDVBP1_C
HDVBN1_C
HDVBP0_C
HDVBN0_C
<18>
<18>
<18>
<18>
<18>
<18>
HDVAP2_C
HDVAN2_C
HDVAP1_C
HDVAN1_C
HDVAP0_C
HDVAN0_C
<18>
<18>
<18>
<18>
<18>
<18>
C4XAVDD
0.1U_0402_16V4Z
C479
0.01U_0402_16V7K
C4XAVSS
2
0_0402_5%
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
C218
C4XAVDD:12mA
L39
1
2
MBK1608121YZF_0603
1
1
C455
C470
10U_0805_10V4Z
0.1U_0402_16V4Z
U30D
P7
R7
T7
U7
V7
+1.8VS
C1XAVDD:10mA
L40
C201
V_AVDD_PCIE_1.2V
PCIEAVDD:77mA
Title
M672MX (1/5)-HOST/PCIE
Size Document Number
Custom
Rev
0.1
Date:
Sheet
1
of
49
U30B
<12,13> DDRA_SDQS6
<12,13> DDRA_SDQS6#
<12,13> DDRA_SDQS7
<12,13> DDRA_SDQS7#
AM32
AP32
AP31
AM29
AK30
AK29
AJ27
AK28
AN32
AM30
AM31
MD24A
MD25A
MD26A
MD27A
MD28A
MD29A
MD30A
MD31A
DQM3A
DQS3A
DQS3A#
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDM4
DDRA_SDQS4
DDRA_SDQS4#
AK20
AM20
AM19
AJ19
AN20
AJ21
AP19
AH20
AK21
AK19
AL19
MD32A
MD33A
MD34A
MD35A
MD36A
MD37A
MD38A
MD39A
DQM4A
DQS4A
DQS4A#
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDM5
DDRA_SDQS5
DDRA_SDQS5#
AK18
AJ17
AK17
AP16
AH18
AP18
AN18
AP17
AM18
AL17
AM17
MD40A
MD41A
MD42A
MD43A
MD44A
MD45A
MD46A
MD47A
DQM5A
DQS5A
DQS5A#
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDM6
DDRA_SDQS6
DDRA_SDQS6#
AN16
AK16
AN14
AJ15
AP15
AM16
AK15
AP14
AH16
AL15
AM15
MD48A
MD49A
MD50A
MD51A
MD52A
MD53A
MD54A
MD55A
DQM6A
DQS6A
DQS6A#
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
DDRA_SDM7
DDRA_SDQS7
DDRA_SDQS7#
AL13
AM13
AM12
AJ13
AM14
AK14
AN12
AH14
AK13
AP12
AP13
MD56A
MD57A
MD58A
MD59A
MD60A
MD61A
MD62A
MD63A
DQM7A
DQS7A
DQS7A#
MA0A
MA1A
MA2A
MA3A
MA4A
MA5A
MA6A
MA7A
MA8A
MA9A
MA10A
MA11A
MA12A
MA13A
MA14A
MA15A
MA16A
MA17A
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SBS0
DDRA_SBS1
DDRA_SBS2
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
DDRA_SMA14
RASA#
CASA#
WEA#
AM23
AP22
AJ23
DDRA_SRAS#
DDRA_SCAS#
DDRA_SWE#
FWDSDCLKOA
FWDSDCLKOA#
AK12
AH12
CLK_INT
CLK_INC
CS0A#
CS1A#
CS2A#
CS3A#
AP23
AH22
AM22
AM21
DDRA_SCS0#
DDRA_SCS1#
DDRA_SCS2#
DDRA_SCS3#
ODT0A
ODT1A
ODT2A
ODT3A
AK22
AP20
AN22
AL21
DDRA_ODT0
DDRA_ODT1
DDRA_ODT2
DDRA_ODT3
CKEA0
CKEA1
CKEA2
CKEA3
AN30
AP30
AH26
AK27
DDRA_CKE0
DDRA_CKE1
DDRA_CKE2
DDRA_CKE3
DDRVREF0
DDRVREF1
AD18
AD23
DDRVREF
DRAM
10U_0805_10V4Z
1
R409
D1XAVDD
0.1U_0402_16V4Z
C471
0.01U_0402_16V7K
D1XAVSS
2
0_0402_5%
+1.8VS
D4XAVDD:10mA
L52
1
2
MBK1608121YZF_0603
1
1
C583
C582
DDRA_SBS0 <12,13>
DDRA_SBS1 <12,13>
DDRA_SBS2 <12,13>
10U_0805_10V4Z
1
R473
D4XAVDD
0.1U_0402_16V4Z
C581
0.01U_0402_16V7K
D4XAVSS
2
0_0402_5%
DDRA_SRAS# <12,13>
DDRA_SCAS# <12,13>
DDRA_SWE# <12,13>
CLK_INT <15>
CLK_INC <15>
C
DDRA_SCS0#
DDRA_SCS1#
DDRA_SCS2#
DDRA_SCS3#
<12>
<12>
<13>
<13>
DDRA_ODT0
DDRA_ODT1
DDRA_ODT2
DDRA_ODT3
<12>
<12>
<13>
<13>
DDRA_CKE0
DDRA_CKE1
DDRA_CKE2
DDRA_CKE3
<12>
<12>
<13>
<13>
+1.8V
R276
1K_0402_1%
C251
0.1U_0402_16V4Z
DDRVREF
R501
DDRCOMP
DDRCOMN
DDRCOMP R225
DDRCOMN R227
AJ25
AK26
36_0402_1%
36_0402_1%
1K_0402_1%
+1.8V
C238
C233
Place C233
under M672MX
solder side.
1U_0603_10V4Z
0.1U_0402_16V4Z
OCDVREFP
OCDVREFN
OCDVREFP
OCDVREFN
AH28
AJ29
+1.8V
S3AUXSW#
S3AUXSW#
B6
+1.8V
S3AUXSW# <31>
<12,13> DDRA_SDQS5
<12,13> DDRA_SDQS5#
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDM3
DDRA_SDQS3
DDRA_SDQS3#
2
AH24
AP25
AM25
AL25
AP26
AM26
AN26
AK25
AP27
AP28
AK24
AN24
AP24
AM28
AM27
AN28
AP21
AP29
D1XAVDD:7mA
L41
1
2
MBK1608121YZF_0603
1
1
C456
C480
R277
R511
40.2_0402_1%
36_0402_1%
OCDVREFP
MD16A
MD17A
MD18A
MD19A
MD20A
MD21A
MD22A
MD23A
DQM2A
DQS2A
DQS2A#
D4XAVDD
D4XAVSS
OCDVREFN
<12,13> DDRA_SDQS4
<12,13> DDRA_SDQS4#
AK34
AH30
AL32
AM33
AK32
AG29
AM34
AL31
AJ30
AK33
AL34
AP11
AP10
R224
R228
36_0402_1%
40.2_0402_1%
<12,13> DDRA_SDQS3
<12,13> DDRA_SDQS3#
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDM2
DDRA_SDQS2
DDRA_SDQS2#
D4XAVDD
D4XAVSS
+1.8VS
MD8A
MD9A
MD10A
MD11A
MD12A
MD13A
MD14A
MD15A
DQM1A
DQS1A
DQS1A#
D1XAVDD
D1XAVSS
<12,13> DDRA_SDQS2
<12,13> DDRA_SDQS2#
AF28
AJ34
AH31
AG30
AF30
AG32
AJ32
AJ31
AH34
AH32
AH33
A15
B15
<12,13> DDRA_SDQS1
<12,13> DDRA_SDQS1#
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDM1
DDRA_SDQS1
DDRA_SDQS1#
D1XAVDD
D1XAVSS
<12,13> DDRA_SDQS0
<12,13> DDRA_SDQS0#
MD0A
MD1A
MD2A
MD3A
MD4A
MD5A
MD6A
MD7A
DQM0A
DQS0A
DQS0A#
DDRA_SMA[0..14] <12,13>
AD31
AD30
AG34
AE29
AE32
AF34
AF31
AE30
AD28
AF32
AF33
DDRA_SMA[0..14]
DDRA_SDM[0..7] <12,13>
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDM0
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDM[0..7]
DDRA_SDQ[0..63] <12,13>
DDRA_SDQ[0..63]
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
Title
M672MX (2/5)-DDR
Custom
Rev
0.1
Date:
Sheet
1
of
49
+1.8VS
1
R231
Z4XAVDD
0.1U_0402_16V4Z
U30A
C248
<14> Z_CLK0
Z_CLK0
AH10
0.01U_0402_16V7K
<19> ZDREQ
<19> ZUREQ
ZDREQ
ZUREQ
AP8
AN8
ZDREQ
ZUREQ
ZSTB_DP0
ZSTB_DN0
ZSTB_DP1
ZSTB_DN1
AM7
AL7
AP4
AP5
ZSTB0
ZSTB0#
ZSTB1
ZSTB1#
AK10
AM6
AK11
AJ11
AP7
AJ9
AP6
AN6
AK9
AM4
AK6
AK8
AN4
AK7
AL5
AM5
AM8
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
Z4XAVSS
2
0_0402_5%
<19>
<19>
<19>
<19>
ZSTB_DP0
ZSTB_DN0
ZSTB_DP1
ZSTB_DN1
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
+1.8VS
R232
150_0402_1%
C67
0.1U_0402_16V4Z
ZAD[0..16]
<19> ZAD[0..16]
Z_VREF
R229
C249
0.1U_0402_16V4Z
49.9_0402_1%
+3VS
R472 1
R230 1
+1.8VS
2 56_0402_5%
2 56_0402_5%
Z_VREF
Z_COMP_P
Z_COMP_N
AL9
AP9
AM9
ZCLK
ENTEST
F15
TESTMODE0
TESTMODE1
TESTMODE2
TRAP0
TRAP1
TRAP2
D16
E16
F16
D17
E17
F17
TRAP3
TRAP4
TRAP5
TRAP6
TRAP7
TRAP8
TRAP9
TRAP10
Z4XAVDD
Z4XAVSS
390_0402_5%
R179
<17> GMCH_CRT_CLK
<17> GMCH_CRT_DATA
+1.8VS
10U_0805_10V4Z
0.1U_0402_16V4Z
HSYNC
VSYNC
R183 1
R182 1
2 0_0402_5%
2 0_0402_5%
A_DDC1CLK
A_DDC1DAT
D11
E12
VGPIO0
VGPIO1
VCOMP
VVBWN
VRSET
D15
C15
C14
VCOMP
VVBWN
VRSET
<7,19> INT_N_A
R196 1
2 0_0402_5%
INTA#
F13
INTA#
<14> REF_CLK0
R195 1
2 0_0402_5%
VOSCI
F11
VOSCI
DACAVDD1
DACAVSS1
A12
B12
DACAVDD1
DACAVSS1
DACAVDD2
DACAVSS2
A13
B13
DACAVDD2
DACAVSS2
DCLKAVDD
DCLKAVSS
B10
A11
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
A9
B8
ECLKAVDD
ECLKAVSS
C469
0.01U_0402_16V7K
G14
A6
AGPSTOP#
AGPBUSY#
AGPSTOP# <20>
AGPBUSY# <20>
VBVSYNC
VBHSYNC
D8
F7
VBVSYNC
V BHSYNC
VBVSYNC <18>
VBHSYNC <18>
VBHCLK
E7
VBHCLK
VBHCLK <18>
VBCLK
VBCAD
C8
E9
VBCLK
VBCAD
VBCLK <18>
VBCAD <18>
D9
H_VACLK R559 1
ASL
1
C178
1
C177
ECLKAVDD:5mA
L45
ECLKAVDD
1
2
MBK1608121YZF_0603
1
1
C491
C484
10U_0805_10V4Z
R177
0.1U_0402_16V4Z
C485
0.01U_0402_16V7K
ECLKAVSS
2
0_0402_5%
1
1
VCOMP
2
0.1U_0402_16V4Z
VVBWN
2
0.1U_0402_16V4Z
DACAVDD2:73mA
2
0_0402_5%
1
C174
10U_0805_10V4Z
1
R406
C490
1U_0603_10V4Z
VACLK
VACLK
<18>
NC0
NC1
AH2
AG3
+3VS
R216 1
2 4.7K_0402_5%
AUX_PWRGD
C180 1
2 0.1U_0402_16V4Z
SB_PWRGD
C181 1
2 0.1U_0402_16V4Z
DACAVDD2
C483
0.1U_0402_16V4Z
DACAVSS2
2
0_0402_5%
1
R174
2 33_0402_5%
For SiS VB 307 use only
AGPBUSY#
+1.8VS
1
R415
F12
G12
AC32
AD34
AB28
AD32
AD33
AE34
AC30
AC29
AUX_PWRGD <20,31>
SB_PWRGD <20,31>
NB_RST# <18,19>
VACLK
A _HSYNC
A_VSYNC
2 4.7K_0402_5%
DCLKAVSS
2
0_0402_5%
+1.8VS
ROUT
GOUT
BOUT
2 0_0402_5%
2 0_0402_5%
DCLKAVDD
1
2
MBK1608121YZF_0603
1
1
C467
C468
1
R396
GMCH_CRT_CLK
GMCH_CRT_DATA
D13
C12
C13
R184 1
R185 1
DCLKAVDD:5mA
L42
VGA_CRT_HSYNC
VGA_CRT_VSYNC
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
<17> VGA_CRT_R
<17> VGA_CRT_G
<17> VGA_CRT_B
390_0402_5%
<17> VGA_CRT_HSYNC
<17> VGA_CRT_VSYNC
Z4XAVDD
Z4XAVSS
R1931
AUX_PWRGD
SB_PWRGD
NB_RST#
ZVREF
ZCMP_P
ZCMP_N
R178
AM10
AN10
NB_ENTEST
A5
C6
A7
AUXOK
PWROK
PCIRST#
AGPSTOP#
AGPBUSY#
Z4XAVDD:10mA
L24
1
2
MBK1608121YZF_0603
1
1
C252
C250
10U_0805_10V4Z
2
130_0402_5%
VRSET
+1.8VS
DACAVDD1:73mA
R395
DACAVDD1
3.3_0402_5%
C453
@
10U_0805_10V4Z
1
R383
C461
@
1U_0603_10V4Z
2
0_0402_5%
C463
@
0.1U_0402_16V4Z
DACAVSS1
DACAVDD1 Spec.
Voltage : 1.5V +/- 5%
Current : 100mA
2006/08/18
Issued Date
Deciphered Date
2007/8/18
7/30 modified to @
7/24 modified
5
Compal Secret Data
Title
M672MX (3/5)-ASL
Custom
Rev
0.1
Date:
Sheet
1
of
49
U30E
+1.8V
D
+1.8VS
+1.8VS
+1.8VS
+1.2VS
W23
Y23
AA23
AB23
AC23
AC18
AC20
AC16
AD16
AD17
AD19
AD20
AD21
AD22
AJ22
AJ24
AL23
AL26
AN21
AN23
AN25
AN27
AN29
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
AP3
AB12
AB13
AC12
AC13
AC14
AC15
AH6
AH7
AJ4
AJ5
AJ6
AJ7
AN2
AK4
AK5
AL1
AL2
AL3
AL4
AM1
AM2
AM3
AN3
AN5
AN7
AN9
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
E8
F9
F8
VDDVB1.8
VDDVB1.8
VDDVB1.8
E10
F10
VDD1.8
VDD1.8
N19
N21
P20
P22
R21
T22
U21
V22
PVDDH
PVDDH
PVDDH
PVDDH
PVDDH
PVDDH
PVDDH
PVDDH
M11
N11
P11
R11
T11
U11
V11
W11
Y11
AA11
AB11
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
+1.2VALW
B5
C5
D6
AUX_IVDD
AUX_IVDD
AUX_IVDD
+1.8VALW
G8
AUX1.8
PWR
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTTP
VTTP
VTTP
VTTP
VTTP
VTTP
VTTP
VTTP
VTTP
VTTP
M13
M14
M15
M16
M17
M18
M19
N16
N17
N18
N20
R22
N22
N13
P13
Y13
Y22
T13
U13
U22
V13
W13
W22
AA13
AA22
AB14
AB15
AB16
AB18
AB20
AB22
AF6
AF7
AK3
AG4
AG5
AG6
AG7
R13
AH3
AH4
AH5
AJ1
AJ2
AJ3
AK1
AK2
AC22
AC21
AC19
AC17
A19
A20
B19
B20
C19
C20
D19
D20
E19
E20
F19
F20
G19
G20
L18
L19
L20
M20
M21
M22
M23
N23
P23
R23
T23
U23
V23
M12
N12
P12
R12
T12
U12
V12
W12
Y12
AA12
+1.2VS
+1.8V
VCCM:644mA
+1.2VS
IVDD:2024mA
C244 1
2 1U_0603_10V4Z
C225 1
2 1U_0603_10V4Z
C245 1
2 1U_0603_10V4Z
C227 1
2 1U_0603_10V4Z
C246 1
2 10U_0805_10V4Z
C243 1
2 10U_0805_10V4Z
+1.8VS
PVDDH/VCC1.8/VTTP/VDD1.8
/VDDVB1.8:392mA
+1.2VS
AUX1.8:1mA
AUX_IVDD:92mA
+1.8VALW
+1.2VALW
C187
1U_0603_10V4Z
+1.05VS
VDDPEX:876mA
C183
1U_0603_10V4Z
VTT:80mA
C232 1
2 0.1U_0402_16V4Z
C202 1
2 0.1U_0402_16V4Z
C204 1
2 0.1U_0402_16V4Z
C239 1
2 1U_0603_10V4Z
C195 1
2 1U_0603_10V4Z
C192 1
2 1U_0603_10V4Z
C247 1
2 10U_0805_10V4Z
C229 1
2 10U_0805_10V4Z
C176 1
2 10U_0805_10V4Z
Place these Cap under M672MX solder side.
+1.8V
+1.2VS
+1.8VALW
C230 1
2 0.1U_0402_16V4Z
C226 1
2 0.1U_0402_16V4Z
C231 1
2 0.1U_0402_16V4Z
C209 1
2 0.1U_0402_16V4Z
C235 1
2 1U_0603_10V4Z
C213 1
2 1U_0603_10V4Z
C223 1
2 1U_0603_10V4Z
C220 1
2 1U_0603_10V4Z
C237 1
2 4.7U_0805_10V4Z
C196 1
2 4.7U_0805_10V4Z
C236 1
2 4.7U_0805_10V4Z
C242 1
2 4.7U_0805_10V4Z
+1.05VS
+1.8VS
+1.8VS
+1.2VS
+1.2VALW
C190
1U_0603_10V4Z
C182
1U_0603_10V4Z
+1.05VS
C198 1
2 0.1U_0402_16V4Z
C197 1
2 0.1U_0402_16V4Z
C188 1
2 0.1U_0402_16V4Z
C221 1
2 1U_0603_10V4Z
C240 1
2 1U_0603_10V4Z
C179 1
2 1U_0603_10V4Z
C193 1
2 1U_0603_10V4Z
C234 1
2 1U_0603_10V4Z
C184 1
2 1U_0603_10V4Z
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
Title
M672MX (4/5)-POWER
Custom
Rev
0.1
Date:
Sheet
1
10
of
49
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C9
C10
C11
C16
C18
C32
C33
D1
D2
D3
D4
D5
D10
D12
D21
D23
D25
D27
D29
E1
E2
E3
E6
E11
E13
E14
E18
E29
E30
E33
F2
F3
F4
F5
F6
F14
F22
F24
F26
F28
G2
G3
G7
G10
P21
T21
V21
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B21
B23
B25
B27
B29
B31
C1
C2
C3
C4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
T29
U2
U3
U4
U5
U6
U14
U15
U16
U17
U18
U19
U20
U31
U33
V2
V3
V4
V5
V14
V15
V16
V17
V18
V19
V20
V29
AN33
AN31
AN19
W3
W14
W15
W16
W17
W18
W19
W20
W21
W31
W33
Y2
Y3
Y4
Y5
Y7
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y29
AA2
AA3
AA14
AA15
AB17
AB19
AB21
P19
G31
G33
H4
H5
H29
J2
J3
J7
J31
J33
K3
K4
K5
K29
L2
L3
L4
L5
L7
L31
L33
M2
M3
M29
N3
N4
N5
N6
N7
N14
N15
N31
N33
P2
P3
P14
P15
P16
P17
P18
P29
R2
R3
R4
R5
R14
R15
R16
R17
R18
R19
R20
R31
R33
T3
T6
T14
T15
T16
T17
T18
T19
T20
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U30F
A3
B2
B3
B4
AL28
AL30
AL33
AN11
AN13
AN15
AN17
AA16
AA17
AA18
AA19
AA20
AA21
AA31
AA33
AB3
AB4
AB5
AB7
AB29
AC2
AC3
AC31
AC33
AD2
AD3
AD4
AD5
AD7
AD29
AE3
AE31
AE33
AF2
AF3
AF4
AF5
AF29
AG2
AG31
AG33
AH1
AH29
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
AJ20
AJ26
AJ28
AJ33
AK31
AL6
AL8
AL10
AL12
AL14
AL16
AL18
AL20
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
Title
M672MX (5/5)-GND
Custom
Rev
0.1
Date:
Sheet
1
11
of
49
+1.8V
+1.8V
JP35
DDRA_SDQ2
DDRA_SDQ3
D
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQS1#
DDRA_SDQS1
<8,13> DDRA_SDQS1#
<8,13> DDRA_SDQS1
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQS2#
DDRA_SDQS2
<8,13> DDRA_SDQS2#
<8,13> DDRA_SDQS2
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDM3
EC_TX_P80_DATA
<13,31> EC_TX_P80_DATA
DDRA_SDQ26
DDRA_SDQ27
DDRA_CKE0
<8> DDRA_CKE0
EC_RX_P80_CLK
DDRA_SBS2
<13,31> EC_RX_P80_CLK
<8,13> DDRA_SBS2
DDRA_SMA12
DDRA_SMA9
DDRA_SMA8
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1
DDRA_SMA10
DDRA_SBS0
DDRA_SWE#
<8,13> DDRA_SBS0
<8,13> DDRA_SWE#
DDRA_SCAS#
DDRA_SCS1#
<8,13> DDRA_SCAS#
<8> DDRA_SCS1#
DDRA_ODT1
<8> DDRA_ODT1
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQS4#
DDRA_SDQS4
<8,13> DDRA_SDQS4#
<8,13> DDRA_SDQS4
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ40
DDRA_SDQ41
B
DDRA_SDM5
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ48
DDRA_SDQ49
EC_RX_P80_CLK
R237 1
2 0_0402_5%
EC_RX_P80_CLK_R
<13> EC_RX_P80_CLK_R
DDRA_SDQS6#
DDRA_SDQS6
<8,13> DDRA_SDQS6#
<8,13> DDRA_SDQS6
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58
DDRA_SDQ59
SDATA
SCLK
<13,14,15,20> SDATA
<13,14,15,20> SCLK
+3VS
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDRA_SDM0
1
DDRA_SDQ6
DDRA_SDQ7
C284
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
C271
0.1U_0402_16V4Z
C269
1K_0402_1%
DDR_CLK0 <15>
DDR_CLK0# <15>
+ C304
@
330U_D2E_2.5VM
0.1U_0402_16V4Z
220P_0402_50V7K
2 @
C270
DDRA_SMA[0..14]
<8,13> DDRA_SMA[0..14]
DDRA_SDQ20
DDRA_SDQ21
<8,13> DDRA_SDQ[0..63]
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
<8,13> DDRA_SDM[0..7]
DDRA_SDM2
Layout Note:
Place near JP35
DDRA_SDQ22
DDRA_SDQ23
+1.8V
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQS3#
DDRA_SDQS3
DDRA_SDQS3# <8,13>
DDRA_SDQS3 <8,13>
DDRA_SDQ30
DDRA_SDQ31
DDRA_CKE1
Swap RP11,RP12 Pin 1 & 2

DDRA_CKE1 <8>
DDRA_SBS2
DDRA_CKE0
C296
C282
C283
C280
C293
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
+0.9VS
C
DDRA_SMA14
1
2
RP11
4
3
56_0404_4P2R_5%
DDRA_SMA11
DDRA_SMA7
DDRA_SMA6
DDRA_SMA9
1
DDRA_SMA12
2
RP12
4
3
56_0404_4P2R_5%
DDRA_SMA8
DDRA_SMA3
1
2
RP6
4
3
56_0404_4P2R_5%
1
2
RP7
4
3
56_0404_4P2R_5%
DDRA_SMA10
1
DDRA_SBS0
2
RP8
4
3
56_0404_4P2R_5%
DDRA_SWE#
1
DDRA_SCAS#
2
RP9
4
3
56_0404_4P2R_5%
DDRA_SCS1#
1
DDRA_ODT1
2
RP10
4
3
56_0404_4P2R_5%
DDRA_SMA11
1
DDRA_SMA14
2
RP13
4
3
56_0404_4P2R_5%
+0.9VS
DDRA_SMA6
DDRA_SMA7
1
2
RP14
4
3
56_0404_4P2R_5%
DDRA_SMA2
DDRA_SMA4
1
2
RP15
4
3
56_0404_4P2R_5%
DDRA_SBS1
DDRA_SMA0
1
2
RP16
4
3
56_0404_4P2R_5%
DDRA_SCS0#
1
DDRA_SRAS#
2
RP17
4
3
56_0404_4P2R_5%
DDRA_SMA13
1
DDRA_ODT0
2
RP18
4
3
56_0404_4P2R_5%
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
DDRA_SBS1
DDRA_SRAS#
DDRA_SCS0#
DDRA_ODT0
DDRA_SMA13
Swap RP6 Pin2 & RP7 Pin 1
DDRA_SMA5
DDRA_SMA1
DDRA_SBS1 <8,13>
DDRA_SRAS# <8,13>
DDRA_SCS0# <8>
DDRA_ODT0 <8>
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDM4
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQS5#
DDRA_SDQS5
DDRA_SDQS5# <8,13>
DDRA_SDQS5 <8,13>
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ52
DDRA_SDQ53
DDR_CLK1
DDR_CLK1#
DDR_CLK1 <15>
DDR_CLK1# <15>
DDRA_SDM6
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQS7#
DDRA_SDQS7
DDRA_SDQS7# <8,13>
DDRA_SDQS7 <8,13>
+1.8V
C281
0.1U_0402_16V4Z
C297
0.1U_0402_16V4Z
C294
0.1U_0402_16V4Z
C295
0.1U_0402_16V4Z
+0.9VS
C289
0.1U_0402_16V4Z
C290
0.1U_0402_16V4Z
C291
0.1U_0402_16V4Z
C287
0.1U_0402_16V4Z
C286
0.1U_0402_16V4Z
C288
0.1U_0402_16V4Z
C292
0.1U_0402_16V4Z
C299
0.1U_0402_16V4Z
C308
0.1U_0402_16V4Z
C307
0.1U_0402_16V4Z
+0.9VS
C306
0.1U_0402_16V4Z
C305
0.1U_0402_16V4Z
C298
0.1U_0402_16V4Z
DDRA_SDQ62
DDRA_SDQ63
DDRA_CKE1
R238 1
R239 1
2 10K_0402_5%
2 10K_0402_5%
1
R241
2
56_0402_5%
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
Layout Note:
Pla ce these resistor
closely JP35,all
trace length Max=1.5"
2006/08/18
2007/8/18
Deciphered Date
3
Compal Secret Data
+ C303
@
330U_D2E_2.5VM
2
DDRA_SDQ14
DDRA_SDQ15
Issued Date
+DIMM_VREF
R235
DIMM0 STD H:5.2mm (BOT)
0.1U_0402_16V4Z
2.2U_0603_6.3V6K 2
C277
DDRA_SDM1
+3VS
C285
R236
C278
1K_0402_1%
DDRA_SDQ12
DDRA_SDQ13
DDR_CLK0
DDR_CLK0#
New Add For SiS
+1.8V
20mils
P-TWO_A5652C-A0G16
A
New Add For SiS
+1.8V
+DIMM_VREF
DDRA_SDQ4
DDRA_SDQ5
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DDRA_SDQS0#
DDRA_SDQS0
<8,13> DDRA_SDQS0#
<8,13> DDRA_SDQS0
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
DDRA_SDQ0
DDRA_SDQ1
+DIMM_VREF
Title
DDRII-SODIMM0
Size
B
Date:
Document Number
Rev
0.1

Sheet
1
12
of
49
+1.8V
+1.8V
JP34
+DIMM_VREF
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQS0#
DDRA_SDQS0
<8,12> DDRA_SDQS0#
<8,12> DDRA_SDQS0
DDRA_SDQ2
DDRA_SDQ3
1
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQS1#
DDRA_SDQS1
<8,12> DDRA_SDQS1#
<8,12> DDRA_SDQS1
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQS2#
DDRA_SDQS2
<8,12> DDRA_SDQS2#
<8,12> DDRA_SDQS2
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDM3
EC_TX_P80_DATA
DDRA_SDQ26
DDRA_SDQ27
2
DDRA_CKE2
<8> DDRA_CKE2
EC_RX_P80_CLK
DDRA_SBS2
<12,31> EC_RX_P80_CLK
<8,12> DDRA_SBS2
DDRA_SMA12
DDRA_SMA9
DDRA_SMA8
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1
DDRA_SMA10
DDRA_SBS0
DDRA_SWE#
<8,12> DDRA_SBS0
<8,12> DDRA_SWE#
DDRA_SCAS#
DDRA_SCS3#
<8,12> DDRA_SCAS#
<8> DDRA_SCS3#
DDRA_ODT3
<8> DDRA_ODT3
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQS4#
DDRA_SDQS4
<8,12> DDRA_SDQS4#
<8,12> DDRA_SDQS4
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ40
DDRA_SDQ41
3
DDRA_SDM5
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ48
DDRA_SDQ49
EC_RX_P80_CLK_R
<12> EC_RX_P80_CLK_R
DDRA_SDQS6#
DDRA_SDQS6
<8,12> DDRA_SDQS6#
<8,12> DDRA_SDQS6
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58
DDRA_SDQ59
SDATA
SCLK
<12,14,15,20> SDATA
<12,14,15,20> SCLK
+3VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
DDRA_SDQ4
DDRA_SDQ5
+DIMM_VREF
DDRA_SDM0
20mils
DDRA_SDQ6
DDRA_SDQ7
1
DDRA_SDQ12
DDRA_SDQ13
DDR_CLK2
DDR_CLK2#
C258
C255
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
DDRA_SDM1
DDR_CLK2 <15>
DDR_CLK2# <15>
DDRA_SDQ14
DDRA_SDQ15
<8,12> DDRA_SMA[0..14]
DDRA_SDQ20
DDRA_SDQ21
<8,12> DDRA_SDQ[0..63]
<8,12> DDRA_SDM[0..7]
C259
C260
DDRA_SDM[0..7]
Layout Note:
Place near JP34
DDRA_SDQ22
DDRA_SDQ23
+1.8V
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQS3#
DDRA_SDQS3
DDRA_SDQS3# <8,12>
DDRA_SDQS3 <8,12>
DDRA_SDQ30
DDRA_SDQ31
DDRA_CKE3
DDRA_CKE3 <8>
DDRA_ODT3
1
DDRA_SCS3#
2
RP3
4
3
56_0404_4P2R_5%
DDRA_SMA11
DDRA_SMA7
DDRA_SMA6
DDRA_CKE3
DDRA_CKE2
1
2
RP5
4
3
56_0404_4P2R_5%
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
DDRA_SCS2#
1
DDRA_ODT2
2
RP4
4
3
56_0404_4P2R_5%
DDRA_SMA14
DDRA_SBS1
DDRA_SRAS#
DDRA_SCS2#
DDRA_ODT2
DDRA_SMA13
C253
C256
C254
C264
C263
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
+0.9VS
2
+1.8V
C266
0.1U_0402_16V4Z
C267
0.1U_0402_16V4Z
C265
0.1U_0402_16V4Z
C257
0.1U_0402_16V4Z
DDRA_ODT2 <8>
+0.9VS
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDM4
C262
DDRA_SDQ38
DDRA_SDQ39
4.7U_0805_10V4Z
C261
4.7U_0805_10V4Z
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQS5#
DDRA_SDQS5
DDRA_SDQS5# <8,12>
DDRA_SDQS5 <8,12>
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ52
DDRA_SDQ53
DDR_CLK3
DDR_CLK3#
DDR_CLK3 <15>
DDR_CLK3# <15>
DDRA_SDM6
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQS7#
DDRA_SDQS7
DDRA_SDQS7# <8,12>
DDRA_SDQS7 <8,12>
DDRA_SDQ62
DDRA_SDQ63
R233 1
R234 1
2 10K_0402_5%
2 10K_0402_5%
+3VS
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
Layout Note:
Pla ce these resistor
closely JP34,all
trace length Max=1.5"
DIMM1 STD H:9.2mm (BOT)
0.1U_0402_16V4Z
Compal Secret Data
2006/08/18
Issued Date
2007/8/18
Deciphered Date
Title
DDRII-SODIMM1
A
DDRA_SBS1 <8,12>
DDRA_SRAS# <8,12>
DDRA_SCS2# <8>
+3VS
2.2U_0603_6.3V6K
DDRA_SDQ[0..63]
DDRA_SDM2
P-TWO_A5692A-A0G16-N
4
DDRA_SMA[0..14]
Size
B
Date:
Document Number
Rev
0.1

Sheet

E
13
of
49
+CPU_CORE
+3VS
+3VS
C99
10K_0402_5%
10K_0402_5%
10K_0402_5%
C405
C79
VTTPWRGD
FSL1
FSL0
CPU
MHz
PCIE PCI
MHz MHz
ZCLK
MHz
133
100
33.3
133
166
100
33.3
133
200
100
33.3
133
FSL2
2
B
E
Q9
MMBT3904_SOT23
2
B
C98
FSL3
Q10
MMBT3904_SOT23
R57
C72
R58
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C71
0.1U_0402_16V4Z
C70
0.1U_0402_16V4Z
C69
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C664
10U_0805_10V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
R32
KC FBM-L11-201209-221LMAT_0805 1
C100
FSL4
CLKGEN_VDD
L13
+3VS
+3VS
R43
2 10K_0402_5%
MODE
R66
2 10K_0402_5%
CLK_RESET#
R528 1
2 10K_0402_5%
STOP#
Use SB03904008L & SB000006A00 FootPrint

CLKGEN_VDD
VDDA
0.1U_0402_16V4Z
10U_0805_10V4Z
FSL0
R55
@ 2.7K_0402_5%
R78
@ 2.7K_0402_5%
FSL1
R54
@ 2.7K_0402_5%
R76
@ 2.7K_0402_5%
50
VDDA
47
GNDA
XTAL_IN
X1
XTAL_OUT
X2
Reference schematic use 1206
FSL2
R53
@ 2.7K_0402_5%
R52
2.7K_0402_5%
<33> CLK_14M_SIO
<9> REF_CLK0
<20> REF_CLK1
<18> VBRCLK
FSL3
R74
@ 2.7K_0402_5%
SB
R73
@ 2.7K_0402_5%
1394
R56
2.7K_0402_5%
FSL4
EC
<19> CLK_PCI_SB
<26> CLK_PCI_1394
<31> CLK_PCI_EC
CLK_14M_SIO
REF_CLK0
REF_CLK1
VBRCLK
R35
R79
R77
R541
1
1
1
1
CLK_PCI_SB
R75
CLK_PCI_1394
R37
CLK_PCI_EC
R72
22_0402_5%
33_0402_5%
22_0402_5%
22_0402_5%
FSL0
FSL1
2 33_0402_5%
2 33_0402_5%
2 33_0402_5%
2
2
2
2
DB
C82
2 4.7K_0402_5%
2 4.7K_0402_5%
2 4.7K_0402_5%
1
1
1
18P_0402_50V8J
<29> WLAN_CLKREQ#
FSL0
FSL1
FSL2
<33> CLK_PCI_DB
<48>
VGATE
<25>
CPUSTP#
<12,13,15,20> SDATA
Y1
14.31818MHZ_16PF_DSX840GA
*FSL0/REF0_2x
**FSL1/REF1_2x
FSL2
**FSL2/PCICLK0_2x
FSL3
10
**FS3/PCICLK1_2x
FSL4
11
**FS4/PCICLK2
STOP#
12
*(PCI_STOP#)/PCICLK3
MODE
15
**MODE/PCICLK4
2 33_0402_5%
CLKREQ0#
16
(PECLKREQ0#)/PCICLK5
WLAN_CLKREQ# R71
2 33_0402_5%
CLKREQ1#
17
(PECLKREQ1#)/PCICLK6
CLK_PCI_DB
R51
2 33_0402_5%
PCICLK7
18
PCICLK7
VTTPWRGD
VGATE
R81
R82
1
1
2 0_0402_5%
2 0_0402_5%
CK_PWRGD
CPUSTP#
R67
2 0_0402_5%
CLK_RESET# 28
<12,13,15,20> SCLK
SDATA
R338 1
2 0_0402_5%
SMDATA
45
SDATA
SCLK
R337 1
2 0_0402_5%
SMCLK
46
SCLK
XTAL_OUT
R355
R344
2.2K_0402_5% 1K_0402_5%
DDATA
<29,30> DDATA
39
29
2 33_0402_5%
H_CLK_DP0
H_CLK_DP0 <4>
2 33_0402_5%
H_CLK_DN0
H_CLK_DN0 <4>
CPUT_L1
52
CPUT_L1
R94
2 33_0402_5%
H_CLK_DP1
H_CLK_DP1 <7>
CPUC_L1
51
CPUC_L1
R101 1
2 33_0402_5%
H_CLK_DN1
H_CLK_DN1 <7>
PCIET_L0
PCIEC_L0
44
43
PCIET_L0
PCIEC_L0
R91
R90
1
1
2 33_0402_5%
2 33_0402_5%
PCIE_CLK_NB
PCIE_CLK_NB#
PCIE_CLK_NB <7>
PCIE_CLK_NB# <7>
NB
PCIET_L1
PCIEC_L1
41
40
PCIET_L2
PCIEC_L2
38
37
PCIET_L2
PCIEC_L2
R89
R88
1
1
2 33_0402_5%
2 33_0402_5%
PCIE_CLK_SB
PCIE_CLK_SB#
PCIE_CLK_SB <20>
PCIE_CLK_SB# <20>
SB
PCIET_L3
PCIEC_L3
36
35
PCIET_L3
PCIEC_L3
R106 1
R105 1
2 33_0402_5%
2 33_0402_5%
PCIE_CLK_307
PCIE_CLK_307#
PCIE_CLK_307 <18>
PCIE_CLK_307# <18>
PCIET_L4F
PCIEC_L4F
34
33
PCIET_L4F
PCIEC_L4F
R87
R86
1
1
2 33_0402_5%
2 33_0402_5%
PCIE_CLK_EXP
PCIE_CLK_EXP#
PCIE_CLK_EXP <30>
PCIE_CLK_EXP# <30>NewCard
PCIET_L5F
PCIEC_L5F
31
30
PCIET_L5F
PCIEC_L5F
R104 1
R103 1
2 33_0402_5%
2 33_0402_5%
PCIE_CLK_WLAN
PCIE_CLK_WLAN#
PCIE_CLK_WLAN <29>
PCIE_CLK_WLAN# <29>WLAN
SATACLKC_L
SATACLKT_L
48
49
SATACLKC_L
SATACLKT_L
R92
R93
1
1
2 33_0402_5%
2 33_0402_5%
SATA_CLK_DN
SATA_CLK_DP
SATA_CLK_DN <21>
SATA_CLK_DP <21>
ZCLK0
ZCLK1
21
22
ZCLK0
ZCLK1
R49
R70
1
1
2 22_0402_5%
2 22_0402_5%
Z_CLK0
Z_CLK1
Z_CLK0
Z_CLK1
**SEL24_48#/24_48MHz
26
12MHz
25
12M
R68
2 33_0402_5%
USB_CLK_12M
307LV
<9>
<19>
USB_CLK_12M <21>
Pin 26 need BIOS to set disable,

for saving power & good EMI
ICS9LPR600BGLF-T_TSSOP56
+3VS
R352
2.2K_0402_5%
R102 1
*(CPU_STOP#)/RESET#
18P_0402_50V8J
+3VALW
R95
CPUC_L0
VTTPWRGD/PD#/(CLK_STOP#)
7
8
13
20
27
53
C86
3
4
CPUT_L0
XTAL_IN
R39
R40
R38
H_BSEL0
H_BSEL1
H_BSEL2
55
54
GNDREF
GNDPCI_0
GNDPCI_1
GNDZ
GND48
GNDCPU
<5>
<5>
<5>
CPUT_L0
CPUC_L0
ICS9LPR600
R50
EXP_CLKREQ#
<30> EXP_CLKREQ#
VDDPCIEX_0
VDDPCIEX_1
@ 2.7K_0402_5%
2 KC FBM-L11-201209-221LMAT_0805
1
1
C404
C403
GNDPCIEX_0
GNDPCIEX_1
C420
@
10U_0805_10V4Z
42
32
+3VS
R80
U4
1
1
VDDREF
VDDPCI_0
VDDPCI_1
VDDZ
VDD48
VDDCPU
L34
Part no.SD028270180
2
14
19
23
24
56
+3VS
2
G
Z_CLK0
Z_CLK1
CLK_PCI_SB
CLK_PCI_1394
CLK_PCI_EC
CLK_PCI_DB
REF_CLK0
REF_CLK1
R343
1K_0402_5%
C62
C61
C63
C57
C66
C59
C65
C64
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
@ 10P_0402_50V8J
@ 10P_0402_50V8J
@ 10P_0402_50V8J
@ 10P_0402_50V8J
@ 10P_0402_50V8J
@ 10P_0402_50V8J
@ 10P_0402_50V8J
@ 10P_0402_50V8J
SDATA
Q30
2N7002_SOT23
DCLK
DCLK
3
S
<29,30>
2
G
+3VS
SCLK
Q31
2N7002_SOT23
Compal Secret Data
Issued Date
2005/03/01
Deciphered Date
2006/03/01
5
Title
Clock Generator ICS9LPR600C

Custom
Rev
0.1
Date:
Sheet
1
14
of
49
+1.8V
L25
2 KC FBM-L11-201209-221LMAT_0805
C274
D
10U_0805_10V4Z
C665
0.1U_0402_16V4Z
C301
10U_0805_10V4Z
C273
0.1U_0402_16V4Z
C302
C279
C275
CLKBUF_VDD
1
D
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8V
L26
2 KC FBM-L11-201209-221LMAT_0805
1
1
C268
@
10U_0805_10V4Z
C272
0.1U_0402_16V4Z
CLKBUF_AVDD
C276
Horizontal rotate
10U_0805_10V4Z
U12
Reference schematic use 1206
<8>
<8>
CLK_INC
CLK_INT
CLKBUF_VDD
3
11
25
21
VDD1.8_0
VDD1.8_1
VDD1.8_2
VDD1.8_3
CLK_INC
CLK_INT
10
9
CLK_INC
CLK_INT
SDATA
SCLK
<12,13,14,20> SDATA
<12,13,14,20> SCLK
FB_OUTA
R243 2
R245 2
R244 2
1 0_0402_5%
1 0_0402_5%
20
19
1 0_0402_5%
R242 2
FB_INA
1 22_0402_5%
18
17
8
6
28
24
14
C300
SDATA
SCLK
FB_IN
FB_OUT
GND_0
GND_1
GND_2
GND_3
GND_4
VDDA1.8
CLKBUF_AVDD
DDRC0
DDRT0
1
2
DDR C0 R560 1
DDRT0 R561 1
2 0_0402_5%
2 0_0402_5%
DDR_CLK0#
DDR_CLK0
DDRC1
DDRT1
5
4
DDR C1 R562 1
DDRT1 R563 1
2 0_0402_5%
2 0_0402_5%
DDR_CLK2#
DDR_CLK2
DDRC2
DDRT2
13
12
DDR C2 R564 1
DDRT2 R565 1
2 0_0402_5%
2 0_0402_5%
DDR_CLK1#
DDR_CLK1
DDRC3
DDRT3
15
16
DDR C3 R566 1
DDRT3 R567 1
2 0_0402_5%
2 0_0402_5%
DDR_CLK3#
DDR_CLK3
DDRC4
DDRT4
23
22
DDRC5
DDRT5
27
26
DDR_CLK0# <12>
DDR_CLK0 <12>
DDR_CLK2# <13>
DDR_CLK2 <13>
DDR_CLK1# <12>
DDR_CLK1 <12>
DDR_CLK3# <13>
DDR_CLK3 <13>
ICS9P935AFLF-T_SSOP28
10P_0402_50V8J
C300 close to R242
Compal Secret Data
Issued Date
2005/03/01
Deciphered Date
2006/03/01
5
Title
Clock Buffer ICS9P935

Custom
Rev
0.1
Date:
Sheet
1
15
of
49
LCD POWER CIRCUIT

+LCDVDD
Level Shift Circuit
+3VS
+3VALW
W=60mils
D
1 2
15K_0402_5%
2
10K_0402_5%
GMCH_ENVDD_Q
3
1
10K_0402_5%
Q5
SI2301BDS_SOT23
+LCDVDD
Q7
3
W=60mils
2N7002_SOT23
C29
@
4.7U_0805_10V4Z
Q37
MMBT3904_SOT23
2
B
E
Q38
MMBT3904_SOT23
C32
0.1U_0402_16V4Z
47K_0402_5%
R15
2
G
2
B
<18> GMCH_ENVDD
1
2
2
G
Q8
2N7002_SOT23
1
R544
R543
C35
0.1U_0402_16V4Z
C36
@
4.7U_0805_10V4Z
R542
R17
100K_0402_5%
+3VS
+3VALW
1
2
R16
300_0603_5%
R22
100K_0402_5%
LCD/PANEL BD. Conn.

INVERTER Conn.
+3VS
JP31
<18>
<18>
0.1U_0402_16V4Z
+LCDVDD
+LCDVDD_L
1
C28
10U_0805_10V4Z
C25
TXOUT1TXOUT1+
TXOUT1TXOUT1+
<18>
<18>
TXOUT2TXOUT2+
<18>
<18>
TXCLKTXCLK+
L10 2
TXOUT0TXOUT0+
TXOUT0TXOUT0+
TXOUT2TXOUT2+
TXCLKTXCLK+
+LCDVDD_L
(60 MIL)
FBMA-L11-201209-221LMA30T_0805 +3VS
C22
220P_0402_50V7K
2 @
0.1U_0402_16V4Z
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
32
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
GND1
GND2
ACES_88242-3001
ME@
TZOUT0TZOUT0+
TZOUT0- <18>
TZOUT0+ <18>
TZOUT1TZOUT1+
JP37
TZOUT1- <18>
TZOUT1+ <18>
TZOUT2TZOUT2+
TZOUT2- <18>
TZOUT2+ <18>
TZCLKTZCLK+
TZCLKTZCLK+
I2CC_SDA
I2CC_SCL
<31> DAC_BRIG
+INVPWR_B+
<18>
<18>
DAC_BRIG
1
2
3
4
5
6
7
INV_PWN_R
DISPOFF#
C44
INVT_PWM
C48
DISPOFF#
C45
MOLEX_53780-0790
ME@
I2CC_SDA <18>
I2CC_SCL <18>
1
1
2
@ 470P_0402_50V7K
2
@ 470P_0402_50V7K
2
@ 470P_0402_50V7K
+3VS
+3VS
1
C20
<18>
<18>
C18
R28
220P_0402_50V7K
2 @
4.7K_0402_5%
Follow HEL80's pin definition
<31>
BKOFF#
BKOFF#
D10 1
INVT_PWM
R25
2 RB751V_SOD323
DISPOFF#
Except pin 29
<31> INVT_PWM
2 0_0402_5%
INV_PWN_R
+INVPWR_B+
L12 2
1
KC FBM-L11-201209-221LMAT_0805
B+
L11 2
1
KC FBM-L11-201209-221LMAT_0805
C49
A
0.1U_0603_50V4Z
C43
2006/08/18

2007/8/18
Deciphered Date
5
68P_0402_50V8K
2 @
Compal Secret Data
Issued Date
Title
LVDS & DVI Connector

Size
B
Date:
Document Number

Sheet

1
16
of
49
Rev
0.1
+5VS
L1
KC FBM-L11-201209-221LMAT_0805
D6
D5
D4
@
@
@
DAN217_SC59 DAN217_SC59 DAN217_SC59
0208 Add L64 for EMI
CRT Connector
+R_CRT_VCC
+CRT_VCC
W=40mils
D1
F1
VGA_CRT_R
CRT_R_1
L9
0_0603_5%
L7
0_0603_5%
VGA_CRT_G
<9> VGA_CRT_G
R10
L5
VGA_CRT_B
<9> VGA_CRT_B
R9
R8
C15
2
1.1A_6VDC_FUSE
1
C12
C8
CRT_R_2
CRT_G_1
L6 1
2
FBMA-L10-160808-800LMT_0603
CRT_G_2
CRT_B_1
L4 1
2
FBMA-L10-160808-800LMT_0603
CRT_B_2
1
C17
2
2
10P_0402_50V8J
2
10P_0402_50V8J
JP29
C9
C16
2
2
18P_0402_50V8J
18P_0402_50V8J
18P_0402_50V8J
C13
10P_0402_50V8J 10P_0402_50V8J
2
2
C10
10P_0402_50V8J
2
R6
P
2
CRT_HSYNC_0
1
R7
A
3
1
10K_0402_5%
1
L2
CRT_HSYNC_2
2
FCM1608C-121T_0603
CRT_VSYNC_2
2
FCM1608C-121T_0603
1
2 CRT_HSYNC_1
39_0402_1%
C6
10P_0402_50V8J
TC7SET125FUF_SC70
DSUB_12
1
C4
C7
68P_0402_50V8K
DSUB_15
10P_0402_50V8J
+CRT_VCC
2
0.1U_0402_16V4Z
4CRT_VSYNC_0 1
R5
68P_0402_50V8K
2 CRT_VSYNC_1
39_0402_1%
12/22 Change to SE071680J80
TC7SET125FUF_SC70
OE#
VGA_CRT_VSYNC
<9> VGA_CRT_VSYNC
C2
U1
C5
Place closed to chipset
16
17
SUYIN_7846S-15G2T-HI
ME@
2
100P_0402_50V8J
U2
OE#
VGA_CRT_HSYNC
<9> VGA_CRT_HSYNC
8/29 changeC9,C14,C17 from 22P @ to 18p 1L3
2
0.1U_0402_16V4Z
5
C11
C3
+CRT_VCC
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
1
C14
10P_0402_50V8J
9/5 change C8,C12,C15 from 10P @to mount
C1
0.1U_0402_16V4Z
2
L8 1
2
FBMA-L10-160808-800LMT_0603
0_0603_5%
75_0402_5%
2
75_0402_5%
2
75_0402_5%
RB411DT146_SOT23-3
+3VS
12/15 Modified. Note L26~L30 are 0 Ohm resisters
8/29 changeL4,L6,L8 from 0 Ohm to bead
Place closed to chipset

<9> VGA_CRT_R
+L_CRT_VCC 2
W=40mils
TV-OUT Conn.
D2
D3
DAN217_SC59
@
DAN217_SC59
@
+5VS
D24
D23
D25
@
@
@
DAN217_SC59 DAN217_SC59 DAN217_SC59
+3VS
1
+CRT_VCC
+3VS
2
FCM1608C-121T_0603
TV_Y
TVDACR_CVBS
<18> TVDACR_CVBS
2
FCM1608C-121T_0603
2.2K_0402_5%
DSUB_12
@
75_0402_5%
C388
@
@
2
C414
2
6P_0402_50V8D
6P_0402_50V8D
C398
C387
@
6P_0402_50V8D
2
C407
@
DSUB_15
2
6P_0402_50V8D
GMCH_CRT_DATA <9>
GMCH_CRT_CLK <9>
Q2
2N7002_SOT23
SUYIN_030107FR007SX08FU
ME@
@
6P_0402_50V8D
2
75_0402_5%
@
75_0402_5%
C397
Q1
2N7002_SOT23
1
R333
R330
R339
L31
2
G
2.2K_0402_5%
3
6
7
5
2
4
1
8
9
TV_C
TV_CVBS
2
FCM1608C-121T_0603
L30
TVDACB_C
<18> TVDACB_C
L33
R3
2
G
JP30
TVDACG_Y
<18> TVDACG_Y
2.2K_0402_5%
2
R2
+3VS
8/29 change L30,L31,L33 from BEAD to @
R1
3
6P_0402_50V8D
R4
2.2K_0402_5%
8/29 change R330,R333,R339 from 75Ohm to @
8/29 change C397,C388,C414,C398,C387,C407 from 6P to @

+3VS
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
A
Title
CRT & TV-OUT Connector

Size
B
Date:
Document Number

Sheet

E
17
of
49
Rev
0.1
+1.8VS
+1.8VS
L36 1
2 MBK1608121YZF_0603
1
1
C444
C425
C436
2
10U_0805_10V4Z
0.1U_0402_16V4Z
2
VB_PCIEVDD
C424
C423
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Modify 10U_1206 to
10U_0805
L37 1
2 MBK1608121YZF_0603
VB_PCIEAVDD
254mA
+3VS
96mA
MBK1608121YZF_0603
L35 1
2
1
C427
35mA
C422
0.1U_0402_16V4Z
2
Modify 10U_1206 to
10U_0805
C439
10U_0805_10V4Z
1
R365
C443
0.1U_0402_16V4Z
VB_LAVDD
1
C430
C442
C429
C431
0.1U_0402_16V4Z
VB_PCIEAVSS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8VS
VB_PCIEVDD
392mA
VB_DACVDD
VB_PCIEAVDD
VB_LVDSPLLVDD
VB_PLL1VDD
VB_LAVDD
2
VB_LAVDD
R108 1
R107 1
1
2 R96 1
C110
1U_0603_10V4Z
2 1.65K_0402_1%
2 6.04K_0402_1%
2 24K_0402_1%
<16>
<16>
TZOUT2+
TZOUT2TZOUT1+
TZOUT1TZOUT0+
TZOUT0TZCLK+
TZCLKTXCLK+
TXCLKTXOUT0+
TXOUT0TXOUT1+
TXOUT1TXOUT2+
TXOUT2-
307LV/ELV:
<16>
Stuff R107, R96, C110
<16>
Un-stuff R108
<16>
307DV/CP: Stuff R108
<16>
Un-stuff R107, R96, C110 <16>
<16>
<16>
<16>
<16>
<16>
<16>
<16>
<16>
<16>
<16>
<16>
B
<14>
VBRCLK
VBRCLK
EXTSWING
I2CC_SDA
I2CC_SCL
R540 1
2 0_0402_5%
T15 PAD
T11 PAD
PAD
T9
E13
F12
J1
J2
G11
F10
E10
F13
C2
L6
B3
K2
K3
K4
J5
J6
J7
J8
J9
L1
L2
L3
M1
G10
D13
D12
D11
D10
E9
E8
E7
E6
E5
LAVDD
LAVDD
LAVDD
LAVDD
LAVDD
LAVDD
LAVDD
LAVDD
LAVDD
PERN5/SVB_Bn
PERP5/SVB_Bp
PERN4/SVB_Gn
PERP4/SVB_Gp
PERN3/SVB_Rn
PERP3/SVB_Rp
N12
N13
N10
N11
N8
N9
HDVBN2_C
HDVBP2_C
HDVBN1_C
HDVBP1_C
HDVBN0_C
HDVBP0_C
<7>
<7>
<7>
<7>
<7>
<7>
PERN2/SVA_Bn
PERP2/SVA_Bp
PERN1/SVA_Gn
PERP1/SVA_Gp
PERN0/SVA_Rn
PERP0/SVA_Rp
N6
N7
N4
N5
N2
N3
HDVAN2_C
HDVAP2_C
HDVAN1_C
HDVAP1_C
HDVAN0_C
HDVAP0_C
<7>
<7>
<7>
<7>
<7>
<7>
REFCLKN
REFCLKP
PCIERSET0
PCIERSET1
L7
L8
L4
L5
VB_PCIERSET0R370 1
VB_PCIERSET1R369
VACLK
VBCLK
VBHSYNC
VBVSYNC
VBHCAD
VBHCLK
K13
J12
K11
J11
L13
L12
V2RSET
V2COMP
TVDACR
TVDACG
TVDACB
TVCSYNC
B2
B1
D2
D1
E2
E1
PCIEAVSS
LVDSPLLVSS
PLL1VSS
L9
A2
K1
DACVSS
DACVSS
DACVSS
DACVSS
DACVSS
C1
D3
E3
E4
F4
SiS307ELV
8/28 Change U6 from SIS307LV SA00000O920 to SIS307ELV SA00000O930
LDDCDATA
LDDCCLK
VBOSCO
VBRCLK
PFTEST2
PFTEST1
PFTESTO
EXTRSTN
VBCLK_RR132 1
VACLK
<9>
VBCLK
<9>
VBHSYNC <9>
VBVSYNC <9> Side-Band
VBCAD
<9> Signals
VBHCLK <9>
VB_DACVDD
2 0_0402_5%
115_0402_1%
AGND
TVDACR_CVBS <17>
TVDACG_Y <17>
TVDACB_C <17>
PAD
T6
307ELV:NC these 4 pins!
VB_PCIEAVSS
VB_LVDSPLLVSS
VB_PLL1VSS
C109 1
2 0.1U_0402_16V4Z
AGND
307ELV:change C94 to 0 ohm
307LV/DV/CP:C94=0.1uF
V2COMP
C94 1
2 0_0402_5%
8/28 Change C94 from 0.1U to 0 Ohm+3VS
VB_DACVDD
C92
0.1U_0402_16V4Z
SIS307LV-B0_BGA_167P
L14
C93
C91
C669
10U_0805_10V4Z
2
2
4.7U_0805_10V4Z
0.01U_0402_16V7K
AGND
C670
1_0603_5%
10U_0805_10V4Z
7/30 change L14 to 1_0603

Add C669 and C670
VB_VDD3V
0.1U_0402_16V4Z
R334
14.31818MHZ_16PF_DSX840GA
R125 1
@
2
2 10_0402_5% VBRCLK_R
2
2
C116
C113
@
@
27P_0402_50V8J
27P_0402_50V8J
1
1
+3VS
11mA
L17
VB_PLL1VDD
1
2
MBK1608121YZF_0603 1
1
1
C118
C119
C154
C434
NOTE: all stuffed(default)

Modify before using!
C399
2 499_0402_1%
124_0402_1%
Y2 @
1
VBOSCO
2
0_0402_5% 1
10U_0805_10V4Z
2
PCIE_CLK_307# <14>
PCIE_CLK_307 <14>
99mA
General I/O Power

1
R358
C402
0.01U_0402_16V7K
2
1
2
R336
0_0402_5%
2 33_0402_5%
R345 1
V2RSET R346
V2COMP
AGND
F5
F6
F7
F8
F9
G5
G6
G7
G8
G9
H5
H6
H7
H8
H9
J10
+3VS
DACVDD
PCIEAVDD
LVDSPLLVDD
PLL1VDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
VDD3V
EXTSWING
LX3P
LX3N
LX2P
LX2N
LX1P
LX1N
LX0P
LX0N
LXC1P
LXC1N
LXC2P
LXC2N
LX4P
LX4N
LX5P
LX5N
LX6P
LX6N
LX7P
LX7N
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
<9,19> NB_RST#
VBOSCO
VBRCLK_R
C13
A12
A13
C11
C12
A10
A11
C9
C10
A8
A9
C7
C8
A6
A7
C5
C6
A4
A5
C3
C4
Modify 10U_1206 to
10U_0805
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
100K_0402_5%
PCIEVDD
PCIEVDD
PCIEVDD
PCIEVDD
PCIEVDD
PCIEVDD
PCIEVDD
PCIEVDD
PCIEVDD
PCIEVDD
PCIEVDD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
0.1U_0402_16V4Z
2
VB_LVDSPLLVSS
A3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
D4
D5
D6
D7
D8
D9
1
R130
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
T10
T12
T16
T13
T14
T19
T22
<16> GMCH_ENVDD
<31> ENBKL
K12
K10
K9
K8
K7
K6
K5
L10
L11
M2
M3
M4
M5
M6
M7
M8
M9
M10
M11
M12
M13
N1
For 307LV/ELV only
GPIOA
GPIOB
GPIOC
GPIOD
LCDSENSE/GPIOE
INTN/GPIOF
GPIOG
GPIOH
GPIOI
GPIOJ
GPIOK
V2HSYNC/GPIOL
V2VSYNC/GPIOM
TSCLKI/GPION
TVCLKO/GPIOO
H13
H12
H11
H10
J4
H4
G4
C421
G2
H2
H1
G1
E12
E11
G13
G12
F11
F3
G3
F2
F1
H3
J3
+3VS
L32
1
2
MBK1608121YZF_0603
VB_LVDSPLLVDD
30mA
PAD
PAD
PAD
PAD
PAD
PAD
C428
10U_0805_10V4Z
2
Modify 10U_1206 to
10U_0805
VB_VDD3V
T17
T20
T21
T18
T7
T8
0.1U_0402_16V4Z
0_0402_5%
U6
0.01U_0402_16V7K
0_0603_5%
+1.8VS
VB_PLL1VSS
C441
C437
C440
0.1U_0402_16V4Z
AGND
0.01U_0402_16V7K
1
2
R139
0_0402_5%
10U_0805_10V4Z
A
C433
DDC pull-up
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
I2CC_SCL
I2CC_SDA
R124
1
1
R118
+5VS
2.2K_0402_5%
2
2
2.2K_0402_5%
Internal Core Power
Compal Secret Data
Issued Date
2005/03/01
Deciphered Date
2006/03/01
Title

LVDS Encoder SiS307LV

Custom
Rev
0.1
Date:
Sheet
18
of
49
+3VS
R432 need to close to R5C833
PCI_REQ#4
R189 1
2 8.2K_0402_5%
PCI_REQ#3
R186 1
2 8.2K_0402_5%
PCI_REQ#2
R180 1
2 8.2K_0402_5%
PCI_REQ#1
R181 1
2 8.2K_0402_5%
PCI_PERR#
R432 1
2 8.2K_0402_5%
INT_N_A
R408 1
2 8.2K_0402_5%
PCI_PIRQB#
R412 1
2 8.2K_0402_5%
PCI_PIRQC#
R410 1
2 8.2K_0402_5%
PCI_PIRQD#
R413 1
2 8.2K_0402_5%
PCI_FRAME#
R419 1
2 8.2K_0402_5%
P CI_IRDY#
R421 1
2 8.2K_0402_5%
PCI_TRDY#
R416 1
2 8.2K_0402_5%
PCI_STOP#
R418 1
2 8.2K_0402_5%
PCI_SERR#
R422 1
2 8.2K_0402_5%
PCI_DEVSEL# R417 1
2 8.2K_0402_5%
PCI_PLOCK#
2 8.2K_0402_5%
U11A
<26> PCI_AD[0..31]
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
<9>
ZAD[0..16]
ZAD[0..16]
+1.8VS
R198
150_0402_1%
SZVREF
<9>
<9>
<9>
<9>
R200
C194
49.9_0402_1%
0.1U_0402_16V4Z
<9>
<9>
ZSTB_DP0
ZSTB_DN0
ZSTB_DP1
ZSTB_DN1
ZUREQ
ZDREQ
SZCMP_N
SZCMP_P
<14>
Z_CLK1
Y22
Y25
Y23
W21
Y26
W22
W24
W25
U21
U24
U22
T22
U25
T23
T25
T26
AA26
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
V22
V23
V25
V26
ZSTB0
ZSTB0#
ZSTB1
ZSTB1#
AA23
AA24
ZUREQ
ZDREQ
AB24
AB25
ZCMP_N
ZCMP_P
AVDD_SZ4X
AVSS_SZ4X
AA22
AB23
SZVREF
AB26
AC26
PCI
MuTIOL
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
H5
J4
J3
K1
K2
J5
K4
K3
L2
K5
L4
L3
M1
M2
L5
M4
P3
R1
R2
P5
R4
R3
T1
T2
T4
T3
U1
U2
T5
U4
U3
V1
IDE
AVDD_Z4X
AVSS_Z4X
ZVREF
ZCLK
PREQ4#
PREQ3#
PREQ2#
PREQ1#
PREQ0#
H2
H1
G3
G4
G2
PCI_REQ#4
PCI_REQ#3
PCI_REQ#2
PCI_REQ#1
PCI_REQ#0
PGNT4#
PGNT3#
PGNT2#
PGNT1#
PGNT0#
J2
J1
H3
H4
G5
PCI_GNT#4
PCI_GNT#3
PCI_GNT#2
PCI_GNT#1
PCI_GNT#0
C/BE3#
C/BE2#
C/BE1#
C/BE0#
L1
M3
N5
R5
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
INTA#
INTB#
INTC#
INTD#
F5
F4
F3
G1
INT_N_A
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
FRAME#
IRDY#
TRDY#
STOP#
SERR#
PAR
DEVSEL#
PLOCK#
N1
N2
M5
N3
P2
P4
N4
P1
PCI_FRAME#
P CI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_SERR#
PCI_PAR
PCI_DEVSEL#
PCI_PLOCK#
PCI_FRAME# <26>
PCI_IRDY# <26>
PCI_TRDY# <26>
PCI_STOP# <26>
PCI_SERR# <26>
PCI_PAR <26>
PCI_DEVSEL# <26>
PCICLK
PCIRST#
V2
D5
CLK_PCI_SB
PCI_RST#_R
CLK_PCI_SB <14>
IDA0
IDA1
IDA2
IDA3
IDA4
IDA5
IDA6
IDA7
IDA8
IDA9
IDA10
IDA11
IDA12
IDA13
IDA14
IDA15
AE19
AD18
AC17
AF18
AB16
AE17
AD16
AF16
AE16
AF17
AC16
AD17
AE18
AB17
AF19
AC18
IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
IDSAA2
IDSAA1
IDSAA0
AD21
AD20
AB20
IDE_DA2
IDE_DA1
IDE_DA0
IDECSA1#
IDECSA0#
AC21
AB21
IDE_DCS3#
IDE_DCS1#
IIORA#
IIOWA#
IDACKA#
AF20
AD19
AC19
IDE_DIOR#
IDE_DIOW#
IDE_DDACK#
ICHRDYA
IDREQA
IIRQA
CBLIDA
AE20
AB18
AB19
AC20
IDE _DIORDY
IDE_DDREQ
IDE_IRQ
V3
V4
IDEAVDD
IDEAVSS
AVDD_IDE
AVSS_IDE
+1.8VS
PCI_REQ#0 <26>
<26> PCI_PERR#
PAD
T28
PAD
T29
PAD
T27
PAD
T26
PCI_GNT#0 <26>
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
<26>
<26>
<26>
<26>
INT_N_A <7,9>
PCI_PIRQC# <26>
PCI_PIRQD# <26>
R384 1
R373 1
2 33_0402_5%
2 33_0402_5%
PCI_RST# <24,26,28,29,30,31,33>
NB_RST# <9,18>
IDE_DD[0..15] <24>
+3VS
IDE _DIORDY R450 1 @
2 4.7K_0402_5%
IDE_IRQ
R434 1
2 8.2K_0402_5%
IDE_DDREQ
R441 1 @
2 4.7K_0402_5%
IDE_IRQ
R437 1 @
2 4.7K_0402_5%
IDE_DD7
R218 1
2 5.6K_0402_5%
IDE_DA[0..2] <24>
R450 => Intel :Pull-up 4.7K ohm (Mount) SiS : Pull-up ? ohm (Un-Mount)
R434 => Intel :Pull-up 8.2K ohm (Mount) SiS :Not Pull-up
IDE_DCS3# <24>
IDE_DCS1# <24>
2
56_0402_5%
SZCMP_N
1
R204
2
56_0402_5%
SZCMP_P
AE22
AD22
SPI_DI
SPI_DO
AF21
AE21
SPI_CS1N
SPI_CS0N
IDE_DIOR# <24>
IDE_DIOW# <24>
IDE_DDACK# <24>
IDE_DIORDY <24>
IDE_DDREQ <24>
IDE_IRQ <24>
R437 => Intel :Don't Pull-down SiS : Pull-down ? ohm (Un-Mount)

R218 => Intel :Don't Pull-down SiS : Pull-down 5.6K ohm (Mount)
+1.8VS
8mA
IDEAVDD
L47 1
2
MBK1608121YZF_0603
0.1U_0402_16V4Z
SPI
SPI_CLK
AF22
SPI_HARDWARE_TRAP
AF23
+1.8VS
16mA
L49 1
2
MBK1608121YZF_0603
C552
10U_0805_10V4Z
C549
0.1U_0402_16V4Z
1
R446
C535
0.01U_0402_16V7K
1
R428
2
4.7K_0402_5%
C521
0.1U_0402_16V4Z
2
0_0402_5%
AVDD_SZ4X
2
0_0402_5%
C550
0.01U_0402_16V7K
Compal Secret Data
AVSS_SZ4X
Issued Date
2005/03/01
Deciphered Date
2006/03/01
5
SPI_Hardware Trap
0:LPC (Default)
1:SPI
SIS968-B0_TEBGA_570P
IDEAVSS
1
R215
R441 => Intel :Don't Pull-down SiS : Pull-down ? ohm (Un-Mount)
C536
1
R206
R191 1
Title

SIS968(1/5)-PCI_IDE_MuTIOL

Custom
Rev
0.1
Date:
Sheet
1
19
of
49
U11B
C172
C473
0.1U_0402_16V4Z
15P_0402_50V8J
BAT_PWRGD
SB_PWRGD
1
+RTCVCC
F1
E4
BATOK
PWROK
+3VS
R430 1
R429 1
2 4.7K_0402_5%
2 10K_0402_5%
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
<31,33> LPC_FRAME#
<33> LPC_DRQ0#
<26,31,33> SERIRQ
LPC_DRQ0#
SERIRQ
B11
TXEN
TXER
C12
C11
TX_EN
TXER
TXD0
TXD1
TXD2
TXD3
D12
A13
B13
C13
TXD_0
TXD_1
TXD_2
TXD_3
RGMCMP_N
RGMCMP_P
RGMVREF
A14
B14
C14
RGMCMP_N
RGMCMP_P
RGMVREF
RXCLK
A11
RXCLK
RXDV
RXER
C10
E12
RXDV
RXER
RXD0
RXD1
RXD2
RXD3
A10
C9
B9
A9
RXD0
RXD1
RXD2
RXD3
E10
E11
E14
E13
COL
CRS
H_MDC
MDIO
D8
F8
E8
A7
GPIO21
GPIO22
GPIO23
GPIO24
PRX0+
PRX0PTX0+
PTX0PRX1+
PRX1PTX1+
PTX1-
M26
M25
N24
N23
K26
K25
L24
L23
PCIE_PTX_C_IRX_P0
PCIE_PTX_C_IRX_N0
PCIE_ITX_PRX_P0 C515
PCIE_ITX_PRX_N0 C511
PCIE_PTX_C_IRX_P1
PCIE_PTX_C_IRX_N1
PCIE_ITX_PRX_P1 C512
PCIE_ITX_PRX_N1 C506
NC11
NC10
NC9
NC8
NC7
NC6
NC5
NC4
F26
F25
G24
G23
H26
H25
J24
J23
PCLK100P
PCLK100N
AVDD_PEXTRX
AVSS_PEXTRX
RSET0
RSET1
P26
P25
R25
R26
P22
P21
PCIE_CLK_SB
PCIE_CLK_SB#
AVDD_PEXTRX
AVSS_PEXTRX
R420 1
R426 1
PCIEPRSNT1
PCIEPRSNT0
R21
R23
PCIEPRSNT1
PCIEPRSNT0
GPIO0/STPCPU#
GPIO1/LDRQ1#/PCIE_HOTPLUG
GPIO2/THERM#
GPIO3/EXTSMI#
GPIO4/CLKRUN#
GPIO5/PREQ5#
GPIO6/PGNT5#
U5
AB5
V5
W4
W3
W2
W1
PROJECT_ID
GPIO1
GPIO2
GPIO3
PM_CLKRUN#
GPIO5
IDE_HRESET#
Y4
W5
SCLK
SDATA
LAD0
LAD1
LAD2
LAD3
LPC_FRAME#
LPC_DRQ0#
SERIRQ
AB1
AB4
AA5
LFRAME#
LDRQ#
SIRQ
E5
C4
<35> HDA_SDOUT_AUDIO
C
<37> HDA_SDOUT_MDC
<37> HDA_SYNC_MDC
<35> HDA_RST_AUDIO#
<37> HDA_RST_MDC#
HDA_SDOUT_SB
HDA_SYNC_SB
Y3
Y2
HDA_SDOUT
HDA_SYNC
HDA_RST_SB#
HDA_BITCLK_SB
B3
Y1
HDA_RESET#
HDA_BIT_CLK
H_INIT#
H_A20M#
H_SMI#
H_INTR
H_NMI
H_IGNNE#
H_FERR#
H_STPCLK#
H_CPUSLP#
<4>
H_INIT#
<4>
H_A20M#
<4>
H_SMI#
<4>
H_INTR
<4>
H_NMI
<4> H_IGNNE#
<4> H_FERR#
<4> H_STPCLK#
<5> H_CPUSLP#
AC23
AE26
AD23
AC22
AE25
AE24
AF24
AF25
AD24
INIT#
A20M#
SMI#
INTR
NMI
IGNNE#
FERR#
STPCLK#
CPUSLP#
8/29 change net from BAT_PWRGD to net +RTCVCC

+RTCVCC
SMT1-05_4P
SW2
@
CPU IU
4
6
5
R176
<14>
1
2
0_0402_5%
<35>
REF_CLK1
SB_SPKR
SB_SPKR
PBTN_OUT#
PCI_PME#
PSON#
<31> PBTN_OUT#
<31> PCI_PME#
<31> PSON#
7/30 add for debug
AC24
H_THERMTRIP# AD25
AGPBUSY#
AE23
<4> H_PROCHOT#
<4> H_THERMTRIP#
<9> AGPBUSY#
<9,31> AUX_PWRGD
+3VALW
C168
AA2
F2
AA1
E6
A6
E7
PROCHOT#
THERMTRIP#
BMBUSY#
OSCI
ENTEST
SPK
PWRBTN#
PME#
PSON#
C3
A5
AUXOK
ACPILED
PM_SLP_S5#
PM_SLP_S3#
C2
C7
GPIO10/SLP_S5#
GPIO15/SLP_S3#
EC_SMI#
EC_LID_OUT#
EC_SCI#
D6
A4
C6
GPIO7/GPWAK#
GPIO8/RING
GPIO9/HDA_SDIN2
AGPSTOP#
CPUSTP_N_OLD
SB_DPRSLPVR
GPIO14
F6
D4
D3
B5
GPIO11/STP_PCI#/AGPSTOP#
GPIO12/CPUSTP#/DPSLP#
GPIO13/DPRSLPVR
GPIO14/AGPSTOP#/S3AUXSW#
GPIO16
GATEA20
KB_RST#
B7
D7
B4
GPIO16/DPRSTP#
GPIO17/GA20#
GPIO18/KBDRST#
1
0.1U_0402_16V4Z
COL
CRS
MDC
MDIO
GPIO21
GPIO22
GPIO23
GPIO24
CPU_S APIC ACPI
<35> HDA_SYNC_AUDIO
2
33_0402_5%
2
33_0402_5%
HDA_SDOUT_SB
2
33_0402_5%
2
33_0402_5%
HDA_SYNC_SB
2
33_0402_5%
2
33_0402_5%
HDA_RST_SB#
2
33_0402_5%
2
33_0402_5%
HDA_SDIN0
HDA_SDIN1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
EC_SMI#
EC_LID_OUT#
EC_SCI#
PM_SLP_S5#
AGPSTOP#
CPUSTP_N_OLD
EC_THERM#
PM_SLP_S3#
GPIO16
GATEA20
KB_RST#
GPIO14
<31> EC_SMI#
<31> EC_LID_OUT#
<31> EC_SCI#
<9> AGPSTOP#
<25> CPUSTP_N_OLD
<25> SB_DPRSLPVR
GATEA20
KB_RST#
0.01U_0402_16V7K
1
R378
<28>
2
0_0402_5%
D
2 33_0402_5%
TXEN
<28>
T24
1
1
1
1
C457
Put closed to 968
2
2
2
2
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
R161 1
R160 1
R147 1
TXD0
TXD1
TXD2
TXD3
MOSC25MHO
2 56_0402_5%
2 56_0402_5%
2 150_0402_1%
RXCLK <28>
RXDV
RXER
<28>
<28>
RXD0
RXD1
RXD2
RXD3
<28>
<28>
<28>
<28>
MDIO
MOSC25MHI
+3VALW
R151
1
0_0402_5%
2
@
+3VALW
R142
150_0402_1%
COL
<28>
CRS
<28>
2 33_0402_5%
R568 1
<28>
<28>
<28>
<28>
R150
0_0402_5%
C120
Y4
1
0.01U_0402_16V7K
MDC
MDC
<28>
4
3
2
1
DO
DI
SK
CS
GND
NC
NC
VCC
C152
C151
33P_0402_50V8J
33P_0402_50V8J
the same with "180"
<28>
7/30 modified from 27P to 33P
U9
GPIO23
GPIO22
GPIO21
GPIO24
25MHZ_20PF_6X25000017
5
6
7
8
+3VALW
1
1
2 0.1U_0402_10V7K PCIE_ITX_C_PRX_P0
2 0.1U_0402_10V7K PCIE_ITX_C_PRX_N0
1
1
2 0.1U_0402_10V7K PCIE_ITX_C_PRX_P1
2 0.1U_0402_10V7K PCIE_ITX_C_PRX_N1
PCIE_PTX_C_IRX_P0
PCIE_PTX_C_IRX_N0
PCIE_ITX_C_PRX_P0
PCIE_ITX_C_PRX_N0
PCIE_PTX_C_IRX_P1
PCIE_PTX_C_IRX_N1
PCIE_ITX_C_PRX_P1
PCIE_ITX_C_PRX_N1
<29>
<29>
<29>
<29>
<30>
<30>
<30>
<30>
WLAN
NEW Card
+1.8VS
30mA
AVDD_PEXTRX
PCIE_CLK_SB <14>
PCIE_CLK_SB# <14>
C185
2 499_0402_1%
2 124_0402_1%
0.1U_0402_16V4Z
L19 1
2
MBK1608121YZF_0603
C186
R427 1
0.01U_0402_16V7K
AVSS_PEXTRX
1
R190
2 0_0402_5%
2
0_0402_5%
D19
1
1U_0603_10V4Z
C332
0.01U_0402_16V7K
2
2
2
2
10U_0805_10V4Z
R279 10K_0402_5% 8/29

2
1
J1
C328
@
JOPEN
2
IDE_HRESET# <24>
SCLK
SDATA
<12,13,14,15>
<12,13,14,15>
GPIO1
GPIO2
GPIO3
GPIO5
IDE_HRESET#
PM_CLKRUN#
PCIEPRSNT1
D14
2
2
1 4.7K_0402_5%
1 CP_PE#
RB751V_SOD323
+1.8VS
1
1
1
1
2
2
2
2
4.7K_0402_5%
100K_0402_5%
4.7K_0402_5%
100K_0402_5%
GPIO2
GPIO14
R431 1
R394 1
2 0_0402_5%
2 0_0402_5%
EC_THERM#
R443
R433
R435
R438
R439
R444
1
1
1
1
1
1
2
2
2
2
2
2
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
SB_DPRSLPVR
R404 1
PROJECT_ID
R436
2 4.7K_0402_5%
CP_PE# <30>
2 JOPEN
BAT_PWRGD
R386
R376
R385
R375
EC_THERM# <31>
R424
1 @
2 10K_0402_5%
14W@
+3VS
1K_0402_5%
change J1,J4 from net BAT_PWRGD to net +RTCVCC
Decoupling Capacitor
Please close to SB
J4 1
PM_CLKRUN# <26,31>
7/20 modified
RLS4148_LL34-2
2
+3VALW
GPIO23
PBTN_OUT#
PCI_PME#
PSON#
+3VS
GPIO19
GPIO20
1
1
1
C346 C326
C333
GPIO
Change D19 footprint from RLS4148_LL34-2 to LL34
+CHGRTC
BAS40-04_SOT23
PCI-Express
R187
+RTCVCC
511_0603_1%
ML1220T13RE
@
<31>
<31>
D20
+RTC_BATT
R291
1+RTCBATT1
GATEA20
KB_RST#
BATT1
2 10K_0402_5%
2 10K_0402_5%
@
@
7/20 modified
<31> PM_SLP_S5#
<31> PM_SLP_S3#
+3VS
R403 1
R398 1
R146
R159
R158
R145
AVSS_GMACCMP
TXCLK
R389 1
PAD
L38 1
2
MBK1608121YZF_0603
AT93C46-10SI-2.7_SO8
@
@
R163
R162
R164
R388
R382
R425
R390
R387
R381
R397
R393
R548
0.1U_0402_16V4Z
T4
T25
TXCLK
HD Audio
1
R192
1
R194
1
R201
1
R203
1
R197
1
R199
1
R166
1
R167
<37> HDA_BITCLK_MDC
PAD
PAD
RTCVSS
R430 => Intel :Not Pull-up SiS : Pull-up 4.7K ohm (Mount)
<35> HDA_BITCLK_AUDIO
C459
D2
Y5
AA4
AB2
AB3
<35> HDA_SDIN0
<37> HDA_SDIN1
A12
F14
GTXCLK
EXTCLK
RTCVDD
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
R429 => Intel :Pull-up 10K ohm (Mount) SiS :Not Pull-up
MOSC25MHO
MOSC25MHI
D1
LPC
<31,33>
<31,33>
<31,33>
<31,33>
B8
A8
AVDD_GMACCMP
GTXCLK
EXTCLK
OSC25MHO
OSC25MHI
+1.8VALW
8mA
32.768KHZ_12.5P_1TJS125BJ2A251
<9,31> SB_PWRGD
AVSS_GMACCMP
AVDD_GMACCMP
C8
D9
IN
AVSS_GMACCMP18
AVDD_GMACCMP18
OUT
NC
OSC32KHO
OSC32KHI
GMAC
NC
E2
E1
RTC
X1
OSC32KHO
OSC32KHI
PCI Express
15P_0402_50V8J
R173
10M_0402_5%
2
1
C175
0.1U_0402_16V4Z
10U_0805_10V4Z
Compal Secret Data
Issued Date
2005/03/01
Deciphered Date
2006/03/01
3
Title

SIS968(2/5)-PCIE_LAN_RTC

Custom
Rev
0.1
Date:
Sheet
1
20
of
49
+1.8VALW
7mA
L18 1
2
MBK1608121YZF_0603 1
C170
USBPVDD18
0.1U_0402_16V4Z
2
1
2
R168
0_0402_5%
C171
U11C
0.01U_0402_16V7K
USBPVSS18
+3VALW
USB
BT
New Card
8mA
0.1U_0402_16V4Z
C465
0.1U_0402_16V4Z
1
R392
C478
Place C478,C489 close to

U11 Pin F17,F19,F22 WLAN
0.01U_0402_16V7K
USB
8mA
USB
USBCMPAVDD33
USB
1
Place
C465,C466
C466
close to U11 Pin D21CAMERA
0.01U_0402_16V7K
USB20_P2
USB20_N2
USB20_P3
USB20_N3
USB20_P4
USB20_N4
USB20_P5
USB20_N5
USB20_P6
USB20_N6
USB20_P7
USB20_N7
<30> USB_OC#06
USBCMPAVSS33
2
0_0402_5%
<34> USB_OC#45
+1.8VALW
0.1U_0402_16V4Z
A23
F21
A24
B24
C23
C24
A25
B23
OC0#
OC1#
OC2#
OC3#
OC4#
OC5#
OC6#
OC7#
A22
B22
F20
USB_CLK_12M
AVDD_USBPLL18
AVSS_USBPLL18
B26
B25
USBPVDD18
USBPVSS18
AVDD_USBCMP18
AVSS_USBCMP18
E21
E20
USBCMPAVDD18
USBCMPAVSS18
AVDD_USBCMP33
AVSS_USBCMP33
D21
C21
USBCMPAVDD33
USBCMPAVSS33
UVDD33
UVDD33
UVDD33
F17
F19
F22
USBCMPAVDD33
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
J15
H15
H16
H17
H18
J19
F16
F15
E18
E16
UVDD18
USB
AVDD_SATARX
AVSS_SATARX
0.01U_0402_16V7K
USBCMPAVSS18
+1.8VALW
284mA
L44 1
2
MBK1608121YZF_0603 1
C475
0.1U_0402_16V4Z
R213 1
C216
1
UVDD18
USB_CLK_12M <14>
USBREF
R402 1
2 127_0402_1%
USB20_P1
USB20_N1
1
4
2
3
RP19
0_0404_4P2R_5%
15W@
USB20_P1_1
USB20_N1_1
USB20_N1
USB20_P1
1
4
2
3
RP2
0_0404_4P2R_5%
14W@
USB20_N1_2
USB20_P1_2
C474
0.01U_0402_16V7K
AF14
AF15
AC9
AD9
AVDD_SATAPLL33
AVDD_SATAPLL33
AVSS_SATAPLL33
AC8
AD8
AVSS_SATAPLL33
AVSS_SATAPLL33
AF7
REXT
SATA_REXT
SATA_CLK_DP
SATA_CLK_DN
AE15
AD15
SB_PCIE_WAKE#
ATRAP
TRAP0
E9
D10
E22
SB_PCIE_WAKE#
SATA
CLK100P
CLK100N
PCIEWAKE
ATRAP
TRAP0
AC13
AD13
AF12
AE12
AC6
AD6
AF5
AE5
SATA_ITX_DRX_P0
C560 1
SATA_ITX_DRX_N0
C559 1
SATA_DTX_C_IRX_P0
SATA_DTX_C_IRX_N0
XIN
XOUT
AE8
AF8
SOSC25MHI
STX0+
STX0SRX0+
SRX0STX1+
STX1SRX1+
SRX1-
2 0.01U_0402_16V7K SATA_ITX_C_DRX_P0
2 0.01U_0402_16V7K SATA_ITX_C_DRX_N0
SATA_DTX_C_IRX_P0 <24>
SATA_DTX_C_IRX_N0 <24>
1
R219
HDACT
AA3
H_SATA_LED#
ISWITCHOPEN1
ISWITCHOPEN0
AC1
AD1
ISWITCHOPEN1
ISWITCHOPEN0
IPB_OUT0
IPB_OUT1
D22
C22
2
0_0402_5%
R207 1
R209 1
2 1K_0402_5%
2 1K_0402_5%
+5VS
C663 1
R576 1
P
1
R217
0.01U_0402_16V7K
C545
0.1U_0402_16V4Z
1
R440
2
0_0402_5%
R549
R550
R551
R552
1
1
1
1
2
2
2
2
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
USB_OC#2
USB_OC#1
USB_OC#3
USB_OC#7
U39
SATA_LED#
SATA_LED# <32>
@ TC7SET125FUF_SC70
2 0_0402_5%
1
R211
1
R212
SATA_DTX_C_IRX_N1
2
1K_0402_5%
SATA_DTX_C_IRX_P1
2
1K_0402_5%
SATA_RXn/p need tie to ground when SATA port no used
AVDD_SATAPLL33
C548
0.01U_0402_16V7K
AVSS_SATAPLL33
Compal Secret Data
Issued Date
2005/03/01
Deciphered Date
2006/03/01
5
2 10K_0402_5%
G
R577 1
+3VALW
41mA
L48 1
2
MBK1608121YZF_0603
2 @ 0.1U_0402_16V4Z
@
C215
AVSS_SATARX
2
0_0402_5%
A
3
AVDD_SATARX
+3VS
OE#
R205
@
10K_0402_5%
6mA
C222
SATA_ITX_C_DRX_P0 <24>
SATA_ITX_C_DRX_N0 <24>
SATA_DTX_C_IRX_P1
SATA_DTX_C_IRX_N1
H_SATA_LED#
+1.8VS
0.1U_0402_16V4Z
USB20_N1_2 <33>
USB20_P1_2 <33>
+3VS
133MHz:Internal pull-down
66MHz:External pull-up
AVDD_SATARX
AVSS_SATARX
AVDD_SATAPLL33
2 12K_0402_1%
22P_0402_50V8J
1
2
R405 1
2 1K_0402_5%
R155
@
1K_0402_5%
+3VALW
2 4.7K_0402_5%
<14> SATA_CLK_DP
<14> SATA_CLK_DN
+3VALW
L23 1
2
MBK1608121YZF_0603
USB20_P1_1 <33>
USB20_N1_1 <33>
C477
2
0_0402_5%
R374 1
USB_OC#06
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#45
OSC12MHI
OSC12MHO
USBREF
USBCMPAVDD18
C476
1
R407
UV0+
UV0UV1+
UV1UV2+
UV2UV3+
UV3UV4+
UV4UV5+
UV5UV6+
UV6UV7+
UV7-
USB_OC#7
9mA
L46 1
2
MBK1608121YZF_0603
D26
D25
E24
E23
A20
B20
C19
D19
A18
B18
C17
D17
A16
B16
C15
D15
C489
<30>
<30>
<29>
<29>
<34>
<34>
<34>
<34>
<30>
<30>
<37>
<37>
USB20_P0
USB20_N0
USB20_P1
USB20_N1
USB20_P2
USB20_N2
USB20_P3
USB20_N3
USB20_P4
USB20_N4
USB20_P5
USB20_N5
USB20_P6
USB20_N6
USB20_P7
USB20_N7
L43 1
2
MBK1608121YZF_0603
<30> USB20_P0
<30> USB20_N0
Title

SIS968(3/5)-USB_SATA

Custom
Rev
0.1
Date:
Sheet
1
21
of
49
+3VS
0.1U_0402_16V4Z
C502
0.1U_0402_16V4Z
C507
C522
22mA
AA21
AB22
29mA
+3VALW
4mA
+3VALW
8mA
+1.8VS
153mA
VTT
VTT
V16
V15
V14
T8
N8
L9
PVDD
PVDD
PVDD
PVDD
PVDD
PVDD
W17
W16
W15
W14
W13
W12
K8
L8
M8
P8
R8
U8
V8
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
H19
H9
H8
F7
J11
J12
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
H10
H11
H12
H13
J13
GMIIVDD_AUX
GMIIVDD_AUX
GMIIVDD_AUX
GMIIVDD_AUX
GMIIVDD_AUX
K18
L18
L19
M18
M19
N19
H21
J21
K21
L21
M21
N21
M22
H22
AVDDPEX
AVDDPEX
AVDDPEX
AVDDPEX
AVDDPEX
AVDDPEX
AVDDPEX
AVDDPEX
AVDDPEX
AVDDPEX
AVDDPEX
AVDDPEX
AVDDPEX
AVDDPEX
C542
10U_0805_10V4Z
C538
C543
0.1U_0402_16V4Z
C556
1U_0603_10V4Z
10U_0805_10V4Z
+1.8VS
U11D
+3VS
0.1U_0402_16V4Z
+1.05VS
1U_0603_10V4Z
C534
Power
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
IVDD_AUX
IVDD_AUX
IVDD_AUX
IVDD_AUX
IVDD_AUX
IVDD_AUX
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
AVDD_SATA
T18
J14
U9
T9
R9
P9
N9
M9
K9
V10
V11
V12
V13
V17
R17
R18
N18
W19
V19
V18
U18
W18
P18
Y24
V24
T24
R24
AA25
W26
U26
J9
J8
J10
J16
J17
J18
W11
W10
W9
W8
V9
AF10
AE10
AD11
AD10
AC11
AC10
AB11
AB10
AB9
AB8
+1.8VS
413mA
0.1U_0402_16V4Z
C514
0.1U_0402_16V4Z
C525
C526
C527
0.1U_0402_16V4Z
+1.8VS
1U_0603_10V4Z
C539
10U_0805_10V4Z
C540
C524
0.1U_0402_16V4Z
C523
1U_0603_10V4Z
C557,C555,C217,C228,C551,C554
close to U30 Pin AVDD_SATA
+1.8VS
10U_0805_10V4Z
+1.8VALW
+1.05VS
1U_0603_10V4Z
413mA
C557
0.01U_0402_16V7K
C555
C217
C228
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C504
0.01U_0402_16V7K
+1.8VS
C509
1U_0603_10V4Z
C547
0.1U_0402_16V4Z
C561
1U_0603_10V4Z
C
+3VALW
1U_0603_10V4Z
19mA
C488
10U_0805_10V4Z
C504,C509,C494,C495,C513,C503
close to U30 Pin AVDDPEX
+1.8VS
+1.8VALW
C497
C494
C495
0.1U_0402_16V4Z
1U_0603_10V4Z
C501
0.1U_0402_16V4Z
C500
C148
10U_0805_10V4Z
C510
0.1U_0402_16V4Z
2
1U_0603_10V4Z
190mA
Put under 968 solder side

+1.8VS
C537
0.1U_0402_16V4Z
C530
C520
0.1U_0402_16V4Z
C517
C518
C493
0.1U_0402_16V4Z
C499
0.1U_0402_16V4Z
C531
0.1U_0402_16V4Z
C519
0.1U_0402_16V4Z
C486
0.1U_0402_16V4Z
C492
0.1U_0402_16V4Z
C516
C532
0.1U_0402_16V4Z
+1.8VALW
C482
0.1U_0402_16V4Z
+3VALW
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VALW
+1.05VS
+3VS
0.1U_0402_16V4Z
C498
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8VS
C546
+1.8VS
C513
0.1U_0402_16V4Z
C503
0.01U_0402_16V7K
C551
0.1U_0402_16V4Z
C554
0.01U_0402_16V7K
Compal Secret Data
Issued Date
2005/03/01
Deciphered Date
2006/03/01
5
Title

SIS968(4/5)-POWER

Custom
Rev
0.1
Date:
Sheet
1
22
of
49
U11E
K10
K11
K12
L10
L11
L12
L14
L15
L16
M10
M11
M12
M13
M14
M15
N10
AD26
AC25
B10
B12
D11
D13
U15
U14
U13
U12
U11
U10
T14
T13
T12
T11
T10
R14
R13
R12
R11
R10
P14
P13
P12
P11
P10
N14
N13
N12
N11
P24
P23
N22
N26
N25
M24
M23
L22
K22
J22
G22
L26
L25
K24
K23
J26
J25
H24
H23
G26
G25
F24
F23
E26
E25
P16
M17
N17
P17
M16
N16
N15
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Gound
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
U17
U16
T16
R16
R15
T17
P15
T15
Y21
V21
T21
R22
W23
U23
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
D14
E15
A15
B15
C16
D16
A17
B17
E17
C18
D18
A19
B19
E19
C20
D20
A21
B21
D23
D24
C25
C26
K13
K14
K15
K16
K17
L13
L17
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AVSS_SATA
AB6
AB7
AB12
AB13
AB14
AB15
AC2
AC3
AC4
AC5
AC7
AC12
AC14
AC15
AD2
AD3
AD4
AD5
AD7
AD12
AD14
AE1
AE2
AE3
AE4
AE6
AE7
AE9
AE11
AE13
AE14
AF2
AF3
AF4
AF6
AF9
AF11
AF13
A
Compal Secret Data
Issued Date
2005/03/01
Deciphered Date
2006/03/01
5
Title

SIS968(5/5)-GND

Custom
Rev
0.1
Date:
Sheet
1
23
of
49
14W ODD Conn.

Placea caps. near ODD CONN.
C595
C601
1
C599
C628 1
C598
+3VS
14W@
10U_0805_10V4Z
C594
1U_0603_10V4Z
14W@
10U_0805_10V4Z
14W@
<20> IDE_HRESET#
IDE_DA[0..2]
<19> IDE_DA[0..2]
<19,26,28,29,30,31,33> PCI_RST#
IDE_HRESET#
PCI_RST#
Y
3
1000P_0402_50V7K
14W@
IDE_DD[0..15]
<19> IDE_DD[0..15]
2 0.1U_0402_16V4Z
U36
14W@
0.1U_0402_16V4Z
IDE_RST#
+5VS
NC7SZ08P5X_NL_SC70-5
JP27
IDE_RST#
IDE_DD7
IDE_DD6
IDE_DD5
IDE_DD4
IDE_DD3
IDE_DD2
IDE_DD1
IDE_DD0
IDE_DIOW#
IDE_ DIORDY
IDE_IRQ
IDE_DA1
IDE_DA0
IDE_DCS1#
IDE_LED#
<19> IDE_DIOW#
<19> IDE_DIORDY
<19> IDE_IRQ
<19> IDE_DCS1#
+5VS
R240
2
475_0402_1%
IDE_CSEL
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
IDE_DDREQ
IDE_DIOR#
IDE_DDREQ <19>
IDE_DIOR# <19>
IDE_DDACK#
IDE_PDIAG#
IDE_DA2
IDE_DCS3#
IDE_DDACK# <19>
2 R491
+5VS
100K_0402_5%
SATA HDD Conn.
IDE_DCS3# <19>
+5VS
OCTEK_CDR-50DY1G
14W@
(NEW)
IDE_CSEL
Grounding for Master (When use SATA HDD)
Open or High for Slaver (Normal)
+5VS
+5VS
R487
IDE_LED#
100K_0402_5%
+3VS
0.1U_0402_16V4Z
C366
C365
1000P_0402_50V7K
10U_0805_10V4Z
1
C367
C353
1U_0603_10V4Z
C354
C68
0.1U_0402_16V4Z
2 @
2
10U_0805_10V4Z
15W ODD Conn.
IDE_RST#
IDE_DD7
IDE_DD6
IDE_DD5
IDE_DD4
IDE_DD3
IDE_DD2
IDE_DD1
IDE_DD0
IDE_DIOW#
IDE_ DIORDY
IDE_IRQ
IDE_DA1
IDE_DA0
IDE_DCS1#
IDE_LED#
IDE_CSEL
R265
R264
R263
R262
R261
R260
R259
R258
R257
R256
R254
R255
R252
R253
R250
R486
R246
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
R_IDE_RST#
R_IDE_DD7
R_IDE_DD6
R_IDE_DD5
R_IDE_DD4
R_IDE_DD3
R_IDE_DD2
R_IDE_DD1
R_IDE_DD0
R_IDE_DIOW#
R_ IDE_DIORDY
R_IDE_IRQ
R_IDE_DA1
R_IDE_DA0
R_IDE_DCS1#
R_IDE_LED#
R_IDE_CSEL
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
IDE_DDREQ
IDE_DIOR#
IDE_DDACK#
IDE_PDIAG#
IDE_DA2
IDE_DCS3#
R516
R513
R512
R509
R508
R505
R504
R500
R499
R497
R493
R490
R251
R248
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
15W@ 0_0402_5%
R_IDE_DD8
R_IDE_DD9
R_IDE_DD10
R_IDE_DD11
R_IDE_DD12
R_IDE_DD13
R_IDE_DD14
R_IDE_DD15
R_IDE_DDREQ
R_IDE_DIOR#
R_IDE_DDACK#
R_IDE_PDIAG#
R_IDE_DA2
R_IDE_DCS3#
+5VS_ODD
15W@
0.1U_0402_16V4Z
1
C310
C311
1000P_0402_50V7K
15W@
JP28
JP41
R_IDE_RST#
R_IDE_DD7
R_IDE_DD6
R_IDE_DD5
R_IDE_DD4
R_IDE_DD3
R_IDE_DD2
R_IDE_DD1
R_IDE_DD0
R_IDE_DIOW#
R_ IDE_DIORDY
R_IDE_IRQ
R_IDE_DA1
R_IDE_DA0
R_IDE_DCS1#
R_IDE_LED#
+5VS_ODD
R_IDE_CSEL
1U_0603_10V4Z
15W@
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
R_IDE_DD8
R_IDE_DD9
R_IDE_DD10
R_IDE_DD11
R_IDE_DD12
R_IDE_DD13
R_IDE_DD14
R_IDE_DD15
R_IDE_DDREQ
R_IDE_DIOR#
<21> SATA_DTX_C_IRX_N0
<21> SATA_DTX_C_IRX_P0
SATA_DTX_C_IRX_N0
1
C400
SATA_DTX_C_IRX_P0
1
C395
SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0
SATA_DTX_IRX_N0
0.01U_0402_16V7K
SATA_DTX_IRX_P0
2
0.01U_0402_16V7K
2
+5VS
R_IDE_PDIAG#
R_IDE_DA2
R_IDE_DCS3#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+3VS
R_IDE_DDACK#
+5VS_ODD
GND
A+
AGND
BB+
GND
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
SUYIN_127043FB022S338ZR_RV
ME@
+5VS_ODD
1
R247
1
R249
2
15W@ 0_1206_5%
2
15W@ 0_1206_5%
C313
Issued Date
Compal Secret Data
12/4 Change J7 to 2x0 Ohm 1/4w resistors
10U_0805_10V4Z
15W@
<21> SATA_ITX_C_DRX_P0
<21> SATA_ITX_C_DRX_N0
(NEW)
C312
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
Change Library
+5VS
C309
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
OCTEK_CDR-50DY1G
15W@
15W@
10U_0805_10V4Z
1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
2006/08/18
2007/8/18
Deciphered Date
C
Title
HDD & ODD Connector

Size
B
Document Number
Rev
0.1
Date:

G
Sheet
24
H
of
49
+3VS
+3VS
R414
4
1
Y
NC
2 33_0402_5%
PM_DPRSLPVR_D <48>
R391 1
<20> SB_DPRSLPVR
NL17SZ17DFT2G_SOT353-5
2 33_0402_5%
C460
@
0.01U_0402_16V7K
2 0.1U_0402_16V4Z
U24
Connecte to CPU
C448
2 0.1U_0402_16V4Z
R377 1
2 33_0402_5%
DPRSTP_N_INV
C464
@
0.01U_0402_16V7K
<20> SB_DPRSLPVR
2 33_0402_5%
Vcc
U28
R401 1
NC
C496
Use SA00001N400 FootPrint

2 0_0402_5%
+3VS
R171
+1.05VS
R172
R170
8/1 Rotate
A1
Y1
A2
VCC
Y2
+3VALW
H_DPSLP_N_LS
VREF2
VREF1
SCL2
SCL1
H_DPRSTP# <5,48>
SDA2
SDA1
H_DPSLP# <5>
H_DPSLP#
C173
@
0.01U_0402_16V7K
NC7WZ07P6X_NL_SC70-6
+3VS
C450
H_DPSLP_N_LS
GND
DPRSTP_N_INV
PCA9306DCUR_VSSOP8
@
+3VS
2 0.1U_0402_16V4Z
C458
2 0.1U_0402_16V4Z
+3VS
1
C446
1
R371
4
1
5
2
33_0402_5%
C451
@
0.01U_0402_16V7K
Y
NC
1
R379
4
1
2
33_0402_5%
+3VS
1
C452

B
G Vcc
C447
100P_0402_50V8J
H_DPSLP_N_LS
3
2
U26
Vcc
2
33_0402_5%
1
R380
U25
Y
NC
2
0.1U_0402_16V4Z
A
3
U23
499_0402_1%
R372
Vcc
<20> CPUSTP_N_OLD
EN
H_DPRSTP#
GND
U10
R165
300_0402_5%
DPRSTP_N_INV
300_0402_5%
U40
R157
200K_0402_5%
7/20 Reserved
C
1.05K_0402_1%
1.05K_0402_1%
8/1 Rotate
R553 1
2
0.1U_0402_16V4Z
U22
CPUSTP#
CPUSTP# <14>
Issued Date
2005/03/01
Deciphered Date
2006/03/01
5
Compal Secret Data
Title
<Title>

Custom<Doc>
Date:
Rev
<RevCode>
Sheet
1
25
of
49
+3VS
2
0_0402_5%
12/1 Modified
AGND
AGND
AGND
AGND
AGND
97
MDIO00
MDIO01
MDIO02
MDIO03
MDIO04
MDIO05
MDIO06
MDIO07
MDIO08
MDIO09
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
MDIO15
MDIO16
MDIO17
MDIO18
MDIO19
80
79
78
77
76
75
74
73
88
84
82
81
93
90
91
89
92
87
85
83
SDCD#_XDCD0#
MSCD#_XDCD1
MSEN
XDEN
58
55
MSEN
XDEN
XI
XO
94
95
R5C832XI
R5C832XO
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
NC
C565
10U_0805_10V4Z
C564
0.01U_0402_16V7K
C566
0.1U_0402_16V4Z
C567
0.01U_0402_16V7K
MMCCMD
MDIO09
SDCCLK
MMCCLK
MSCCLK
MDIO10
SDCDAT0
MMCDAT
MSCDAT0
MDIO11
SDCDAT1
MSCDAT1
MDIO12
SDCDAT2
MSCDAT2
MDIO13
SDCDAT3
MSCDAT3
C224
1000P_0402_50V7K
C219
1000P_0402_50V7K
1
833@
1
833@
1
833@
1
833@
MSEXTCK
MSBS
MDIO15
MDIO16
MDIO17
MDIO18
UDIO3
UDIO4
MSEN
Pull-up
Pull-up
Pull-up
SERIRQ <20,31,33>
PAD
T32
PAD
T31
833@
C573
1
2
833@
27P_0402_50V8J
XDEN
Pull-low
Function
Enable
SD,MS,MMC Card
R453
R464
R455
R451
XDEN
R448 1 833@
X3
833@
C574
1
833@
R5C832XO
2
833@
27P_0402_50V8J
R471 2
SDDATA1_MSDATA1
12/1 Modified from 15P to 18P
Q33
2N7002_SOT23
@
SDDATA2_MSDATA2
+3VS
+VCC_3IN1
GND
RT9701-PB_SOT23-5
833@
VIN
VOUT
VIN/CE VOUT
R467
833@
100K_0402_5%
C579
10U_0805_10V4Z
10K_0402_5%
10K_0402_5%
10K_0402_5%
100K_0402_5%
2 10K_0402_5%
1 0_0402_5%
SD_MSDATA1
3
833@ R469 2
1 0_0402_5%
833@
SD_MSDATA2
SD_MSDATA1 <27>
SD_MSDATA2 <27>
1
R470
2
2
2
2
+5VS
U31
1
5
833@
833@
833@
833@
Solve MS Duo Adaptor short problem
Q34
2N7002_SOT23
@
3
4
1
1
1
1
R5C832XI
40mil
0.1U_0402_16V4Z
833@ 2
MSEN
U DIO3
U DIO4
U DIO5
24.576MHz_16P_1BG24576CKIA
Layout Note: Shield GND for

CBS_CCLK_INTERNAL and CBS_CCLK
4
13
22
28
54
62
63
68
118
122
Layout Note: Place close to R5C832

and Shield GND for SD_CLK
1
2
C570
833@ 0.01U_0402_16V7K
C577
1U_0603_10V4Z
1
2

and Shield GND for SDCLK_MSCLK
and Shield GND for FIL0,REXT,VREF
R459
5.1K_0603_1%
C563
270P_0402_50V7K
SDCCMD
1
833@
1
833@
2
@ 10K_0402_5%
SDCD#_XDCD0#
Q32
2N7002_SOT23
@
2
G
833@
833@
2
1
833@
100K_0402_5%
833@
R458
56.2_0603_1%
2
1
1
833@
1
1
1
1
L51
C558
0.33U_0603_16V4Z
C562
0.01U_0402_16V7K
2
1
833@
R452
56.2_0603_1%
2
1
833@
12/22 Change from 10u_1206 to 10u_0805

IEEE1394TPA+/- and IEEE1394TPB+/Same Wire Length
Swap U38 Pin 1,Pin 3

JP25
R454
R457
R460
R462
C572
833@
CBS_GRST#
1U_0603_10V4Z
833@
WCM-2012-670T_4P
IEEE1394_TPBN0
IEEE1394_TPBP0
IEEE1394_TPAN0
IEEE1394_TPAP0
R449
56.2_0603_1%
L50
R456
56.2_0603_1%
1
2
MDIO08
Function set pin define
Layout Note: C268,C270,R125 Place close to R5C832
SERIRQ
TP_UDIO1
TP_UDIO2
U DIO3
U DIO4
U DIO5
Z3008
C544
4.7P_0402_50V8C
1 @
MSLED#
833@
R466
MMCLED#
+3VS
SDPWR0_MSPWR_XDPWR
+3VS
10_0402_5%
@
SDLED#
MDIO14
SDCMD_MSBS <27>
SDCLK_MSCLK <27>
SDDATA0_MSDATA0 <27>
C578
R442
MSWR
MDIO19
SDCMD_MSBS
SDCLK_MSCLK
SDDATA0_MSDATA0
SDDATA1_MSDATA1
SDDATA2_MSDATA2
SDDATA3_MSDATA3
CLK_PCI_1394
C214
0.1U_0402_16V4Z
SDWP#_XDRB# <27>
C211
0.1U_0402_16V4Z
SDWP#_XDRB#
SDPWR0_MSPWR_XDPWR
+VCC_3IN1
C569
0.47U_0603_16V4Z
C541
0.47U_0603_16V4Z
C528
0.01U_0402_16V7K
C553
0.01U_0402_16V7K
C210
833@
10U_0805_10V4Z
SDCD#_XDCD0# <27>
MSCD#_XDCD1 <27>
MDIO06
MMCPWR
MDIO07
BLM21A601SPT_0805
833@
R5C832_TQFP128~D
833@
+3VS
SDPWR1
D
+3V_PHY
L20
96
101
100
72
60
56
65
59
57
C575
10U_0805_10V4Z
IEEE1394_TPBP0
IEEE1394_TPBN0
UDIO0/SERIRQ#
UDIO1
UDIO2
UDIO3
UDIO4
UDIO5
HWSPND#
TEST
111
107
103
102
99
105
104
SDPWR0
MDIO05
1
R465
<30,31,40,43,46,47> SUSP#
TPBP0
TPBN0
SDWP#
MDIO04
INTA#
INTB#
69
66
2
10K_0402_5%
IEEE1394_TPAP0
IEEE1394_TPAN0
MDIO03
1
R463
IEEE1394_TPBIAS0
109
108
FIL0
REXT
VREF
833@
+3VS
113
TPAP0
TPAN0
1
833@
1
833@
115
116
TPBIAS0
MSCD#
2
G
2 0_0402_5%
R5_PME#
1
833@
1
833@
1
833@
R445 1 833@
<31>
R5_PME#
<19> PCI_PIRQC#
<19> PCI_PIRQD#
PCICLK
PCIRST#
GBRST#
CLKRUN#
PME#
98
106
110
112
+3VS
1
833@
+3V_PHY
1
833@
1
833@
R447 1
<20,31> PM_CLKRUN#
REQ#
GNT#
121
119
71
117
70
CBS_GRST#
2 10K_0402_5%
86
1
833@
1
833@
C580
0.1U_0402_16V4Z
<14> CLK_PCI_1394
<19,24,28,29,30,31,33> PCI_RST#
124
123
VCC_3V
MS Card
PIN Name
MDIO02
16
34
64
114
120
VCC_MD3V
MMC Card
PIN Name
MMCCD#
MDIO01
+3VS
PCI_REQ#0
PCI_GNT#0
<19> PCI_REQ#0
<19> PCI_GNT#0

CLK_PCI_1394
PAR
FRAME#
TRDY#
IRDY#
STOP#
DEVSEL#
IDSEL
PERR#
SERR#
SD Card
PIN Name
SDCD#
MDIO
PIN Name
MDIO00
12/15 Modified 10u X6S to Y5V
<19> PCI_PERR#
<19> PCI_SERR#
33
23
25
24
29
26
8
30
31
1
833@
R461
10K_0603_1%
PCI_PAR
PCI_FRAME#
PCI_TRDY#
PCI_IRDY#
PCI_STOP#
PCI_DEVSEL#
C/BE3#
C/BE2#
C/BE1#
C/BE0#
61
67
AVCC_PHY3V
AVCC_PHY3V
AVCC_PHY3V
AVCC_PHY3V
1
833@
833@
1
2
R423 100_0402_5%
PCI_PAR
PCI_FRAME#
PCI_TRDY#
PCI_IR DY#
PCI_STOP#
PCI_DEVSEL#
CBS_IDSEL
PCI_PERR#
PCI_SERR#
VCC_RIN
VCC_ROUT
VCC_ROUT
VCC_ROUT
VCC_ROUT
VCC_ROUT
10
20
27
32
41
128
PCI_AD22
<19>
<19>
<19>
<19>
<19>
<19>
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
7
21
35
45
R5C833
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
C568
0.01U_0402_16V7K
<19>
<19>
<19>
<19>
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C571
0.01U_0402_16V7K
125
126
127
1
2
3
5
6
9
11
12
14
15
17
18
19
36
37
38
39
40
42
43
44
46
47
48
49
50
51
52
53
C529
10U_0805_10V4Z
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
C533
0.01U_0402_16V7K
U29
<19> PCI_AD[0..31]
SD,MMC,MS muti-function pin define
2
G
1
4
833@
833@
833@
833@
2
2
2
2
IEEE1394_R_TPBN0
IEEE1394_R_TPBP0
IEEE1394_R_TPAN0
IEEE1394_R_TPAP0
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
U38

IEEE1394_TPA and TPB
WCM-2012-670T_4P
1
833@
1
2
3
4
IEEE1394_TPBIAS0
CH2
Vn
For EMI => Change L50,L51 to SM070000I00
CH1
GND
GND
GND
GND
5
6
7
8
CH3
SUYIN_020115FB004S512ZL
ME@
Vp
+3V_PHY
CH4
For EMI => Add U38 (SC300000O00)
CM1293-04SO_SOT23-6
Use SC300000D00 FootPrint
12/22 Change from X5R to Y5V

Compal Secret Data
Issued Date
TPBTPB+
TPATPA+
2006/08/04
Deciphered Date
2006/10/06
5
Title

R5C833 Cardreader+1394

Custom
R ev
0.1
Date:

1
Sheet
26
of
49
3 in 1 Card Reader
D
JP24
<26>
<26>
<26>
<26>
<26>
<26>
<26>
<26>
+VCC_3IN1
SDDATA0_MSDATA0
SD_MSDATA1
SD_MSDATA2
SDDATA3_MSDATA3
SDCLK_MSCLK
SDWP#_XDRB#
SDCMD_MSBS
SDCD#_XDCD0#
<26> SDDATA1_MSDATA1
<26> MSCD#_XDCD1
<26> SDDATA2_MSDATA2
SDDATA0_MSDATA0
SD_MSDATA1
SD_MSDATA2
SDDATA3_MSDATA3
SDCLK_MSCLK R476 1
SDWP#_XDRB#
SDCMD_MSBS
SDCD#_XDCD0#
2 22_0402_5%
SDCLK
2 22_0402_5%
MSCLK
SDDATA1_MSDATA1
SDCLK_MSCLK R477 1
MSCD#_XDCD1
SDDATA0_MSDATA0
SDCMD_MSBS
SDDATA3_MSDATA3
SDDATA2_MSDATA2
6
9
10
2
3
7
11
4
1
5
8
VDD_SD
DAT0_SD
DAT1_SD
DAT2_SD
CD/DAT3_SD
CLK_SD
WP_SD
CMD_SD
CD_SD
VSS_SD
VSS_SD
19
13
14
16
18
20
15
17
21
12
22
23
VCC_MS
VCC_MS
SCLK_MS
INS_MS
SDIO_MS
BS_MS
RESERVED_MS
RESERVED_MS
VSS_MS
VSS_MS
GND
GND
PROCO_MDR019-C0-1202
ME@
Compal Secret Data
2006/08/04
Issued Date
2006/10/06
Deciphered Date
5
Title

3 IN 1 CardReader Conn.

Custom
Rev
0.1
Date:
Sheet
1
27
of
49
+3VALW
T1
R149
+3V_LAN
+3V_LAN_AVDD
R33
0_0603_5%
1
2
3
4
5
6
7
8
+3V_LAN
Other CG use 1210

0_0603_5%
Other CG use
L16
1
2
FBM-L11-160808-601LMT_0603
+3V_LAN
PWFBOUT
TPRX+
TPRXRCT
C150
C149
C147
TCT
TPTX+
TPTX-
C56
0.1U_0402_16V4Z
RD+
RDCT
NC
NC
CT
TD+
TD-
RX+
RXRXCT
16
15
14
13
12
11
10
9
RX+
RXCT
NC
NC
CT
TX+
TX-
TXCT
TX+
TX-
C102
350uH_NS0013LF
R350 1
2 1.5K_0402_1%
MDIO
R366 1
2 @ 4.7K_0402_5%
ISOLATE
R152 1
2 @ 4.7K_0402_5%
R368 1
4.7K_0402_5%
LED0
R367 1
4.7K_0402_5%
LED1
R153 1
4.7K_0402_5%
LED2
R154 1
4.7K_0402_5%
LED3
R364 1
4.7K_0402_5%
LED4
R97
4.7K_0402_5%
RXER
R354 1
4.7K_0402_5%
CRS
10U_0805_10V4Z
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
COL
R30
0_0603_5%
Place L47, C460, C462, C463 as close to each power pin

as possible.
2
+3V_LAN
C50
0.1U_0402_16V4Z
+3V_LAN
Other CG use 1206

1
C121
0.1U_0402_16V4Z
C95
10U_0805_10V4Z
R360 1
+3V_LAN
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
2 4.7K_0402_5%
TXC
RXD_V
RXD_0
RXD_1
RXD_2
RXD_3
RXC
COL_R
CRS_R
RXER_R
MDC
MDIO
TXD0
TXD1
TXD2
TXD3
TXEN
TXC
RXDV
RXD0
RXD1
RXD2
RXD3
RXC
COL
CRS
RXER/FXEN
MII_SNIB
44
MII/SNIB
LAN_XTAL_IN
46
X1
LAN_XTAL_OUT
47
X2
Y3
25MHZ_20PF_6X25000017
LED0
LED1
LED2
LED3
LED4
C115
C117
33P_0402_50V8J
33P_0402_50V8J
9
10
12
13
15
PHYAD0/LED0
PHYAD1/LED1
PHYAD2/LED2
PHYAD3/LED3
PHYAD4/LED4
DVDD33
DVDD33
14
48
AVDD33
36
PWFBOUT
PWFBIN
+3V_LAN
32
PWFBOUT
PWFBIN
TPRXTPRX+
49.9_0402_1%
49.9_0402_1%
TPTX-
R36
49.9_0402_1%
TPTX+
R41
49.9_0402_1%
D7 2
1 RLS4148_LL34-2
LED3
D8 2
1 RLS4148_LL34-2
TPTXTPTX+
33
34
TPTXTPTX+
RTSET
28
RTSET
R351 1
2 2K_0402_1%
ISOLATE
RPTR
SPEED
DUPLEX
ANE
LDPS
RESETB
43
40
39
38
37
41
42
ISOLATE
RPTR
SPEED
DUPLEX
ANE
LDPS
RESETB
R361
R356
R353
R123
R116
R357
R363
R359
4.7K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
2
2 0_0402_5%
2 @ 0_0402_5%
NC
27
DGND
DGND
DGND
AGND
AGND
11
17
45
29
35
1
1
1
1
1
1
1
1
D32
C153
0.1U_0402_16V4Z
8/1 Change D7,D8 from SC1B751V010 to SC11N414880
C435
1
3
0.1U_0402_16V4Z
Lan Conn.
PSOT24C_SOT23
@
+3V_LAN
C31
R12
2
1
JP23
1
680P_0402_50V7K
2 150_0402_1%
R572 1
2 75_0402_5%
R573 1
RX-
PR2-
2 75_0402_5%
PR3-
R575 1
2 75_0402_5%
PR3+
RX+
PR2+
TX-
PR1-
TX+
PR1+
D33
10
9
+3V_LAN
C41
2 0.1U_0402_16V4Z
RXCT
TXCT
R34
R29
1
1
PSOT24C_SOT23
@
2 75_0402_5%
2 75_0402_5%
15
SHLD2
14
SHLD1
13
LINKLED
Green LED+
LANGND
C26
0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
16
SHLD1
Green LED-
1000P_1206_2KV7K 1
C60
C42
1
SHLD2
TYCO_3-440470-4
<BOM Structure>
3
1
ACTIVITY LED
PR4PR4+
LINKLED#
1
680P_0402_50V7K
Amber LED-
R574 1
FBMA-L10-160808-800LMT_0603
2 300_0402_5% L61 1
2
Amber LED+
11
For EMI => Change C31,C38 from SE071680J80

(68pF) to SE074681K80 (680pF)
8/30 Add L61 FBMA-L10-160808-800LMT_0603 for EMI
R18
12
2 75_0402_5%
8/1 Change R12 from 300ohm to 150ohm
PCI_RST# <19,24,26,29,30,31,33>
C38
R26
LED2
4.7K_0402_5%
TPRXTPRX+
30
31

R23
C101
0.1U_0402_16V4Z
R362
LED0
TPRX+
8/27 Change D7,D8 footprint from RLS4148_LL34-2 to LL34
RTL8201CL-VD-LF
TPRX-
PWFBIN
Place C464, C465, L48 close to PWFBOUT and place C466 close to PWFBIN.
2
2
2
2
2
2
2
2
2
2
25
26
6
5
4
3
2
7
22
21
20
19
18
16
1
23
24
MDC
MDIO
TXD0
TXD1
TXD2
TXD3
TXEN
R156 1
R109 1
R117 1
R122 1
R129 1
R135 1
R138 1
R569 1
R570 1
R571 1
MDC
MDIO
TXD0
TXD1
TXD2
TXD3
TXEN
TXCLK
RXDV
RXD0
RXD1
RXD2
RXD3
RXCLK
COL
CRS
RXER
+3V_LAN_AVDD
MII I/F
PHY/LED CLK
GND
PWR
Network I/F
U8
L15
2
1
FBM-L11-160808-601LMT_0603
PWFBOUT
C122
0.1U_0402_16V4Z
<20>
<20>
<20>
<20>
<20>
<20>
<20>
<20>
<20>
<20>
<20>
<20>
<20>
<20>
<20>
<20>
<20>
7/20 Swap pin 1,2 to 7,8 and 16,15 to 10,9
C27
4.7U_0805_10V4Z
LED1
Dupx
LED2
10Act
LED3
100Act
2006/08/18
Issued Date
LED4
COL
Compal Secret Data
LED0
Link
Deciphered Date
2007/8/18
4
Title
LAN RTL8201CL
Custom
Rev
0.1
Date:
Sheet
1
28
of
49
Mini-Express Card for WLAN
53
GND1
12/28 modified to @
D18
DAN217_SC59
@
PCI_RST# <19,24,26,28,30,31,33>
+3VALW
DCLK
DDATA
R268
USB20_N3_R
USB20_P3_R
R583 1
R584 1
WLAN_LED#
<14,30>
<14,30>
KILL_SW#
2 0_0402_5%
2 0_0402_5%
+3VS
R222
2
+5VS
10K_0402_5%
C208
C205
0.1U_0402_16V4Z
C199
4.7U_0805_10V4Z
C241
0.01U_0402_16V7K
C207
0.1U_0402_16V4Z
C203
4.7U_0805_10V4Z
Q11
2N7002_SOT23
R529 @
1
2
0_0402_5%
2
G
12/19 Change SW2 to correct symbol (by EMI)

RF_ON#
RF_ON#
<31>
Compal Secret Data
2006/08/05
Issued Date
2007/08/05
Deciphered Date
Title

Mini-Card/Kill SW
A
+1.5VS
0.1U_0402_16V4Z
SW1
1BS003-1210L_3P
14W@
R208
+3VALW
+3VS
C206
KILL_SW# <31,34>
100K_0402_5%
MINI_RF_OFF#
0.01U_0402_16V7K
100K_0402_5%
14W@
USB20_N3 <21>
USB20_P3 <21>
WLAN_LED# <34,37>
DCLK
DDATA
FOX_AS0B226-S56N-7F
ME@
+3VALW
2
12/13 Add
MINI_RF_OFF#
PCI_RST#
+3VALW
54
Kill SWITCH
GND2
KC FBM-L11-201209-221LMAT_0805
4
5
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
G1
G2
<20> PCIE_ITX_C_PRX_N0
<20> PCIE_ITX_C_PRX_P0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
1
2
3
<20> PCIE_PTX_C_IRX_N0
<20> PCIE_PTX_C_IRX_P0
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
2
3
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
<14> PCIE_CLK_WLAN#
<14> PCIE_CLK_WLAN
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
<14> WLAN_CLKREQ#
3
+3VS
L21
MINI_VCC
SB_PCIE_WAKE#
R593 1
2 0_0402_5%
R594 1
2 0_0402_5%
W LAN_CLKREQ#
WLAN_ACTIVE
BT_ACTIVE
<33> WLAN_ACTIVE
<33> BT_ACTIVE
+1.5VS
JP22
8/31Add R593 connect net WLAN_ACTIVE to JP22 pin3

8/31Add R594 connect net BT_ACTIVE
*** to JP22 pin5
Size
Document Number
Rev
0.1

Date:
Sheet

E
29
of
49
New Card Socket (Left/TOP)
New Card Power Switch
JP15
U32
7
8
Aux_out
20
14
15
4
3
2
CPUSB#
CPPE#
STBY#
SHDN#
SYSRST#
OC#
23
RCLKEN
PERST#
22
9
RCLKEN1
PERST1#
+3VS
+3VS
C592
10U_0805_10V4Z
2 @
C584
10U_0805_10V4Z
2 @
10K_0402_5%
NEWCARD@
Update Footprint
C585
C586
C587
1
<14,29> DCLK
<14,29> DDATA
+1.5VS_CARD1
PERST1#
10K_0402_5%
NEWCARD@
EXP_CLKREQ1#
RCLKEN1 2
G
10U_0805_10V4Z
2 @
EXP_CLKREQ1#
CP_PE#
<20>
CP_PE#
<14> PCIE_CLK_EXP#
<14> PCIE_CLK_EXP
+3VS
+1.5VS
C590
R478
TPS2231PWPR_PWP24
NEWCARD@
CP_USB#
+3VS_CARD1
+3VALW
C591
USB20_N2
USB20_P2
+3VALW_CARD1
R479
+3VS
C589
<21>
<21>
Imax = 0.75A
10U_0805_10V4Z
0.1U_0402_16V4Z 10U_0805_10V4Z
0.1U_0402_16V4Z 10U_0805_10V4Z
0.1U_0402_16V4Z
2
NEWCARD@ 2
NEWCARD@ 2
NEWCARD@ 2
NEWCARD@ 2
NEWCARD@ 2 NEWCARD@
+1.5VS_CARD1
NC1
NC2
NC3
NC4
NC5
1.5Vout1
1.5Vout2
1
10
12
13
24
11
GND
1.5Vin1
1.5Vin2
16
17
C588
+1.5VS_CARD1
Imax = 1.35A
NEWCARD@
2 100K_0402_5% CP_USB#
2 100K_0402_5% CP_PE#
SUSP#
NEWCARD@
SYSON
PCI_RST#
R475 1
R474 1
<26,31,40,43,46,47> SUSP#
<31,40> SYSON
<19,24,26,28,29,31,33> PCI_RST#
+3VALW
18
19
+3VALW_CARD1
40mil
+3VS_CARD1
Imax = 0.275A
Q35
2N7002_SOT23
NEWCARD@
<20> PCIE_PTX_C_IRX_N1
<20> PCIE_PTX_C_IRX_P1
C593
0.1U_0402_16V4Z
2 NEWCARD@
<20> PCIE_ITX_C_PRX_N1
<20> PCIE_ITX_C_PRX_P1
U33
G Vcc
+1.5VS
40mil
+3VALW_CARD1
3.3Vaux_in
+3VS_CARD1
3.3Vout1
3.3Vout2
21
+3VALW
3.3Vin1
3.3Vin2
5
6
+3VS
60mils
EXP_CLKREQ# <14>
NEWCARD@
Update Footprint
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND
27
28
29
30
GND
GND
GND
GND
12/7 Let pin 28 dummy by EMI request
FOX_1CX41201_26P_LT-S
NEWCARD@
12/13 Let pin 27 dummy by layout request
(NEW)
12/27 change JP 15 footprint to FOX_1CX41201_26P_LT-S

04/17 Symbol Add Pin 29,30
USB CONN. 1
USB CONN. 2
+USB_VCCB
+USB_VCCB
+USB_VCCB
7/24 EMI added
2200P_0402_25V7K
C449
@
150U_D_6.3VM
C668
C505
+3VALW
C508
C445
2200P_0402_25V7K
470P_0402_50V7K
150U_D_6.3VM
C667
W=80mils
470P_0402_50V7K
+5VALW
JP17
JP16
USB20_N0
USB20_P0
<21> USB20_N0
<21> USB20_P0
R532 1
R533 1
USB20_R_N0
USB20_R_P0
2 0_0402_5%
2 0_0402_5%
L56
+USB_VCCB
R411
U27
1
2
3
4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
<21> USB20_N6
<21> USB20_P6
USB20_N6
USB20_P6
R534 1
R535 1
L57
1
4
SUYIN_020173MR004G565ZR
ME@
WCM-2012-670T_4P
2 0_0402_5%
2 0_0402_5%
USB20_R_N6
USB20_R_P6
1
2
3
4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
C462
1
2
3
4
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
8
7
6
5
R589
1
USB_OC#06 <21>
0_0402_5%
G528_SO8
4.7U_0805_10V4Z
10K_0402_5%
1
7/24 EMI added
+USB_VCCB
W=80mils
C487
2200P_0402_25V7K
<31>
7/24 EMI added
USB1_ON#
ME@
WCM-2012-670T_4P
SUYIN_020173MR004G533ZR_4P
SUYIN_020173MR004G533ZR_4P
For EMI => Add R532,R533,R534,R535 (SD028000080) ,L56,L57 (SM070000I00)

7/30 change L56,57 to SM070000K00 by EMI request
D27
1
USB20_R_P0
GND
I/O
D28
VCC
I/O
+USB_VCCB
USB20_R_N0
USB20_R_P6
@ PRTR5V0U2X_SOT143
GND
I/O
VCC
I/O
+USB_VCCB
USB20_R_N6
@ PRTR5V0U2X_SOT143
For EMI => Change D27,D28 from SC300000100 to SC300000P00
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
NewCard & USB Connector
A
Title
Size
B
Date:
Document Number
Rev
0.1

Sheet

E
30
of
49
+3VALW
2 FBM-11-160808-601-T_0603
2
1
C355
C363
@
@
EC_SMB_CK1
2
4.7K_0402_5%
EC_SMB_DA1
2
4.7K_0402_5%
77
78
79
80
KSO[0..15]
<32> KSO[0..15]
KSI[0..7]
<32> KSI[0..7]
ISP MODE SUPPORT

2
R327
KSO3
1
4.7K_0402_5%
+3VS
C358
@
100P_0402_50V8J
SUSP#
1
2
C413
@ 100P_0402_50V8J
@
KSO17
1
2
R307
10K_0402_5%
<33> SPI_CS#
<33> SPI_CLK_R
<33> SPI_SI
SPI_CS#
1
R341
SPI_CLK_R
1
R332
SPI_SI
1
R326
EC_TX_P80_DATA
EC_RX_P80_CLK
1
2
3
4
R328
XCLKO 1
@
2 XCLKI
20M_0603_5%
C381
JP61
+3VALW
EC_TX_P80_DATA
EC_RX_P80_CLK
ON/OFF#
MUTE_LED1#
NUM_LED#
XCLKI
XCLKO
FSEL#SPICS#
2
0_0402_5%
SPI_CLK
2
0_0402_5%
FWR#SPI_SI
2
0_0402_5%
EC DEBUG PORT
1
2
3
4
ACES_85205-0400
ME@
12P_0402_50V8J
X2
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
2
1
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
122
123
67
AVCC
FRD#SPI_SO
FWR#SPI_SI
SPI_CLK
FSEL#SPICS#
73
74
89
90
91
92
93
95
121
127
S3AUXSW#
PSON#
FSTCHG
CHARGE_LED0#
CAPS_LED#
CHARGE_LED1#
PWR_LED#
SYSON
VR_ON
AC IN
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
100
101
102
103
104
105
106
107
108
AUX_PWRGD
EC_LID_OUT#
EC_ON
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
110
112
114
115
116
117
118
KILL_SW#
ENBKL_Q
EAPD
EC_THERM#
SMART_CHARGE_BTN#
WWW_USER_BTN#
V18R
124
GPI
XCLK1
XCLK0
KB926QFA1 LQFP 128P

<BOM Structure>
C380
12P_0402_50V8J
1 10K_0402_5%
WWW_USER_BTN#
R64
1 10K_0402_5%
EMAIL_BTN#
R60
EC_MUTE# <36>
USB1_ON# <30>
POWER_USB_LED# <32>
MUTE_LED# <32>
TP_CLK <33>
TP_DATA <33>
1 10K_0402_5%
SMART_CHARGE_BTN#
R59
1 10K_0402_5%
POWER_USB_BTN#
R63
EC_MUTE#
R318 1
1 10K_0402_5%
@
KB926 SPI STRAP PIN
FRD#SPI_SO <33>
AUX_PWRGD
BEEP#
SYSON
EC_SCI#
EC_THERM#
SERIRQ
S3AUXSW# <8>
PSON#
<20>
FSTCHG <43>
CHARGE_LED0# <34,37>
CAPS_LED# <32>
PWR_LED# <32,34,37>
SYSON
<30,40>
VR_ON
<48>
ACIN
<41>
C401
AUX_PWRGD <9,20>
EC_LID_OUT# <20>
EC_ON
<34>
SB_PWRGD
BKOFF#
RF_ON#
BT_ON#
SCROLL_LED#
C416
C418
C360
C371
B
SB_PWRGD
PBTN_OUT#
EN_FAN1
SB_PWRGD <9,20>
BKOFF# <16>
RF_ON# <29>
BT_ON# <33>
SCROLL_LED# <32>
KILL_SW# <29,34>
EAPD
<35,36>
EC_THERM# <20>
SMART_CHARGE_BTN# <32>
WWW_USER_BTN# <32>
C415
C361
+3VS
R545 1
2 15K_0402_5%
+3VALW
R547 1
2 10K_0402_5%
C372
ENBKL_Q
<18>
ENBKL
2
B
E
R546
47K_0402_5%
2
B
E
Q40
MMBT3904_SOT23
Q39
MMBT3904_SOT23
AC IN
C389
2 100P_0402_50V8J
VR_ON
C382
2 100P_0402_50V8J
ENBKL_Q
C374
2 100P_0402_50V8J
Level Shift Circuit

Compal Secret Data
Issued Date
2 10K_0402_5%
32.768KHZ_12.5PF_Q13MC14610002
119
120
126
128
GND
GND
GND
GND
GND
<34> USB2_ON#
<4> FAN_SPEED1
<12,13> EC_RX_P80_CLK
<34>
ON/OFF#
<32,35> MUTE_LED1#
<32> NUM_LED#
FSEL#SPICS#
2
100K_0402_1%
@
1
R335
OSC
FRD#SPI_SO
2
100K_0402_1%
NC
@
1
R325
OSC
+3VALW
R320 1
2 10K_0402_5%
EMAIL_BTN#
EMAIL_BTN# <32>
POWER_USB_BTN#
POWER_USB_BTN# <32>
MUTE_BTN#
MUTE_BTN# <32>
R322 2
+3VALW
DAC_BRIG <16>
EN_FAN1 <4>
IREF
<43>
C419
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
LID_SW#
SUSP#
PBTN_OUT#
EC_PME#
USB2_ON#
FAN_SPEED1
<20> PM_SLP_S3#
<20> PM_SLP_S5#
<20> EC_SMI#
<34>
LID_SW#
<26,30,40,43,46,47> SUSP#
<20> PBTN_OUT#
NC
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
<33,42>
<33,42>
<4>
<4>
97
98
99
109
MUTE_BTN#
MB_ID
2005/03/01
Deciphered Date
2006/03/01
Title

EC_KB926
EC_SMB_CK2
2
4.7K_0402_5%
EC_SMB_DA2
2
4.7K_0402_5%
1
C357
@
100P_0402_50V8J
2
1
R309
1
R308
EC_MUTE#
USB1_ON#
POWER_USB_LED#
MUTE_LED#
TP_CLK
TP_DATA
2 4.7K_0402_5%
100P_0402_50V8J
1
R317
1
R310
83
84
85
86
87
88
R315 1
100P_0402_50V8J
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
+5VALW
DAC_BRIG
EN_FAN1
IR EF
TP_DATA
100P_0402_50V8J
KSO17
2
0_0402_5%
68
70
71
72
2 4.7K_0402_5%
100P_0402_50V8J
1
R349
EC_PME#
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
BATT_TEMP <42>
BATT_OVP <43>
ADP_I
<43>
R316 1
100P_0402_50V8J
PCI_PME#
2
0_0402_5%
BATT_TEMP
BATT_OVP
ADP_I
TP_CLK
<20>
@
1
R348
+5VS
ECAGND
0.01U_0402_16V7K
63
64
65
66
75
76
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
PSCLK1/GPIO4A
KSI4/GPIO34
PSDAT1/GPIO4B
KSI5/GPIO35
PSCLK2/GPIO4C
PS2 Interface
KSI6/GPIO36
PSDAT2/GPIO4D
KSI7/GPIO37
TP_CLK/PSCLK3/GPIO4E
KSO0/GPIO20
TP_DATA/PSDAT3/GPIO4F
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
SDICS#/GPXOA00
KSO4/GPIO24
SDICLK/GPXOA01
KSO5/GPIO25 Int. K/B
SDIDO/GPXOA02
KSO6/GPIO26 Matrix
SDIDI/GPXID0
SPI
Device
Interface
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
SPIDI/RD#
KSO10/GPIO2A
SPIDO/WR#
SPI Flash ROM SPICLK/GPIO58
KSO11/GPIO2B
KSO12/GPIO2C
SPICS#
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
CIR_RX/GPIO40
KSO16/GPIO48
CIR_RLC_TX/GPIO41
KSO17/GPIO49
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
GPIO BATT_LOW_LED#/GPIO54
SCL1/GPIO44
SDA1/GPIO45
SUSP_LED#/GPIO55
SM
Bus
SCL2/GPIO46
SYSON/GPIO56
SDA2/GPIO47
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
C370
R5_PME#
1
10K_0402_5%
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
INVT_PWM <16>
BEEP#
<35>
CHGSEL <43>
ACOFF
<41,43>
<26>
2
R347
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
INVT_PWM
BEEP#
CHGSEL
ACOFF
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
DA Output
+3VALW
PWM Output
AD
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
21
23
26
27
AGND
0.1U_0402_16V4Z
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
69
C391
12
13
37
20
38
100P_0402_50V8J
<19,24,26,28,29,30,33> PCI_RST#
<20>
EC_SCI#
1 <20,26> PM_CLKRUN#
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
R311
14_A@
0_0402_5%
Rb
100P_0402_50V8J
CLK_PCI_EC
PCI_RST#
EC_RST#
EC_SCI#
@
1
2
R329
0_0402_5%
1
2
3
4
5
7
8
10
C356
0.1U_0402_16V4Z
100P_0402_50V8J
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
<14> CLK_PCI_EC
R331 1
2
47K_0402_5%
MB_ID
100P_0402_50V8J
GATEA20
GATEA20
<20,26,33> SERIRQ
<20,33> LPC_FRAME#
C426
<20,33> LPC_AD3
@
2
1
2
1
<20,33> LPC_AD2
R340
10_0402_5%
<20,33> LPC_AD1
@ 22P_0402_50V8J
<20,33> LPC_AD0
+3VALW
VCC
VCC
VCC
VCC
VCC
VCC
<20>
RB751V_SOD323
R312
RA@
100K_0402_5%
Ra
2
0_0402_5%
D26 @
2
KB_RST#
KB_RST#
+3VALW
ECAGND
<20>
U21
1
R342
9
22
33
96
111
125
C359
1000P_0402_50V7K
C373
1000P_0402_50V7K
C386
0.1U_0402_16V4Z
C406
0.1U_0402_16V4Z
C417
0.1U_0402_16V4Z
C396
0.1U_0402_16V4Z
1000P_0402_50V7K
0.1U_0402_16V4Z
1 ECAGND 2
2
FBM-11-160808-601-T_0603
1
L27
+EC_AVCC
1
2
FBM-11-160808-601-T_0603
+EC_AVCC
11
24
35
94
113
L29 1
+3VALW
+EC_DVCC
L28
3

Custom
Rev
0.1
Date:
Sheet
1
31
of
49
INT_KBD Conn.
For JFW91
JP43
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
GND
GND
KSI[0..7]
For JFW01
KSI[0..7]
KSO[0..15]
<31>
KSO[0..15] <31>
JP44
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
GND
GND
27
26
ACES_88502-2501
ME@
27
26
KSI0
C140 1
100P_0402_50V8J
KSO4
C142 1
100P_0402_50V8J
KSI1
C143 1
100P_0402_50V8J
KSO5
C138 1
100P_0402_50V8J
KSI2
C136 1
100P_0402_50V8J
KSO6
C132 1
100P_0402_50V8J
KSI3
C137 1
100P_0402_50V8J
KSO7
C130 1
100P_0402_50V8J
KSI4
C133 1
100P_0402_50V8J
KSO8
C131 1
100P_0402_50V8J
KSI5
C135 1
100P_0402_50V8J
KSO9
C145 1
100P_0402_50V8J
KSI6
C146 1
100P_0402_50V8J
KSO10
C128 1
100P_0402_50V8J
KSI7
C144 1
100P_0402_50V8J
KSO11
C127 1
100P_0402_50V8J
KSO0
C134 1
100P_0402_50V8J
KSO12
C124 1
100P_0402_50V8J
KSO1
C139 1
100P_0402_50V8J
KSO13
C125 1
100P_0402_50V8J
KSO2
C141 1
100P_0402_50V8J
KSO14
C126 1
100P_0402_50V8J
KSO3
C123 1
100P_0402_50V8J
KSO15
C129 1
100P_0402_50V8J
ACES_88502-2501
ME@
R314
Switch Board Conn.
<31> MUTE_LED#
@ 0_0402_5%
+3VS
+5VALW
R304
+5VALW
+3VALW
R48
R47
1
1
0_0402_5%
2
@ 0_0402_5%
+5VS
<21> SATA_LED#
<31> CAPS_LED#
<31> NUM_LED#
<31> SCROLL_LED#
<34> ON/OFFBTN#
<31> EMAIL_BTN#
<31> WWW_USER_BTN#
SATA_LED#
CAPS_LED#
NUM_LED#
SCROLL_LED#
ON/OFFBTN#
EMAIL_BTN#
WWW_USER_BTN#
D_POWER_USB_BTN#
1
3
S Q27
2N7002_SOT23
2
1
3
<31> MUTE_BTN#
<31> SMART_CHARGE_BTN#
<31,35> MUTE_LED1#
2
G
2
G
Q28
2N7002_SOT23
12/14 Add for MUTE_LED#
+3VALW
PWR_LED#
POWER_USB_LED#
R_MUTE_LED#
MUTE_BTN#
SMART_CHARGE_BTN#
+VCC_LED
<31,34,37> PWR_LED#
<31> POWER_USB_LED#
R62
10K_0402_5%
ON/OFFBTN#
PWR_LED#
10K_0402_5%
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
R_MUTE_LED#
1
0_0402_5%
2
R313
JP48
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
D13
ACES_85201-2005
ME@
D_POWER_USB_BTN#
POWER_USB_BTN#
51_ON#
POWER_USB_BTN# <31>
51_ON# <34,41>
DAN202UT106_SC70-3
7/30 EMI added

D35
D36
D_POWER_USB_BTN# 3
WWW_USER_BTN#
PWR_LED#
1
2
2
PSOT24C_SOT23
@
D37
D38
PSOT24C_SOT23
@
EMAIL_BTN#
SATA_LED#
1
PSOT24C_SOT23
@
POWER_USB_LED# 3
1
2
PSOT24C_SOT23
@
SMART_CHARGE_BTN# 3
MUTE_BTN#
ON/OFFBTN#
D39
PWR_LED#
1
2
PJSOT05C_SOT23
@
7/30 change D38 pn as SCA00000200
8/1 Change D38 value PSOT24C_SOT23 from to PJSOT05C_SOT23 , Add D39
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
Title
KB /SW Conn.
Size
B
Date:
Document Number
Rev
0.1

Sheet
1
32
of
49
+5VALW
EEPROM_VCC
EEPROM_VCC
1
0_0603_5%
@
2 0.1U_0402_16V4Z
100K_0402_5%
8
7
6
5
<31,42> EC_SMB_CK1
<31,42> EC_SMB_DA1
JP12
U19
VCC
WP
SCL
SDA
1
2
3
4
A0
A1
A2
GND
C108
0.1U_0402_16V4Z
20mils
EC_SMB_CK1
2
4.7K_0402_5%
EC_SMB_DA1
2
4.7K_0402_5%
R297
100K_0402_5%
0206 => change PN to SA00001N800
<31>
<31>
U5
AT24C16AN-10SU-2-7_SO8
1
R298
1
R299
To TP/B Conn.
+3VALW
1
0_0603_5%
EEPROM_VCC
8M SPI ROM
R300
VCC
HOLD
<31>
SPI_CS#
SPI_CS#1
<31>
SPI_CLK_R
SPI_CLK_R
6 C
<31>
SPI_SI
SPI_SI 5
VSS
TP_CLK
TP_DATA
TP_CLK
TP_DATA
1
2
3
4
5
6
7
8
+5VS
1
2
3
4
5
6
GND
GND
ACES_85201-06051
ME@
SPI_SO 2
R110
SST25LF080A_SO8-200mil
D
1
0_0402_5%
TP_DATA
FRD#SPI_SO <31>
TP_CLK
+5VS
12/19 change pn to SA00001MP00 ( original part EOL )
2
R302
EEPROM_VCC
C348 1
2
R301
+3VALW
C189
12/25 change back to SA024160140 ( Samples can not on time )
D15
@
PSOT24C_SOT23
0.1U_0402_16V4Z
1
JP62
SPI_CS#
SPI_SO
1
3
5
7
+3VALW
1
3
5
7
2
4
6
8
2
4
6
8
+3VALW
SPI_CLK_R
SPI_SI
Update Footprint
E&T_2941-G08N-00E~D
ME@
Bluetooth Conn.
FOR LPC DEBUG PORT
Need to check BT pin definition again!

9/20 modified this block
+3VS
+5VS
For 15W BT Conn. located at Right corner
For 14W BT Conn. located at Left corner
JP57
1
2
3
4
5
6
7
8
9
10
GND
GND
R14
+BT_VCC
10K_0402_5%
D
Q4
2N7002_SOT23
R579 1
<21> USB20_P1_1
R580 1
<21> USB20_N1_1
2
G
<29> WLAN_ACTIVE
<29> BT_ACTIVE
1
<34,37> BT_LED#
JP42
BT_LED#
2 0_0402_5%
2 0_0402_5%
BTON_LED
WLAN_ACTIVE
BT_ACTIVE
USB20_P1_1_R
USB20_N1_1_R
R13
10K_0402_5%
1
2
3
4
5
6
7
8
9
10
JP56
1
2
3
4
5
6
7
8
GND1
GND2
R582
1
1
<21> USB20_N1_2
<21> USB20_P1_2
BT_ACTIVE
WLAN_ACTIVE
BTON_LED
USB20_N1_2_R
2
2 0_0402_5% USB20_P1_2_R
0_0402_5%
R581
+BT_VCC_1
CLK_PCI_DB
CLK_PCI_DB <14>
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_AD0 <20,31>
LPC_AD1 <20,31>
LPC_AD2 <20,31>
LPC_AD3 <20,31>
LPC_FRAME# <20,31>
PCI_RST#
PCI_RST# <19,24,26,28,29,30,31>
1
ACES_85201-1005N
ME@
C576
@
2 0.1U_0402_16V7K
ACES_87212-0800
ME@
MOLEX_53780-0870
ME@
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
9
10
11
12
7/20 Swap USB signals
FOR LPC SIO DEBUG PORT

+3VALW
<31>
BT_ON#
R11
1 14W@
2
100K_0402_5%
W=40mils
+BT_VCC
C37
@
4.7U_0805_10V4Z
C23
14W@
1U_0603_10V4Z
Q3
SI2301BDS_SOT23
14W@
1
Q6
SI2301BDS_SOT23
15W@
3
2
2
100K_0402_5%
1 15W@
R21
C24
14W@
0.1U_0402_16V4Z
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
BT_ON#
C40
15W@
1U_0603_10V4Z
JP54
C39
15W@
0.1U_0402_16V4Z
<31>
+3VALW
W=40mils
+BT_VCC_1
C34
15W@
0.1U_0402_16V4Z
C21
@
4.7U_0805_10V4Z
C19
14W@
0.1U_0402_16V4Z
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
+5VS
+3VS
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ0#
PCI_RST#
CLK_PCI_DB
SERIRQ
CLK_14M_SIO <14>
LPC_DRQ0# <20>
2
R468
SERIRQ
1
10K_0402_5%
<20,26,31>
ACES_85201-2005
ME@
Issued Date
Compal Secret Data
2006/08/18
Deciphered Date
2007/8/18
Title
BIOS, I/O Port & K/B Connector

Size
B
Date:
Document Number
Rev
0.1

Sheet
33
of
49
ON/OFF switch
TOP Side
J2
J3
2
2
1
@ JOPEN
1
@ JOPEN
+3VALW
For JFW01 IO Conn.
Bottom Side
R303
L58
100K_0402_5%
D22
ON/OFF#
ON/OFFBTN#
<32> ON/OFFBTN#
3
+USB_VCCC
ON/OFF# <31>
51_ON#
51_ON# <32,41>
+USB_VCCC
JP52
WCM-2012-670T_4P
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DAN202UT106_SC70-3
Power Button
USB20_N4
USB20_P4
R536 1
R537 1
2 0_0402_5%
2 0_0402_5%
USB20_R_N4
USB20_R_P4
USB20_N5
USB20_P5
R538 1
R539 1
2 0_0402_5%
2 0_0402_5%
USB20_R_N5
USB20_R_P5
<21> USB20_N4
<21> USB20_P4
C351
D21
<21> USB20_N5
<21> USB20_P5
RLZ20A_LL34
2
1000P_0402_50V7K
1
SMT1-05_4P
SW3
@
L59
4
EC_ON
EC_ON
E&T_3703-E12N-03R
ME@
WCM-2012-670T_4P
R305
For EMI => Add R536,R537,R538,R539 (SD028000080) ,L58,L59 (SM070000I00)
2N7002_SOT23
Swap L58,L59 Pin 1 & Pin 4 , Pin 2 & Pin 3
10K_0402_5%
7/30 change L58,59 to SM070000K00 by EMI request
7/30 add for debug
Q29
2
G
<31>
ON/OFFBTN#
6
5
1
2
3
4
5
6
7
8
9
10
11
12
G1
G2
Front LED Board

+3VALW
+5VS
For JFW91 IO Conn.
+5VALW
JP51
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
PWR_LED#
CHARGE_LED0#
CHARGE_LED1#
BT_LED#
<31,32,37> PWR_LED#
<31,37> CHARGE_LED0#
<31,37> CHARGE_LED1#
<33,37> BT_LED#
WLAN_LED#
KILL_SW#
LID_SW#
<29,37> WLAN_LED#
<29,31> KILL_SW#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
G1
G2
+USB_VCCC
+USB_VCCC
JP59
1
2
3
4
5
6
7
8
9
10
11
12
13
14
USB20_R_N4
USB20_R_P4
USB20_R_N5
USB20_R_P5
ACES_87213-1600G
ME@
1
2
3
4
5
6
7
8
9
10
11
12
G1
G2
ACES_85201-1205_12P
ME@
Lid Switch
+3VALW
1
+5VALW
+USB_VCCC
+USB_VCCC
1
+
C51
C53
C349
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
10K_0402_5%
8
7
6
5
1
2
3
4
USB_OC#45 <21>
G528_SO8
+VCC_LID
1 14W@ 2
R267
0_0402_5%
R266 1 14W@
2 100K_0402_5%
470P_0402_50V7K
4.7U_0805_10V4Z
2
2
C362
@
0.1U_0402_16V4Z
+3VALW
150U_D_6.3VM
R169
U20
W=80mils
+USB_VCCC
USB2_ON#
VDD
<31>
OUTPUT
2
1
3
LID_SW# <31>
2
GND
C315
14W@
0.1U_0402_16V4Z
U13
A3212ELHLT-T_SOT23W-3
14W@
C314
14W@
10P_0402_50V8J
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
PWROK/LID/Front/IO Board
A
Title
Size
B
Date:
Document Number
Rev
0.1

Sheet

E
34
of
49
+VDDA
+AVDD_AC97
100P_0402_50V8J
<36>
MIC1_R
AMP_RIGHT
1
DVDD
HP_OUT_L
39
AMP_LEFT_HP
C619@
2 100P_0402_50V8J
17
MIC2_R
HP_OUT_R
41
AMP_RIGHT_HP
23
LINE1_L
NC
45
24
LINE1_R
DMIC_CLK
46
18
CD_L
NC
43
20
CD_R
NC
44
19
CD_GND
21
MIC1_L
2.2U_0603_6.3V6K
MIC1_C_L
MIC1_R
C640
2.2U_0603_6.3V6K
MIC1_C_R
2 100P_0402_50V8J
<20> HDA_RST_AUDIO#
MONO_IN
<20> HDA_SYNC_AUDIO
BIT_CLK
22
MIC1_R
12
PCBEEP
MUTE_LED1#
SENSE_A
SENSE_B
10K_0402_5%
C608
EC Beep
680P_0402_50V7K
<31>
BEEP#
<20>
SB_SPKR
C638
@
10P_0402_50V8J
C600 1
1U_0603_10V4Z
R484
1
2
560_0402_5%
C597 1
1U_0603_10V4Z
R482
1
2
560_0402_5%
R483
RESET#
10
SYNC
GPIO1
31
MIC1_VREFO_L
28
MIC1_VREFO_R
32
MIC2_VREFO
30
SDATA_OUT
2
3
13
34
GPIO0
GPIO3
SENSE A
SENSE B
47
EAPD
48
SPDIFO
4
7
DVSS1
DVSS2
29
D29
RB751V_SOD323
9/19 Realtek suggest

Add bypass schematic.
HDA_BITCLK_AUDIO <20>
1
R489
10mil
10mil
2SC2411K_SOT23
2
R485
2.4K_0402_5%
Need Update Footprint
10K_0402_5%
SDIN0
LINE1_VREFO
Q36
AMP_RIGHT_HP <36>
HDA_BITCLK_AUDIO
37
C602
MONO_IN_1 1
MONO_IN
2
1U_0603_10V4Z
2
B
CardBus Beep
AMP_LEFT_HP <36>
1U_0603_10V4Z
R480
10K_0402_5%
PCI Beep
AMP_LEFT <36>
AMP_RIGHT <36>
MONO_OUT
C596 1
9/22 Update footprint, Need to check
100P_0402_50V8J
2
33_0402_5%
HDA_SDIN0 <20>
7/20 modified
+MIC1_VREFO_L
+MIC1_VREFO_R
VREF
27
ACZ_VREF
JDREF
40
ACZ_JDREF
NC
33
AVSS1
AVSS2
26
42
10mil
R494
@
10_0402_5%
C617
@
100P_0402_50V8J
C635
10U_0805_10V4Z
C636
100P_0402_50V8J
HDA_BITCLK_AUDIO
DGND
AGND
C614
@
15P_0402_50V8J
R496
@
10_0402_5%
20K_0402_1%
ALC268-GR_LQFP48
1
1
R510
EAPD
SDATA_IN
11
<20> HDA_SDOUT_AUDIO
<31,32> MUTE_LED1#
C610
2 100P_0402_50V8J
C633
C607@
C612
9
35
LINE_OUT_R
2 100P_0402_50V8J
NC
LINE_OUT_L
MIC2_L
15
DVDD_IO
38
NC
16
C627@
C603
1
C637
@
10P_0402_50V8J
2
AMP_LEFT
2 100P_0402_50V8J
MIC1_L
<31,36>
C615@
2/01 Let them floating
C609
36
C623@
MIC1_L
AVDD2
AVDD1
14
<36>
0.1U_0402_16V4Z
U35
25
0.1U_0402_16V4Z
C611
+3VS
20mil
C624
L53 1
2
FBMA-L11-160808-800LMT_0603
680P_0402_50V7K
C621
10U_0805_10V4Z
C634
R481
0.1U_0402_16V4Z
10U_0805_10V4Z
+3VS_DVDD
40mil
680P_0402_50V7K
+VDDA
L55 1
0.1U_0402_16V4Z
2
FBMA-L11-160808-800LMT_0603
1
1
C632
C639
HD Audio Codec
Codec Signals
Funnction
39.2K
PORT-A (PIN 39, 41)
HP
20K
PORT-B (PIN 21, 22)
MIC
10K
PORT-C (PIN 23, 24)
LINE IN
5.1K
PORT-D (PIN 35, 36)
LINE Out
39.2K
PORT-E (PIN 14, 15)
HP
Regulator for CODEC

Adjustable Output
+5VS
SENSE_A
2
20K_0402_1%
SENSE FOR Solo Int. Mic.
20K
SENSE B
PORT-F (PIN 16, 17)

PORT-G (PIN 43, 44)
+VDDA
U34
L54 1
+5VS_VDDA
2
FBMA-L11-160808-800LMT_0603
C613
MIC
C604
4.7U_0805_10V4Z
10K
VIN
DELAY SENSE or ADJ
ERROR
CNOISE
SD
GND
VOUT
+VDDA
5
R502
30K_0402_1%
SI9182DH-AD_MSOP8
LINE IN
C622
0.1U_0402_16V4Z
5.1K
SENSE_B
2
20K_0402_1%
0.1U_0402_16V4Z
LINE Out
R507
10K_0402_1%
C606
1
R519
PORT-H (PIN 45, 46)
C605
@
10P_0402_50V8J
1
R495
<36> MIC_SENSE
4.7U_0805_10V4Z
SENSE A / B
SENSE FOR Ext. Mic.
Impedance
Sense Pin
Moat Bridge
SENSE FOR HP
2
R498
<36> HP_SENSE
SENSE_A
1
39.2K_0402_1%
1
R521
1
R520
1
R506
1
R503
2
0_0805_5%
2
0_0805_5%
2
0_0805_5%
2
0_0805_5%
Compal Secret Data
Issued Date
2006/08/05
Deciphered Date
2007/08/05
3
Title
<Title>
HD Audio Codec ALC268

Custom
LA-3541P
Date:
Rev
0.1
Sheet
1
35
of
49
7/20 Add U37 for APA2057A SA00001QD00

+5VALW
MIC_SENSE
<35> MIC_SENSE
U37
VDD
19
20
10
PVDD
PVDD
HVDD
11
2.2K_0402_5%
<35>
MIC1_R
<35>
MIC1_L
MIC1_R
MIC1_L
2 100K_0402_5%
AMP_EN#27
2 100K_0402_5%
HP_EN
1
R517
1
R518
22
21
SPKR+
SPKR-
/AMP EN
LOUT+
LOUT-
8
9
SPKL+
SPKL-
HP_R
HP_L
17
18
HP_R
HP_L
CVSS
15
VSS
16
24
HP EN
4
6
INR_H
INL_H
INR _H
INL_H
2
39K_0402_5%
2
39K_0402_5%
ROUT+
ROUT-
JP55
26
220P_0402_50V7K
<35>
HP_SENSE
C647
220P_0402_50V7K
2
HP_SENSE
HP_R
BEEP
CP+
CP-
R525
@
1K_0402_5%
2
23
7
13
29
GND
PGND
PGND
CGND
Thermal pad
BIAS
CVSS
R527
C643
@
1K_0402_5% 10P_0402_50V8J
C642
C644
1
2
3
4
5
6
7
8
9
10
11
12
G1
G2
ACES_87212-1200
ME@
10P_0402_50V8J
1U_0805_10V7K
12/13 Modified this symbol for pin 13 and 14.

Do not re-copy this symbol for other use
APA2056_TSSOP28
2056@
9/5 If implement AMP BEEP, Swap C641 and R524.

R524 change from 0 Ohm to 47K
1
2
3
4
5
6
7
8
9
10
11
12
13
14
HP_L
/SD
2
2
1 AMP_BEEP 28
0.47U_0603_16V4Z R522 0_0402_5%
AMP_CP+
12
AMP_CP14
1
2
C626
1U_0805_10V7K
AMP_BIAS
25
C649
2.2U_0603_6.3V6K
2
1
C646
0.1U_0402_16V4Z
C645
AMP_RHPIN
2
4.7U_0805_10V4Z
AMP_LHPIN
2
4.7U_0805_10V4Z
AMP_SD#
1 R524
2
1
0_0402_5%
C641
INR_A
INL_A
R526 1
1
C616
1
C625
<35> AMP_LEFT_HP
3
5
AMPL
R523 1
<35> AMP_RIGHT_HP
R275
2.2K_0402_5%
AMPR
2
1U_0603_10V4Z
2
1U_0603_10V4Z
+5VS
R274
1U_0603_10V4Z
<35> AMP_LEFT
10mil
C629
1
C620
1
C618
<35> AMP_RIGHT
10mil
2
+3VALW
CVDD
R514 @ 1.5K_0402_1%
1
2
R515 @ 1.5K_0402_1%
1
2
C648
10U_0805_10V4Z
C631
0.1U_0402_16V4Z
680P_0402_50V7K
C630
APA2057A
2057@
+MIC1_VREFO_R
1
+MIC1_VREFO_L
W=40mil
U37
APA2056 SPK/HP Amplifier
fo=1/(2*3.14*R*C)=106Hz
R=1.5K / C= 1uF
IN_A Gain = 10dB (Internal Speaker)

IN_H Gain = 0dB (Headphone)
12/1 Modified to X7R
12/1 Modified to X7R
12/7 Added for 15w" use
12/27 C48 change PN to SE092105K80
12/27 C46 change PN to SE092105K80

4/19 Modified this symbol to
add pin29 for thermal pad use.
JP58
1
2
3
4
5
6
7
8
9
10
11
12
13
14
MIC_SENSE
Do not re-copy this symbol for other use
MIC1_R
MIC1_L
HP_SENSE
HP_R
HP_L
7/20 Add below circuit for APA2057 gain tunning use
E&T_3703-E12N-03R
ME@
+5VALW
2056@
8/1 Change D34 from 2057@ to @
D34
1
AMP_SD#
1/31 change JP9 following JP50
1
0_0402_5%
+3VALW
2057@
0.01U_0402_16V7K 2
R586
2057@
22K_0402_1%
JP9
HP_EN
8/2 Change R585,R586 from 100k,220k to 10k,22k
R220
R221
R223
R226
20mil
1
1
1
1
2
2
2
2
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
SPK_L1+
SPK_L1SPK_R1+
SPK_R1-
1
2
3
4
5
6
Q41
2057@
SSM3K7002FU_SC70-3
2
G
Q42
2057@
SSM3K7002FU_SC70-3
Speaker Conn.
2
2
G
C671
2057@
0.1U_0402_16V4Z
SPKL+
SPKLSPKR+
SPKR-
R590 1 2057@ 2 10K_0402_5%
AMP_SD#
R588
2057@
10K_0402_5%
R592 1 2056@ 2 0_0402_5%
D17
PSOT24C_SOT23
@
8/1 Add R590 & C671 for 2057@ and R592 for 2056@
Gain (dB)
Low (V)
High (V)
Recommended (V)
10
3.45
3.51
3.48
11
3.56
3.62
3.59
12
3.68
3.73
3.70
13
3.80
3.85
3.82
15
4.07
4.02
A
4.05
1
2
3
4
GND1
GND2
ACES_88231-0400
ME@
2
R492
C666
<31,35> EAPD
RB751V_SOD323
@
EAPD
1
0_0402_5%
R585
2057@
10K_0402_1%
1
0_0402_5%
@
2
R488
EC_MUTE#
EC_MUTE#
R587
<31>
HP_EN
2
0_0402_5%
@
1
R591
@
D30
PSOT05C-LF-T7 SOT-23-3
1
@
D31
PSOT05C-LF-T7 SOT-23-3
8/1 Add R591 for @
1
2
3
4
5
6
7
8
9
10
11
12
G1
G2
8/1 Change Q41,Q42,R588 from @ to 2057@
D16
PSOT24C_SOT23
@
Gain= 10dB
2006/08/05
Issued Date
+5VALW assume equal 5.1V

10 dB ---> 5.1 x 220 / 320 = 3.5
B
Compal Secret Data
2007/08/05
Deciphered Date
C
Title
AMP/VR/Audio Jack/MIC

Custom
LA-3541P
Date:
Rev
0.1
Sheet

E
36
of
49
Camera Conn
MDC Conn.
R530 1
+5VALW
2 0_0603_5%
R531 1
+5VS
2 0_0603_5%
+CAMVDD
JP2
<20> HDA_SDOUT_MDC
1
R306
2 MDC@
33_0402_5%
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
9/3 change R531,C30,R191,R201,R578 from CAM@ to mount

20mil
+3VALW
C33
@
4.7U_0805_10V4Z
20mil
C30
0.1U_0402_16V4Z
JP3
<21>
<21>
HDA_BITCLK_MDC <20>
C352
@
22P_0402_50V8J
USB20_N7
USB20_P7
USB20_N7
USB20_P7
R19 1
R20 1
USB20_R_N7
USB20_R_P7
2 0_0402_5%
2 0_0402_5%
L60
R578
13
14
15
16
17
18
GND
GND
GND
GND
GND
GND
<20> HDA_SYNC_MDC
<20> HDA_SDIN1
<20> HDA_RST_MDC#
2
4
6
8
10
12
1
3
5
7
9
11
0_0603_5%
1
2
3
4
5
GND1
GND2
ACES_88266-05001
ME@
Connector for MDC Rev1.5
1
2
3
4
5
6
7
WCM-2012-670T_4P
ACES_88018-124G
ME@
For EMI => Add L60 (SM070000I00)

7/30 change L60 to SM070000K00 by EMI request
D9
USB20_R_P7
GND
I/O
VCC
I/O
+5VS
USB20_R_N7
@ PRTR5V0U2X_SOT143
For EMI => Change D9 from SC300000100 to SC300000P00
LED
+5VALW
R269 14W@
4.3K_0402_5%
1
2
1 LED1
PWR_LED# <31,32,34>
HT-191NB_BLUE_0603
14W@
R272 14W@
1
2
3.3K_0402_5%
LED3
4
2
+5VALW
R273 14W@
3.3K_0402_5%
1
2
+5VALW
Amber
Blue
HT-297UD/CB _BLUE/AMB_0603
14W@
Blue&Amber
+5VS
R271 14W@
1
2
3.3K_0402_5%
LED2
4
+5VS
R270 14W@
3.3K_0402_5%
1
2
3
1
Amber
BT_LED# <33,34>
Blue
WLAN_LED# <29,34>
HT-297UD/CB _BLUE/AMB_0603
14W@
Issued Date
Compal Secret Data
2006/08/18
Deciphered Date
2007/8/18
Title
LED/MDC/CAMERA
Size
B
Date:
Document Number

Sheet
37
of
49
Rev
0.1
H14
HOLEA
H13
HOLEA
H12
HOLEA
H11
HOLEA
H9
HOLEA
H8
HOLEA
H7
HOLEA
H6
HOLEA
H22
HOLEA
1
1
H21
HOLEA
H16
HOLEA
H15
HOLEA
H5
HOLEA
H4
HOLEA
H3
HOLEA
H2
HOLEA
H1
HOLEA
7/24 change H21/H22 from H_3P2 to H_3P25
H30
HOLEA
H29
HOLEA
H28
HOLEA
FD1
H_6P0x7P5N
FD3
FD4
@
Pad only on bottom side
H37
HOLEA
H36
HOLEA
H35
HOLEA
Hole=4.4mm
Hole=5.6mm
FD2
H31
HOLEA
1
H34
HOLEA
H32
HOLEA
H27
HOLEA
H23
HOLEA
H20
HOLEA
H18
HOLEA
H_3P1x5P6N H_3P1x5P6N
Issued Date
Compal Secret Data
2006/08/18
Deciphered Date
2007/8/18
Title
FAN & Screw Hole

Size
B
Date:
Document Number
Rev
0.1

Sheet
38
of
49
Issued Date
2005/03/01
Deciphered Date
2006/03/01
5
Compal Secret Data
Title
<Title>

Custom
Rev
0.1
Date:
Sheet
1
39
of
49
+5VALW TO +5VS
+5VS
+1.8VALW
8
7
6
5
2
1
1
C344
C334
@
10U_0805_10V4Z
2
2
1U_0603_10V4Z
AO4468_SO8
2
10U_0805_10V4Z
R295
@
470_0603_5%
1
C324
@
10U_0805_10V4Z
D
D
D
D
U15
S
S
S
G
C341
AO4468_SO8
@
10U_0805_10V4Z
2
1
2
3
4
1
1
C340
C329
@
10U_0805_10V4Z
2
2
1U_0603_10V4Z
R294
@
470_0603_5%
+VSB
D
D
D
D
S
S
S
G
C337
AO4468_SO8
@
10U_0805_10V4Z
2
1
2
3
4
1
1
C330
C342
@
10U_0805_10V4Z
2
2
1U_0603_10V4Z
R293
@
470_0603_5%
SYSON#
2
Q18 G
2N7002_SOT23
0.1U_0603_25V7K
2 SYSON#
G
Q24
2N7002_SOT23
@
+VSB
1.8VS_GATE
2
1
R284
47K_0402_5%
C318
1
D
SUSP
0.1U_0603_25V7K
2 SUSP
G
Q22
2N7002_SOT23
@
2
G
Q15
S
2N7002_SOT23
C319
0.1U_0603_25V7K
1.8V_GATE
1
2
R286
47K_0402_5%
C323
SUSP
2
Q19G
2N7002_SOT23
2 SUSP
G
Q25
2N7002_SOT23
@
5VS_GATE
R288
33K_0402_5%
C322
@
10U_0805_10V4Z
D
D
+VSB
8
7
6
5
C345
@
1
2
3
4
+1.8VS
U17
S
S
S
G
C335
@
10U_0805_10V4Z
D
D
D
D
+1.8VALW to +1.8VS
+1.8VALW
+1.8V
U18
8
7
6
5
+1.8VALW TO +1.8V
+5VALW
1 1
+3VALW TO +3VS
+3VALW
+1.2VALW TO +1.2VS
+3VS
+1.2VALW
C336
@
10U_0805_10V4Z
D
D
D
D
S
S
S
G
C321
AO4468_SO8
@
10U_0805_10V4Z
2
1
1
C327
C338
@
10U_0805_10V4Z
2
2
1U_0603_10V4Z
+VSB
C320
SUSP
2
Q16 G
2N7002_SOT23
0.1U_0603_25V7K
1.2VS_GATE
1
2
R283
47K_0402_5%
2 SUSP
G
Q21
2N7002_SOT23
@
R285
100K_0402_5%
SYSON#
C317
0.1U_0603_25V7K
<30,31>
SYSON
SYSON
Q14
2N7002_SOT23
2
G
SUSP
2
Q17 G
2N7002_SOT23
D
2 SUSP
G
Q23
2N7002_SOT23
@
3VS_GATE
1
2
R287
47K_0402_5%
+VSB
+5VALW
R290
@
470_0603_5%
R292
@
470_0603_5%
C325
AO4468_SO8
@
10U_0805_10V4Z
2
1
1
C331
C343
@
10U_0805_10V4Z
2
2
1U_0603_10V4Z
1
2
3
4
S
S
S
G
D
D
D
D
8
7
6
5
1 1
C339
@
10U_0805_10V4Z
+1.2VS
U14
1
2
3
4
1 1
U16
8
7
6
5
R281
10K_0402_5%
3
+5VALW
7/24 Change R281 from 100K to 10K

+1.05VS
+0.9VS
100K_0402_5%
SUSP
SUSP
<47>
1
3
1
S
R278
R296
470_0603_5%
@
Q13
2N7002_SOT23 1
2
G
<26,30,31,43,46,47> SUSP#
2 SUSP
G
Q26
2N7002_SOT23
@
2 SUSP
G
Q12
2N7002_SOT23
@
D
2 SUSP
G
Q20
2N7002_SOT23
@
R280
470_0603_5%
@
R289
470_0603_5%
@
+1.5VS
R282
C316
100P_0402_50V8J
10K_0402_5%
3/14 Change R16 from 100K to 10K
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
DC Interface
A
Title
Size
B
Date:
Document Number
Rev
0.1

Sheet

E
40
of
49
DC301001Y00
1
PR1
10_1206_5%
Precharge detector
Min.
typ.
Max.
H-->L 14.589V 14.84V 15.243V
L-->H 15.562V 15.97V 16.388V
PR2
1K_1206_5%
1
2
PR3
1K_1206_5%
1
2
PR4
1K_1206_5%
1
2
1
PR10
10K_0402_1%
PR8
1K_1206_5%
1
2
PR12
10K_0402_1%
1
2
ACIN
<31>
PACIN
<43>
PQ1
TP0610K-T1-E3_SOT23-3
1
ACOFF
B+
VIN
PD4
VS
+5VALWP
PJ18
PAD-OPEN 3x3m
2
+5VALW
(6A,240mils ,Via NO.= 12)

4
+3VALWP
PJ20
PAD-OPEN 3x3m
1
2

1
+0.9VSP
PJ19
PAD-OPEN 3x3m
2
PJ17
1
PAD-OPEN 3x3m
2
1
2
PQ5
PR31
RHU002N06_SOT323-3 47K_0402_1%
2
2
1
G
PACIN <43>
+0.9VS
PQ6
DTC115EUA_SC70-3
+5VALWP

+1.05VSP
PC12
0.01U_0402_25V7K
2
1
PR28
499K_0402_1%
1
PR27
191K_0402_1%
PRG++ 2
1
2
PR30
34K_0402_1%
2
1
RTCVREF
PC14
1000P_0402_50V7K
PAD-OPEN 3x3m
2
+1.8VALW
+1.05VS
+3VALW
(6A,240mils ,Via NO.=12)
+1.2VALWP
PJ16
1
+1.8VALWP
PU1B
LM393DG_SO8
+1.5VS
2
1
PR32
66.5K_0402_1%
+1.5VSP
RB715F_SOT323-3
PQ4
TP0610K-T1-E3_SOT23-3
PJ15
PAD-OPEN 3x3m
1
2
1
3
ACON
<43>
PD6
<42,44> MAINPWON
1
2
PC11
0.1U_0603_25V7K
<32,34> 51_ON#
VS
PR29
22K_0402_1%
1
2
PC10
0.22U_1206_25V7K
GND
CHGRTCP
PR26
100K_0402_5%
IN
OUT
PR25
200_0805_5%
2
1
+CHGRTC
PC9
4.7U_0805_6.3V6K
PU2
PC8
1U_0805_25V4Z
PR24
PR23
560_0603_5%
560_0603_5%
1
2 1
2
2
1
PR22
100K_0402_1%
RLS4148_LL34-2
G920AT24U_SOT89-3
PC13
0.1U_0603_25V7K
2
1
PR20
68_1206_5%
2
1
PR21
68_1206_5%
RTCVREF
2
1
PR19
499K_0402_1%
PD5
BATT+
PR18
2.2M_0402_5%
2
1
VL
RLS4148_LL34-2
3.3V
1
PR13
100K_0402_5%
PQ3
DTC115EUA_SC70-3
High 18.764 17.901 17.063

Low 17.745 16.9
16.03
3.3V
1
<31,43>
RTCVREF
PR16
10K_0402_1%
PR17
10K_0402_1%
2
1
PQ2
DTC115EUA_SC70-3
Vin Detector
1 2
PACIN
PU1A
LM393DG_SO8
PD3
RLZ4.3B_LL34
8
3
PC7
0.1U_0402_16V7K
2
1
PR11
84.5K_0402_1%
1
PR15
20K_0402_1%
PR14
22K_0402_1%
1
2
1
2
VS
RLS4148_LL34-2
VS
PR9
1M_0402_1%
1
2
VIN
PC6
1000P_0603_50V7K
VIN
2
1
PR7
100K_0402_5%
PD2
PR5
PC5
@ 10K_0402_1% @ 0.01U_0402_25V7K
1
2
1
2
2
1
PR6
100K_0402_5%
1 2
2
PD1
RLZ24B_LL34
PC4
0.022U_0603_50V7K
1
2
PC3
0.022U_0603_50V7K
1
2
<BOM Structure>
PC2
0.01U_0402_50V7K
1
2
PC1
0.01U_0402_50V7K
VIN
PL1
HCB4532KF-800T90_1812
1
2
ADPIN
PJP1
BATT ONLY
Precharge detector
Min.
typ.
Max.
H-->L 6.138V 6.214V 6.359V
L-->H 7.196V 7.349V 7.505V
ACIN
@ SINGA_2DW-0268-B16
1 1
2 2
3 3
4 4
PJ21
PAD-OPEN 3x3m
1
2
+1.2VALW

A
(16A,800mils ,Via NO.= 24)

PJ22
+VSBP
PAD-OPEN 3x3m
2
Issued Date
Compal Secret Data
+VSB
2005/10/17
Deciphered Date
2006/10/17
(0.3A,40mils ,Via NO.= 2)

B
Title
DCIN/DECTOR
Size
B
Date:
Document Number
Rev
0.2

D
Sheet
41
of
49
PJ23
PAD-OPEN 3x3m
2
2/16 Change to 89 degree C for thermal request

BATT+
PH1 under CPU botten side :

CPU thermal protection at 85 degree C
Recovery at 70 degree C
PJP2
PR42
78.7K_0603_1%
1
2
PU3A
3 +
1
2
PR37
150K_0402_1%
MAINPWON <41,44>
1SS355TE-17_SOD323-2
PR45
150K_0402_1%
1
2
PR43
2 150K_0402_1%
1
VL
1
PR46
1K_0402_1%
2
PD8
LM358ADR_SO8
PC20
1U_0603_6.3V6M
1
+3VALWP
PH1
100K_0603_1%_TH11-4H104FT
2
PR44
6.49K_0402_1%
1
1
2
PC19
1000P_0402_50V7K
EC_SMB_DA1 <31,33>
PR39
1 442K_0603_1%
2
1
PR41
100_0402_1%
2
2
1
PR40
100_0402_1%
VL
TM_REF1
EC_SMB_CK1 <31,33>
1
1
PR38
10K_0402_1%
VS
VL
PC17
0.01U_0603_50V7K
PR36
1K_0402_1%
@ 100K_0402_5%
@ PR33
100K_0402_5%
+3VALWP
PC16
1000P_0603_50V7K
PR34
+3VALWP
CNT1
CNT2
EC_SMCA
EC_SMDA
TS_A
GND
PC15
1000P_0603_50V7K
PR35
1K_0402_1%
1
2
BATT++
1
2
3
4
5
6
7
8
9
10
11
1
2
3
4
5
6
7
8
9
G1
G2
PC18
0.1U_0603_25V7K
BATT++
DC040003600
BATT_TEMP <31>
PQ7
TP0610K-T1-E3_SOT23-3
1
2
2
PC21
0.22U_1206_25V7K
2
1
PR47
100K_0402_5%
PR48
22K_0402_1%
1
2
VL
+VSBP
1
PC22
0.1U_0603_25V7K
B+
PQ8
RHU002N06_SOT323-3
2
G
SPOK
PR50
0_0402_5%
2
PC23
0.1U_0402_16V7K
1
<44,45>
2
PR49
10K_0402_1%
Issued Date
Compal Secret Data
2005/10/17
Deciphered Date
2006/10/17
A
Title
BATTERY CONN. / OTP

Size
B
Date:
Document Number
Rev
0.1

D
Sheet
42
of
49
ADP_I = 19.9*Iadapter*Rsense
65W, Iadapter=0~3.42A, Current sense=0.02ohm, PR74=39.2K, CP=3.079A

B+
PC27
2200P_0402_50V7K
2
1
2
1
PQ13
DTC115EUA_SC70-3
2
EN
CSON
22
CELLS
CSOP
21
ICOMP
CSIN
20
VCOMP
CSIP
19
ICM
PHASE
18
LX_CHG
CSON
0.047U_0603_16V7K
1
2
PR214 20_0603_5%
CSOP
PQ17
SI4800BDY-T1-E3_SO8
G
S
S
S
4
3
2
1
PR72
10K_0402_1%
12
VDDP
15
VADJ
LGATE
14
GND
PGND
13
PR67
PC41
BST_CHG 1
2 BST_CHGA 2
1
2.2_0603_5% PD10
0.1U_0603_25V7K
6251VDDP
DL_CHG
1SS355TE-17_SOD323-2
1
26251VDD
4.7_0603_5%
PR71
PC30
@680P_0603_50V7K
1
2
PR73
@ 274K_0402_1%
LOW
12.90V
12600mV
HIGH
12.60V
1
4
2
1
2
LM358ADR_SO8
PR78
105K_0402_1%
PC48
0.01U_0402_25V7K
OVP voltage :
LI-3S :13.50V--BATT-OVP=1.5V
PU3B
5
PR76
499K_0402_1%
0
G
PR75
340K_0402_1%
BATT-OVP=0.111*BATT+
CV mode
PR77
10K_0402_1%
2
PC47
0.01U_0402_25V7K
<31> BATT_OVP
CC=0.6~3.4A
VCHLM=0.24V~1.36V
IREF=0.972*Icharge
IREF=0.5832V~3.3V
PC46
0.01U_0402_25V7K
CHGSEL
13050mV
BATT+
PQ21
@SI2301BDS-T1-E3_SOT23-3
VS
<31>
2800mAH 3S pack
PR65
0.02_2512_1%
PR79
@4.7_1206_5%
PQ19
SI4800BDY-T1-E3_SO8
PC45
4.7U_0805_6.3V6K
If this area float, Charge voltage is 4.2V/cell
Charging Voltage
CHGSEL
(0x15)
BATT+
ACLIM
16
PR74
@ 100K_0402_1%
CP mode
Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05)
where Vaclm=0.5535V, Iinput=3.079A
where Vaclm=0.6667V, Iinput=4.263A
BATT Type
CHG 1
1 2
BOOT
5
6
7
8
CHLIM
DH_CHG
D
D
D
D
10
11
17
PL3
1 PR141 2
0_0603_5%
G
S
S
S
UGATE
<41>
ISL6251AHAZ-TR5283_QSOP24
6251VREF
VREF
39.2K_0402_1%
2
1
DTC115EUA_SC70-3
PQ20
PR69
6251VREF 1
PQ15
RHU002N06_SOT323-3
2
PACIN
G
If charge current is small,

you can change to 16uH choke.
PC44
1
2
ACOFF
2
1
PR62 20_0603_5%
0.1U_0603_25V7K
1
2
PR61
2.2_0603_5%
4
3
2
1
PC40
1
2
0.1U_0402_16V7K
<31,41>
PR213
20_0603_5%
1
2
23
ACSET ACPRN
6251VREF
Be careful the
PR70
IREF voltage!!
100K_0402_1%
1SS355TE-17_SOD323-2
<31>
PD9
6251DC_IN
24
PC43
10U_1206_25VAK
DCIN
VDD
10UH_SIL1045RA-100PF_4.5A_30%
PQ18
RHU002N06_SOT323-3 <31>ADP_I
<BOM Structure>
PR68
143K_0402_1%
2
1
IREF
1
ACON
ACON
1 PR64
2
100_0402_1%
VIN
PC42
10U_1206_25VAK
PU4
1
1
2
G
<41>
0.01U_0402_25V7K
PACIN
<41>
PR66
22K_0402_1%
PACIN 1
2
1
<26,30,31,40,46,47> SUSP#
PC37
1 PR63
2
10K_0402_1%
1
2
PC39
100P_0402_50V8J
<31,41>
200K_0402_1%
PC38
1
2
0.01U_0402_25V7K
ACOFF
1 PR56
1
2
PC36 6800P_0402_25V7K
2
1SS355TE-17_SOD323-2
PC31
100K_0402_1%
RB715F_SOT323-3
PC34
CSON1
PR55
10K_0402_1%
FSTCHG
3
2
PR60
150K_0402_1%
6251_EN
VIN
PD7
5
6
7
8
1
2
2
1
2
PC35
@ 680P_0402_50V7K
D
D
D
D
8
7
6
5
PR52
47K_0402_1%
1
2
PR59
1
3
PQ14
DTC115EUA_SC70-3
1
PR58
0_0402_5%
D
D
D
D
PQ9
PD17
2
6251VDD
0.1U_0402_16V7K
PC97
0.1U_0603_25V7K
S
S
S
G
PQ43
DTC115EUA_SC70-3
PR210
2 PR57
1
10K_0402_1%
PC56
1
2
FSTCHG
CS IN
6251DC_IN
1SS355TE-17_SOD323-2
PD16
1
2
JUMP_43X118
CSIP
PR209
100K_0402_1%
PQ12
DTA144EUA_SC70-3
<31>
PJ14
1
1
2
3
4
CHG_B+
PC26
0.1U_0603_25V7K
2
1
P3
PQ16
D
RHU002N06_SOT323-3
2
G
S
PQ42
TP0610K-T1-E3_SOT23-3
PC29
5600P_0402_25V7K
1
2
1
PR54
200K_0402_1%
2
1
2
3
PC28
0.1U_0603_25V7K
PQ11
PR53
47K_0402_1%
PR51
0.02_2512_1%
S TR AO4407 1P SO8 W/D
PC25
10U_1206_25VAK
2
1
8
7
6
5
PC24
10U_1206_25VAK
2
1
D
D
D
D
S
S
S
G
1
2
3
4
1
2
3
4
S
S
S
G
D
D
D
D
2.2U_0603_6.3V6K
8
7
6
5
VIN
P3
100K_0402_1%
P2
PQ10
PC33
0.1U_0603_25V7K
Normal 3S LI-ON Cells
Issued Date
Compal Secret Data
2006/05/18
Deciphered Date
2007/05/18
A
Title
CHARGER
Size
Document Number
R ev
1.0
CHARGER
Date:

D
Sheet
43
of
49
ISL6237_B+
ISL6237_B+
B+
PR81
PC119
2200P_0402_50V7K
2
1
30
LGATE2
LGATE1
2
2
1
PR221
10K_0402_1%
32
PGND
22
OUT1
10
FB1
11
BYP
SKIP
29
20
PR225
100K_0402_5%
1
2
PC122
4.7U_1206_25V6K
2
1
PC121
4.7U_1206_25V6K
2
1
5
6
7
8
D
D
D
D
G
S
S
S
1
@ PR215
2.2_1206_5%
1 2
VFB=0.7V
REF
LDOREFIN
@ PR223
2
14
NC
POK2
28
EN_LDO
POK1
13
EN1
ILIM1
0_0402_5%
1
VL
0_0402_5%
2
SPOK
PR227
12
ILM1
31
ILIM2
<42,45>
330K_0402_1%
1
PR228
PC135
0.047U_0402_16V7K
2
1
PC134
1U_0603_6.3V6M
@ PR232
47K_0402_1%
TON
GND
21
EN2
2VREF_ISL6237 2
PR231
0_0402_5%
2
1
2VREF_ISL6237
1
PR229
@ 0_0402_5%
PR230
0_0402_5%
27
NC
PC133
0.22U_0603_25V7K
<41,42> MAINPWON
PC132 0.22U_0603_10V7K
PR226
200K_0402_5%
1
2
FB5
PR224
1
PZD1
RLZ5.1B_LL34
REFIN2
3.3VALWP Ipeak=6.6A~10A
Rds(on) = 20m ohm(max) ; Rds(on) = 16m ohm(typical)
VS
18
DL5
OUT2
2VREF_ISL6237
1
16
PR220
61.9K_0402_1%
2
PHASE1
23
PHASE2
PC129
0.1U_0603_25V7K
LX5
PR222
10K_0402_1%
1
2
25
FB3
0_0402_5%
PR218
1
BST5A 2
PC130
680P_0603_50V8J
17
0_0603_5%
LX3
DL3
PQ26
DH5
BOOT1
4
3
2
1
PC126
2
1
1U_0603_10V6K
19
15
PR80
VL
4.7U_0805_6.3V6K
7
PVCC
UGATE1
+5VALWP
PQ27
SI4810BDY-T1-E3_SO8
4 G
D 5
3 S
D 6
2 S
D 7
1 S
D 8
BOOT2
LDO
24
VCC
VIN
UGATE2
PC128
0.1U_0603_25V7K
TP
26
PR217
1 BST3A
0_0603_5%
S
S
S
G
D
D
D
D
33
PL5
2
1
4.7UH_SIL104R-4R7PF_5.7A_30%
PC127
1U_0603_10V6K
1
2
8
7
6
5
DH3
1
2
3
4
PQ28
SI4810BDY-T1-E3_SO8
PC131
680P_0603_50V8J
2
1
2
+
PR219
0_0402_5%
PC59
220U_6.3V_M
+3VALWP
PU5
@ PR216
2.2_1206_5%
2
1
PL6
1
2
4.7UH_SIL104R-4R7PF_5.7A_30%
1
2
3
4
PC124
1U_1206_25V7K
PC125
1
2
PQ25
SI4800BDY-T1-E3_SO8
SI4800BDY-T1-E3_SO8
8
7
6
5
D
D
D
D
VL
S
S
S
G
2
0_0603_5%
PC64
220U_6.3V_M
PC123
2200P_0402_50V7K
2
1
PAD-OPEN 3x3m
2
PC120
4.7U_1206_25V6K
2
1
PJ28
1
ILIM2
1
330K_0402_1%
ISL6237IRZ-T_QFN32_5X5
5VALWP Ipeak=6.6A~10A
Rds(on) = 20m ohm(max) ; Rds(on) = 16m ohm(typical)
Issued Date
Compal Secret Data
2005/10/17
Deciphered Date
2006/10/17
A
Title
+5VALWP/+3VALWP
Custom
Date:
Rev
0.1

D
Sheet
44
of
49
2.2_0603_1%
PR233
+5VALW
PC137
1U_0402_6.3V6K
PC136
1U_0402_6.3V6K
PR234
1
+5VALW
10_0603_1%
ISL6228_B+
2 PR235
ISL6228_B+
JUMP_43X118
1
2
PJ24
2
B+
PC138
0.1U_0603_25V7K
PC139
0.1U_0603_25V7K
2 PR236
10_0603_1%
ISL6228_B+
10_0603_1%
2
1
1
2
29
PGOOD2
28
VIN2
3
VCC2
VCC1
FB1
GND_T
PR323
1
8.2K_0402_1%
+5VALW
1
FSET2
PR243
VIN1
FB_1.2
34K_0402_1%
PR238
18.2K_0402_1%
@
0_0402_5%
PGOOD1
1 PR324
PR241
1
PC141
1000P_0402_50V7K
PR237
22K_0402_1%
FSET1
PR240
PC142
2
1
PR239
33.2K_0402_1%
3.3K_0402_5%
1000P_0402_50V7K
PC140
1000P_0402_50V7K
+5VALW
0_0402_5%
3.3K_0402_5%
PR242
1000P_0402_50V7K
16.5K_0402_1% PR244
PC143
2
1
1
2
ISL6228_B+
PR245
VO_1.2
OCSET1
VO_1.8
26
VO2
LX_1.2
12
PHASE1
SPOK
0.022U_0402_16V7K
DH_1.2-1
13
UGATE1
LX_1.8
23
PHASE2
PQ30
SI4800BDY-T1-E3_SO8
G
S
S
S
0_0603_5%
PC152
2
1
2
1
PC153
1U_0402_6.3V6K
0_0603_5%
PC154
1U_0402_6.3V6K
DL_1.2
0.1U_0402_16V7K
DL_1.8
1.2V_EN
SPOK
PC86
220U_6.3V_M
PR254
0_0402_5%
2
1
PC155
0.01U_0402_25V7K
<42,44>
DCR 10 mOHM
G
S
S
S
+1.8VALWP
1
4
3
2
1
+5VALW BST_1.8 1
1.8UH_SIL104R-1R8PF_9.5A_30%
PQ32
SI4810BDY-T1-E3_SO8
PR253
+5VALW
PL8
1
5
6
7
8
21
20
19
18
17
16
15
PR250
10K_0402_1%
D
D
D
D
PC149
2
4
3
2
1
2DH_1.8-2
BOOT2
PVCC2
LGATE2
DH_1.8-1
22
UGATE2
PGND2
BOOT1
0_0603_5%
PGND1
1 2
PR252
LGATE1
PR251
1BST_1.2 14
PVCC1
S
S
S
G
PC151
0.1U_0402_16V7K
D
D
D
D
8
7
6
5
PQ46
SI4810BDY-T1-E3_SO8
ISL6228_B+
@ 0.01U_0402_25V7K
DCR 10 mOHM
<42,44>
ISL6228HRTZ-T_QFN28_4X4
0_0603_5%
EN2
24
OCSET_1.8
PR249
0_0402_5%
1
2
PC147
25
PC150
4.7U_1206_25V6K
OCSET2
PU6
PC148
4.7U_1206_25V6K
EN1
5
6
7
8
1
2
3
4
11
10K_0402_1%
1.2V_EN
1
2
3
4
PC84
220U_6.3V_M
10
1.8UH_SIL104R-1R8PF_9.5A_30%
8
7
6
5
D
D
D
D
OCSET_1.2
D
D
D
D
PQ45
SI4800BDY-T1-E3_SO8
PR248
PL7
1
FB2
PR246
DH_1.2-21
+1.2VALWP
VO1
FB_1.8
27
34K_0402_1%
S
S
S
G
PR247
8.2K_0402_1%
PC145
4.7U_1206_25V6K
1
2
PC146
0.022U_0402_16V7K
1
2
PC144
4.7U_1206_25V6K
2
1
VFB=0.6V
Issued Date
Compal Secret Data
2005/10/17
2006/10/17
Deciphered Date
1.2VALWP/1.8VP
5
Title

Custom
Date:
Rev
0.1
Sheet
1
45
of
49
PJ25
B+
D
2
@
6269_B+
JUMP_43X118
PHASE_1.05V
PR257
0_0603_5%
2
DH_1.05-2
PC158
1 PR256
0_0603_5%
+5VALW
BOOT_1.05V
2
0.1U_0402_16V7K
VIN
VCC
PR258
0_0603_5%
13
14
15
12
LG
11
1 PR259 2 6269_1.05V
4.7_0603_5%
1
2
4
3
2
1
UG
BOOT
PVCC
PC159
2.2U_0603_6.3V6K
LG_1.05V
PL10
1.8UH_SIL104R-1R8PF_9.5A_30%
1
2
6269_1.05V
PQ47
SI4800BDY-T1-E3_SO8
G
S
S
S
16
PHASE
PGOOD
GND
PU7
17
D
D
D
D
10K_0402_1%
5
6
7
8
4.7U_1206_25V6K
PC156
PR255
DH_1.05-1
6269_1.05V
PC157
4.7U_1206_25V6K
5
6
7
8
Vripple==>40mV
PC161
220U_6.3V_M
2
1
G
S
S
S
PR263
4.42K_0402_1%
<BOM Structure>
1
PR261
4.7_1206_5%
@
D
D
D
D
PQ48
SI4810BDY-T1-E3_SO8
4
3
2
1
ISEN_1.05V
1
VO
ISL6269ACRZ-T_QFN16_4X4
PR264
3K_0402_1%
PC163
@680P_0603_50V7K
1
PC165
0.01U_0402_25V7K
FB_1.05V
1
PR266
57.6K_0402_1%
PR265
49.9K_0402_1%
PR267
4.02K_0402_1%
2
PC164
22P_0402_50V8J
FSET
PC162
0.1U_0402_16V7K
@
ISEN
COMP
EN
0_0402_5%
FB
0_0402_5%
10
PGND
<26,30,31,40,43,47> SUSP#
FCCM
3
2
1
PR262
+1.05VSP
OCP==>7A~~8.5A
+1.05VSP
PR260
2
PC160
2.2U_0603_6.3V6K
PC166
6800P_0402_25V7K
VFB=0.6V
B
Issued Date
Compal Secret Data
2005/10/17
2006/10/17
Deciphered Date
1.05VSP/1.5VSP
5
Title

Custom
Date:
Rev
0.1
Sheet
1
46
of
49
+1.8VS
D
PJ26
JUMP_43X79
+5VS
PC167
1U_0603_6.3V6M
PC168
10U_0805_6.3V6M
PU8
8
7
EN
POK
VOUT
VOUT
3
4
FB
+1.5VSP
1
2
PC169
2
PC170
3K_0402_1%
APL5913-KAC-TRL_SO8
PC171
@ 0.1U_0402_16V7K
PR269
GND
<26,30,31,40,43,46> SUSP#
VCNTL
VIN
VIN
0.01U_0402_25V7K
22U_1206_6.3V6M
6
5
9
PR268
0_0402_5%
PR270
3.4K_0402_1%
VFB=0.8V
PJ27
JUMP_43X118
+1.8V
PU9
VCNTL
GND
NC
VREF
NC
VOUT
NC
TP
PR271
1K_0402_1%
1
1K_0402_1%
1
2
2
G
PR273
2
PC176
0.1U_0402_16V7K
PC173
1U_0603_6.3V6M
+0.9VSP
0_0402_5%
1
2
SUSP
APL5331KAC-TRL_SO8
PR272
<40>
+3VALW
1
VIN
PC172
10U_0805_6.3V6M
PC175
22U_1206_6.3V6M
PQ49
PC174
RHU002N06_SOT323-3 0.1U_0402_16V7K
Issued Date
Compal Secret Data
2005/10/17
2006/10/17
Deciphered Date
+1.5VSP/0.9VSP
5
Title

Custom
Date:
Rev
0.1
Sheet
1
47
of
49
COMP
UGATE2
27
11
FB
BOOT2
26
12
FB2
NC
25
1
2
220P_0402_50V7K
PR321 1K_0402_1%
VCC_PRM
PC206
0.22U_0603_10V7K
PC180
10U_1206_25VAK
2
1
PC179
10U_1206_25VAK
2
1
PR293
10K_0402_1%
2
1
3.65K_0805_1%
1 2
PR291
3
2
1
5
6
7
8
PR305
1 2
D
D
D
D
4
3
2
1
4
3
2
1
G
S
S
S
5
6
7
8
PC196
1
2
0.22U_0603_10V7K
VCC_PRM
ISEN2
+CPU_B+
2.61K_0402_1%
PR322 4.02K_0402_1%
PC205 0.1U_0402_16V7K
1
2
1_0402_5%
PR307 @ 0_0603_5%
1
2
PR320
20_0402_5%
1
2
PR318 0_0402_5%
PC204 180P_0402_50V8J
1
2
PR319
11K_0402_1%
20_0402_5%
<5> VSSSENSE
PR306
VSUM
PC203
0.018U_0603_50V7J
PR317
PC202
0.018U_0603_50V7J
PR316
0_0402_5%
PR315
+CPU_CORE 1
PC201 0.018U_0603_50V7J
1
2
2
1
VSUM
PC200
0.1U_0603_25V7K
PR314 1K_0402_1%
<5> VCCSENSE
+5VS
PQ55
SI4856DY-T1-E3_SO8
PR313
10_0603_5%
1
2
PR3121
PC194
680P_0603_50V8J
PL13
10KB_0603_5%_ERTJ1VR103J
PH3
1K_0402_1%
PC199 1000P_0402_50V7K
1
2
1
255_0402_1%
1
PR302
4.7_1206_5%
PR308 1_0603_5%
PC197
1U_0402_6.3V6K
PR310
@ 0_0402_5%
PR311
1
PR309 97.6K_0402_1% PC195 470P_0402_50V7K

1
2
2
1
ISEN1
ISEN2
2
D
D
D
D
PQ54
SI4856DY-T1-E3_SO8
PU10
0.36UH_MPC1040LR36_24A_20%
2
PC193 1000P_0402_50V7K
PC198
5
6
7
8
5
6
7
8
D
D
D
D
UGATE_CPU2-2
G
S
S
S
ISEN1
24
ISEN2
23
22
VDD
GND
21
VIN
20
VSUM
19
DFB
VO
18
17
13
10
DROOP
1
2
1000P_0402_50V7K PC192
PR303 6.81K_0402_1%
1
2
PHASE_CPU2
PR299
UGATE_CPU2-1 1
2
2.2_0603_5%
BOOT_CPU2
1
2
1
2
PR301
PC191
0_0603_5%
0.22U_0603_10V7K
+CPU_B+
28
PC188
10U_1206_25VAK
29
PHASE2
PGND2
VW
PQ53
SI7686DP-T1-E3_SO8
LGATE_CPU2
OCSET
31
30
+CPU_CORE
PR294
1_0402_5%
PR304
10K_0402_1%
2
1
PVCC
LGATE2
3.65K_0805_1%
SOFT
PL12
LGATE_CPU1
RTN
13K_0402_1%
1
2
+
2
PR295 @ 0_0603_5%
1
2
PC186
1
2
VCC_PRM
ISEN1
0.22U_0603_10V7K
VSUM
NTC
ISL6262ACRZ-T_QFN48_7X7
B+
0.36UH_MPC1040LR36_24A_20%
2
1
3
2
1
1
VR_TT#
PQ51
SI4856DY-T1-E3_SO8
4.7_1206_5%
680P_0603_50V8J
PR292
2
1
LGATE1
32
PHASE_CPU1
PC185
33
G
S
S
S
34
PGND1
UGATE_CPU1-1
4
3
2
1
PHASE1
RBIAS
G
S
S
S
PMON
PQ52
SI4856DY-T1-E3_SO8
4
3
2
1
35
D
D
D
D
37
VID0
38
VID1
UGATE1
16
@ 100K_0603_1%_TH11-4H104FT
1
2
@ 0.015U_0402_16V7K
PC189
0.022U_0603_50V7K PC190
1
2
PC178
10U_1206_25VAK
2
1
1
PC182
2.2U_0603_6.3V6K
2
1
PC181
0.022U_0402_16V7K
2
1
PR284
PR283
PR282
39
VID2
40
VID3
41
VID4
42
VID5
44
43
VID6
VR_ON
46
45
DPRSTP#
48
47
3V3
CLK_EN#
PC177
220U_25V_M
<5>
<5>
<5>
<5>
CPU_VID2
<5>
CPU_VID1
<5>
CPU_VID0
<5>
<31>
CPU_VID3
CPU_VID4
PR281
PR280
PR279
PR278
1
2
49
PSI#
1
2
2.2_0603_5%
PR290
36
15
2 1
PR300
0.22U_0603_10V7K
UGATE_CPU1-2
PC184
2
1
2
PH2
0_0603_5%
PR287
BOOT_CPU1 1
BOOT1
VSEN
PR298
VR_TT#
@ 4.22K_0402_1%
1
2PR296 @ 0_0402_5%
147K_0402_1%
1
PR297
PL11
HCB4532KF-800T90_1812
1
2
1
PQ50
SI7686DP-T1-E3_SO8
PC187
10U_1206_25VAK
2
1
PGD_IN
C
PGOOD
DPRSLPVR
H_PSI#
VDIFF
<5>
VGATE
14
<14>
+CPU_B+
PC183
1U_0603_6.3V6M
499_0402_1%
1.91K_0402_1%
PR288
+3VS
0_0402_5%
2
0_0402_5%
2
GND
PR286
1
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
PR277
1
CLK_EN#
0_0402_5%
2
PR285
PR276
1
<5,25> H_DPRSTP#
PR289
PR274
1_0603_5%
PR275 499_0402_1%
1
2
<25> PM_DPRSLPVR_D
+3VS
CPU_VID5
CPU_VID6
VR_ON
+5VS
PC207 0.22U_0402_6.3V6K
2
1
2005/10/17
Issued Date
Compal Secret Data
Deciphered Date
2006/10/17
5
Title
+CPU_CORE
Custom
Date:
R ev
0.1
Sheet
1
48
of
49

Intelbras I30 - Compal La-3961p - Rev 0.3

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Intelbras I30 - Compal La-3961p - Rev 0.3

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A

Intel Merom Processor with SiSM672MX + DDRII + SiS968 + SiS307LV

JFWXX M/B LA-3961P Schematic

Thursday, September 06, 2007

Compal Electronics, Inc.

Compal Secret Data

Intel Merom Processor

CRT & TV-out

1.8V DDRII 533/667

1GB/s MuTIOL IO Link

New Card MINI Card x1

Power On/Off CKT.

DC/DC Interface CKT.

Power Circuit DC/DC

Compal Electronics, Inc.

Compal Secret Data

JFWXX M/B LA-3961P Schematic

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

+0.9VS ( Actual +0.9V )

0.9V switched power rail for DDR terminator

1.05V switched power rail

1.25V switched power rail

1.5V switched power rail

External PCI Devices

CARD BUS CB1410

1.8V power rail for DDR

1.8V switched power rail

2.5V switched power rail

3.3V always on power rail

3.3V switched power rail

5V always on power rail

5V switched power rail

VSB always on power rail

ICH8M SM Bus address

SLP_S1# SLP_S3# SLP_S4# SLP_S5#

R424 (Pull low)

(Internal Pull High)

JFWXX M/B LA-3961P Schematic

Thursday, September 06, 2007

Compal Electronics, Inc.

Compal Secret Data

Trace length must short

Place close to CPU within 500mil

Intel :Pull-up 56ohm (Un-Mount) SiS : Pull-up 56ohm (Mount)

Intel :Pull-up 56ohm (Mount) SiS : Pull-up 75ohm (Mount)

Checklist recommend 39 Ohm CRB pull 75 Ohm

Connect SB SYS_RESET# or just left NC

H_THERMDA, H_THERMDC routing together,

Merom Ball-out Rev 1a

Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)

Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)

Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)

Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)

Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)

Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)

Intel : Pull-up 56ohm (Mount) SiS : Pull-up 56ohm (Mount)

Intel : Pull-up 56ohm (Mount) SiS : Pull-up 56ohm (Mount)

Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)

Intel :Don't Pull-up SiS : Pull-up 56ohm (Un-Mount)

Intel :Don't Pull-up SiS : Pull-up 150ohm (Mount)

Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)