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Registers
Flip-flops are limited because they can store only one bit.
We had to use two flip-flops for our two-bit counter examples.
Most computers work with integers and single-precision floatingpoint numbers that are 32-bits long.
A register is an extension of a flip-flop that can store multiple bits.
Registers are commonly used as temporary storage in a processor.
They are faster and more convenient than main memory.
More registers can help speed up complex calculations.
Well discuss RAM next time, and later well also see how registers are
used in designing and programming CPUs.
Registers
A basic register
Registers
The input D3-D0 is copied to the output Q3-Q0 on every clock cycle.
How can we store the current value for more than one cycle?
Lets add a load input signal LD to the register.
If LD = 0, the register keeps its current contents.
If LD = 1, the register stores a new value, taken from inputs D 3-D0.
LD
0
1
Q(t+1)
Q(t)
D3-D0
Registers
Clock gating
We could implement the load ability by playing games with the CLK
input, as shown below.
When LD = 0, the flip-flop C inputs are held at 1. There is no
positive clock edge, so the flip-flops keep their current values.
When LD = 1, the CLK input passes through the OR gate, so the flipflops can receive a positive clock edge and can load a new value from
the D3-D0 inputs.
Registers
This is called clock gating, since gates are added to the clock signal.
There are timing problems similar to those of latches. Here, LD must
be kept at 1 for the correct length of time (one clock cycle) and no
longer.
The clock is delayed a little bit by the OR gate.
In more complex scenarios, different flip-flops in the system could
receive the clock signal at slightly different times.
This clock skew can lead to synchronization problems.
Registers
Another idea is to modify the flip-flop D inputs and not the clock signal.
When LD = 0, the flip-flop inputs are Q3-Q0, so each flip-flop just
keeps its current value.
When LD = 1, the flip-flop inputs are D3-D0, and this new value is
loaded into the register.
Registers
Shift registers
A shift register shifts its output once every clock cycle.
Q0(t+1) =
Q1(t+1) =
Q2(t+1) =
Q3(t+1) =
SI
Q0(t)
Q1(t)
Q2(t)
Registers
Shift direction
Q0(t+1) =
Q1(t+1) =
Q2(t+1) =
Q3(t+1) =
Present Q0-Q3
ABCD
SI
X
SI
Q0(t)
Q1(t)
Q2(t)
Next Q0-Q3
XABC
The circuit and example make it look like the register shifts right.
on your
interpretation
of the
bits.
If you consider
But it really depends
Present
Q3-Q
SI
Next
Q3-Q
0
0
Registers
We can add a parallel load, just like we did for regular registers.
When LD = 0, the flip-flop inputs will be SIQ0Q1Q2, so the register
shifts on the next positive clock edge.
When LD = 1, the flip-flop inputs are D0-D3, and a new value is
loaded into the shift register, on the next positive clock edge.
Registers
10
Here is a block symbol for the Shift Reg-4 from LogicWorks. The
implementation is shown on the previous page, except the LD input here
is active-low instead.
Registers
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Registers
12
Registers
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serial device
computer
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computer
serial device
Registers
15
GPR's
Size
L1 Cache
L2 Cache
Pentium 4
Athlon XP
8
8
32 bits
32 bits
8 KB
64 KB
512 KB
512 KB
Athlon 64
16
64 bits
64 KB
1024 KB
32
128
64 bits
64 bits
64 KB
16 KB
512 KB
256 KB
MIPS R14000
32
64 bits
32 KB
16 MB
Registers
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Registers
-2 en twos
complement
17
Program 2:Shift
#include ..
#include ..
main() {
scanf(%d,&mul);
start = _rdtsc();
for (i=0;i<60;i++){
b=b*mul;
}
end = _rdtsc();
printf("It took %llu cycles\n",
end-start);
return 0;
}
main() {
scanf(%d,&mul);
start = _rdtsc();
for (i=0;i<60;i++){
b=b << mul;
}
end = _rdtsc();
printf("It took %llu cycles\n",
end-start);
return 0;
}
Registers
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Program 2:Shift
#include ..
#include ..
main() {
scanf(%d,&mul);
start = _rdtsc();
for (i=0;i<60;i++){
b=b/mul;
}
end = _rdtsc();
printf("It took %llu cycles\n",
end-start);
return 0;
}
main() {
scanf(%d,&mul);
start = _rdtsc();
for (i=0;i<60;i++){
b=b >> mul;
}
end = _rdtsc();
printf("It took %llu cycles\n",
end-start);
return 0;
}
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Registers summary
Registers
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