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Chapter 1
Basic Semiconductor
and p-a nmiju. n"Chon.,
Theory
forward bias
dcO r
i1 r
redythe
torwwO t.as
P- typo
C)
0
0
cs-
+ .-.
Chapter Contents
+ -*
!ntroth tction
1 . 1 Atomic Theory 2
1-2 Conduction hi Solids 5
1-3 Conductors, Semiconductors. arid Insulators 7
1-4 n-Type and p-Type Semiconductors 9
1-5 The pnJunctiori 12
1-6 Biased Junctions 14
Review Questions 18
C)-CC)
uras5r.c1
bamer vkage
4.
-
-ocr tarrer
s reared
ry 0w30 tars
Forward aacod
jt!r.Croo bar5er
vottage
0-I. .
1-0
Object iv Cs
Describe an atom. and sketch a
diagram to show its components.
Explain energy leveLs and energy
bands relating to electrons, and
define valence band and
conduction band.
Describe how electric current jlow
occurs by electron Motion and by
hole transfer.
Explain conventional current
direction and direction of electron
flow.
Sketch a diagram to stiolL' the
relationship between covalently
bonded atoms.
o-. .. -
C) __
0m
-. '
, _,_C)-
Introduction
An electronic device controls the tuovemetit of elect roils. '11w study
of electronic devices requires a basic understanding of the
relationshi p between electrons and the other components of an
atom. The movement of electrons within a solid. and the bonding
forces between atonis can then be investigated. This leads to a
knowledde of the differences between conductors, insulators, and
semiconductors, and to an tinderstatiding of v-t y pe and n-type
semiconductor material.
Junctions of ptvpe and it-t y pe ttiaterial (pn-j onet ions) are basic
to all but a very few semiconcittetor devices Forces act upon
electrons that are adjacent to a ptl-junction. nod these forces- are
altered b y the presence of an external bias voltage.
I-I
.1(0/fliC Theory
The . - ltouii
The atom can be thotti,ht of is
surrounded by orbtiin elccttoo.c Hee Ft. 1 il. I His, it uii y be
compared to a planet '.vith oi'hiting sntel'i'cs Just satellites are
belt] in (:Oit b y the attractive lotee of gr.t\'tt\' cite ti the mass of
the plat:et. sQ 'ne'Ii Cleciroll is llt'l(h ill orkct b .ctt
oJcitrrctit.-' betdvteti It intl die titicleits.
-.
':.
--
-
-:
Electron
(ie g ai' sly chac d)
// '
I/curt' I-I
scty charged)
''
a ,
1
UriI3fl
/)uS/tt lv
protons 10,1!
harged
JTC
Protons
O .,
0:0 0 0 ,
-OOi
Neutrons
Figure 1-2
hot e
>
ca
additional
electron
(hI Neeartve cc
Figurc
hcn . i'
fans Cr' electron
m ls-
hole
hole
Figure 1-4
lb
Two-drrcnsron.r!
::
valeflec
shell
shell
(a) S lena atom
rr'jaescnt.Lo
- -.,
.1
Cndtitticn
and
Forbidden
Energy
Ltd
:
,/
\ ilence
F-i,'ure -,
f / c efu-Pi
ic.
'it/nj t-d' .t
Pt
-ntri" hdr, 'j ij :r,t,a E!i irtfl-,
0 old ,irt.iid i
i tSr c ha n, ft(ror
Ii:. 1; P. e kid k(-r-, 3%.
7MM ,ifl
Ener' Bands
So ftir. the discussion has concerned a s y stem of electrons in one
isolated atom. The electrons of an isolated atom are acted upon
only by the forces within that atom. However, when atoms are
brought closer together, as In a solid, the electrons come under the
Influence of forces from other atoms. Under these circumstances,
the energy levels that may be occupied by electrons merge into
bands of energy levels. Within any given material there are two
distinct energy bands in which electrons may exist: the valence
band and the conduction band. Separating these two bands is an
energy gap, termed the fol'biddenqa, In which no electrons can
normally exist. The valence band, conduction band arul forbidden
gap are shown diagrammatically in Fig. 1-5(b).
1.
- B.;c
ncL'nduir ,i;,d
1'
n 1 iirv
1-1.1
1 -1 2
:1-1 .3
1-2 Conduction
Electron .'!o
it,
tio ,z and
So/it/s
Hole Transfer
Free electrons
'.
..
S.S4 :
Applied electric
field
Figure 1-6
Free c/cO rrns are easily moved by
an ipplwd oltame 1(1 create an
e-tr'( (cr.eflt.
a) Electron rnmcs
, e1txc_,
Hes
-
: :,:
G!.
hole
Hole
:!
'::
!:
rce
tc
Figure 1-7
Conduction be hole transfer. An
electron can be made to jump
from one atom to another under
the influence of an applied
rolrae. cauingthe bolero moe
in the opprrite direction.
Catier
Basic
1 . 'iii
be
Marge carriers. Each time a hole moves, an electron must
-
supplied with sufficient ener'. to enable it to escape trout its
atom. Free electrons require less application of energ y IltaLl holes
to move them, because the y are already disconnected from their
atoms. For this reason, electrons have greater mobility than holes.
Conventional Current and Electron Flow
In the earl y days of electrical experimentation it was believed that
a positive charge repicserited an increased amount of eleetucity.
and that a negative charge was a reduced quantit y . 1 hus. it was
assumed that current flowed from positive to negative. This IS 0
convention that remains in use today even though current is nov
known to be a movement of electrons from negative to positive.
(see Fig. 1-8).
cpnventtOal
current directiot
etectrori
motion
'/
electrons
Figurc- 1-8
direction.
1-3
hel
ire, eJ
.1
Fizre 1-9
-01 electrons
hans
dirt,( troll
--ic.
Fi'ure 1-1I
Figure
Ffgure 142
Ionic bonding Occurs in onie
(nL'lrmt Inn marcia Is There are no
hales or tree elect mans to facilitate
current flow.
--
Chapter
Buic
Conduction
A band
1 1-3.2
1-3.3
Review
-Type
1-4 it
Doping
1rt,e
Energy
level
Forbidden
gap
Valence
band
(a)
!n5U210r
cor.ducien
band
Forbidden gap
L flCC
bard
(b)
Sc
:d'iz,T
Cond..)fl
ti,
V C;
ct
Figure 1-1.
iner'y
cc,cdLja Oir.
c'i-'
1 0
it-
Type iilaie'rial
l:fl Impi\
.lTOfli
hi
13
0 0
00
C
Il,'rt:-e 114
In donor dcj.'--v ccflurity atone
-1(11 tvP ialer;'e ne!l electrons
and We hen we c'idjecj to tire
!fl3ter; if.
&
13
13
- -
\ 1 rncc shelf
pentaealc'ul csfoiis.
p-Type Material
The impurity atoms used for acceptor doping (Fig. 1-15) have outer
sheflo containing- ihrce electrons; and five holes. Suitable atoms
With three valence electrons (t:ivc1eitt c:torns) are boron, a1umutun
a nd ofltrs,. These atoms form covalent ho; ids with the
i-rnico p dllc't(r atoms, but LIre bonds lack one electron for
Basic Set
11
}-lolc created
by lack of fourth
electron in
valence shell
-1 t,ore i-1
Al t-:Jlor O'Jflifl ret 1uirc5 lie rae
-:rl\ SEePS that its c mlmrcai
-
n iicl is e J1o ' e5 in the
tt , fI T'o C_ee stJiS in
--'PhL( er P
---
ltnpuriry atom
v.ith three
--
electrons in its
salence shell
- -- Semiconductor
1 2
1-4.3
Dra' a
ritjodrr
leirip::mture co&flciertt,
dark
resistance.
h1es
elucLrais
co ach
. oao
n'te
Fig ure 1-17.
P-type and n-type semiconductor
materials,
13
&OOflS
p-type
a err)
o
I'
a a ' C
Barrier J 'oltage
The n-ty pe and p-t y pe materials are both electrically neutral before
the charge cavilers diliuse across the junction. When negative ions
side close to the
are created on the p-side. the portion of the pjunction acquires a negative voltage. (see Fig. 1-IS). Similarly. the
positive ions created on the ni-side gives the ii-side a positive
voltage close to the jifiwlion. The negative voltage on the p-side
tends to repel additional electrons crossing from the ri-side-Also.
(thinking of the holes as tositive particles) the positive voltage on
the it side tends to repel an'; hole movement froin he p-sidc. Thus,
the initial diffusion of cNn ge carriers creates a bonIer i-oltciqe at
i ve on the ,lhe 11111clioll, which is ieat ive oil the p-side and posit
side. The transfer of charc irciers and tile reultailt creation of
the batTier voltage ocrurW hen tile prijunetions arc torined r1urin
the manufacturing pr(cess. (see Chapter (3).
The magnitude of the barrier voltage at a pnjunctiotl can be
calculated from a kt;o\;Icdge of the doping densities. electronic
charge, and junction ictiaperature. \)icai barrier voltages at 25C
are 0.3 V (or genuanOiIfl juitetions and 0.7 V for silicon.
It has been explained that the barrier voltage at the juncticu
opposes both the flow of electrons from the Ti -side and the flow of
holes from the p-side. Because electrons are the majority charge
carriers in the mi-t y pe material, and holes are the majority charge
carriers in the p-type, it is seen that the barrier voltage opposes the
flow of majority carriers across the pa-junction. (see Fig. 1-19). Any
free electrons generated b y thermal eneri on the p-side of the
junction are attracted across the positive barrier to the n-side.
Similarly, thermally generated holes on the n-side are attracted to
the p-side through the negative barrier presented to them at the
junction. Electrons on the p-side and holes on the it-side are
minority charge carriers. Therefore, the harrier voltage assists the
flow of minority carriers across the junction. (Fig. 1-19).
Depletion Region
o-oss tm
es
the nde to
S the p-a4e
neatwe ens
L
collage
s'
porn9 ct;
Figure 1-18
nsnon:,
Came
lUflotJOfl
barSor
.. '-$---' .-- - -
c-'arge
Figure 1-19
The barrier voltage at a pnjunction assists the flow of
minority charge carriers arid
opposes the flow of majority
carriers.
1 4
"
-
,-
::'
- te ..__L n
'S .t
jct /l \aien
ro s
'0
'
rs.s
/4M
Flet
Ions
OS
urLer
ccr:fl
EC>I.
Su m m a r i zing:
]-Si
1-5.2
YI
- I.-wased Junctions,
Reverse Biased Junction
When an external bias voltage Is applied to a pn-jurictlori, positive
to the n-side and negative to the p-side, electrons from the n-side
are attracted to the positive terminal, and holes from thx p-side are
Figure 1-20
Charge carrier diufLaior across a
on-junction creates a region
depleted of charge carriers which
penetrate deepest inco the most
I;gtiy rioper? ;de.
Chapter I - Baoe Serniconductot and pu-Junction Theer\
15
4-
p-tae
I-iiure
-\ .-. e-
cct-
-
C-C-':
1-21
-
p;)i I d to i
.+
C On PC n-ide,
oes
Oc O-O(iu)
to oden. and
1+
-ceoe
Only
rent t1cw
60 .
flOd5'0Ofl
eaed t,y
revwte aIS
-2
2
.3
jPtA)
Figure 1-22
16
depletion region width and the barrier potential are both reduced.
When the applied bias voltage is progressively increased from
zero, the barrier voltage gets smaller until It effectively disappears
and charge carriers easily flow across thejunction. Electrons from
the n-side are now attracted across to the posttiveblas terminal on
the p-side, and holes from the' p-side flow across to the negative
terminal on the n-side, (thinking of holes as positively-charged
particles). Thus, a majority carrier current flows, and the Jupctlon
Is said to be forward biased.
forrd bias
dcpObofl re9on
rar,owed by the
toward bas
PS
Figure 1-23
p-te
-r
+.-
,. o- . H .e O ..
-
urt&ced u'cton
bare' aOtage
- ;arrcSo barrre,
votage a
by to ' Spas
as
vS rage
The graph in Fig. 1-24 shows the forward current (Jr) plotted
against forward voltage (Vs) for typical germaniun and silicon pnjunctions. In each case, the graph Is known as the forward
chamcieristic of the junction. It is seen that very little forward
current flows until VF exceeds the junction harrier, voltage (0.3 V
for germanium, 0.7 V for silicon). 'When V is increased from zero
toward the knee of the charact.ristIc, the harrier voltage is
progressively overcome, allowing more majority charge carriers to
flow across the junction. Abov . the knee of the characteristic 1.
increases almost linearly with Increase in V. The level of current
that can be made to flow across a forward-biased pn-Junction
largely depends on the junction area.
PS
44 " '
Geniun
1Ff
2
. '- Si1i
Figure 1-24
pn-junction forward characteristics. Germanium junctions are
forward biased at approximately
0.3 V. A silicon junction requires
approximately 0.7 V for forward
bias.
0.7
0.8 (v)
Chapter I
17
As already discussed, the reverse saturation current (1R) at a pnjunction consists of minority charge carriers. When the
temperature of semiconductor material is increased, increasing
numbers of electrons break away from their atoms. This generates
additional minority charge carriers, causing 'R to increase as the
junction temperature rises. It can be shown that the reverse
cuiTent level approximately doubles with each 10C increase in
temperature, and that for a given junction, there Is a definite J
level for each temperature level. see Fig. 1-25(a).
The junction forward voltage drop ( Vs) is also affected by temperature. The horizontal line (at 3 mA) on Fig. 1-25(b) shows that, if
IF is held constant while the junction temperature is changing, the
forward voltage decreases with increasing junction temperature.
This means that VF has a negative temperature coefficient. It is
found that the temperature coefficient for the forward voltage of a
pn-junctiOri is approximately -1.8 mV/C for a silicon junction.
and -2.02 mV/ D C for germanium.
Figure -2
Jurrct!on re
Lt ..me
's temp
fs.n .
't re
dron ye
(
5.
Int 3(.
4.
4U
25 0
3IF
---------------
1!
-t
-------0.8
at 5000
V at 25C
(b)
-6.1
cv)
1 8
eerion 1-2
1-6 Draw a sketch to show the process of current flow by
Ccctrcn motion. Briefly explain.
1-7 Draw shetches to show the process of current flow by hole
transfer. Which have greater mobility, electrons or holes
Explain why.
Section 1-4
A-13 Define acceptor doping, and draw a sketch to Illustrate the
process. Explain.
1-14 Define donor doping, and draw a sketch to Illustrate the
process. Explain.
1-15 State the names given to acceptor-doped material and
donor-doped material. Explain.
1-16 What Is meant by majority charge carriers and minority
charge carriers ? Which are majority carriers and why in: (a)
1-20 Define:
Section 1-5
1-21 Using illustrations, explain how the depletion region and
barrier voltage are produced at a pn-junctiori. List the
characteristics of the depletion region.
1-22 Draw a sketch to show the depletion region and barrier
voltage at a pn-junction, with unequal doping of each side.
Briefly explain.
Section 1-6
1-23 A bias is applied to a pn-junction, positive to the p-side,
negative to the n-side. Show, b y a series of sketches, the
effect of this bias on depletion region width, barrier voltage,
minority carriers, and majority carriers. Briefly explain the
effect in each case.
1-24 Repeat Question 1-23 for a bias applied negative to the pside and positive to the n-side.
1-25 Sketch the voltage-current characteristics for a pn-junction:
(a) with fonvard bias, and (b) with reverse bias. Slow how
temperature change affects the characteristics.
1-.26 State typical values of barrier voltage for silicon and
germanium junctions. Discuss the resistances of forwardbiased and reverse-biased p11-junctions.
1-27 State typical reverse saturation current levels for pin-junctions.
Explain the origin of reverse saturation current.
2 0
Chapter
M^`I
Chapter Contents
Introduction
2- 1
pu-JunCtion
Diode 22
Review Questions 46
Problems 47
100
80
60
IF
40
20
0
0
21
2 2
Introduction
die
The tel-ni
identifies a two-electrode, or two-ternunal. device. A
semiconductor diode is siniplv a pta-junction with a connecting
lead oil side. A diode is one-wa y device, offering a low
resistance when forward biascd, and behaving almost as all
switch when reverse biased. An approximately constant voltage
drop across occurs across a forward-biased diode, and this
simplifies diode circuit anal y sis. Diode (forward and reverse)
characteristics are graphs of c o rresponding current and voltage
levels. For precise circuit ana Ivis, tic load lines are clravii on the
diode lonv ird characteristic.
Sonic diocics are low-current devices f'r use in switching circuits.
High-cut-rent diodes are most often used as rectifiers for cue to dc
conversion. Zener diodes arc operated in reverse breakdowiu,
because the y have a very 'stable breakdown voltage. There are
IIIaIIV other t y pes of diodes designed 6r specialised applications.
2-1 j'n-.Junction
p-t,r
Diode
To
mrductors
Fiiur
2-I
- omltuttc/uctnr (10510 (5 .1
.:.a t mi
oh (ondu( to r,
'rcr-(t:ng the (Je(a- to ,i 0 Ut.
tec::-A_
Figure 2-2
ip. ca:)
o'
Anr.a ::daoates
Ca',Vlr.t:cr,al Current
dure0'. or
23
Cah nie
cni
Figure 2-3 ,
The ize are rppeaarrce or a
dh dc depend.
he !e /
tnrd (r 'rer
the cie re
rUH.
100
A
80 -
IF
60)
Re,erse
Figure 2-4
Typical forward and reverse
characeris tics for a silicon diode
\c_taqe
20
50
;?) -75
ii;
-25
)
2.: 0.2
0.3
0.4
0.5 0.6
0.7
3.512)
-33
-223
(.TA)
100
60 f
IF
60
Reverse
Ore
Figure 2-5
Tvpica I forward and reverse
(-barac termics br a germanium
diode.
v31 Sqe
(2)-SO
--25
20
2.3
'I?
Example 2-1
Calculate the forward and reverse resistances offered by a silicon diode with
the characteristics in Fig. 2.4, at 4 = 100 mA, and at VR = 50 V.
1
Souon
atI=100mA,
V,
J,:+ ' VF
RF=-IF
0.75 V
0.75 V
(a)
Forward resistance
TF
= 7.5 Q
at V, = 50 V,
V,
I,
'6 = 100 n
R6
= V R
(b)
50 V [see Fig. 2-6(b)]
l00nA
= 500 MO
Reverse resistance
Figure 2-6
25
Diode Parameters
The diode parameters of greatest interest are:
V
025 V
Figure 2-7
vF
rd
rtA
(2-2)
2 6
Example 2-2
Determine the d namic resistance at a forward current of 70 mA for the
diode characteris gisen in Fig. 2-4. Also, use Eq. 2-2 to estimate the diode
dynamic resOtance.
Solution
,it I = 70 m,
Eq. 2-1.
(or A4 = 60 mA,
-
0.025 V
A0.
0.025 V
= -
=
(see Fig. 2-7
60 tmA
= (242 0
=
Eq. 2-2,
26 niV 26 mV
=70 mA
4
= 0.37 0
sctise Problems
.1 Calculate the resistances offered by a diode with the characteristic
in Fg. 2.5, when the forward current is 60 mA, and when the reverse
voltage is 30 V.
.2 Determine the dynamic resistance at a 50 mA forward currentfor a
diode with the characteristics in Fig. 2-5. Also, use Eq. 2-2 to
estimate the diode dynamic resistance.
ode Approximations
Ideal Diode Characteristics
As already discussed, a diode is essentially a one-way device,
offering a low resistance when forward biased, and a high
resistance when biased in reverse. An ideal diode (or perfect diode)
would have zero forward resistance and zero forward voltage drop.
It would also have an infinitely high reverse resistance, which
would result in zero reverse current. Figure 2-8(a) shows the
current/voltage characteristics of an ideal diode.
Although an ideal diode does not exist, there are many
applications where diodes can be assumed to be near-Ideal devices.
27
with
IF
Figure 2-S
- 0
= 0.
V5
Vfl
Jr
15
JR
(b) Approximate
characteristics for
a germanium diode
Is
(c) Approximate
characteristics for
a silicon diode
Example 2-3
A silicon diode is used in the circuit shown in Fig. 2-9. Calculate the diode
current.
Solution
F = If
or,
i'7o
If
R1
L -A -
F-V1 15V-0.7V
= ---=
4.7 kO
R 1
IF
iture 7_51
2-5
= 304 mA
ci
s:
4
Example 2-4
C.
i.6
I j.
Fi',,re 2-10
Diode
Solution
C.
p,eceivIr
)nEi
characteretic, or tr,ir,.t-fne
appro.tmatiOfl of ihe diode
fore. arc] characterotu.
2 8
(a)
di
rj
dc Equivalent Circuits
__A,A Av.H I
Complete dc equivalent
Circuit
[igure 2-I1
Dc
(1;)1Ient (frlUJN for a
fu ii (n dude.
IOQ
T
I)
0) Diode circuit
R1
10
E
I
J
yr
Example 2-5
Calculate IFfor the diode circuit in Fig. 2-12(a) assuming that the diode has V
= 0.7 V and r = 0. Then, recalculate the current taking r11 = 0.25 Q.
Solution
Substituting V as the diode equivalent circuit, [Fig 2-12(b)]:
I =
R 1
1.5V-0.7V
100
= 78 mA
R
100
El
T
.5 V
= 80 mA
R,
hiF
100+0.250
VF_T
Chapter 2
Semiconductor Diodes
1 9
ce Problems
Calculate the new level of diode current in the circuit in Fig. 2-9
when D is replaced with two series-connected silicon diodes.
3.1
-3.2
50
40 NQ "
5 V
30 -
1e
Figure 2-13
Draving a dc load line on ti
diode cJjaraderistu
Ri
L Df V
IF
d 1d
100
__
F
dwde
3 0
Example 2-6
Draw the dc load line lot the circuit in Fig. 2-13(a). The diode Forward
characteristic is gi\ en in Fig. 2-1 3b).
Solution
'LJ
or,
Plot poin
if dl,
I = 0, and
\ow subs: :.:e
t', = 0
=0
t,
5V
giving,
= r/
R/ ) + 0
= S
R /
1000
= 50 mA
Plot point 3 on the (f/ode cl rdcterot/c at,
I,
50 mA, and t
= U
Q Point
The relationship between the diode forward voltage and cut-rent in
the circuit in Fig. 2-13(a) is rlelined by the device characteristic.
Consequently, there is only one l)Oiflt on the dc load line where
the diode voltage and cut-rent are compatible with the circuit
conditions. That is point Q, termed the quiescent point or dc bias
point, where the load line intersects the characteristic. This may be
checked by substituting the levels of I and V at point Q into Eq.
2-3. From the Q point on Fig. 2-13(1)), IF = 40 mA and VF = 1 V.
Equation 2-3 states that E = (It- R 1 ) + V. Therefore,
E(4QmAx 1000)+IV=5V
So, with E = 5 V and R 3 = 1000, the only levels of I and VF that
F
can satisfy Eq. 2-3 on the diode characteristics in Fig. 2-13(b) are 'F
= 40 mA and V, , = 1 V.
Note that, although VF = 0 and V. = 5 V were used when drawing
the dc load line in Ex. 2-6, no functioning semiconductor diode
would have such forward voltage drops. These are simply
convenient theoretical levels for const ctFn the dc load line.
31
Example 2-7
Determine the required load resistance for the circuit in Fig. 2-14(a)
using the ties ice characteristics in Fig. 2-1 4(b).
Solution
From tq. 2-3.
= F - i1
Substituting i = a
R1)
= F -o = 5V
= 0, and 'F =
1, = 30 mA
Draa the ness
de load
Figure 2-14
Determination or t '-s sues
re5istari(e tiom the dope cc the cc
load brie.
= - - 37.5 mA
= 1330
Example 2-8
Solution
Plot point Q on the diode characteristic in Fig. 2-15 at,
I,
= 50 mA
= 1.1 V
C
V1
2 - 3
6 C.
F - (I R7)
1.1 r
Figure 2-15
Determination of the supp!s
volt aste for a diode-red ,t' circuit.
3 2
Electronic
and,
+ AV1 = 1.1 V + 5 V
- 6.1 V
E ic
E -.
,Practise Problems
2-4.1 A diode with the characteristics in Fig. 2-15 is connected in series
with a 3 V supply and a 100 C) resistor. Draw the dc load line for
the circuit, and determine the forward current level.
2-4.2
2-5
Tei,zj,'rarjere L'Jft'cis
(2-4)
Device mantilactum-ers
specify a maximum power dissipation for
each t y pe of diode. If the specified level is exceeded, the device will
overheat and it miiav short-circuit or open-circuit.
The mnaxinflimu power that may be dissipated in a diode (or any
other electronic device) is normally specified for an ambient
temperature of 25C, or sometimes for a 25C case temperature.
When the temperature exceeds the specified level, the device
maximum Power dissipation must he derated.
(rri5'
ino
iterating factor
iT
8t
Figure 2-16
60
a!'
P
40
20-i
01__
0
23
3 040
50
-
60
70 80
90
100 1C)
33
(2-5)
Example 2-9
Solution
At 25C:
- P - 700 rnW
-
- 0.7 V
1A
At 65C:
Eq. 2-5,
(r'A
P, = (P 7 at T) - [T x (derating factor)]
= 700 MW - [ ( 63C - 25CI x 5 rnW/Cl
= 500 mW
P2
From Lq.2-4,
500 MW
'
= 714 mA
0.3 0.4
0.5
Figure 2-17
0.6
0.7 (i)
3 4
F2
= ( VFI at T1 )
[.\
T x (i.sVF f C))
(2-6)
Dynamic Resistance
Equation 2-2 for calculating the dynamic resistance of a forward
biased diode is correct only for 25C junction temperatures. For
higher or lower temperatures, the equation must be modified to,
r
26 mV
d = ______
F
273C1
(2-7)
298C
Example 2-10
A silicon diode with a 0.7 V forward voltage drop at 25C is to be operated
Solution
Eq. 2-6,
V,,
at 25 C,
Eq. 2-fl.
r,1 -
at T) + [ A T
= 0.7 V + [(100C - 25C) x (-1.8 mV/'C)]
= 0.565 V
=
Ft
26 mV 1 T +_273C1
298C
- 26 mV [25C 273-C]
26 mA
298C
=10
at 100C,
26 my 1100 :C 273C
26 m
298C
= 1.250
rd
rctise Problems
1 A diode with a constant 0.65 V forward drop has the power-versustemperature graph in Fig. 2-16. Calculate the maximum forward
current that may be passed at 25C and at 80C.
2 Calculate the maximum and minimum levels of VF for a germanium
diode with VF = 0.3 V at 25C when operated over a temperature
35
a) A depletion layer
capacitance occurs at a
reerse-biased diode
hI A diffusion capacitance
is present at a fornardbiased diode
Figure 2-18
The capacitance o' a diode
depends upon the polant. It the
applied 'oltae, aod oii the
eurrent level.
+ -
H
j
Cl
(a) Equivalent circuit
for a reverse-biased
diode
ed
3 6
C1
10 t rr
(2-8)
Example 2-11
Calculate the ohinimtjm fall time
7's917 diode'.
for
Solution
Front
diode dt
tfl,ni) - 10 =
f,rdbs
100 n
10
10 n
t= 10 -= 10x3 ns
-30 ns
Practise Problems
2-6.1
2-6.2
Saturatja-i
'F
Is-
/
b) Effect of
>>I,,
Figure 2-20
If!(' ,iimj,nu,n 11r ,it 'I'. 1(1 fling
im' of ,i diode i, irn,ied hy the
101 er'e
Chapter 2
Semiconductor Diodes
37
Figure 2-21
Portion or data .heet
(or 1\974 through
J% 9 1 7 cJiode.
mechanical data
75
50 mA
225
225
250
_150 rnA_
- L?
2J 250 m
75
75
75
225
250
?22J
the diode is quite likely. For reliability. the maximum ratings should
not even be approached. If a diode is to survive a 50 V reverse bias,
one that has a 75 V peak reverse voltage should he selected. If the
diode peak forward current is to be 100 mA. use a device that can
handle 150 mA. It also is important to note that the maximum
ratings must be adjusted downward for operation at temperatures
greater than 25C. (see Section 2-5).
A list of other electrical characteristics for the device normally
follows the maximum ratings. An understanding of all the
parameters specified on a data sheet will not be achieved until the
data sheets have been consulted frequently. However, some of the
most important parameters are considered below:
3 8
es and
Eleuic
I or 1,-,
iru:ts. 4th C d
Lon-Power
Diodes
The data sheet portion in Fig. 2-21 identifies the 1N914 to 1N917
devices as stL'iwhillq diodes. The average rectified forward current is
listed as 75 ntIs (except for the 1X917). Maximum reverse voltage
ranges from 30 V to 75 V. Thus, these diodes are intended for
relatively low-current, low-voltage applications. in which the y may
be requirc.d to switch rapidly between the on and ofistates.
Rectifier Diodes
Appendices 1-2 and 1-3 shows data sheets for low-power rectifIers.
all
It is seen that the 1N4000 range of rectifiers call
forward current of 1 A. and that the 1N5390 range call 1.5 A.
Both ty pes have niaximumn reverse voltages ranging from 50 V to
1000 V. Unlike the case of the switching diodes specified in
Appendix 1-1, the reverse recover y time is not listed on the rectifier
data sheet. Rectifier diodes are generally intended for lowfrequency applications (60 Hz to perhaps 400 Hz) in which
switching time is not important, (see Sections 3-1 and 3-2).
Example 2-12
Referring to Fig. 2-21 determine the following quantities for a 1N915 diode:
peak reverse voltage, steady-stage Ior\\ard current, peak repetitive forward
current, power dissipation.
Solution
Pl y = V, = 50V
= 75 mA
= 225 mA
P = 250mW
actise Problems
.1 Referring to Appendix 1 -3, determine the following quantities for a
1N5397 diode: peak reverse voltage, steady-stage forward current,
nonrepetitive forward current.
.2 A rectifier has to pass an average current of 600 mA, and survive a
repetitive reverse voltage of 75 V. Select a suitable diode from
Appendices 1-1 and 1-3.
Voltmeter
Digital meter
_ P2
Figure 2-22
0die
dode
4 0
1 +
H:i I
/ t
f-
vertic,t input
temiinats
XI Recorder
.LJ
d
.'
-.
Powet (.
h,i-izontut input
teririnats
Figure 2-24
An ye-recorder can be used for
directly plotting diode character-
Chapter 2
Solution
Front
2-21,
Semiconductor Diodes
41
= 75 rn-\
5 mAcrn
== 15 cm
Select a vertical scale of 1 V/cm for the )Ct' recorder, so that 15 cm represents
15 V, as bell as 75 mA.
R7=75 fll
= 200 0
and,
[i50,,,F
R 7 = 75 mA) 2 x 200 0
= 1.1 \\'
V f might be as large as 0.8 V. so select a horizontal scale of 0.1 V/cm to give,
0.8%,
horizontal scale length (for V,)
= 0.1 V cm
= 8 cm
wtise Problems
Plot the for,vard characteristics for a silicon diode from the following
experimental data:
VF (V) i
Is(mA), fl1.4l1.8T5 !
10
50 ] 90
130 170
Junction Breakdown
When a junction diode is reverse biased, normally only a very small
reverse saturation current flows; I on the reverse characteristic in
Fig. 2-25(a). When the reverse voltage is sufficiently increased, the
Junction breaks down and a large reverse current flows. If the
reverse current is limited by means of a suitable series resistor, [R1
in the circuit in Fig. 2-25(b)], the power dissipation in the junction
can be kept to a level that will not destroy the device. In this case,
the diode may be operated continuously in reverse breakdown. The
reverse current returns to its normal level when the voltage is
reduced below the reverse breakdown level.
Diodes designed for operation in reverse breakdown are found to
have a breakdown voltage that remains extremely stable over a
1),
(b)
Diode-resistor circuit
Figure 2-25
A diode can he operated in
4 2
in
k,tei imiica:es
mnt'C:cCai current
cirect:cri ten the
iiece','e
ternirai fur
d,vee
es
f'r',oc1
terrjna1 fer
zener .reraticr
biasi'
Zer,er qeratiOfl
?n,:ie
Cetofe
Figure 2-26
Zcroer diode circuit symbol and
lost-current zener diode package.
I . --
43
I.
1ZK
vz
(2-9)
The Zener diode current max' ne ally level between I and !. For
greatest voltage stability, the diode is normally operated at the test
current. Man y low-power Zener diodes have a test current specified
as 20 mA, however, some devices have lower test currents.
forward
characteristic
yr
10
reverse
15 IR
characteristic
20
-
- . ---
.0;
--
25
-
-
/r
30
I
- 35
I 40
IZW
Data Sheet
Portions of a data sheet for low-power Zener diodes with voltages
ranging from 3.3 V to 12 V Is shown in Fig. 2-28, (A data sheet for
2.4Vto 110 Zener diodes is presented in Appendix 1-4.) Note in
Fig. 2-28 that the V tolerance is 5% or 10%. This means, for
exam p le, that for a 1N753 with a 10% tolerance the actual V
level is 6.3 V 10%, or 5,67 V to 6.93 V. The Zener voltage remains
Figure 2-27
Is-p L 4chara(leri,tics for a Zener
diode. The most important
parameters are: the Zener voltage
V7. the knee current 17K' the test
current 17-1, and the maximum
current
4 4
Vz 2 (V at T1 ) + 1ATa VJ100)]
3.3VtO12V(5%Or10%)
Figure 2-28
1N74.6
1N747
1N753
1N755
1N757
1N759
3.3
3.6
62
7.5
9.1
12.0
leakage
Zener
impedance current
Test
current
lz (mA)
ZZT (c))
28
.24
7
6
10
30 -
20
20
20
20
20
20
lR (.LA)
10
10
0.1
0.1
0.1
0.1
Reverie
Temperature.
coefficient Oz (%/C)
-0.062
.0.055
+0.022
+0.045
+0.056
+0.060
(2-11)
Example 2-14
Calculate the ma ' ,imum current that may be allowed to flow through a 1N755
Zener diode at device temperatures of 50C and 100C.
Solution
From the data sheet in Fig. 2-28, the IN 755 Zener diode has,
o - 400 mW
'ZM =
= 53.3 mA
At 100C.'
Eq. 2-5,
P2 = (P 1 at
= 400
m - [ ( 10(fC - 50C)x 3.2 mW/C]
= 240 mW
for low-
45
= 240
7.5V
V
= 32
rnW
mA
Example 2-15
The Zener diode Circuit in Fig. 2-29 has E = 20 V. R, = 6200, and a
Zener diode. Calculate the diode current and power dissipation.
1N735
Solution
From the data sheet in Fig. 2-28, the 1N755 Zener diode has, V. = 7.5 V
Ii
R1
= E - V 1 = 20 V - 7.3 V
20\
= 12.5 V
1
/ -1
= 20.16
V Ri 12.5V
mA
-1'
Figure 2-29
Circuit for Empie 2-I
P D = V1 I, = 7.5 V x 20.16 mA
= 151 mW
Equivalent Circuit
The dc equivalent circuit for a Zener diode is siniplv a voltage cell
with a voltage V. as in Fig. 2-30(a). This is the complete equivalent
circuit for the device for all dc calculations. For the ac equivalent
circuit [Fig. 2-30(b)]. the dynamic impedance is included in series
with the voltages cell. The or equivalent circuit is used in
situations where the Zener current is varied by small amounts. It
must he understood that these equivalent circuits apply only when
the Zerier diode is maintained in reverse breakdown. If the device
becomes forward biased, then the equivalent circuit for a forwardbiased diode must be used.
Example 2-16
A Zener diode with V = 4.3 V has Z1 = 22 0 at I, = 20 mA. Calculate the
upper and lower limits of V1 when I, changes by 5 mA.
Solution
AV1 = (A17 X Zz) = (3 mAx 22 0)
= llOmV
Vz, X) = V + n, V1 = 4.3V + 110 mV
= 4.41 V
= 1.19 V
I,
circuit
Zi
4 6
Practise Problems
Calculate the ma\ifllUm current for a 1 \7 33 Zener d i ode at de\ ice
2-9.1
temperatures of 50'C and 100 C.
= 820
2-9.2 A 1N749 Zener diode is connected in series with a resistor R1
=
12
V.
Calculate
the
diode
current
and
0, and a supply voltage E
power dissipation.
_____ J
Capter 2
Chapter-2 Problems
Section 2-2
2-1 Calculate Lhe static fcrward resistance idr the characteristics
in Fig. 2-31 at a 200 mA forward current. Also, determine the
reverse resistance at a 75 V reverse voltage.
2-2 Determine the dynamic resistance at a 150 mA forward
current for a diode with the characteristics Fig. 2-31.
Senuonductor Diodes
47
4 8
ii
Figure 2-31
300 -
H
)V) 100 -70
-50
1
Section 24
2-8 A diode with the characteristics in Fig. 2-13(b) is to pass a
35 mA current from a 5.5 V supply. Draw the de load line
and calculate the required series resistance value. Determine
the new curenr level when the suppl y is reduced to 3.5 V.
2-9 A diode with the forward characteristic in Fig. 2-31 is
connected in series with a 30 LI resistance and a 6 V supply.
Determine the diode current, and find the new current when
the resistance is changed to 20 ti.
2-10 A diode which has the characteristics shown in Fig. 2-32 is
to pass a 20 mA forward current when the supply is 12 V.
Determine the value of resistance that must be connected in
series with the diode.
6(V)
Figure 2-32
'F
33
20
0 .-
0.2
0
.:.:.o
:3
1.0
i.2_.1
-2.4J
Section 2-5
2-12 A diode with a maximum power dissipation of 1000 mW at
25C is to pass an average forward current of 500 in-A. The
forward voltage drop for the device is 0.8 V. and the power
derating factor is 10 mW/C - Calculate the maximum
temperature at which the diode may he safel y operated.
2-13 The diode specified iii Problem 2-12 is to be operated at a
temperature of 75C. Calculate the maximum level of average
forward current that the diode can safely pass
2-14 Draw the power dissipation-versus-temperature graph for
the diode specified in Problem 2-12.
2-15 A diode with a 0.9 V forward drop has a 1.5 W maximum
power dissipation at 25C. If the device derating factor is 7.5
rnW/C, calculate the maximum forward current level at
25C and at 75C. Assume that VF rema ins constant.
2-16 Estimate the forward voltage drop at 75C of the silicon
diode in Problem 2-15. Determine the junction dynamic
resistances at the temperature extremes if IF is 20 mA.
2-17 A 5 V supply is applied via a 1500 resistor to a silicon diode
and a germanium diode which are connected in series.
Determine the diode current at 25C and at 100C.
Section 2-6
2-18 Calculate the minimum fall time for a voltage pulse applied
to a diode with a reverse recovery time of (a) 6 ns, (b) 50 ns.
2-19 A diode has an applied voltage with a 200 ns fall time.
Determine the maximum reverse recovery time for the diode.
2-20 Calculate a suitable minimum fall time for a switching
waveform applied to a diode which has a 12 ns reverse
recovery time.
49
5 0
2-21 Calculate the minimum fall time for a voltage pulse applied
to a l,\'914 diode.
Section 2-7
2-6.1 50 ns
2-6.2 150 ns
2-7.1 600 V, 1.5 A, 50 A
2-7.2 1N5392
2-8.2 Vertical 1 V/cm, Horizontal 0.1 V/cm, 1000
2-9.1 64.5 mA, 38.7 mA
2-9.2 40.4 mW
Diode Application
Chapter 3
3
Diode
Applications
Chapter
R,
3.3 LO
.1
B
D:
CD41 -
Chapter Contents
Introduction
- 1 1-laIf Wave Rectification 52
3-2 Mill-Wave Rectification 54
NI
.1 -
4tc
i C , 1 .,
^J
FA
-........
ectives
will be able to:
1 Sketch half-wave and full-wave
rectifier circuits showing input and
output waveforms, and explain the
operation of each circuit.
2 Draw and explain circuit diagrams
for basic dc power supplies using
rectffiers and capacitor filters.
3 Determine capacitor values and
diode current and voltage levels for
basic dc power supplies.
4 Define line effect, load effect, line
regulation, and load regulation for
dc power supplies. Calculate these
quantities for various power
supplies.
5 5ktch Zen'r diede uuiwiju
regulator circuits, and explain their
operation.
5 2
Introduction
One of the most important application of diodes is rectification:
that is, conversion of a sinusoidal ac waveform into single-polarity
half cycles. The rectified wave is smoothed by the use of capacitors
to process it into direct voltage. A Zener diode may be applied to
regulate the direct voltage.
Other important diode applications include clipping, clamping,
dc voltage multiplication, and logic circuits. Diode clipping circuits
are used for chopirig-QLT an unwanted portion of a waveforni.
Clamping ci rc,:its change the dc voltage level of a waveform
without affecting the wave shape. DC voltage multipliers are
applied to change the level of a dc voltage source to a desired
higher level. Logic circuits produce a high or low output voltage,
depending upon the voltage levels at several input terminals.
31 Half-Wave Rectification
HeIf-Wave Rectifier Circuit
= VPi - VP
(3-1)
(32)
RL
While the diode is reverse biased, the peak voltage of the negative
half-cycle of the Input is applied to its terminals. Thus, the peak
reverse voltage, or peak inverse voltage (PI119, applied to the diode is,
Chapter 3 - Diode Applications
53
(3-4)
VRPIVV
F -
input wasefomi
Figure 3-1
IS
I-
re-.uflOir
D, /s
capacitor
R,+ .J' =
Th
Rr
-Tc'
(c) Use of a reservoir capacitor
Example 3-1
A diode with V = 0.7 V is connected as a hall-wave rectifier. [Iie load
resistance is 500 0, and the (rrns) ac input is 22 V. Determine the peak
output voltage, the peak load current, and the diode peak reverse voltage.
Solution
= 1414 V1 = 1.414x22V= 31.1 V
Eq. 3-1,
= 30.4 V
If,
Lq.3-2,
30.4V
V
=-.-=--------5000
R1
= 60.8 mA
Eq. 3-4,
Ply = V0 , = 31.1 V
Electronic Devices and Circuits, 4th ed.
5 4
te Problems
1.1 A half-wave rectifier circuit has a 15 V ac input and a 3300 load
resistance. Calculate the peak output voltage, peak load current,
and the diode maximum reverse voltage.
1.2 A half-wave rectifier (as in Fig. 3-1) produces a 40 mA peak load
currentthrough a 1.2 kO resistor. If the diode is silicon, calculate the
-
-----.
rms input voltage and the diode Pl y.
3-2
Full-Wave Rectification
Outout watform
1Vo
influl wvefors
Fiure 3-2
F ulIv, :,t' .c-(ti
e-nrur-tpped
forwad biased
rvers biased
- +
outout waveform
Va
TI
>k,
FD,
I IL
TI
C Ct(
(r[C-.'{-[,
outcut waveform
v. ----- - Ypa
IL
j D 1
+ -
reverse biased
.1.
forward biased
Figure 3-3
Operation of a t ''u-d,ode
wave rectifier Circuit -
7-
Figure 3-4
[iJ!I-L3c- hrd
r2;-
55
5 6
sinusoidal voltage.
J_4-
_L
input
ociput
IL '
f V.
0 . +_ D
fl
--
OD;
ih 1)
f)
(C)
IL
RL
d) D
Figure 3-5
)pi-r.i tofl ol ihe hrtd
C Ut WI.
'II
(3-5)
=l.414V=1.414X30V
= 42.42 V
ec
57
=
- 2 t, = 4 2.4 2 V - 2 x 0.7 V)
= 41 V
L(1. 3-5.
V,0
Ecj.3-2,
11
41 \'
R1 3000
= 137 mA
Figure 3-6
VI
D,
D3R>V
use rrooierns
Determine the peak load voltage, peak current, and the power
dissipation in a 470 load resistor connected to a bridge rectifier
circuit that has a 24 Vac input. The rectifier diodes are germanium.
A bridg' rectifier with silicon diodes and a 680 0 load resistor has an
18 V peak output. Calculate the power dissipated in the bad
resistor and the rms innut voltage.
(3-6)
5 8
When the instantaneous level of input (at the diode anode) falls
below V the diode becomes reverse biased, because the capacitor
[see
voltage ( Va) (at the diode cathode) remains close to (V1 - V p).
Fig. 3-7(c)]. With the diode reverse biased, the capacitor begins to
discharge through the load resistor (R, , ) - So, V falls slowl y , as
shown by the capacitor voltae waveform in Fig. 3-7(a).
reservoircutpLt ss3etOrm
capacitor -
inset wavefornt
RLCiTVC
-
direct soltage
with ripple
rectified wave
current
l(DI
V1 = V -
5) C is charged to C 1 -
ci D,C,
Figure 3-7
A reservoir capacitor smoothes
the output from a rectifier Circuit
b y charging up to the peak
output voltage and retaining
mot of its charge between
vokage peaks.
Vr
T
ti
t2
01
02
59
V,
4-
\E4
,cursunt
pulse
Eu(dr)
Figure 34
The capacitance valuIe for a
reservoir capacitor can be
calculated from a knowledge of
the load current, ripple voltage,
and input frequency.
(1
3600
E({
i d1
between
and E0(,,,)
0, = i-' Eo(min)
which gives,
Em
(3-7)
= 90 -
(3-8)
T
360
so,
and,
II
= T-
(3-9)
(3-10)
IL
ti
(3-11)
Vr
Capacitor Selection
cOSC
of a reservoir capacitor.
The standard-value capacitors listed in Appendix 2-2 are
typically available with 20% tolerance. Ill the case 01 capacitors
greater than 10 oF, the tolerance is olten
listed as 10%+50`o.
iF
capacitor
might
have
a capacitance as
L
This nleans that a 100
low as 90 jF. or as high as 150 pF. In most circuit ittiati0n5, a
minimum capacitance value is calculated, and. i hirger value is
quite acceptable.
The voltage that a capacitor will be subjected to must be taken
into consideration- The maxitutini voltage that ttiav be safely
applied to a capacitor is stated in ternis of its dc iiorki; q rltage.
The dc working voltages rail be quite small for large-value
capacitors. For example, some 10 pF capacitors have 6.3 V working
voltages. The capacitor dielectric may break down if the specified
voltage is exceeded.
'I [iIL1i
bar
Oflu:"
Hi---
P.
0 pal
Rfl
a tefl a , : S
sa,nh,I Or a
I a r,
Figure 3-9
Capacitor Polarity
It is very important that polarized capacitors be correctly connected.
Example 3-3
:0 \
Chapter 3 - Diode Applictions
Solution
V = 10% of E 0 ,
=2V
o(mi)
) 10% of 20V
Eo ( a ) =
+ 0.5 '1, = 20 V + (0.5 x 2 V)
= 21 V
Eq. 3-7,
01 = sin-' E0(,)
E0(,, , )
2T _v
65
Eq. 3-8,
T 60 Hz
= 16.7 ms
Eq. 3-9,
02 T
25x16.7ms
360
360
= 1.16 ms
Eq. 3-10,
tj = T
= 15.54 ms
I ='=500Q
R
= 40 mA
Eq. 3-11,
I t
V
40mAx15.54ms
2V
Approximate calculations
The capacitance calculation in Example 3-3 assumes that the load
current is a constant quantity. This is an approximation, because
the In: d current changes by a small amount as the output voltage
increases and decreases. Normally, the load current change is so
small that It has no significant effect on the calculation.
Another approximation that can be made to simplify the
capacitance calculation Is to take the discharge time (s i ) as equal
to the Input waveform time period (T), [see Fig. 3-8(a)].
T
(3-12)
Equation 3-12 assumes that the capacitor charging time (t2) is so
much smaller than t, that It can be neglected.Thlsls a reasonable
assumption where the ripple voltage Is small. Also, use of Eq. 3-12
61
6 2
Example 3-4
Assuming that t, << t. recalculate the required reservoir capacitor value for
the circuit in Example 3-3
Solution
= iO%oft;, =
10%ot20V
=2V
I = -- =
60 Hz
= 16.7 ms
Eq. 3-12,
16.7 ms
20V
ii
= 40 mA
I. r.
Eq. 3-11,
40 mAx 16.7 ms
2V
= 334pF
Diode Specification
Rectifier diodes must be specified in terms of the currents and
voltages that they are subjected to. The calculated levels are
normally minimum quantities, and the selected diodes must be
able to survive higher levels,
Consider Fig. 3-10 which illustrates he situation when the ac
input wave Is at its negative peak voltage (-V.l. The capacitor has
already been charged up to approximately the positive peak level of
the input (+V). Consequently, the diode has -V at its anode and
at its cathode, so the diode peak reverse voltage is,
(3-13)
J'P
The average forward rectified current (I )) that the diode must
pass is equal to the dc output current.
2
'F(v) = IL
(3-14)
2V1,
-
3-10
Diode reverse volt aoe in a halfwave rectifier.
Chapter 3 - Diode Applications
6.
must equal the average load current (Ii ). so J, averaged over time
period Tequals J, (see Fig. 3-11).
(t1+t2)
-
giving,
11 ( t1 + t2)
(3-15)
t2
output
ioirage
Figure 3-I1
Diode average (load) current (
and repetitive surge current
in a half-wave rectifier.
Current
pulse
ti-------.j, -
surge limiting
resistor
, R5 D,
=2
S
(3-16)
'FSM
Example 3-5
Specify the diode for the half-wave rectifier circuit in Example 3-3. Select a
suitable device from Appendix 1, and calculate a suitable surge limiting
resistance.
Solution
VP =
= 21.7 V
+ V = 21 V + 0.7V
Figure 3-12
Surge limiting resistor in a ha
wave rectifier.
6
Eq. 3-13,
yR - 2 VP = 2 x 21.7 V
= 43.4 V
Eq. 3-14,
Eq. 3-15,
= = 40 mA
1L ( ti1t 2)
'ER'.I =
_40mAx16.7jnis
1.16 ins
= 576 mA
50 V, and 1,,. =
= 1 A, and 'ERM =
R=-1--=
'
11,M
21.7V
30A
0.7 Q
ractise Problems
direct voltage
with ripple
owmvefo
1\J43RSRLC}VC
+
current
pulse
rectified
wave
vc
Figure 3-13
Bridge rectifier circuit with a
reservior capacitor and a surge
limiting resistor
65
Eo(mtn)
01 =
Ec,imj
Eq.3-8.
Eq. 3-9,
1z
t2,
360'
Comparing Fig. 3-14 and Fig. 3-8, it is seen that the capacitor
discharge time (t 3 ) for the half-wave Circuit is approximately equal
to the waveform time period (T), whereas for the full-wave circuit t1
approximately equals T12. More precisely,
1 =(T/2)-5
(3-17)
direct voltage
with ripple
yr
Figure 3-14
Ripple voltage waveform angles
and time periods for a full-wav
rectifier with capacito
smoothing.
Using the correct value of t,, Eq. 3-11 can be used for calculating
the reservior capacitance for a full-wave rectifier circuit.
Eq. 3-11,
Vr
(t1
+ t2)
ui-rent for no more than a half cycle of the input wave. The other
)air conducts during the other half cycle. So. as illustrated in Fig.
3- 15, the diode average forward current is half of the load current.
Ir.
IIIAPUI
'0! age
Figure 3-15
The diode average forward
current in a bridge rectifier circuit
is equal to half the load current.
IERAt
rrka
IL
iF
C U Cfl C
W.
+
+1
D
+
,)r,(348)
3xamination of the circuit shows that Eq. 3-18 applies to each
diode when reverse biased.
As In the case of the half-wave circuit, the capacitor calculation
:an be simplified by assuming that time t 2 Is very much smaller
than t 1 . This gives the approximation that the capacitor discharge
time is equal to half the input waveform time period.
11
(3-19)
Example 3-6
The full-wave rectifier dc power supply in Fig. 3-17 is to supply 20V to a 500
O load. The peak-to-peak ripple voltage is not to exceed 10% of the average
utput voltage, and the ac input frequency is 60 Hz. Calculate the required
eservoir capacitor value. (Note that the specifications for this example are
;imilar to those for the half-wave circuit in Example 3-3.)
Solution
V,= 10% of E= 10% of 20V
=2V
1_
D2
rev erie
voltage
Figure 3-16
Diode reverse voltage ('CR) in a
bridge rectifier Circuit.
67
- 0.5 V - 20 V - (0,5 x 2
= 19V
o(-ax)
= o(aoe) + 0.5 V, = 20 V
= 21 V
E
(0.5 x 2 '
19V
=sin1__.2_=sin1____
Eq. 3-7,
21 V
65
inpL
Eq. 3-8,
02
=
- Ui =
= 25
900
Ioo
1
1
= --- =
1
60 Hz
Figure 3-17
Circuit for Example 3-6.
= 16.7 ms
Eq. 3-9,
02 1
t,
360
= 1.16 ms
Eq. 3-17,
360
5000
= 40 mA
IL t 1
Eq. 3-11,
C =
40rrAx7.19ms
=
2V
Solution
V,. = 10%
=2V
1
Of
= 10% of 20V
Ec
60 Hz
= 16.7 ms
16.7 ms
I
Eq. 3-19,
tj
2
= 8.35 ms
20V
IL ^
R
= 40 mA
5000
V.
20 V
65
6 8
Eq. 3-11,
2V
= 167pF
Example 3-8
Specify the diode for the bridge rectifier circuit in Example 3-6. Select a
suitable device and calculate the surge limiting resistance.
Solution
+ (2 \/i = 21 V 1 12 x
VP =
0.7 VI
= 22.4 V
Eq. 3-18,
V., = 22.4V
VR
Eq. 3-14,
= = 40
Eq. 3-15,
mA
+ t.)
40 mAx 8.35 ms
t 2
= 288
I.l6ins
mA
1FOuge) = 30 A
V
PS= _.E_ = 24V
Irs\
= 0.75 0
'raclise Problems
-4.1 A or power supply consisting of a bridge rectifier and a reservoir
capacitor has to supply 15 V to a 150 C) load. Determine the
capacitance required if the maximum ripple voltage is to be 5% of
the average output, and the input frequency is 60 Hz.
-4.2 For Problem 3-4.1, recalculate the capacitance approximately by
assuming that the capacitor discharge time is very muchIarger than
the charging time.
-4.3 For the circuit in Problem 3-4.1, specify the diode, select suitable
device from the available data sheets, and determine the required
surge limiting resistance.
69
output voltage from a power supply. (see Fig. 3-18). This output
voltage change (E,) due to a change in the input is termed the
source effect. If the output varies by 100 mV when the source
voltage changes by 10% . the source effect is 100 mV. An
alternative way of stating this output change is to express E0 as a
percentage of the dc output voltage [Er). In this case, the term line
regulation is used.
(3-20)
(3-21)
E0
Load Effect
Power supply output voltage is also affected by changes in load
current (fe ). The output voltage decreases when 'L is increased, and
rises when 'L is reduced. The load effect defines how the output
voltage changes when the load current is increased from zero to its
specified maximum level If the load current change (Al,)
produces a voltage change (E) of 100 mV, the load effect is 100
mV. As for the source effect, the load effect can also be expressed
as a percentage of the output voltage. This is termed the load
regulation.
(3-22)
ac input
( EoforI m) x 100%
(3-23)
E0
waveform
dc output
VS
voltage
E,
Supply
Example 3-9
The output voltage of a dc power supply changes from 20 V to 19.7 V when
the load is increased from zero to maximum. The voltage also increases to
20.2 V when the ac supply increases by 10%. Calculate the load and source
effects, and the load and line regulations.
Solution
Lq. 3-22,
= 300 mV
= (A E. for MLfrfl
E.
)) X
Figure 3-18
Power suppl1v source effect is the
output vo tae
,.,%e change that
occurs when e input voltage
changes by 10%.
7 0
Eq. 3-20,
Eq. 3-21,
line regulation
= 200 mV
= (At. for 10% change in V5) x 100%
200 YiiV x 1 00
20V
ractise Problems
5.1 A dc power supply output drops from 15 V to 14.95 V when the ac
source voltage falls by 10%. The output also falls from 15 V to 14.9 V
when the load current is increased from zero to maximum. Calculate
the source elect, load effect, line regulation, and load regulation.
(3-24)
The Zener current may be just greater than the diode knee current
(<) However, for the most stable reference voliage. I should be
selected as 'Zr (the specified test current). Example 3-10
demonstrates the circuit design procedure.
Example 3-10
HR,
= Va
Figure 3-19
71
P0
for
When
R1
E
R,
E5
' LD, +
20 m
= (20 mA) 2 x 1 kO
=
0.4W
E.,-V1
= 27V,
1
= 9.1 V
Figure 3-20
Circuit dengr.ed ir Ev 3-10.
1
= 17.9 mA
Loaded Regulator
(3-25)
R1
+ I.
Example 3-11
Solution
1N753 has V
= 6.2 V,
E5
/7
+b
R,'
RL
Figure 3-21
Zener diode ve'!e regulator
circuit .supplying a. Toad current.
The diode must he able to pass a
Current of +
7 2
7(fl)
= 64.5
= 'z,, = 64.5 mA
E RI
EV/16V-6.2V
mA
64.5
= 152
1'
select
1,,
mA
= 11u -
= 64.5
mA- 5 mA
1500
5Q5 u,A
Figure 3-22
Circuit designed in f\. .3-11.
= 59.5 mA
Regulator Peforniance
( 7),
AF x Z
AV,, = -
+Z
T
R,
(3-26)
A
ZI
(a) Reaulamor without a load
Esx (ZzIIRL)
AV = -
Rj+(Z[[R1)
(3-27)
(Vrol
(3-2S)
AE 1
JR,
Chapter 3
13
Diode Applications
(3-29)
Vri Rl+(ZZHRL)
(3-30)
(3-31)
LV0 AIL(Zzl R 1 )
Example 3-12
Calculate the line regulation, load regulation, and ripple rejection ratio for the
'oftage regulator in Example 3-11.
Solution
of E,= 10%of16V
= 1.6V
AF, = 10%
6.2V
59.5 rn\
= 1 04 0
1.6Vx (70111040)
1500 + (7011104 0)
AE5 x (Z/ II RL )
Eq. 3-27
R + (ZZ II RL )
= 67 mV
Eq. 3-21
Line regulation =
x 100%
67 mVx 100%
6.2 V
= 1.08%
Load effect,
Eq. 3-31,
= 398 mV
(AE, for NL(ma,,j )
E 0
= 6.4%
IL
r
'<7-
vj P
Z
When the load current changes by A IL., the output voltage change
is,
V 0
R==
It
V0
R. = R, lIZ,,
p
Figure 3-24
7 4
Ripple rejection,
7 IR
7 L
Eq. 3-30,
= R1 + zzI RL)
(
7 QiO4 0
1500 + (7 Q104 0)
= 4.19x 102
-P ractise Problems
1-6.1 Design a 12V dc reference source (consisting of a Zoner diode and
series-connected resistor) to operate from a 25 V supply. Determine
the effect on the diode current when the supply drops to 22 V.
1-6.2 An 8 V dc reference source is to be designed to produce the
maximum possible output currentfrom a low-powerZenerdiode. The
supply voltage is 20 V. Design the circuit and determine the
maximum load current.
3
Calculate the line effect,load effect, and ripple rejection for the
circuit designed in Problem 3-6.2.
E-V1.
( 3-32)
V. 4R R1
(3-33)
Chapter 3 - Diode Applications
input
/S
p0
(a) Negative
series
clipper
PUlp_i
R,
_______-
p__
Input
Figure 3-25
-vF+
14
(h) Iilsi1i'e
series
clipper
D1
R,
(E
i)
V0
select
input
8.3V
V
R=-=---imA
:D, -
Figure 3-26
Series
1 clipper Circuit or Example
3- 3.
7 6
dead zone
se Pi-olileins
A positive series clipping circuit, as in Fig. 3-2(b), has a 7 V input,
and zero load current. Calculate a suitable resistance for R 1 , and
specify the diode.
.2
When the input is negative, the diode is reverse biased and only a
small voltage drop occurs across R 1 , due to load current 'L This
means that the circuit output voltage ( Vr) is approximately equal
to the ncgativ iflUt peak (-EJ. When the input is +E, D3 is
foivard biased. and 0be output voltage equals the diode voltage
Figure 3-27
Series noise clipping circuit. Noise
amplitudes lower than VF
cannot pass to the output.
Chapter 3 - Diode Applicati, os
77
drop ( +VF ) . Thus, the positive half of the waveform is clipped off. As
illustrated, the upper and lower levels of the output of a positive
shunt clipper are approximately +Vand -E.
IL
ifiput
output
_
Figure 3-28
1I(E.l, R,)
diode.
output
-,.
Input
(E - I R,
I
tb) \catr' C
shunt
clipper
^.ff-
VF
-E-
V. = E - ('L R1)
Solution
R=
or,
Di
R,
input
+5V
it
c.___A*AA,
5V-4.5V
F-V0
=
2mA
D,
RL
ii
output
V - IL R,)
p__
S SI
Figure 3-29
7 8
5V-0.7V
2200
= 11.5 mA
Output
noise
DIT
Figure 3-30
Shunt not. e clipper in oil. In1 Jut
arnp!itude greater thin are
il iped oft.
DflL
1.-fr'
( 3-35)
E- V
'F
(t-OO)
Chapter 3
Diode Applications
79
,Vol
+: V
1.),
input
Figure 3-31
Biased shunt clipper cfrcuit
Inputs amplitudes greater
(V + Vr) are clipped off.
L,
VF
Example 3-I5
The biased shunt clipper in Fig. 3-31 has a 9 V input, and its output is to
limited to --2.7V. Determine a suitable resistance for R, if the clipper output
current is to be 1 mA.
Solution
Eq. 3-35,
giving,
+ V)
=
V9
= - V) = (2.7 V -0.7 V)
= 2V
9V- 2.7V
1 mA + 1 mA
= 3.15 kO (use 2.7 kG to gie I > 1 mA)
R1 =
E - V0
L --
(3-37)
= E- V
(3-38)
8 0
R,
'"pill
IL
Figure 3-32
lener
Example 3-16
A Zeer code OlUnt clipper, as in Fig. 3-32, is to be connected betv.cen a
20 V qwi"e v a e signal and a circuit which cannot accept inputs greater
than - 5 \ . Select suitable Zener diodes, and determine R 7 . The clipper
odtput CLI rren t i to be 1 m .
Solution
Eq .
5 V - O. \
= 4.3 V
Trom Aj,^^-';-,J%
I -
Se/ec,
Eq. 3- 38
MA
20V-5V
R1
lmA-5niA
= 1,86 kO (use 1.3 kC) to gie J > 5 mA)
ctise Problems
1 A positive shunt clipper, as in Fig. 3-28'a), has a 7 V input. The
negative output voltage is to be 6.5 V when the load current is 1.5
mA. Calculate the required resistance for R 7 , and specify the diode
forward current and reverse voltage.
2 A 8 V square wave is applied to a device that cannot accept
inputs greater than 3.5 V. The device input current is 600 PA.
Design a suitable biased shunt clipping circuit.
3 A Zener diode shunt clipping circuit is to be used to clip a 18 V
square wave off at approximately 7 V. The output current is to be
1.2 mA. Design the circuit.
39 Clamping Circuits
Negative and Positive Voltage Clamping Circuits
A clamping circuit, also known as a dc rcswrer, changes the dc
voltage level of a wavcfonn, but (IOCS not affect its shape. Consider
the clamping circuit shown in Fig. 3 - 33, When the square wave
V0 = V.
right
During the positive half-cycle of the input, the voltage oil
left
side
is
+l.
Thus,
while
that
oil
side of the capacitor is +V,
C 1 is charged with the polarity shown to a voltage.
(3-40)
Vc(E - VF)
+ _ H
(F- F1)
Output
input
When the input goes negative, the diode is reverse biased and
has no further effect on the capacitor voltage. Also. R 1 has a very
high resistance, so that it cannot discharge C 3 significantly during
the negative portion of the input waveform. While the input is
negative, the output voltage is the sum of the input and capacitor
voltages. Since the polarity of the capacitor voltage is the same as
the (negative) input, the output is.
V0 = - ( E + "C)
= - I E + (E - V)l
or
V0 = -L2 E - VI
(3-41)
V0(pp) = '/
or.
V)2E
(- ( 2E- V)l
(342)
Figure 3-33
A negative voltage clamping
circuit passes the complete input
waveform to the output, but
clamps the positt\e peak of the
Out U( close to ground level.
8 2
Iclput
-r
Figure 3-34
Jr1
Aputiveiol'.u,c .:,I
the n "pit
i at etoen to Utt' isitpiit. hij!
( Iomp the negati\ e peoA of the
output cke to ground let ci.
1.1
-I
1+
Out
Slope
termed a bleeder
Resist'H R 1 in F its .t-3 and -34 is
Its func lion is i.e gIduO' (.(i1re the capacitor over
several cy cles of input wavefuim. so that it can be charged to a
new vuhate level if the input changes. However, R 1 partially
dtscherges the .oparitor duhng the lime that D 1 is reverse biased,
and this produce- ' a slope, or tilt L' Yr ) on the output waveform, as
illustrated iii. Fig. 335. The tilt voliage can be calculated from a
knowledge of the civelorni Ii equeiicv and the circuit component
values. The eonstoct-rurrent equation for charging or dtscharging
ropacil o - may he i died,
,flLut IOICS
ieSL(O'.
J. \
IT',
It1
= -'-----
(3-43)
Cl
Fiiure 3-33
['.t rL.'pUt i013e cl-'m a
IJlfl,OIn circuit hi.' a Pi1pe (A
r.it'se huc .1
=-2E 2x10V
20\'
20\'
I
-
50k0
R1
--
Input
3 67 LEA
1T1 =
2
21
2x1 kHz
OUtflT.it
TkQ
516
5OOis
- I xt
Lq. .. 17,
367pAx500ps
1
P
1 8-1 rn\/
Figure 3-36
Clamping circuit for
Ex.
3-17.
83
SgrssI
Source
resistance
or.
(3-44)
C1 R = PW
This gives.
vS -fl
Figure 3-3W
Capacitor C
vu
-a - 2 'a >nal
oJae re>c'lSflce
lc=7
2E
Ic = -
or.
(3-45)
N1
3-18
The negati.e \Oie CIaiupirlg( ircuit iii Fig. 3-38. has a 8V, 300 Hz square
wave input o tb a 600 Q . signal source resistance. The output waveform is to
hae a nmv w^- 1 1 5iOO r I . DO, M11110 suitable values for R, and C1.
Solu tion
.1
2x500Hz
2t
= 1 ms
PlV = t =
1 ills
1 ms
PW
From Eq. 3-44,
C7 = -- =
R5
6000
=2E=2xBV
= 16V
AV
1% of V0(p.
6. i 6 V
A Vc
From Eq. -
'c
C 3
=
= 288pA
_______
VS
=sv(.
JU
f uV
0.16Vx1.8pF
=
1 ms
Figure -38
Clamping circuit for Es. 3-18.
8 4
2E
R1
I,
288pA
The
pLO
C.
OutpUt
+
+E
>2E
Figure 3-39
.- biased clamping circuit clarnp
one peak of the output voltaije at
a se!ened level.
Chapter 3
Diode Applications
85
Solution
For Fig. 3-40(a),
D1 is forward biased when the input goes negative.
Whentheinputis -E, V = V 1 - VF - E = 3V-0.7V-(-6V)
= 8.3V(+ on the right)
VO =VBl -VF =3V-0.7V
= 2.3 V(low level of output)
When the input is +E, V0
= F + V = 6V+ 83V
= 143 V (high level of output)
V0
= -6V-2.3V
= -8.3 V (low level of output)
F + V
input
-- -
output
o-3 j+EDi
VBI
L
+3'!
IL R1
2E
-- -Va,-VF=+2.3V
+
0-
input
- -
14.3 V
C,
Figure 3-40
Biased- clamping. circuits use
positive or negative bias voltages
to clamp the 'level of one of the
peaks of the output waveform.
output
+37 V
-FT3
(b) Output voltage cannot go above VBI - VF
8 6
Electronic
IS.
+ 'it.
V C = E - (V 7 + Vol
When the input goes to its negative peak. the Output voltage is.
= - (E+
+ (E - (V 7 +
=
V1.)
= (2E-
The peak-to-peak Oulptlt renlaills equal to the peak-to-peak input
voltage (2E). If the poliritv of the diodes (and the ('apacitor) are
C,
o7put
VP
+E;
D,
I
p ractise
v,
Problems
Figure 3-41
Zener diode clamping circuits
clampthe output voltage at (V1 +
VE). The positive peak or the
negativepeak can be clamped
above or below ground
87
dc output
I1
D2
ci
[1
-[ D,
V, = 2E
C2
1___
-E-
Figure 3-42
F2
V0=2(E-V)
so,
(3-46)
It is seen that, when the diode voltage drop is much smaller than
the input voltage, the output is approximately double the peakinput amplitude. The polarity of the output voltage can be reversed
by reversing the polarity of the diodes and capacitors.
F - VfJ
V(7
"F.'
_f
Figure 3-43
_ D,
+ D
8 8
ILt
rTrIrT[ }
(b) Square wave input
Figure 3 - 44
A ripple waveform occurs at the
output of a voltage doubler.
2C 2 (3-48)
C1
2/L
+
^DR
ripple
(3-47)
C2
L_.
Figure 3 - 45
Capacitor C 2 supplies 1L while
diode D 2 is reverse biased, and C
supplies
biased . 21 when 0, is forward
RL
(b) C1 supplies IC + IL
(a) C2 supplies Ij
Example 3-20
Determine C, and C 2 for the voltage doubling circuit in Fig. 3-46 to produce
1% maximum output ripple. The input is a 12 V, 5 kHz square wave.
Solution
Eq. 3-46,
12 V, 5kHz
V0
fi
22.6V
47kQ
= 481 pA
7=
=
,I
)H1
+E
2f - 2 x 5 kHz
100 /is
For 1% output ripple, allow 0.5% due to discharge of C2 and 0.5% due to
discharge of C1.
Vc = 0.5% Of V0(pp) = 0.5% of 22.6 V
= 113 mV
D,
13,
C,
_947k0
Figure 3-46
Chapter 3
C, =
Eq. 3-47,
11 t
Diode Applications
89
481pAx100ps
113 rnV
Eq. 348,
2 C, = 2 x 0.47pF
= 0.94 pF (use 1 pH
voltage doubler
3E
input
-'E 4
WA
Figure . 3-47
Four stage dc voltage multiplying
circuit. Neglecting the dice
voltage drops, C 1 is charged to F
volts, and all other capacitor. .c-e
charged to approximate/v 2E. Te
Final output is 4E vu/Is.
2E
-E+
2E+
XD2
C3
D4
C^ X,C, X
2E
2E
Figure 3 - 48
Another way of drawing'
circuit of a four .stage dc voltage
multiplier circuit.
9 0
ractise Problems
10.1 For the circuit designed in Example 3-20, determine the effect on
the output ripple; (a) when RL is changed to 27 kO, (b) when the
input square wave frequency is increased to 7 kHz.
+5 V
R,
4
D,
+
B_
L
ta
f)
C I)
fcc
Figure 3-49
Circuit of a three-input diode
Example 3-21
For the AND gate circuit in Fig. 3-49, determine each diode forward current
level, (a) when all three inputs are low, (b) when only nputA is high, (c) when
inputs A and B are both high, and C is /ow.
lion
Solution
5V-0.7V
3.3 kO
V- - V
R1
(a)
'Rl
= 1.3 mA
For each diode,
- I,
1.3mA
= 433 pA
= 1.3 mA (as above)
Chapter 3
'RI
JI = 'H = -
2
= 650pA
(c)
43
Diode Applications
91
1.3 mA
2
'RI = 1.3 mA
OR Gate
ractise Problems
11.1 The diodes in the AND gate in Fig. 3-4 1 are each to have a 2 m.A
maximum forward current. Calculate the required resistance for R1.
11.2 Calculate the maximum and minimum levels of diode forward Current
for the OR gate in Fig. 3-50 when V = 4.3 \', and R7 2.7 M.
9 2
Section 3-3
3-4 Draw the circuit diagram for a dc power supply that uses a
half-wave rectifier and a capacitor filter circuit. Sketch the
output waveform, and explain the circuit operation.
3-5 For a rectifier circuit with capacitor filtering, explain: ripple
voltage, repetitive surge current, non-repetitive surge
current, diode peak reverse voltage.
Section 3-4
3-6 Draw the circuit diagram for a dc power supply that uses a
bridge rectifier and a capacitor filter circuit. Sketch the
output waveform, and explain the circuit operation.
3-7 Compare half-wave and full-wave rectifier circuits with
capacitor filtering, referring to capacitor size for a given ripple
amplitude, and regarding diode specification.
Section 3-5
3-8 Define power supply source effect and load effect, and write
equations for each. Also, write equations for line regulation
and load regulation.
Section 3-6
Section 3-7
3-11 Draw circuit diagrams for negative and positive series
clipping circuits. Show input and output waveforms and
explain the operation of each circuit.
3-12 Sketch the circuit of a diode series noise clipper circuit, and
explain its application.
Section 3-8
3-13 Draw circuit diagrams for negative and positive shunt
clipping circuits. Show Input and output waveforms, and
explain the operation of each circuit.
3-14 Sketch a shunt noise clipping circuit, and explain its
application.
3-15 Draw a biased shunt clipping circuit. Sketch Input and
output waveforms, and explain the circuit operation.
3-16 A biased shunt clipper has 9 V bias voltages. Sketch the
output waveform produced by a 12 V square wave Input.
3-17 Draw a diagram for a Zener diode siiut clipping circuit, and
explain Its application.
Chapter 3
Section 3-9
3-18 Explain the difference between clipping circuits and
clamping circuits. A positive voltage clamping circuit and a
positive voltage clipping circuit each have a 12 V square
wave input. Sketch the output waveform from each circuit.
3-19 Draw circuit diagrams for negative and positive voltage
clamping circuits. Show input and output waveforms, and
explain the operation of each circuit.
Section 3-10
3-20 Draw a voltage doubling circuit. Sketch input and output
waveforms, and explain the circuit operation.
3-21 Draw the circuit diagram for a four-stage voltage multiplier
circuit. Briefly explain its operation, and identif y the output
terminals and the output voltage level relative to the input.
Show how two additional diode-capacitor circuits may be
added, and estimate the new output-to-input voltage ratio.
Section 3-11
3-22 Sketch the circuit diagram for a diode AND gate with five
input terminals. Briefly explain the circuit operation.
3-23 Sketch the circuit diagram for a diode OR gate with five
input terminals. Briefly explain the circuit operation.
Chapter-3 Problems
Section 3-1
Section 3-2
3-4 A 470 0 load resistor is connected at the output of a bridge
rectifier circuit that has a 15 V (mis) input. Calculate the
peak output voltage, peak load current, and load power
dissipation, if the rectifiers have 0.3 V forward voltage drop.
3-5 A bridge rectifier circuit has a 25 V (mis) sinusoidal ac input
and a 600 0 load resistance. Calculate the peak output
voltage, peak load current, diode power dissipation, and
diode peak reverse voltage. Assume V 0.7 V.
Diode Applications
93
9 4
Section 3-3
Section 3-4
3-13 A dc power supply consisting of a bridge rectifier circuit and
a reservoir capacitor is to supply 24 V with a 200 mA
maximum load current. The output ripple is not to exceed
500 m\', and the cc input frequency is 60 Hz. Determine a
suitable capacitance for the reservoir capacitor.
3-14 Recalculate the capacitance for the circuit in Problem 3-13,
usingthe approximation that the capacitor discharge time is
much greater than the charge time.
3-15 Specify the diodes required for the rectifier circuit in Problem
3-13. Select a suitable device from Appendix 1, and calculate
the required surge limiting resistance.
3-16 Calculate the reservoir capacitance for a dc power supply
which produces an 18 V output with a 300 mA maximum
load current. A bridge rectifier circuit is used and the ac
Input frequency is 60 Hz. The peak-to-peak output ripple
voltage is to be a maximum of 10% of V0.
3-17 Specify the diodes required for the power supply In Problem
3-16. Select a suitable device from Appendix 1, and calculate
3-25 Determine the source effect, load effect, and ripple rejection
for the circuit designed in Problem 3-24.
3-26 Recalculate the maximum output current for the circuit
designed in Problem 3-24 when the ambient temperature is
raised to 100C. The diode derating factor Is 3.2 mW/C for
temperatures above 50C.
3-27 A 1N751 Zener diode is connected In series with a 330 11
resistor to a 25 V supply. Determine the maximum and
minimum level of the Zener diode voltage, and calculate the
minimum resistance that may be connected in parallel with
the diode.
3-28 Calculate the source effect, load effect, and ripple rejection
for the circuit In Problem 3-27.
Section 3-7
3-29 A diode-resistor negative series clipping circuit [as in Fig. 325(a)] has a 12 V Input, and zero load current. Determine a
suitable resistor value and specify the diode.
3-30 A device is to be protected from the negative half-cycle of a 8
95
9 6
input
3-31 Specify the diodes br ilie series noise clipper circuit in Fi g . 327. if R, = 270 ft and the input peaks are 7 V.
(a)
output
Section 3-8
3-32 A positive shunt clipping circuit [as in Fig. 3-28(a)I with a
10 V input is to produce a -9 V output when the load Input
current is 500 uA. Determine a suitable resistor value and
specify the diode.
3-33 A device is to be protected from the negative half-cycle of it
V sqitat'e wave input. The device current is 750 pA when its
input is +4 V Select a suitable shunt clipping cirCuit, input
determine an appropriate resist or. and specif y the diode.
output
(b) -o
Outpul
3-34 Specify the diodes for the shunt noise clipper circuit iii Fig.
3-30. if R 1 = 470 (1. and the input peaks are 1 5 V.
3-35 A 12 V square '. .ive is applied to a circuit that c.uiitiot
accept inputs in excess of 4 V. The circuit input cut-rent is
100 pA. Design a suitable biased shunt clipping circuit.
(c)
input
___V
output
(d)
input
-3 V
0tel
output
Section 3-9
Figure 3-51
3-41 A positive voltage clamping circuit (as in Fig. 3-34) h5s C 1 = 2 Circuits
for Problem 3-40.
pF and R 3 = 27 kO. Deternune the tilt on the output when a
5 V. 700 Hz square wave input is applied.
Chapter 3
input
Section 3-11
3-51 A three-input diode AND gate, as in Fig. 3-49. is to have a
minimum diode current of 1 n]A. lithe circuit supply voltage
is 9 V, determine a suitable resistance for R1.
3-52 A five-input diode OR gate used diodes which require a 500
tiA minimum forward current. Determine a suitable
resistance value if the input voltages are +5 V.
output
p
(a)
input
Section 3-10
97
Diode Applications
4 V
output
(b)
-)I
inputut
E-3
c1
outpi.
input
-3V
p
(dl
Figure 352
Circuit5 for Problem 3-46.
Ow
l
3-6.2
3-6.3
3-7.1
3-7.2
3-8.1
3-8.2
3-8.3
3-9.1
3-9.2
3-9.3
3-10.1
3-10.2
3-11.1
3-11.2
99
Chapter 4
Bipolar Junction
Transistors
(in
Chapter Contents
Introduction
4-1 Transistor Operation 100
4-2 Transistor Voltages and Currents 104
4-3 Amplificatio n 107
4-4 Common-Base Characteristics 109
4-5 Common-Emitter Characteristics 112
4-6 Common-collector Characteristics 115
4-7 TrarisistorTesting 116
Review Questions 118
Problems 119
Practise Problem Answers 122
II
IC
OU
12
16
20
24 (V)
1 0 0
Introduction
A bipolarjunction transLstor (Rfl') has three layers of semiconductor
material. These are arranged either in npn (n-typep-typen-type)
sequence, or in pop sequence, and each of the three la y ers has a
terminal. A small current at the central region terminal controls
the much larger total current flow through the device. This means
that the transistor can be used for current amplification. As will be
explained, it can also perform voltage amplification.
Because the transistor has iwo pn-junctions, its operation can
he understood b y apply ing piijunctiofl theory. The currents that
how in a transistor are sintilar to those that flow across a single
pn-junctiOil, and the transistor equivalent circuit is essentially two
prt-junction equivalunt circuits. There are three sets of currentvoltage characteristics for- ilclitimg the performance of a transistor.
C
n-type
COIIO,
Emitter
E
(a) npn transistor
C
p-type
Collector
B0
4-1
Transi.s or Operation
n-type
Bose
-if:I -
Enrnse
p-type
Emitter
E
(b) pnp transistor
Figure 4-i
Block representation of rpn and
pnp transistors.
'-(S Pc
Collector
B
p-type/4
conent,onaI
current dtrectcn
Base
n-type
Emitter
Collector
B
n-type,
connentional
cut-rent d,recnro,t
Bose
p-type -
Emitter
Chapter 4
101
transistor
Figure 4-3
hgh-poaer
low-pounc osmium,
b,-,'er
Bruce
TT
nyp ,tn .
Collator
iype
.J
010
C -
r.
S Or
Figure 4-4
vo ages.
tf
-"F
.i5,iS
.1
rid
E ,,rin , r
rpe
Ron.
C '
On hi,
h,o,rri he Franc
r.rnp
j'.rnpe
(,
ra
hrslhiaCc
reduced
eve 0 5,----
depletion
regi onnarnonsed
RE
e orion
dl'
region idened
BE I snot, sgc
source
Figure 4-5
For tr.in. ( r (lP5 'dttOflr the baseemitter 'urn tion is for.sard
biased, and the collector-base
junctIon is re\eoe biased. Almost
-'v-iCBhanvr'epe
elrons arc
minority charge
cathers at lhe CS
jancrien
v8E r0
tYP/flYPe
[\ -
electrons trasellirtg
through the p-rype
base
Figure 4-6
tolt-,tor current
dcperds on emitter
currrr.t
emitter current
cortrtolled by 0 n;
tn-type 1
ta-t)pe
p-type
r
_
-n
base curr
,,4l
I
- +
-I
1+
V50
Figure 4-7
Chapter 4
BE
is
the bise
I
(ellen,,,
y
pe
p-tye.
\ _7
baiter a clrage.s.
posiriseon the n-side.
negatis e on the p side
Figure 4-8
Unbiased pnp transistor
depletion regions and barrier
sot.1e5.
hotenoolld
(rent, the bx
J
3
....... . Ji-;
......
rnnlrt.m5nr
of bole,
.
barrieevollage
reduced
'barncrvoltage
increased
/ B"
CBdepIenOe
BEdepecor
region narrowed
regrent widened
+ 11
bic, so11age
source
eA
uncdoO
neset,e br5d
BE
npete
CS
Fmfter , Sac,
p
bent vo3nce
SOUrCe -
CB
Figure 4-9
In a pnp transistor, the forwardbiased base-emitter junction
causes charge carriers (holes) to be
emitted into the base. Most of
these flow across the reversebiased collector-base junction.
1 0 4
+c
S'ectio,: 44 Review
4-1.1 Sketch a block diagram of a biased npn transistor. Show the
Terminal Voltages
The terminal voltage polarities for an rn transistor are shown in
Fig. 4-10(a). As well as conventional current direction, the
direction of the arrowhead indicates the transistor bias polarities.
For an npn transistor, the base is biased positive with respect to
the emitter, and the arrowhead points from the (positive) base to
the (negative) emitter. The collector is then biased to a higher
positive voltage than the base.
Figure 4-10(b) shows that the voltage sources are usually
connected to the transistor via resistors. The base bias voltage (V5)
Is connected via resistor R, and the collector supply is
connected via R. The negative terminals of the two voltage
sources are connected at the transistor- emitter terminal. V is
alwa y s much larger than B' and this ensures that the CB
junction remains reverse biased: positive on the collector (n-side),
and negative on the base (p-side).
Typical trr-nsistor base-emitter voltages are similar to diode
forward voltages: 0.7 V for a silicon transistor, and 0.3 V for a
germanium device. Typical collector voltages might be anything
from 3 V to 20 V for most types of transistors, although in many
the collector voltage may be greater than 20 V.
For a pnp device [Fig. 4-11 (a)l the base is biased negative with
respect to the emitter. The arrowhead points from the (positive)
emitter to the (negative) base, and the collector Is made more
negative than the base. Figure 4-11(b) shows the voltage sources
cornected via rer-istors, and the source positive terminals
connected at the emitter. With Vcc larger than VB, the (p-type)
collector is more negative than the (n-type) base, keeping the CB
Junction reverse biased.
All transistors (npn and pnp) are normally operated with the CB
junction reverse biased and the BE junction forward biased. In the
case of a switching transistor, (a transistor that is not operated as
an amplifier, but Is either switched orror oIJl. the CBjunction may
become forward biased by approximately 0.5 V. Also, in transistor
switching circuits (and some other circuits) the BE junction can
become reverse biased.
Transistor Currents
The various current components that flow within a transistor are
Illustrated in Fig. 4-12. The current flowing Into the emitter
terminal Is referred to as the emitter current and Is Identified as
For the prtp device shown, I. can be thought of as a flow of holes
Figure 4-10
An npn transistor must have its
base biased positive with respect
to its emitter, and its collector
more positive than the base.
IC
va )
0
V5
+
vcc
17
Figure 4-11
An pnp transistor must have its
base biased negative with respect
to its emitter, and its collector
more negative than the base.
Chapter 4 Bipolar Junction Transistors
from the emitter to the base. Note that the indicated J direction is
the conventional current direction from positive to negative. Base
current 'B and collector current I, are also shown as conventional
current direction. Both I. and 'B flow out of the transistor. while 'E
flows into the transistor, (see Fig. 4-12 and 4-13). Therefore,
(4-1)
As already discussed, almost all of 1 crosses to the collector, and
only a small portion flows out of the base terminal. 'I\pica1Iy 96%
to 99.5% of J flows across the collector-base junction to become
the collector current. As shown in Fig. 4-12.
IC =
(4-2)
'E
Figure 4-12
dc('
+ 1J3)
a dC 'B
which gives, Ic =
( 4-3)
le =
I-
3I8
TBJ
Figure 4-13
(4-4)
1 - adC
where,
l3dc =
a dc
(4-6)
1 - 0dc
1-
E{j
yc
-T
Figure 4-14
Eample 4-1
Calculate I and I for a transistor that has a. = 0.98 and
determine the value of P, for the transistor.
Solution
U , Is
IC =
Eq. 4-4,
= 1 OOpA. Also,
0.98x100pA
______
=
-0.98
1 - ad.
= 4.9 mA
4.9 mA
I
from Eq. 4-2,
I =
_____
0.98
dc
=5mA
= --
=
10 dc
Eq. 4-6,
0.98
1-0.9
=49
"frrnpie 4-2
Calculate a. and J3.. for the transistor in Fig. 4-15 if Jc i measured as 1 mA,
and I is 23 cI-\ A 1 c, determine the nec; base current to give /. = 5 mA.
Soi,,rio,
I rn'\
Eq. 4-s.
3a= -18
L^
= 40
Eq. 4-1,
=I-+J=I rnA+2SpA
= 1.02 -5
I.
1 mA
=
_.
1,
1.023
rnA
Figure 4-15
= 0.976
5mA
1,
Eq. 4-5,
fid,
40
= 125 p
I, =-
2.5 mA and
4=
107
4-3 Amplification
Current Amplification
The equations derived in Section 4-2 demonstrate that a
transistor can be used for current amplification. A small change In
the base current (MB) produces a large change in collector current
(') and a large emitter current change (MB), [see Fig. 4-16(a) and
(b)[. Rewriting Eq. 4-5. the current gain from the base to collector
can be stated in terms of current level changes.
= Mc
The increasing and decreasing levels of input and output
currents may be defined as alternating quantities. In this case.
small (lower-case) letters are used for the subscripts. Thus, 'h is an
ac base current, I is an ac collector current, and 'e is an ac emitter
current. The alternating current gain from base to collector may
now be stated as.
IC
(4-7)
13acT b
'R
j, M,
-T
5.
iI/C Aic
'
+1
-
L1jE
Figure 4-16
Increasing and decreasing! 6 levels
produces much larger changes in
and l.
__
+J
Ic
Voltage Amplification
Refer to the circuit In Fig. 4-17(a), and assume that the transistor
(Q 1 ) has f3 = 50. Note that the 0.7 V dc voltage source (Vu) forward
biases the transistor base-emitter junction. An ac signal source (v)
in series with Vi, provides a 20 mV input voltage. The transistor
collector is connected to a 20 V dc voltage source (Vd via the 12
kfl collector resistor (R1).
If Q 1 has the 'B' VBE characteristic shown in Fig. 4-17(b). the 0.7
V level of V. produces a 20 pA base current. This gives,
'c Pc*'B5 x 20 pA
1 mA
The de level of the transistor collector voltage can now be
Jc
1 0 8
calculated as.
VC =V CC -(IR 3 )=2OV-(1mAx
12k1))
=8V
The V and
Ic levels
Figure 4-17
Increasing and decreasing V.
levels (AV8) produces I changes
( J&. This results in l changes
and (output) collector voltage
variations.
0.3 0.4 0.5 0.6 0.7' 0)
-
(-20
Vi
(+2I
Vi
Per
250 iA
50 x (5 iA)
R
1/\Ii
j -
=dsI 0 ,R,
=3 V
The circuit ac input Is the base voltage change (V), and the ac
output is the collector voltage change (V). Because the output Is
greater than the input, the Circuit has a voltage gain: It is a vo ltage
amplifier. The voltage gain (A) is the ratio of the output voltage to
the Input voltage.
A
(a) iJ changer I
R,
20 mV
= 150
arrd I
VB^r )
voA.vi
I
Figure 4-18
'c changes produce changes in
V. An ac input fr, ) produces an
ac output N. = A5 v1)
109
(4-8)
Substituting the ac quantities for Fig. 4-17(a) into Eq. 4-8 gives A
= 150 once again.
Example 4-3
Determine the dc collector voltage for the circuit in Fig. 4-19(a), if the
transistor has the I8 /V characteristics shown in Fig. 4-1 9(b), and f3dr = =
80. Also, calculate the circuit voltage gain when v is 50 mV.
Solution
From Fig. 4-19(b),
'B
= 80x 15
(WA)
25
= V c&i - i1c
= 3
-)
PA
Is -
TO.7V
= 1.2 rm\
.1
*50
= 15 pA for V B = 0.7 V
'C = 0dc1B
VC
10
20
15
pA for = 5OmV
Ic = f3f5 = 80x t3
10
/.JA
'B
= 240pA
0
v0=/R7 = 240pAx10
kQ
= 2.4 V
Eq. 4-9,
V
A, =
2.4V
= 50
CV)
0.1 0.3 0.5 0.7
"0 V)
(.50 niV)
-- VBE
mV
= 48
actise Problems
15V, R 1 = 5.6 kO, V = 7V,
A circuit similar to Fig. 4-17 has V
.1
and 'B = 20 pA. Cakulate the dc current gain.
.2 A 50 mV ac input is applied in series with the transistor base in
Problem 4-3.1. Assuming that the transistor has the input
characteristics in Fig. 4-1 7(b), calculate the circuit ac voltage gain.
IAT A
IC
JE
IB
Input Characteristics
To determine the input characteristics, the output (CB) voltage is
maintained constant, and the input (EB) voltage is set at several
convenient levels. For each level of input voltage, the input current
IE is recorded. IF is then plotted versus VEB to give the commonbase input characteristics shown in Fig. 4-21.
Because the EB junction is forward biased, the common-base
input characteristics are essentially those of a forward biased pnjtnctson. Figure 4-21 also shows that for a given level of input
voltage, more input current flows when higher levels of GB voltage
are used. This is because larger GB (reverse bias) voltages cause the
depletion region at the GB junction to penetrate deeper into the
base of the transistor, thus shortening the distance and reducing
the resistance between the EB antI GB depletion regions.
Figure 4-20
Circuit for determining transistor
common-base characteristics.
10
Output Characteristics
The emitter current 'E is held constant at each of several fixed
levels. For each fixed level of i. the output voltage V isadjusted
In convenient, steps, and the corresponding levels of collector
cui rent I are recorded. In this way, a table of values is obtained
from which a family of output characteristics may be plotted. In
Fig. 4-22 the corresponding I and levels obtained when I. was
held constant at 1 mA are plotted, and the resultant characteristic
Is Identified as 1. = 1 mA. Similarly, other characteristics are
plotted for 'E levels of 2 mA, 3 mA, 4 mA, and 5 mA.
The common-base output characteristics in Fig. 4-22 show that
for each fixed level of 'E' 'c is almost equal to I and appears to
remain constant when V Is Increased. In fact, there is a very
small Increase in I with Increasing V. This is because the
Increase In collector-to-base bias voltage (V) expands the GB
depletion region, and thus shortens the distance between the two
depletion regions. With I. held constant, the Increase in I c is so
sinoil that It is noticeable only for large variations in VCB.
AS 11Iu.pd in Fig. 4-22, when V is reduced to zero, 'c still
flows. Even when tfle applied bias voltage Is zero, there
Is still a barrier voltage existing at the UB Junction, and this
assists the flow of I. The charge carriers which constitute I are
minority carriers as they cross the GB junction. Thus, the reversebias voltage V and the (unbiased) GB harrier voltage assist their
movement across the junction, (see Fig. 4-12). To stop the flow of
charge carriers, the GB junction has to be forward biased.
8
A
16
4
2
0ll,
0.3 0.4 0.5 0.6 0.7 (Vi
-- VEa..
Figure 421
The common-base input
characteristics for a transistor are
the characteristics of a forwardbiased pn-junction.
Chapter 4
Active region
(mA)
f )
--
mA
Figure 4-22
/E=3 mA
3 /
---
I F = I mA
-2
-6 -8
-4
-- tea -
-tO
-12
The cornmon-bae output chardr:tEri,tiC5 (or collector characteristics) for a transistor show
that I remains ubstantiaIly
cont ant for each level of I.
-11
-16
akdo\n
(V)
.icpkOflrCgiOfl
p.nI:aIFflg a 19
(5
L{ elc',a., Fe5?Ofl
+ I.
V.-,,
Figure 4-23
Octpui char.icteristics
Current p ii
tells! ic,
(ritA)
I-_5 IOA
I
= 4 mA
= 3 mA
Ic
I = 2 mA
Figure 4-24
The common-base current gam
characteristics for a transistor are
graphs of output current
.i nput current 1E
I mA
(mA)
3
-
-2
-4
-6
-W (V)
IE
Example 4-4
Derive the current gain characteristic for (' = 2 V from the common-base
output characteristics in Fig. 4-25.
r.u=r
(mld Output characteristics
characterit,c
IE4tflA
-4
S I i tic, n
Dray a vertical line at V = 2 V.
IE 3 trA
Wherc thu Vnr' intersects the char,'cterirtics
IC
IF
= 2 nnA
at prints A and B, read;
X=2
Ic
ad,
. 2
IE = I
1 mA for I - 1 rn \
C 'I
mA
I=4rnAforI-4rnA
(mA) 3
-2
-4
-6
-8 (l)
rac; froi,!ems
f4-41
Figure 4-25
I)e,ivation of comrnon-has'.c
current gain characteri,tics from
the crutpc't characteristics.
IC
Cmmo,Einitter Characteristics
Com,io;- Emitter Cinctjt
Figure 4-26 shows a circuit for determining transistor commonemitter- characteristics. The input voltage is applied between the B
and E terminals, and the output is taken at the C and E
tccininaiu. The ernhter terminal Is common to both input and
output. Voltage and current levels are measured as shown.
LIT
Figure 4-26
Circuit for determining transistor
common emitter characteristics.
Input Characteristics
To prepare a table of values for constructing the common-emitter
input characteristics, V is held constant. VBE is set at convenient
levels, and the corresponding 'B levels are recorded. 'B is then
plotted versus VBE , as shown in Fig. 4-27. It is seen that the
common-emitter input characteristics (like the common-base
input characteristics) are those of a forward-biased pn-junction. It
should be remembered that 'B is only a small portion of the total
cnrrent (Is) that flows across the fonvard-biased BE junction.
Figure 4-27 also shows that, for a given level of 11BE' 1B Is reduced
when higher YCE levels are employed. This Is because higher '7CE
produces greater depletion region penetration into the base,
reducing the distance between the CB and EB depletion regions.
Consequently, more of the charge carriers from the emitter flow
aross the CBjunction, and fewer flow out via the base terminal.
On/put Characteristics
To prepare a table of values for plotting the common-emitter output
ci';;-czctcristics, I Is maintained constant at se: ral convenient
lels. VCE is adjusted in steps at each 1. level, at1 the 1 level is
te'-olTled at each VCE step. For each 1B level, 'c is plotted versus Vcs
to give a family of characteristics,as shown in Fig. 4-28.
(p
100 j80
60-
'B
40
207
0.3
0.4
Figure 4-27
The Co - on-emiUe' rp.Jt character, for a t'acssc! are
those of a forwardaed pnjUfltt.UI1.
Figure 4-0
The cornnvonemer :tpLlt
characteristics (or co(e00r characteristics) for a trarsstor are a
plot oI!,z versus V(-r for various I
levels.
\
'eakdown
-2
-4
-6
-8
-10 -12
-14
-16 (V)
VcE
1 1 4
V,:s=
tf
V-
+
V'
(a) 1 c = V8 - 1BE
Example 4-5
Determine the 15 and I levels for a device with the characteristics in Figs. 427 and 4-28, when Y is 0.7 V and t' is 6 V. Also, calculate the Pd\'alue.
+)
(b)
Solution
From Fig. 4-27, at (V = 0.7 Vancl V( = 6 tA:
I = 2.5 mA
20/iA
2.5
0" - 'c 1.
20 pA
t-8
= 0 when 1
0E = BE
Figure 4-29
= 125
Current Gain Characteristics
X The
corns non-emitter current gain characteristics are (output current)
Current gain.
-.
chaacteris',ics
(mA)
Output
characteristics
18 -50
J40A
-(
CE6V ,
"\ 'c
CE
v\
Figure 4-30
30A
:
0A
1a"10_jj____
=0
(PA) 60
40
20
'8
-4-6
- -
-8
-10
-12 (V)
Chapter 4
1 15:
12 V from the
(niA)II Output
7
=5 0
Ii characteristics
JIA
/40 A
1,
Vic- =6V
li^
IF
Figure 4-32
The common-collector output
and current-gain characteristics
are identical to the commonemitter characteristics.
I'EC2V
/8201
(VA) 60 40
20
Figure 4-31
Transistor ciruit used for
de er,nip.i Ciirnnhn.IOjLeor
chars r.
10
ID
0
12 (V)
1 1 6
(WA)
100
or,
VEE =
tli
VEc
held constant,
'B
I.
40
20
------------
Vrc2V
/
80
VEC - V c.
4-33
0
L.L
0
VBC
Figure 4-33
Ohmmeter Tests
v'.
temporary
shofliap
wire
Figure 4-34
117
Characteristic Plotting
Figure 4-35
Use of an analog ohmmeter for
checking the junctions of a
transistor.
Example 4-6
The circuit and XY recorder in Fig. 4-38 are to be used to plot transistor
common-emitter output characteristics to
= b y and
= 20 mA.
Select V and R2 , and determine appropriate V cm scales for the XY
recotder. The plotted characteristics are to be approximately 20 cm x 20 cm.
Solution
Figure 4-36
scale length
Transistor testing by re of a
digaI ohmmeter.
20 mA
20 cm
= 1 MA/cm
Select a vertical scale of 1 V/cm, so that 20 cm represents 20 V and 20 mA.
20V
R 5 = _____
- 20 m
=00
= 1 kC)
V =
+ (lc(,,.,) x R2)
scale length
= 0.5 V/cm
10V
20
cm
Figure 4-37
A curve tracer can be use to
compare the characteristics of a
transistor of unknown quality
with the characteristics of a
known good device.
1 1 8
efllCJI
XY Recorder
input
terrnri
+
+
Power
- supply
w
1
I
+
Power
VCE
- supply
h inzuntal input
ternunats
-.-------..-..--
ctse Problems
Section 4-2
Section 4-3
Figure 4-38
Tranintor characteristic plotting
on an \Y recorder. V produces
horzorital deflection, and '1R2
caue ertica! deflection.
Chapter-4 Problems
Section 4-2
4-1 Calculate the values of I and 'E for a transistor with a
0.97 and 'B = 50 1.A. Also, determine J3 for the device.
4-2 A transistor has measured current levels of I = 5.25 mA and
1 19
120
113 100 uA. Calculate I, a, and p,, and determine the new
4-3
4-4
4-5
Section 4-5
9 V from the
4-14 Derive the current gain characteristics for V
output
characteristics
in
Fig.
4-41.
common-emitter
4-15 From the common-emitter Input characteristics in Fig. 4-27,
estimate the level of 'B when VBE = 0.72 V and Vcr = 2 V.
4-16 Refer to the common-emitter output characteristics in Fig. 428. Derive the current gain characteristics for V = 14 V.
4-17 Determine the level of I for a transistor with the commonemitter output characteristics In Fig. 4-28 when 'B = 60 pA
d when t = 30 pA, with V = 5 V In each case. Also
calculate j3.
I
mA-
____ 25 V
a) Transkior crcut
(rA)
Section 4-3
4-6 The transistor in the circuit in Fig. 4-39(a) has the input
characteristics in Fig. 4-39(h). If P, = 50, calculate the
collector voltage when V1 = 0.7 V.
JR;
I;0
J
0.4 0.5 0.6
I
0.7
haracieris!ic for Q,
Figure 3-39
(V)
Output characterisiics
(mA
10
8
lOmA
1E ^
8 rnA
Figure 4-40
IE6mA
6
IC
Ip=
- l4mA
4
/=2mA
2 F
2
0
-I
-2
-3
-4
-S
-6 (\')
VC6-
IE
(mA) Output
characteristics
14
/8600.A
tO
80
IC
F18 =
40 _ .i\
61,
20
4 11
Is _
812
16
20
0
24 (V)
8'CE
Section 4-6
4-18 Refer to the common-collector output characteristics in Fig. 432. Derive the current gain characteristics for VEC = 10 V.
4-19 Calculate the Input voltage (VBC) for the common-collector
circuit In Fig. 4-31 when V = 10 V and VEB = 0.7 V.
4-20 Determine the level of V from the common-collector input
characteristics in Fig. 4-33 when I = 20 hA and VE = 4 V.
Section 4-7
4-21 An XY recorder Is to he used to plot transistor commonemitter output characteristics as In Fig. 4-38. The transistor
current and voltage levels are to he VcE(,e = 20 V and
= 50 mA. Select V and resistor R2, and determine
appropriate V/cm scales for the XY recorder. The plotted
characteristics size Is to be approximately 25 cm x 25 cm.
Figure 4-41
12 1
1 2 2
71.3
4-3.2
tA)
4-6.1
1.5 V, 3.5 V
4.l
123
Chapter 5v'
Rs
Chapter Contents
J,CC
Introduction
5-1 DC Load Line and Bias Point 124
5-2 Base Bias 130
5-3 Collector-to-Base Bias 133
5-4 Voltage Divider Bias 136
5-5 Comparison of Basic Bias Circuits 142
5-6 Trouble-S hootinq BUT Bias Circuits 144
5-7 Bias Circuit Design 146
5-8 More Bias Circuits 151
5-9 Themtal Stability of Bias Circuits 155
5-10 Biasing Transistor Switching Circuits 160
Review Questions 165
Problems 167
Practise Pro blerns Answers 172
cetives
Will be able to:
I Draw dc load lines for transistor
circuits, identify circuit Q-points,
and estimate the maximum circuit
output voltage variations.
2 Sketch base bias, collector-to-hose
bias, and voltage divider bias
circuits, and explain the operation
of each circuit.
3 Analyze various types of BiT bins
circuits to determine circuit voltage
and current levels.
4 Trouble-shoot non-operational BUT
bias circuits.
5 Design base bias, collector-to-base
bias, and voltage divider bias
circuits, and select appropriate
standard value components.
R,
Rc
Introduction
Transistors used in amplifier circuits must be biased into an on
state with constant (direct) levels of collector, base, and emitter
cut-rent, and constant terminal voltages. The levels of I and
define the transistor dc operating point, or quiescent point. The
circuit that provides this state is known as a bias circuit. Ideally.
the current and voltage levels in a bias circuit should remain
absolutel y constant. In practical circuits these quantities are
affected b y the transistor current gain (it) and b y temperature
changes. [he best bias circuits have the greatest stabilitv they
hold the currents and voltages substantiall y constant regardless of
the ltrr and temperature variations. The simplest bias circuits are
the least costl y because they use the smallest number of
components, but the y are not as stable as more complex circuits.
5-I
DC Load Line
[lie tic loud line for a transistor circuit is a straight line drawn on
the transistor output characteristics. For a comniota-enhitter (CE)
circuit, lie load line is graph of collector current (1.) versus
n-olleetor-en) itter voltage (V,.). for a given value of collector
resistance(R.) and a given suppl y voltage (Va .). The load line
shows all corresponding levels of f. and Vc E that can exist in a
particular circuit.
Consider the coniniorh-eraitter circuit in Fig. 5-1. Note that the
polarity of the transistor terminal voltages are such that the baseemitter ji nct Ion IS forward biased and the collector-base junction
is reverse biased. These are the normal bias polarities for I lie
transistor junctions. The dc load line for the circuit in Fig. 5-I is
drawn on the device conimon-einittcc characteristics in Fig. 5-2.
From Fig. 5- 1. the collector-emitter voltage is.
Vcs = (supply voltage) - (voltage drop across R)
or.
VcEVcC - ICRC
(5-1)
= 20 V - (Ox 10 kU)
= 20 V
VCE =
Figure 5-1
Tran000r circuit with collector
resiq or Re
RC
Chapter 5- &JTBiasing
Plot point B on Fig. 5-2 at VCE = 0 and 1. 2 mA. The straight line
drawn through poirttA and point B is the dc load Urie for R = 10
k) and V = 20 V. If either of these two quantities is changed, a
new load line must be drawn.
(mA) 2.0
1.8
1.6
1.4
1.2
Figure 5-2
DC load line drawn upor
transistor common-emitter out
put characteristics.
1.0
IC
0.8
0.6
0.4
0.2
0
8
VCE
10
12
14
16
18
20(V)
Example 5-1
Draw the new dc load line for the circuit in Fig. 5-1 when R. = 12 M.
Solution
Va=VciIcRc2OVO
= 20V
Electronic De\ ices md Circuits. 4th d.
1 2 6
= 0 and V ( = 20V
when V = 0,
front 5-1,
o -
=
giving,
IC
r'i
IC
= 20V
U.S -
12 M
=1.mA
U.4
o ------
12
16
20 1Vi
IC
20
,A
q
Figure 5-4
(mA)
1.95,,ol 2.0
AIB=+2tJiA
Qpmint
1.2
I
Figure 5-5
___.101
s -20A
0.4
\D.
/,=\_ )
005 mA0
iVCE 8
[ii E = - 9.5 V
0.5 V
12
20(V)
iG
aVCE= + 9.5 V
19.5 V
Chapters
/c=U
V-0.5V
= 9.5 V
EVcE =
10
RC
127
BJTBiasing
= 19.5 - 10 V
=9.5V
j-.
a) t,
C \VliCfl
9
I-
--h -
() VCE
=0
CC
Owhcn I
Firure S 6
The col!cctor-r' ter .ol:ae of
tr&fl5!St0, (Sc raca from approx
imately zero to
Jr = VcJRc
I C at Qpoint
Figure 5-7
Transistor collector-emitter
voltage tV) ranges from approximately V., to zero, when I goes
from zero to Vcc!Ft.
IC, variatio,
IC = U
CE
VCF
CE
O
VCE at
Q point
Variation
Ce
cc
1 2 8
Q-point
Selection
Suppose that, instead of being biased half way along the load
line, the transistor is biased at I- = 0.5 mA, and V = 15 V, as
shown in Fig. 5-8(a). Increasing the collector current to 2 mA
reduces V to zero, giving AVC, = - 15 V. Reducing I to zero
increases V to V. producing \' = +5 V
mA
IH
Figure 5-8
The Q-point does not have to be
at thecentre of the dc load line.
But, its position determines the
maximum symmetrical collectoremitter voltage swing.
mA1
2.0
load line
Ic
\."C
0:
L; .iI20
IC ic.'Sation
CE
i
'It
iatlOit
1' CE
IC %aiia flOP? .
varlo lion
(b) Svrnnietrical
VC-E
swing
When used as an amplifier, the transistor output (collectoremitter) voltage must swing up and down by equal amounts: that
s, the output voltage swing must he symmetrical above and below
the bias point. So, the asymmetrical VCE swing of -15 V +5 V
illustrated in Fig. 5-8(a) is unsuitable. If 'c is driven up and down
by 0.5 mA [see Fig. 5-8(b)], a symmetrical output voltage swing of
5 V is obtained. This is the maximum symmetrical output voltage
swing that can be achieved with the bias point shown in Fig. 5-8.
In many cases circuits are designed to have the Q-point at the
center of the load line (as in Figs. 5-5 and 5-7) to give the largest
possible symmetrical output voltage swing. This Is especially true
for some large signal amplifiers, (see Chapter 18). Small signal
amplifiers (discussed Chapter 12) usually require an output voltage
swing not greater than 1 V. So,
C
8v
Example 5-2
The transistor circuit in Fig. 5-9 has the collector characteristics shown in Fig.
5-10. Determine the circuit Q-point and estimate the maximum symmetrical
output voltage swing. Note that V = 18 V, R = 2.2 kO, and I. = 40 pA.
Figure 5-9
Circuit for Example 5-2.
129
Solution
Eq. 5-1 ,
Va
when J=0,
'cr 'V0
(mA) (/
12
VIcRc
so
to
=18V
Or,
= 60 PA
Qpoint
when Vc =0,
40 11A
OVcJcR
'B = 20 jiA
18V
2.2kQ
I.
8.2 mA
10
12
14
16 18(V)
10E
Figure 5-10
Transistor Common-emitter
output characteristics and dc
load i/re for Laiple 5-2.
= V - 'E 'E
(a)RL(=RE
- 1(Rc +
RE)
Note that the voltage drop across the emitter resistor is actually (I
RF), but again for convenience IEIS taken as equal to 'c'
(b) RL(,, =
R)
Figure 5-1I
The transistor d'j loan is the sum
of the resistors in seriesuith the
collector and emitter terminals.
130
ractise Problems
Draw the new dc load line and determinethe Q point for the circuit
1.1
in Example 5-2 when the supply voltage is changed to 12 V.
1.2 A common-emitter circuit as in Fig. 5-1 has R = 12 kO and V = 15
V. Draw the dc load line on the characteristics in Fig. 5-2. Specify the
Q point, and determine the maximum symmetrical output voltage
swing if the base current is 10 pA.
-1.3 A transistor circuit as in Fig. 5-11 (b) has V = 12 V, R. = 820 Q, R
= 380 0, and J = 60 pA. Draw the dc load line on the
characteristics in Fig. 5-10, and determine the maximum symmetrical
out p ut voltage swing.
Vcc - VBE
FE 'B
The collector current is now used with Eq. 5-1 (VCE = Vcc - !R) to
calculate the collector-emitter voltage. Thus, when the supply
voltage and component values are known, a base bias circuit is
easily analysed to determine the circuit current and voltage levels.
Example 5-3
The base bias circuit in Fig. 5-13 has R5 = 470 kO, Rc- = 2.2 kO, V = 18V,
and the transistor has h0 = 100. Determine 1, It . , and V.
Solution
Eq. 5-:',
V -
=
= 36.8pA
lB
I Rc
+
VCE
( 5-2)
RB
Ic --
Icj
- 18 V -0.7 V
470 kO
Figure 5-12
Base bias circuit, ako known as
fixed current bias. The base
current remains Constant at,
le = tV -
(13 1
Chapter 5 BJrBiasing
Eq. 5-3,
100 36.8/iA
I= h 1 1, =
R8Rc
= 3.68 mA
Eq. 5-1,
Va =
I/cc
q
cE - jc
OA
m
=9.9V
The circuit conditions are illustrated in Fig. 5-13.
c9
Figure 5-13
Circuit for Example 5-3.
Example 5-4
Calculate the maximum and minimum levels of I and Vc for the base bias
= 50 and h 11-, 1 = 200
circuit in Ex. 5-3 when
Solution
The base current in this circuit is unaffected b h, and so (as in Ex. 5-3),
_13M N
R5 - 470k0
= 36.8/iA
for
_'+
18V-0.7V
V CC
'B
A
I 6.8
^ uE
13 = 50 x 36.8 pA
FCC
+IS\
= 1.84 mA
and,
Rs
O
IC =
I = 200 x 36.8 pA
CE
8.
= 7.36 mA
and,
V, = '.cr -
= 18 V - (7.36 mA x 2.2 kO)
= 1.8 V [See Fig. 5-i 4(b))
= Figure 5-14
Note that the typical hEE value of 100 used in Ex. 5-3 gives 'c
Circuit current and voltage lC-lr
h101
3.68 mA and V. = 9.9 V. But, applying the hFE(,fltfl, and
&
and
for
values in Example 4-4 results In an I range of 1.84 n to 7.36 determined in Example 5-4.
mA) and 110E ranging from 1.8 V to 13.95 V. The different Ic and
7.$6mA
Figure 5-15
-------------------------'
Q Q point for hFE = 100
6
IC
i:::
16
12
Thetran5istorh5 value/u,]
rioetfecton the Q point fo r
18(V)
-VCE--- 8
99V
ISV
13.95V
All of the base bias circuits discussed so far use rspn transistors.
Figure 5-16 shows circuits that use prip transistors. In Fig. 5-16(a)
note that the voltage polarities and cut-rent directions are reversed
compared to npn transistor base bias circuits. Because it is normal
to show the supply voltage with the positive terminal uppermost.
the circuit of Fig. 5-16(a) is redrawn in Fig. 5-16(b). This Is the way
that the circuit would usually be shown.
Equations 5-1. 5-2. and 5-3 can be applied for analysing pnp
transistor base bias circuit exactly as for npn transistor circuits.
Vrc
VRE+ + + V"
Ic
Figure 5-16
Base bias circuits using pnp
transistors.
Chapter BirBiasing
ractise Problems
-2.1 If the base bias circuit in Example 5-3 uses a transistor with h IE(m ifl) =
75 and h fE(ma = 250, determine the maximum and minimum levels
Of
2.2 A base bias circuit has V T = 24 V, R8 = 390 kO, R, 3.3 kO, and
Va = 10 V. Calculate the transistor hIE value, and determine the
new V a level when a new transistor is substituted with h, = 100.
\2c-
(5-4)
'13
I.
VCE = V(( - Ri :c
(5-5)
18)
1 +Ia
(/( +/,)R
R1
Figure 5-17
I =hI
R5
-*
(a) Collector-to-base
bias circuit
1 9 R 8
Ra
VSE ".. -
1 3 4
401 ed.
= Vcc - j? c(c +
This gives.
1=
(5-6)
+ 1)
'I-
Ex'a'nzple 5-5
A collector-to-base bias circuit as in Fig. 5-18 has R = 270 kO, F- = 2.2 kO,
= 18 V ciid a transistor v. ih h 0 = 100. Anakse the Circuit 10 deicrmin
1. I, and Vt--.
<-C
Solution
V C-
Eq. 5-6,
= R8
VBf
. ( 17e+ 1 )
18V-0.7 V
2.2 kQ(10)+i)
270 LO
= 35.1 PA
=h
Eq. 5-3,
2 L
Rs
= 100 x 35.1 pA
= 3.51 c.\
Eq. 5-3
VU = V
E
C, -
+ J)
= 18 V . 2.2 kQ(3.51 mA
= 1(1.2 V
4-
35.1 pA)
Figure 5-18
Collector-to-base bias circuit for
E'Kaniple 5-3.
it
135
Chapters-RJTBiasing
Example 5-6
Calculate the maximum arid minimum levels of 'c and VcE for the bias circuit
in Ex. 5-5 when hFf(,,fl;= 50 and h F((m j = 200,
+18
2.2 kf)
Solution
for b EE .,.
.Rc
IC +IR
lIc
Eq. 5-6,
VCC
18V-0.7V
2.16mA
7Okc)
Vc
11.9
= 42.3pA
Is = 50 x 42.3 pA
Ic = hFE
Eq. 5-3,
= 2.26 mA
V = V C(- - R(I + 1)
Eq. 5-5,
= 18 V - 2.2 kQ (2.26 mA
-I-
42.3 pA)
/C
+15
Eq. 5-6.
.15 V
R,.
22fl
18V-0.7V
VccVsi
+ 2.2 kQ200 +
1)
270
kO
8 +
+
I/c
v4.86mA
1)
= 24.3 pA
YOkO
,+ VCE
7.25 V
Ic = h J = 200 x 24.3
Eq. 5-3.
= 4.86 mA
VU = V cc - RUc + I)
Eq. 5-5.
Figure 5-19
Circuit conditions for hfE(rniS) and
h 1 in the collector-to-base
bias circuit analyzed in Ex. 5-6.
(mA)
10
s
IC
6
4.86 mA -
3.51mA ------QporntforhFE5O
2.26mA - ----0 L.........._
4
6
8
0
2
VCE
7.25V
12
10.2V
_____
16 18(V)
12.9V
Figure 5-20
Effect of hFE(min) and hFE(=a,j on
the Q point for the collector-tobase bias circuit analyzed in
Example 5-6.
1 3 6
*
-
Is
Circuit Operation
Voltage divider bias, also known as emitter current bias, is the most
stable of the three basic transistor bias circuits. A voltage divider
bias circuit is shown in Fig. 5-22(a), and the current and voltage
conditions throughout the circuit are Illustrated in Fig. 5-22(b). It
is seen that, as well as the collector resistor (Re), there is an
emitter resistor (RE) connected in series with the transistor. As
discussed in Section 5-1, the total dc load In series with the
transistor is (R+ R E), and this total resistance must be used when
drawing the dc load line for the circuit. Resistors R 1 and R.
constitute a voltage divider that divides the supply voltage to
produce the base bias voltage (yE).
Voltage divider bias circuits are normally designed to have the
voltage divider current (1d) very much larger than the transistor
base current (Is). In this circumstance, V. Is largely unaffected by
so V can be assumed to remain constant.
rictise Problems
1 The collector-to-base bias circuit in Example 5-5 uses a transistor with
'FE(mi,) = 75 and h FE(C = 250. Determine the new maximum and
minimum levels for J and V.
- +
Figure 5-21
Chapter 5 &/Tasing
13 7
- I IC
R(
R1
Figure 5-22
IC
VA
R R
(a)
Voltage divider
bias circuit
(5-7)
R 1 +R
VE =VB - VBE
(59)
V V (IRJ
CE can
(5-11)
YCE
V 1c(Rc
(5-12)
Electroaic Devic and Circuits. 4t1i ed.
1 3 8
vsis
Approximate C rcui A n al
If the transistor base current is assumed to be much smaller than
1.
Lxamp!e 5-7
Analyse the voltage divider bias in circuit in Fig. 5-23 to determine the emitter
vohegc, collector voltage, and collector-emilter voftage.
Solution
V=
Eq. 5-7,
Figure 5-23
33k0+12k0
R 1 +R2
= 4.8V
Eq. 5-8,
= 4.8 V - 0.7 V
B-
VE
= 4.1 V
= V5-V
Eq. 5-9,
4.8V-OJV
lkQ
RE
FR,
= 4. 1 mA
'C 'F
Eq. 5-10,
VC
= 4.1 mA
R
I.2kfl
=
= 13.1 V
Vt-.- V
cc
18 V
.+i
131 V4.1 \!
= 9V
RT
(5-14)
RR 1 IIR2
iehstitutirig I. = h1.
+ VBE + [?
E
4.1 V
conditions
for the circuit in Fx4mple 5-7.
VT = i I .R.
R2 RE
12 M im
Figure 5.24
Voltage and current
jr V x
R 1 + R2
and
Vc
4 . l AI
vs
(J +
IR+
VBE +
RE 113(l
(5-15)
IIJ3 =
R1. + RA '
139
VT WEE
giving,
+ hFEJ
R,
The, chin
equIaIeni
i-1-
VII
Rr=R,Il
V
IEI8#
IC
R1
V,, x R2
= R,+R 1R
a) Determining the
Thevenin
equivalent circuit for the
+"'>ILRE
Example 5-8
Accurately anal-se the voltage divider bias circuit in Example 5-7 to
determine I, V, V, and V when the transistor h, = 100.
Solution
Eq. 5-13,
VT=2=18Vx12kQ
R1 +R2 33k0+12k0
=4.8V
Eq. 5-14,
R1 = R 711 R2 = 33 kQ1112 kO
= 8.8 kO
E
Eq. 5-15
V-V8
4.8V-0.7V
-
R1 +R(1+h)8.8ko+1kQ(l + 100)
= 37.3 pA
-
'c
=hFE
III =100x37.3pA
= 3.73 mA
Figure 5-25
it a
For precise aojh
divider bias :rcu it the voltage
divider is repla ed with its
The enin ui a 1ent o,cuit.
1 4 0
I = I + J = 37.3 pA + 3.73 mA
= 3.77 mA
R,
Eq. 5-10,
IC
3.73 rnA
+
= 13.52 V
Eq. 5-fl
I.2 L0
33 k
V = It R = 3.77 mAx I
= 3.77 V
VCE
9.75V
37.3A
VG = "c - V
13.52 V -3.77 V
Jr.
3.77 '.A,
13.52\'
3,77 V
12k0
Example 5-9
Accurately analyse the voltage divider bias circuit in Examples 5-7 and 5-8 for
the conditions of h Ff(,.,, ) = 50.
Solution
From Ex. 5-8,
Eq, 5-15,
IS
VrV
R T + R 5 (I
4.8V-0.7V
8.8 kC) + 1 kQ(1 + 50)
h )
= 68.6pA
JC =h FE IB = 50x 68.6 PA
= 3.43 mA
4=
+ J= 68.6/.i.A + 3.43 mA
= 3.5 mA
'E
Eq. 5-10,
Vc
= V(J - (1, R C)
= 13.9 V
Eq. 5-11,
V=VV=13.9V.3.5V
= 10.4 V [see Fig. 5-27(a)1
Example 5-10
Accurately analyse the voltage divider bias circuit in Examples 5-7, 5-8 and 59 for the condition o1h 1 , , 3 = 200.
Solution
From Ex. 5-8,
Eq. 5-15,
R+
YEE
RL( l + h )
= 19.5 pA
4.8V-0.7V
8.8 kO + 1 1<00 + 200)
Figure 5-26
Voltage and current levels for the
for the voltage divider bias Circuit
in Example 5-8.
141
Chapter 5 &17'Biasing
IC =
= 200x 19.5 pA
= 3.9 mA
4 = 'B +
VCC
Vcc
IS V
IS '.
2W3.43mA
19.5pA + 3.9 mA
= 3.92 mA
CE
V = I, R, = 3.92 mA' 1 LU
= 3.92 V
68.6 uA,
- 18.4 V
kQ
VC =
CE
RE
RE
V cc - (IC R)
= 18 V - (3.9 mA \ 1.2 LU)
Eq. 5-10,
JA
194
kD
= 13.3 V
(a)/IFE
50
V = V - V = 13.3 V 3.92 V
Eq. 5-11,
Figure 5-27
Voltage and current conditions
produced by 6fE'rn) and
in the voltage divider bias circuit
in Examples 5-9 and 5-10.
(mA)
10
ICI
/Q point for
100
Qpiitforr50
__
;
3.43 mA
02
4
6
- VCE
8/1 \l2
/9.75 V \
104V
9.4V
16 18(V)
Figure 5-28
Effect of three different h FE values
on the Q point for the voltage
divider bias circuit analyzed in
Examples 5-8, 5-9, and 5-10.
1 4 2
0 + VcC
j
iL R
RE.
1E
VCE
Ic
R2
1c Rc
Rc:
-j
raise Problems
Figure 5-29
Voltage divider bias using a pnp
transistor.
R,,Rc ,is
.18v
R
22 kO
470 kQ
22k0
Figure 5-30
Comparison of similar base bias,
collector-to-base bias, and voltage divider bias Circuits.
T
270 kE
rcl-
Vu
- 7.590
I
/2.9 V
g
(c) Voltage divider bias
Chapter 5 BiTBiasing
143
Collector-to- Voltage
1 divider bias
base bias
1.8V
13.75 V
7.25V
9.4V
12.9 V
10.4 V
to
8
base bias
bias
6
IC
-
0
4
6
- VCE
10
12
14
16 18(V)
Figure 5-31
Qpoint ranges (or the similar base
bias, collector-to'hase bias, and
voltage divider bias circuits
jl!us y ted in Fig. 5-30.
Electronic Devices and Circuits, 4th ed.
1 4 4
To
cc
R,.
Common Errors
- +')
vc
VB
R
]R
Figure 5-32
I..
r,cc
i
R i
I R
[circul ted
"[circu:tej
VC Z Vcc
R 1
R2
.. jR2 OPen-]
1circuited
/ ,-.
R/andR2
interchanged
--
Transistor tenninals
Short-circuited
-
-
Base Bias
Figure 5-33
1 4S
could be in the wrong places: that is. the high-value and low-value
resistors might be interchanged. Other possibilities are that R2 is
open-circuited, or the transistor CE terminals are short-circuited.
Collector-to-Base Bias
Ri
R2 short-
R:
circuited
R open- I/
circuited
R-
circuited
+
VC Z OIto
V Vcc
Transitor teniunaIs
le-]rcuitd --
Transistor ter11tiS 1 -
cen-eircuitcd
0. F
Figure 5-34
T ^ ) f (alincorrect
,n
hi Collector oltage
equal to zero to 0.7 V
terminal vO!taoe
a,:Ofecior-to-ba.e
hia, circuit,
R3 shortcirc
uited
ra
R1
I
R3
uited
pVcc
stoi
terminals
short- -, circuited
istor
terminals
open-
circuited
sho'
circuit
chnged
____
R2 open-iR 2
ciited
_
R
VE
Figure 5-35
1 4 6
"^Bia y
Circuit Desk,:
JR
cc
RE
Rc*Rc
-CCCF
Figure 5-36
IC
'Cl
'
L
+
ixamp-le 5-11
Design a base bias circuit (as in Fig. 5-36) to have Vu = 5 V and
The supply voltnge is 15 V. and the transistor has he =100.
IC
mA.
Solution
=XY
5m
Ic
=
I,
RE
Rc
330 M
kQ (use
Ic
5 mA
'Ft
100
= --- =
=
From
Cc.
4 15 V
IC
VCE
5OpA
Eq. 5-2,
- V Bt
15 V- 0.7 V
'B
5OpA
Figure 5-37
Base bias circuit designed in
Example 5-11.
Chapter 5 RJT Biasing
147
< R- *
- _10E
----
I3+Ic
V-
I s
R9
1,9
,Ic
-.. *
VC-E
'B =
IC
8E
- -
hFE
Example 5-12
Ic
Solution
Ic
'B =
hcE
5mA
= 100
= 5OpA
From Eq. 5- 5,
RC=
15V5V
cc a =
5mA+50pA
'C'B
Figure 5-38
Collector-to-base bias circuit
den.
1 4 8
From Eq. 5- 4,
5 V - 0.7 V
- V
RB7IJA
15 + Ic
CC
+15 V
I.SkO
IC
00 kO
Figure 5-39
Col!ector-to-bae bias Circuit
designed in E\arnple 5-12.
1 2
F
FBJJR1
VCC
Ic
_Pc!
I.VC
Figure 5-40
Voltage divider bias circuit design.
Ic
-1 ^O J
R 2
12
IE ^IC
RE
R2
>> VBE
Tc
Chapter 5 &/T Biasing
149
Example 5-13
Ic
Selit!on
R. =
VF
If IC
mA
V 1
15V5V5V
5 mA
IC
= 1 kO (standard value)
Is
Eq. 5-16,
10
Ic
10
= 500pA
From Eq. 5-8,
- V81 = 5 V -- 0.7V
= 5.7V
R
2 -
-- 5.7V
,
500/iA
57V I'E
R
2 kO
RE
5V
v-v8
15V-5.7V
Figure 5-41
Voltage divider bias
desinedin Exampe 5-13.
circuit
1 5 0
Example 5-14
Design the \oltage divider bias circuit in Fig. 5-42 to operate from a 12 V
supply . The hia conditions are to b y V( = 3 V, t = 5 V and I = 1 mA.
So! u Ii o n
SV
1 mA
= 4.7
kO V hec ores,
2V
V = V + VCF = 4.7 V + 3 V
= 7.7V
IICE
Y RJ = VV= 12V-7.7V
= 4.3 V
= - = --imA
= 4.3 kO (use a 3.9 kO standard value to
reduce VR] and increase Va.)
oOn.A67,
56kO
V 8 =
= 5.4 V
101A
Ic
10
10
= lOOpA
Eq. 5-16,
R 2
VB
S.4V
lOOpA
Figure 5-42
Chapter 5 BJTBiasing
With R, = 56 kQ and V 8
151
5.4 V, I. becomes,
V
5.4 V
R.
56k0
= 96.4 pA
R
V. - V8
'2
cc
12V-5.4V
R1
96.4 pA
Ic
ractise .Problems
7.1 A base bias circuit i; to be designed to have V = 4 V and I =
mA. The supply voltage is 12 V and the transistor hFE is 125.
.. JE
Figure 5-43
The bias circuit shown in Fig. 5-43 is the usual base bias
arrangement with the addition of all resistor. Analysis
reveals that this circuit has essentially the same stability
characteristics as a similar base bias circuit. The only advantage
of the emitter resistor in this case is that it gives the circuit a
higher, input resistance (see Section 6-5). An emitter resistor could
also be employed with collector-to-base bias, and this would also
produce a higher input resistance without significantly altering
the circuit stability.
Ic
12<'j.
V -V11
RI
'c
vcE
77_7^
I2
IE
J'
E1
R7
-j
Figure 5-44
1 5 2
Example 5-15
Solution
4V
R4
mA
= 1 kO standard value)
-- s i
4V+ 0.7V
= 4.7 V
Eq. 5-16,
1.
CC
r"O
*18 V
mA
10
10
R3
1.2 kfl
= -lOOpA
IC
-1]\!
R. =
-
12
400 p
= 11.8 LO q jse 12 kG standard value)
l2kfl
I2
400 uA
R,
k
2
1
= 392 pA
V_
V
R
+
,VCE
/9V
JE
4
R4
ikO
19V+ 4V)-4.7V
392 pA
/
= 21.2 kG use 22 kG standard value)
= V. - V = 18V- (9 V + 4 0
=5V
V,
4mA
5V
R=
J +1. 4rnA+392pA
= 1.14 kG (use a 1.2 kG standard value)
Figure 5-45
Circuit designed in Example 5-15.
153
(5-17)
10
- Vac
cc
R1
RC
'Cl
VC
Va = 0
VCE
181
Figure 5-46
Emitter current bias using a plusminus supply voltage is similar to
voltage divider bias.
Rj IE
RE
I?2
'EE
p-V
EE
Example 5-16
Design the bias circuit in Fig. 5-47(a) to operate from a 9 V supply. The bias
conditions are to be V = 5 V and J = 1 mA, and the transistor has h11 = 70
Solution
V1 V11V9V.0.7V
= 8.3 V
1 5 4
-----=imA
8.3V
it = -=
R3
8.2 kU
= 1.01 mA
Vcc
V : Vc.Vc9V5V
+9V
=4V
VR
R2
VR3 = 4\!
1rr
R
-
'F
'C
1.01 mA
_
AVc
*sv
RI
4.7 kI)
1.--VBF
'143 A
= 14.3 pA
0.7V
L_0
10
= 70 rnV
V
R1
113
70 riV
14.3pA
This gives
E
RE 8.2kt
1 fl).A
and.
ZE8.2w
l.O1nA
I
vc = Vcc.VRc=9V-L' mAx4.7kQ)
= 4.3 V
Note that, as in the case of voltage divider bias, the transistor hFE
value Is not used in the approximate circuit analysis. For accurate
ana1yss, the same approach as used for voltage divider bias must
be employed: the voltage source at the transistor base must be
replaced with its Thevenin equivalent circuit.
-9 V
Figure 5-47
Emitter current bias circuit
designed in Example 5-16.
Chapter S - BJTBiasing
155
se Problems
Design the bias circuit in Fig. 5-43 to have Va = 4 V, V = 5 V and
Ic = 1.5 mA. The supply voltage is 18 V and the transistor h f( is 70.
A bias circuit that combines voltage divider and cathode-to-bise bias
(as in Fig. 5-44) is to have Va 5 V and I . = 2 mA. Design the
circuit using V0- = 15 V.
Design an emitter current bias circuit [as in Fig. 5-46 (a)] to have V
= 6 V and I = 3 mA. The supply voltage is 10 Wand the
transistor h 1 is 120.
p + Vcc
CE
T-= 2510
'CBO
Figure 5-48
RE
I'
(c) Vp changes by
approximately -1.8 mV
with each 1C rise in
temperature
T - 50C1 /T=2sc
i_ti
1 5 6
s=
AIC
'CHO
or,
MC=SxJcBO
(5-18)
(5-19)
(5-20)
1+
1+
(5-21)
1+ hFERE/(Rj+RIIIR2)
'X2) -
157
(5-22)
The IcBO change and the circuit stability factor can be used to
determine the change in I, (Eq. 5-18). Then th' esa1ti.ng
change can be investigated.
+ hFE
+ hFE Rc/(R +
j
/+ hF+ R, 1R2)
vcc
vcc
Vcc
l+18v
-18v
..RCH8V
12 kn
33kf1
J CB, / IVJC
lic
RB
R2
.RE
27012k0Ikfl
R1
qRBRC
(a) Base Bias
Example 5-17
Calculate the stability factors for the three bias circuits shown in Fig. 5-49, if
each circuit uses a transistor with = 100. Note that these are the bias
circuits analysed in Examples 5-4, 5-6, and 5-8.
Solution
For base bias,
Eq. 5-19,
5=1 +h ff
=1 +100
= 101
For collector-to-base bias,
Eq. 5-20
1+
S=
--
1 +hFLRCI(RC+RB)
1 +100
1 + 1100 x 2.2 M/(2.2 kQ + 270 kQfl
56
For voltage divider bias,
Eq. 5-21,
1 +
5=
1 + h Ff R(I(Rf + R7 1!R2)
1 + 100
1 + [lOOxi kQ/(1 kO + 33 kQ Il l2 k0)1
= 8.2
Figure 5-49
Stability factor equations for th
three basic bias CvCU/ts.
1 5 8
Vcc
+18V
Example 5-18
Determine the I- change produced in each bias circuit reterred to in Example
5-17 hen the circuit temperature increases from 23C to 1 03 CC, and 1c( =
13 nA at 23 C C . The circuits are reproduced iii Fig. .3-50.
fl
Mc
86pA
Solution
AT = 105C - 25CC
= 80cC
or,
LsT in I 0C steps =
Eq. 3-22.
80'C
I/cc
10C
=8
+18v
X 2
'CHL1) =
15 nAx25
= 3.84 pA
- 1( .
= /(
= 3.84 pA - 13 nA
3.83 pA
For base bias.
Eq. 5-18,
101 x 3.83 pA
= S x N,
3 86 pA
p VCC
56x 3.83 PA
R 1
214 pA
33k0
Rc
1.2 Id
IAlc
For '.o/ae divider bias,
AI = S .x N1 -
Eq. 3-18,
= 31.4 pA
8.2 3,83 pA
V0 -
'C
(5-23)
R2
12k0
RE
Chapter 5RfTBjasjng
159
Rj
Rc
68kc
3.9kE
Vcc
vcc
+t2 V
+12V
Rj
68k0
JE
v87
IE
M,
^R
IF
R2
RE ,VEr5V
56 kE1
47kf)
l2kf'
-J
RE
LU.._ RE
Figure 5-51
VE
1.2kE
"CC/1O
Example 5-19
Determine the I change produced in each of the two circuits in Fig. 5-51 by
the effect of VBE changes over a temperature range of 25C to 125C:.
Solution
AT = 125C - 25C
100C
AV, = Tx 0.8 mVPC) = 100C x 1.0 mV
= 180 mV
For Fig. 5-51 (a),
V8
= .- =
180 mV
4.7 kO
= 38/iA
For Fig. 5-51 t'b,
180 mV
IV8
JE =
=
R
= l5OpA
1.2k0
1 6 0
Diode Compensation
R 1
RC
+ V01
VR2 +
VDI -
and.
(5-24)
133
RE
R 2
RE
V02
E
Figure 5-52
A diode can he used to
compensate for V rhange in a
voltage divider hio crcut.
Practise Problems
3-9.1
5-92
'cc
Calculate the stability factor for the bias circuits degned in Practise
Problems 5-7.1 -7.2, and 5-7.3.
The circuit temperature of each of the bias circuits in Practise Problem
5-9.1 increases from 25C to 1 25 C C. Calculate the collector current
Ch,-,;-.g,? n each circuit if the transistor /- = 10 nA at 23CC.
Ic
(1R)
Vcc
Vcc
by
IcRc
RC
I kIt
IC
+'
Qi
>VCE=O
Chapter 5BiTBiasing
161
and,
(525)
c Vicc
=Vcc(IcRd"O
VCE
saturation
(mA)7/
Figure 5-54
DC load line for a transistor
switching circuit. When ON, the
transistor is operating in the
saturation region. When OFF, it is
in the cutoff region.
active
10B
4
:
cutoff
- - -.
rcg!ofl
10(V)
VCE
At this point the transistor is said to be cut off. The region of the
characteristics below 'B= 0 Is termed the cutoff region. When I is at
Its maximum level, the transistor Is said to be saturated, and the
collector-emitter voltage Is the saturation voltage (VCE(Sat).
VCE VCE(saV
RB
(5-26)
1 6 2
'c
depends upon
'B
IC = hFE X 'B
The collector current can he (1etlrInine( from Eq. 5-25 (which
assumes that VC(sat) = 0), and the base current can be calculated
from Eq. 5-26. Then, the minimum required current gain for the
transistor is,
I
(5-27)
Vcc
'B
RC
Ic
VCBO.5V
VBF
k-
VCE
rO.2V
r07V
Figure 5-55
When a transistor is in saturation,
the (TB junction is forward biased.
Example 5-20
Calculate the minimum he for the transistor in the circuit in Fig. 5-56 when cc
= b y, R = I kO, R 5 = 6.8 kU and V5 = S V. Also, determine the transistor
level when h 11 = 10.
V.1c
Solution
calculation
I/cc
by
10%
= lOmA
Eq. 5-26,
V -v BE =
= 5
5V-0.7V
6.81<0
= 632 p
Eq. 5-27,
h103
=
= 15.8
- lOrnA
632 pA
Vs
Figure 5-56
Direct-coupled switching circuit
for Example 5-20.
Chapter 5 -
BiT
Biasing
163
I =hFf1B=lOx632PA
= 6.32 mA
Va
The base bias circuit In Fig. 5-57 is similar to circuits of that type
that have already been considered, with the exception that the
transistor Is biased into saturation. Although too unpredictable
for biasing amplifier circuits, base bias Is quite satisfactory for
switching circuits. The transistor in Fig. 5-57 is in a normally-on
(pulse waveform)
state with VCE = VcE(sw;. The capacitor-coupled
V
giving
off,
Input turns the device
The transistor base current Is,
Vcc
RB
56 kO
15 V
Rc
5.3 kn
ci
Vs
QI
VCE
'1-..
(5-28)
'BR
The collector current can be determined From Eq. 5-25, and then
the minimum required hFE value can be calculated from Eq. 5-27.
Figure 5-57
Capacitor-coupled switching
circuit with the transistor biased
ON into saturation.
Example 5-21
Vcc -- 15V
= 4.55 mA
Vcc
Vcc - V
ISE - 15 \'-O.7 V
Eq. 5-28,
113
R8 56k0
= 255 p
Eq. 5-27,
Ic 4.55
hFE, = -=
1E,
= 17.8
mA
Vs
1 6 4
5 pA
ICRO / +
V
1+1 K
10E
VCC
-
VR
4
Figure 5-59
A voltage drop is p rcdu ed across
R 8 by the (olle(or-ha3e leakage
Current
=2OkQ
Example 5-22
The circuit in Fig. 5-60 uses V,-- = 12 V, the collector current is to be
approximately 1.5 mA, and V, = +5V. Determine suitable resistances for R8
and R.
Solution
From Eq. 5-25,
Vcc
12V
Ic
1.5 mA
Vcc
2V
Rc
1.5 mA
hfE( ,, fl)
Re
10
Vs
= l5OpA
From Eq. 5-26,
R8
V5- V8
=
'B
5V-0.7V
l5OpA
Figure 5-60
Direct-coupled switching circuit
for Example 5-22.
165
Example 5-23
Determine suitable resistor values for the capacitor-coupled switching circuit
in Fig. 5-61.
Vcc
Solution
9V
- 9V
Ic 2 m
= 4.5 kO (use 47 kO standard value)
Ic
From Eq. 5-27,
IC
rn\
2 rlv\
'B = _____ =
hFL(m, )
I's
10
= 200pA
From Eq. 5-28,
VcC
9V0.\
VBE
Ra =
'B
2pA
= 41.5 kQ (Use 39 Ml
raclise Problems
Section 5-2
5-3 Sketch a base bias circuit, (a) using an nprt transistor. (b)
using a pop transistor. In each case show the polarity of
V, V8 , and Vcr. Also, show the direction of Ic and I5-4 Explain the operation of the base bias circuits drawn for
Question 5-3, and write equations for 'B' and Vc.
Figure 5-61
o
Capacitor- coup/ed
Circuit or Earnp!e 3-23
1 6 6
Section 5-3
Section 5-4
Sec/ion 5-5
Section 5-6
Section 5-7
5-17 Write the equations for calculating RB and RC for a base bias
circuit.
5-18 Write equations for calculating R and Rfor a collector-tobase bias circuit.
5-19 For a voltage divider bias circuit, write equations for
calculating RE and Rc, and the voltage divider resistors.
167
Section 5-8
5-20 Sketch a base bias circuit that uses an emitter resistor with
an npn transistor. Briefly discuss the circuit operation.
5-21 Sketch an npn transistor bias circuit that uses a
combination of voltage divider bias and collector-to-base
bias. Show all voltage polarities and current directions, and
explain the circuit operation.
5-22 Repeat question 5-21 for a circuit that uses a pnp
transistor.
5-23 Sketch an emitter current bias circuit using a plus and
minus supply. Explain the circuit operation and compare it
to voltage divider bias.
Section 5-9
Chapter-5 Problems
Rc
Section 5-1
Plot the dc load line for the transistor circuit in Fig. 5-62 on
the output characteristics shown In Fig. 5-63. (a) With Vcc
l5Vand R' 7.5k0,(b)with V(X 12V and R=8kf.
Specify the Q-point In each case If 'B 20 MA.
5-2 A circuit wiu'
configuration and characteristics in
10 PA.
5-62 and 5-63 has V = lu v, ' - -
load
line,
and
specify
the
circuit
Q-point.
dc
Draw the
5-3 Determine the maximum symmetrical output voltage swing
for each of the two circuits In Problem 5-1.
5-I
+Ri Ic
Figure 5-62
Ci,cuit for Problem 5-1.
1 6 8
-.
2.0
LS
1.6
1.4
ii
1.0
Figure 5-63
Transistor characteristics
Problem 5-1.
IC
0.4
0.2
0
0
10
12
14
16
18
20(\')
Ti
["CC
;RJkO
R2
Rz
4.7 kD
Figure 5-64
for
Chapter 5
BJT Biasing
169
Section 5-3
VCC
RC
^f
CE
Figure 5-65
Circuit for Problem 5-11.
Section 5-4
5-15 The voltage divider bias circuit in Fig. 5-66, has VCC = 15 V.
h =
R, = 6.8 Id), R2 = 3.3 Id), R3 = 900 0, R. = 900 ft and
50. Analyze the circuit approximately to determine the levels
of Ic and V.
5-16 Precisely analyze the circuit in Problem 5-15 to determine
the maximum and minimum levels of I and V when
= 60 and hF.ThJ = 20.
5-17
gR1Vcc
Section 5-5
Section 5-6
effect
Figure 5-66
Circuit for Problem 5-15.
1 7 0
Section 5-7
5-25 A base bias circuit with V- = 18 V uses a transistor with
the characteristics in Fig. 5-63. The circuit is to have V
V and i = 2 mA. Plot the Q-point, draw the dc load line, and
determine the required resistance for R.
5-26 A base bias circuit with a 12 V supply uses a transistor With
hFE = 70. Design the circuit to have I = 2 mA and V = 9 V.
5-27 Analyze the circuit designed for Problem 5-26 to determine
the maximum and inininium levels of V,, when the
= 30 and !tpE(u = 200.
transistor type used has
5-28 A base bias circuit has \' = 20 V, R C = 6.8 kO, and the
transistor h ,E = 120. Calculate the required base resistance
value to give VCE =
5-29 Design a collector-to-base bias circuit to have I. =
and V = 12 V. The supply voltage is V. = 20 V. and the
transistor h, = 80.
5-30 Analyze the circuit designed for Problem 5-29 to determine
the maximum and minimum levels of V when the
transistor type used has l iIEj rn S) = 20 and 1FE(no = 100.
5-31 A collector-to-base bias circuit is to have i. = 3 mA and YCE
= 10 V. The supply voltage is Vcc = 25 V. and the transistor
hrE = 80. Calculate suitable resistor values.
5-32 A collector-to-base bias circuit has V cc = 30 V. R = 8.2 kft
ann the transistor hn. = 100. Calculate the required base
resistance value to give "CE = 7 V.
5-33 Design a voltage divider bias circuit to have V ex = 10 V and
Ic = 1 mA. The supply is V. = 30 V.
5-34 Precisely analyze the circuit designed for Problem 5-33 to
determine the maximum and minimum levels of VCE when
the transistor type used has
= 40 and 'm = 80.
l'CC
VCF
B
JE
J VEE
Section 5-8
5-39 Design an emitter current bias circuit (as in Fig. 5-67) to Figure 5-67
Emitter current bias Circuit for
have
= 6 V and
= 10 ritA. The supply is
= 18 V Problem 5-9.
and the transistor has h,. = 100.
171
Chapter 5 BJTBiasin
p CC
..:5 V
Ri
IC
R1
, 3 mA
+
Section 5-9
5-44 Determine the stabilit y factors for the circ' it n Problems 57, 5-11, and 5-15.
5-45 Calculate the I changes produced in each of the circuits
referred to in Problem 5-44 when the circuit temperature
changes from 25C to 75C. The transistor collector base
leakage current is specified as 25 nA at 25C.
5-46 The voltage divider bias circuit in Problems 5-33 and 5-34 is
to have a maximum I change of 15 .iA clue to change in 'Cfl'.)
when the circuit temperature increases from 25C to 35C.
Determine the maximum acceptable level of [cj3O for the
transistor at 25C.
circuits designed in
5-47 Determine the I change produced ill
Problems 5-33. 5-35, and 5-39 by the effect of transistor V
changes over a temperature range of 25C to 75C.
5-48 A voltage divider bias circuit is to have a madn3utn 1 change
of 50 j.iA due to change in V0s when the circuit temperature
increases from 25C to 75C. Determine the minimum
acceptable emitter resistance value.
ftc
I,
R'
VE
Figure 5-68
G , ( oft for Problem 5-12
VCT
RH
IOkQ
Figure 5-69
Coot for Probkm 5-49.
Section 5-10
RBRcVcc
VS
g
Figure 5-70
1 7 2
F-0
Rc
IC
PIS
RB
Figure 5-71
Circuit for Problem 5-53.
VCC
15V
Chapter 6
AC Analysis of
Bey"T Circuits
Chapter Contents
Introduction
6-1 Coupling and Bypassing Capacitors 174
6-2 ACLoadLines 177
6-3 Transistor Models and Parameters 179
6-4 Common-Emitter Circuit ATUthJSIS 185
6-5 CE Circuit with Unbypassed Emitter Resistor 189
6-6 Common-CoUeCtOr Circuit AnalysIs 192
Us
6-7 Common-a se Circuit ..nalysis 196
6-8 Comparison of CE, CC, and CB Circuits 201
r5
Review QUESnOT1S 204
Problems 207
Practise Problem Answers 210
Us
RL
173
1 7 4
introduction
A transistor circuit used as an ac amplifier normally has the signal
source capacitor-coupled to the circuit Input terminai.A load
resistor at the output Is also AsLmP,i capacitor-coupled to the
circLIIt. capacitor-coupling ensures that the source and load do
not affect the dc bias conditions in the circuit. An ac load line can
be drawn on the transistor output characteristics Ic study the ac
performance of a circuit. All transistor circuits, however
complicated,are based on one of the three l:,asie c-actrts
firadoris common-emitter, common-collector, or c-orinioabase. The three basic circuits have different input impedances,
Out p ut impedances, and voltage gains, and these are most casfly
cletenninecl b y the use of h-parameters. Multistage transistor
c i rcuit can also be analyzed by application of h-parameters.
6'-!
Corpiiig Capacitors
RI+fr
instead of,
CCx R2
FI*j
R21
0 VCC
+!2 V
vs-C
+j2V
Rc
RI
33 kQ
rn7
ceps-Ci tor
s-C,
C,
3303
2.7 kcs
I' S
frAl
us
27 03
ii_'[- J -
capacitor-coupled
to the Circuit
Figure 6-1
AC input signals must be
capacitor-coupled to the input
terminal of a transistor circuit.
Direct coupling would alter the
circuit hiss conditions.
175
R7
rr'
.R1
1 'cc x R
= RC+RL
=RCIIRL
vcc
33 k11
R,
Figure 6-2
I %kn
(b) the collector voltage
(a) Load resistor
is altered by the
incorrectly directdirect-coupled load
coupled to the circuit
Example 6-1
Calculate the base bias voltage for the circuit in Fig. 6-1(c) when no signal
source is present and when the signal source is directly connected as in Fig.
6-1(a).
'-
1 7 6
4th ed.
'yl
So lii iion
With no signal source,
- V C( x R,
B - R 1 +R
12 V x 1 LO --
(-I
33k0--15L0
= 3.75 V
ccnioird,
'cc x (r(R2) -
+ (r(R2) -
12 Vx
(600 Q(15
kO)
C'--
= 0.21 V
AC Degeneration
In the discussion on collector-to-base bias, it was explained that
111 In would produce a decrease in VCE, and this would
tend to cancel the original increase in I. This, of course, is an
effect that produces good bias stability, however, this same
reaction occurs when an ac signal is applied to the c i rcuit input
for amplification. The voltage change at the transistor collector
(produced by the ac input) is fed back to the base where it tends to
partially cancel the signal. The effect is termed ac degeneration, and
it can result in a very low voltage gain.
Figure 6-3(a) shows how ac degeneration is eliminated in
collector-to- base bias circuits. RB is replaced with two
approximately e q ual resistors (R 3 and Rm), which add up to RB. A
bypass capacitor (Ce) is connected from the junction of R 1 and R2
to the ground terminal, as illustrated. Capacitor GB offers a shortcircuit to ac signals, so that there is no feedback from the
transistor collector to the base. Figure 6-3(b) shows that, when C13
ts replaced with a short-circuit, R81 and R 2 appear in parallel with
the circuit input and output respectively. Because they are largevalue resistors, they do not affect the circuit voltage gain.
an increase
Emitter Bypassing
Voltage divider bias circuits also suffer ac degeneration because of
the presence of the emitter resistor (Rfl). In this case, the ac signal
voltage is developed across RE and the transistor BE junction in
series, Instead of just across the BE junction alone. The problem is
eliminated by the emitter bypass capacitor (F) illustrated in Fig. 64. which provides an ac short-circuit across RE.
Capacitor poi., y
Bypass capacitors are usually polarized (electrolytic-type), and
coupling capacitors can also be polarized, so it is very important
that capacitors are correctly connected. As discussed In Section 33, incorrectly connected polarized capacitors can explode! Also,
electrolytic capacitors tend to have a high leakage current when
Incorrectly connected, so even If they do not explode, they can
affect circuit bias conditions. The positive terminal must be
connected to the more positive of the two circuit points where the
'aj)acItor Is Installed.
R52
degeneration.
1II
R,
R
RE'+
c.
Figure 6-4
ii Oh
A resistor corner cO -
. he
the a liuiO cr emitter
hort-urci ad h .van , of a
ertqj
bypass capactc r
maximum ampli .ito-'.
AC Equivalent Circuits
Capacitors behave as short-circuits to ac signil. i) 10 the CZC
equivalent circuit for a transistor circuit all cap3cltors must be
replaced with short-circuits. Power supplies also behave as ac
short-circuits, because the dc supply voltage is not aficeted b y uc
signals. Also, all power supplies have large-value capacitors at the
output terminals, and these will oiler short-circuits to ac signals.
Substituting short-circuits in place of the power supply and all
capacitors in the circuit in Fig. 6-6(a) gives the ac equivalent
circuit in Fig. 6-6(b). If R, is present, as shown, it appears in
parallel with R in the ac equivalent circuit.
P.
IR
J-\
C1
'+ 1:
I'.
R
Figure 6-5
Polarized capacitor must be
rnrre( I ly connected to avoid
high leakage iurrert and the
posiihility of rapdditrr exptoeon.
Vs
R.
RE
r5
Figure 6-6
Voltage divider bias circuit with
coupling and bypass capacitors,
and the ac equivalent circuit
1 7 8
R (dr )
= P R1 2.2 kO 2.7 kG
=4.9kG
18k12
Solution
dc load line,
WhenJ
in
0, Vc 1
C,
V - I (- '* RE)
Vcc2O
/<
When = 0 J =
R2
=6.3V -
Ci
Figure 6-7
R2
82
20V
= 4.03 riA
VccX
2O\,
2.2k0'
20Vx8,2Q
I /9
V E = V -
6.3 V -0.7 V
=5.6V
V
I =
I
=
R E
(rnA)
J860iA
5.6V
2.7k0
ac load line
18 = 50 VA
= 30 VA
2.07 utA
3.
I,
IC
ac load line,
when there is no external RL,
R 1() = R = 2.2 kO
= 2.07 ITJA,
When I changec
18
810jVci!&
-
VCE
cxRc
vCE
2.2 kQ
=
4.55 V
lo ad
circuit is dra^vn ^hrough
point.
maximum symmetrical
in SecuOfl 5-1 it is explained that the
output voltage swing from a common-emitter circuit
oepcnds upon the Q . point position on the dc load line. In the case
of a circuit with a bypassed emitter resistor or a capacitor-coupled
load. tho niaxitilum simetncal output swing depends upon the
position on the ac load line. For the ac load line shown In
Q- p o in t
Fig. 6-10,
4.5 V
V0r
iise
Problems
16-2.1 Draw the new ac load line for the transistor circuit in Ex. 6-2,when a
5.6 k() external load is capacitor-coupled to the circuit output
Also determine the new maximum possible symmetrical output
voltage sming.
20(V)
'\
-c
the Q-
1 8 0
input
output
Be
input
r-Parametej's
output
r
Rekrrirg to Fig. 6-9, r represents the cc resistance of the forwardbiased BE junction, so it has a low resistance value, (t ypically 25
,Q). The resistance of the reversr.h r ased CB Junct i on (re) is high,
(typically 100 k.c2 to 1 MQ). The base region resistance (r1,) depends
upon the doping density of the base ciaterirl. Usuall y , rb ranges
from 100 t I) 300 Li.
is the cap.ritance of a forward-biasnd pn-junction,and C.
is that of a reversc-biased junction (see Section 2-6). At niedhim
and low frequencias the junction capacitntccs ma y be neglected.
Instead of the cut-rent generator (ct 1) iii parallel with r, a voltage
generator (oIr ) may be used in series with . Two transistor r
parameter itiocThls are shown in Fi g. 6-10.
l) ete,n:int j on of
1'e
Because r is, the nC resistance of the BJT forward-biased baseemitter junction, i t can be determined from a plot of versus
'E
As illustrated in Fig. 6-11.
re
rn---
E
(6-I)
(6-2)
_.L______ DB
E c_Aj
input
r5
B_
(h)
Fig
5raVT+ 273Ci
t------J
Output
iflpJ'
ci, r
26 mV
r'e=
a!,
rh
'e
aI
C S ,
(6-3)
181
if-Parameters
Ii has been shown that transistor circuits can be represented by
an r-pararnetcr or T-equivalent circuit. In circuits involving more
rhcn a single transistor, analysis by rpararneters can be virtually
impossible. The hybrid parameters, or h-parameters are much more
convenient for circuit analysis. These are used only for ac circuit
analy sis, although dc current gain factors are also expressed as Itparameters. Transistor h-parameter models sim lfy transistor
circuit analvsi3 by separating the input and output stages of a
circuit to he analyzed.
In Fig. 6-12 a common-emitter h-parorneterequWa1entcircui is
compared with a common-emitter r-parameter circuit. In each casc
an external collector resistor (Rd is included, as well as a signal
source voltage (os ) and source resistance (r5). Note that the output
current generator in the r-parameter circuit has a value of aIr,
which equals PIb.
The input to the h-parameter circuit is represented as an input
resistance (h) in series with a voltage source Looking at
the rparameter circuit, It Is seen that a change in output current
causes a voltage variation across re . This means that a voltage is
f'd back from the output to the input, in the h-parameter circul
,,!its feedback voltage is represented as the portion k, of thc
output voltae e. The parameter h is appropriately termed the
reix?rsa lagc transfer ratio.
OW
10-I8
re
16
Jr
4.
IE
2
BE
a L = Pit
B
( --
Rc3
-
() CE F--parameter equivalent Circuit
Jc
..-_-______
lt
[
1 ) 1/
tj
(b) CE h-parameter equivalent circuit
r, Equivalent Circuit
An approximate h-parameter model for a transistor CE circuit is
shown In Fig. 6-13(a). In this case, the feedback generator [hv, In
Fig. 6-120))] is omitted. The effect of hreVce is normally so small that
It can be neglected for most practical purposes.
Figu,e 6-12
1 8 2
11
Is
C
B o
Figure 6-13
-
E1i
(a) CF h
_____
'
11"
This is usually
stated
as.
hi,
b
lvCF
(6-4)
-J
co
VCE
The forward current transfer ratio hie can similarly be defiricd isi
terms of ac quantities, or as the ratio of dc current changes. In
both cases, the output voltage (V) must be held constant.
j)
U
0.4 0.5 0.6 0.7 CV)
VBE-Figure 6-14
Derivation of
from the CE
irput characteristics.
183
cr,
i;
Vc4.5V (mA)
VC,
'T"
Aic
h fe =
(6-C)
1 VCE
Ic
AIR
I
h oe =
cv,
(uA) 0 40 20
- 'B
Mc
h=
(6-9)
Vee I 'B
Fig,e 6-15
Der vation of h ie from t.:' CE
cur. ent gain characteristics.
(6-10)
4VcF
'B
ample 6-3
[) .rmine h, an.J he,. for V = 4.5 V and i = 40 iA from the transistor
c ia!acteristp cs in Figs. 6-1 .' and 6-16.
Solution
Trorn the current gain (haractcri.cticS, at l'
i=
4.5 Va , J = 40p,
rl
tf 4 mA and Al3 30 p
S
ft. 6-3,
h.. =
4 r iA
= --
AL .
A1
30p.r-\
3
V =
'
-4
= 133
'm tbc c' i'x.'t ch :raceri' irc, p t
14OA
I-----'---
-if
JB 20 AA
'C
0.2 mA
AJ,
h, = ----- =
AV,
6V
VcE_4cV
Figure 6-16
De,iation of h, f-m ti C
33.3 p5
= 30 kI)
Comm on-Base
c jtout characteristics.
1 8 4
Parameters Relationships
Device manufacturers do riot list the values of all parameters on
transistor data sheets. Usually, only tire CE h-parameters are
stated. However, CB and CC h-parameters can be determined from
the CE h-parameters. r-paranicters can also be calculated from the
CE h-parameters. Table 6-1 shows the parameter relationships.
rTable 6-1
CE to CB
h-parameters
7h
h0 ,
h
_------
CE li-parameters
to r- parameters
1 -1
h = 1
B and CC
r
h ill
, h = h r
__...----
r
- hi +H)
r,
= h, -
----f
Example 6-4
Calculate hr, hOh , and a from the paramet.rs determined in Example 6-3.
Solution
from Table 6-1, h = 1 + hie = 1 + 133
= 134
h
ho
33.3pS
1+hie 1+133
= 249 mS
h
133
a 1 + hie
1 + 133
= 0.993
Chapter 6
AC Analysis of BIT
Circuits
185
Example 6-5
A transistor in a circuit has its current levels measured as; J = 20 pA, and I
= 1 mA. Estimate the CE input resistance. Also, determine r, and P.
Solution
26 mV 26 mV
Eq. 6-2,
IE 1 r
= 260
1 mA
life
1, 20pA
= 50
h ,e =
r = h e = 1.33 kO
/3 = h = 50
Figure 6-17
Transistor common-emitter
amplifier with coupling and
bypass cipacitors.
cuse rroviems
Determine h and h at V = 6 V and I = 20 pA from the
common-emitter output and current gain characteristics in Fig. 4-30.
PS -
r,
\:i
VBE
vc
Figure 6-13
1 8 6
-;-I1 ',
v1 =
VS)
vKVR,j
VrXRi
VCRL1
oItage
Figure 6-19
Circuit input and output soitaes
are divided by the effects of Z. and
zo.
jRiRL
Figure 6-20
A common-emitter h-pararneer
:rrsistor ,h-parreter
e1rr.uierlt crcUit
Cii-
[2R,R2
lb
Input Impedance
The Input section of the h-parameter circuit in Fig. 6-20(b)
reproduced in Fig. 6-21 shows that the Input Impedance at the
transistor terminals is,
b-
1e
(8-11)
Chapter 6 AC Analysis of BIT Circuits
IS
A typical value of h for a low-current transistor is 1.5 kf). If
not known, it can be estimated by first calculating r'e from Eq. 6-2
or Eq. 6-3, as appropriate. Then r = hth , and hie ( 1 + hj)hth.
Zb is the input impedance at the device base terminal. At the
circuit input terminals, resistors R 1 and R 2 are seen to be in
parallel with Zb. So, the circuit input Impedance is,
Z1
187
B
R1 R2
Zb E'
(6-12)
R I IIR2 II4
Figure 6-21
The transistor input impedance in
Out lit I,,: idance
a CE circuit is Lb and the circuit
rig into' the output of the CE hparameter circuit reproduced input impedance is ZbIIRIIJR,.
1 / h (6-13)
is in parallel with Z.
Rc
(6-14)
Z0 = RIK1/h) ,_-
Figure 6-22
The output impedance for a CE
circuit is RdR1Ih
Voltage Gain
ThTci.ut vcltage gain h; given by the equation,
V
A0 = -
VI
= 'b
so,
(RJIR1JI1/h00),
- 1c (RIRJ!1/h0)
.10
cJo
= 'c (RRi
(6-15)
The minus sign In Eq. 6-15 indicates that v Is iSO out of ph .tse
with v1 . (When v1 increases, v0 decreases, and vice versa.) Knov;ing
the appropriate h-parameters as well as R c and RL, the voltage ia1n
of a CE circuit can be quickly estimated. Using values of R, = 4.7
kU je70' hie = 1.5kU, and assumIng that R>>R0 , atyplcrCE
voltage gain Is -220.
Figure 6-23
Derivation of equations for v, ant
V0 in a CE circuit.
1 8 8
)urrent Gain
The transistor current gain is.
fe
li
IC
(617)
This is the device current gain. not the circuit current gain.
Examination of the circuit In Fig. 6-20 shows that the signal
current ('s) is divided between h and the bias resistors [R0
( RcI R1)] . Also, that the output current from the transistor collector
(I) is divided between Rc and R1 . The overall circuit current gain
can be shown to be.
hfeRCRB
(6-18)
+ hie)
( R +
of
t,aiisLs(or
Power Gain
The power gain of an amplifier can be shown to he,
A=kxA
(6-19)
Z0
Z = RRZb
Z0
A=
R. H( l / h ) R c -
lRIIR
(RcIIR
hjb
18
i?pie 6-6 The transistor parameters in the CE circuit in Fig. 6-24 are h ie = 2.1 kQ, h ie =
75, and h = 1 pS. Calculate the circuit input impedance, output
impedance, and voltage gain. This circuit is designed in Example 5-14.
Solution
From
R,
3
.9
68 k^3
68 1<01156 k0112.1 kQ
R1
US
Eq. 6-14,
82 k
T R2
kOjI(1/1 pS)
R,
'-56kO
3.9k0
rS
47k<
Eq. 6 - 15,
h ie
2.1 kO
Figure 6-24
= - 133
Example 6-7
A CE circuit (as in Fig. 6-24) has 'c = 1.5 mA, R = 4.7 kO, and
Estimate the value of r'e, and calculate the circuit voltage gain.
Solution
Eq. 6-2,
R=
561<0.
26 mV 26 my
r'e
1.5 mA
=IC
= 17.30
-(4.7 1<01136 kQ
-(RJIR )
Fcj. 6-16,
=
=
1 7.3C
-250
cfise Problems
1
Calculate Z1, Z, and A for a CE circuit (as in Fig. 6-24) with the
5.6 1<0, R = 2.7
faflowing quantities R1 18 1<0, R. = 8.2 k0, R
167pS.
ioo,h
kO, R , 68kQ, hi , = 1 k0,h
6-
CLE
Circuit with
When
is
1 9 0
c.
ci'
R1
J
ci
Figure 6-25
R2
(a) Circuit
r5
)^7R
'
CE
R,
I,
IL
4-
Figure 6-26
R1
L >
h.t
Z,
'Z.
K
<
Re
r.
Input Impedance
+ h)1
Li_1bLle+1E(1+11e)1
= I5 [ h, + R E ( '
so,
Zb=---
or,
Zb h ie +RE( l+hfe)
(6-20)
RIUR2IIZb
Voltage Gain
From the derivation of the input impedance equation,
and,
= 'b11e R( l
V0 = -I(RR1)
so,
V(
hfc)]
v-I(RdIR1)
( 'b1 1 ie RE( l + h)J
'hfe(RCHRL)
giving,
hie +
Usually,
RE( '
(6-21)
lije)
RE" + hf j >> /i
(6-22)
so,
'E,
lie(Rcf Ri) A ,=
11ie+R5(1fe)
(RcIR1)
RE
191
1 9 2
Lva/nple 6-8
I he ( E cit uit in Fig. 6-27 is the same as in Fig. 6-24, but with bypass
.ipaCtor C omitted. The trarisktor parameters are h ,e = 2.1 kO, h =
= I pS, (as in Example 6-6. CaLulate [lie circuit input and output
liroc uaflcs' and oltage gain.
Solutionii
FAn H. 6-20,
(C
Rc
R,
7, h
RU + h. - 2.1
391,0
t5i.fl
359 LU
From Eq. 6 12,
/ = R . IIRII/, - 68 LU 56 k011359 M
= 28.3 LU
7, , "R
Ei6-2l
R..
55k0
3.9k0
[
h, s- R5 U
R(.:
S2kC1'
'i
-5 x (.3.9 kO 82 kO
2.1 LU + 4.7 LOU 4- 751
Figure 6-27
- -0.78
Practise Problems
Calculate /, /,. and A fora CE Cir uitwith an uribypassed emitter
6-3.1
resistor (as in Fig. 6-27) with the following component values and
parameters R 1 = 13 LU, R = 8.2 LU, Rc = 5.6 kO, R = 2.7 kO, R5
= 68 LU, h, 1 LU, h. = 100, h = 1.66pS.
-
6-6 Comm
Common-Collector Circuit
In the common collector (CC) circuit shown in Fig. 6-28 the external
load ( R1 3 is capacitor- coupled :o the transistor emitter terminal.
The circuit uses voltage divider bias to derive the transistor base
voltage (V0) front supply. The transistor collector terminal is
directly connected to Vcc: no collector resistor is used. The circuit
output voltage is developed accoss the emitter resistor (Re), and
there is no bypass capacitor.J
To understand the operation UI a c.c circuit, note that V0 is a
constant quantity, and that V = V0 - VI}E. When a signal is
applied via C 1 to the transistor base, VB increases and decreases as
the signal goes positive and negative. If the signal voltage (us)
increases to +0.5 V. V0 is Increased by 0.5 V. Also, VE Increases by
0.5 V. because Vmr remains substantially constant, and VE = V0 RE The change in VIF is coupled via C2 to give an ac output
voltage ( v = 0.5 V), (see the waveforms in Fig. 6-29). Similarly,
when V, to -0.5 V, both V0 and VE decrease by 0.5 V,
giving v -0.5 V.
It is seen that the ac output voltage from a CC circuit is
essentially the same as the input voltage; there is no voltage gain
or phase shift. Thus, the CC circuit can be said to have a voltage
, CC
R
CI
C,
RE
R>
Figure 6-28
Transistor common-collector
amplifier circuit, also called an
emitter follower.
193
irmu-
vu
V,
JT\j +
ac _tut
El,
Figure 6-29
Voltage 'a-forrniin a Commoncouirclor amplifier Circuit.
Rr
lb
FL'nr'
-3P
Curqnui,n-coiir, tor amplifier ac
equ:alent circuit and hparameter cirut
trrntscr h-parreer
1a1nt Cirut
h.(
4HhU4
RUR
'b
Input Impedance
The input Impedance for the GC circuit Is determined by first
writin g an equation for th' Input voltage. Referring to Fig. 6-30
and Fig. 6-31,
Vi = 'b
lb
U.'
_-
Zc>
hr
LL>
1+
h, Ie(RlIRi)
= Ib h+ hfjJREIRL)
= Ib l ht + h(RlRjJ
ht
Figure 6-31
Input impedance determination
for a CC circuit.
194
and,
V.
Zb
Ib
or,
Z h+ h(RIR1)
(6-23)
R, R
Output Impedance
As already discussed, the ac voltage at the output of a CC circuit is
all fed back to the input. This fact is used in determining the
output impedance (Z0) at the emitter terminal. The signal voltage is
assumed to he zero, and v0 is used to calculate J, With u = 0. ! is
produced by the fed back voltage (h v0 = v). [see Fi g . 6-32(a)l.
(a)
c
lb determination with v = 0
E
I T TJ
R.
+ (R1[Rr)
and,
It
I =h.I
r b
1'
1i + (R1l[Rlr)
vl h+ (R1[IRlr)j
Z' =
1e
Lsj
h ic
(6-24)
hc
6-25)
Voltage Gain
As already explained, the ac output voltage from a CC circuit is
Figure 6-32
Determination
of
output
impedance for a CC circuit.
VL
and
V0
= l (REIIR!)
so
A0
( REJJ
V
=
(6-26)
Because T, h b, Eq. 6-26 can be used in situations where the
device parameters are unknown. Usualiy, RRL is so much larger
than hth that the CC circuit voltage gain is simply taken as,
(6-27)
Zb = 1i+ lt.(R()
Z RIl Z RlZb
h
1-.
A0 =
(R1IIR21r.j
(RERI)
+ ( REI(RL)
Example 6-9
The transistor parameters for the CC circuit in Fig. 6-33 aie h i e = 2.1 kO and
not
hfe = 75. (a) Calculate the circuit input and output impedance with RL
connected.
connected. (b) Calculate Z, and A with RL
Solution
(a) RL not connected
From Table 6-1, h,, h = 2.1 kO
and,
Eq. 6-23,
hfC=l
hfe
Z. = '.,+ hk(REIIRL)
= 359.3 kO
195
196
Eq. 6-12,
Z = R 7 )RZ 5
= 10 !<0I10 k01p359.3 kO
= 4.93 kO
= h + tR 1 HRFIr.)
Eq. 6-24,
-e
Eq. 6-25,
Z0 =
= 2.1
= 38.6 0'
ZR,
= 38.6 014.7 LU
= 38.3 0
(b) RL connected
Eq. 6-23,
Eq. 6-12,
7 =
10
Mill
1.1
h...
R1
0 kO
C
k0112 58.8 LU
lot,
kG
75
= 27.6 0
Eq. 6-26,
RR.
(4.7 LQi 1 k0
27.60 (4,7 L0i2 L0
= 0.9)
Practise Problems
1
Calculate Z, and Z0 , for a CC circuit (as in Fig. 6-33) with the
6-6.1
following component values and p.rameters: R1 = 56 kO, R2 = 39
kQ , Rt, 5.6L0, Rt '= 22kQ,r = 4000, % , G,u 'lOO.
___
6-7
Common-Base
'C
Circuit A mmnI',;
Fi ,t,'urt' 6-33
CC irlult fIr Example 6-9,
197
r,
Figure 6-34
In a common -a.re crcu, the
i'nal is capacito-c_a ed to the
transistor emitter :e'-hnal, and
the output L tke from the
collector.
<RL
L's
L'
"C
Input Impedance
Referring to Fig. 6-36(b), the input impedance to the transistor
emitter Is simply 1i.
Ze=hib
(6-28)
= ZI)R;
(6-2)
Figure 6-35
Voltage and current waveforms
for a common-base amplifier
circuit.
Electronic Devices and Circuits, 4th ed.
1 9 8
ZC=
1/ha,
(6-30)
Z0=ZIIR
R C
R E>
Figure 6-36
Common-base amplifier,
equivalent circuit, and
parameter Circuit.
traflSiS:Or h-.rnter
ei.vait cuit
kb
Vo!to ge Gain
fle input voltage equation for the circuit in Fig. 636(b) is,
i
1, 16.
and
hI(RflRj)
V
A,=- -=
V t
I, -
h,(R1IR1)
(6-32)
ac
Chapter 6
199
(6-33)
Ze =h th +R B( i hp,(Rcl[Ri)
and.
(6-34)
hib + R1 - hJ
Comparing Eq. 6-33 to Eq. 6-28 (Ze with C 1 present), it is seen that
- NO is added to hth to giveZ without C 1 present. (Eq. 6-33).
Eq. 6-34 is similar to Eq. 6-32 (A with C 1 present), except that
Rjj(I - is again added to h, to give the CB circuit voltage gain
without C 1 , (Eq. 6-34). Typically h = 0.99 and (1 - hfl) 0.01.
L'5
RL
Rc
Rr
Figure 6-37
AC eq1f atent ciriut and hparameter circuit for a CB
amplifier dh an unhypasse'J
bas re.inr,
'11111
15
tfl.a
:_
'C
JR,
r>
= Z,IIR
( R(R)
A0 =
2 0 0
2.1 kO
+75
vcc
= 27.60
and,
hie
h tb1 +h
R,
75
C3
65 kO
1+75
0.987
Eq. 6-29,
Eq. 631,
Eq. 6-32
= h fb ( RdI RL )
hb
R2
56 M
Example 611
Calculate the input impedance and voltage gain for the
when capacitor C 1 is disconnected.
Eq. 6-29,
Eq. 6-34,
LYf
Figure 6-38
C6 circuit for Example 6-10.
Solution
= 426.8
R 5
M)
27.60
= 133
Eq. 6-33,
-1
R1
y82 kcl
201
ractise Problems
7.1 Calculate Z., Z0, and A for a CB circuit (as in Fig. 6-38) with the
following component values and parameters: R = 56 kO, R, = 39
kO, R= 5.6 kO, Rf = 3.3 kO, Rt = 47 kO, hie = 1 kO, hfe = 100.
7.2
Circuit configuration
CE
medium
CC
high
CB
low
Z.
RC
A,
high
low
RC
Phase shift
0
high
R1 + hftJ
Zb
= h,,+RE(1 + hf,)
= h,, sith C)
R5
Figure 6-39
Impedance at the transistor base
terminal.
2 0 2
Z = ZJlI?IIR2
6-3
Circuit configuration
Zb
CE
Zr
1ie
CE with
unbypassed RE
hie +
R (i
+ hl
1 'h
+R
( E R )(l
h + R II
CC
+ h)
1+/Ire
1+fl le
C6
t
1 + hi
CB with
unbypaed
life
1+
,.
li
fe
R.
h
vcc
+
withO
oirr.wit
with
ca
ciroit
Figure 6-40
Chapter 6
2 03
l+hje
R
Figure 6-41
Impedance at the transistor
collector terminal.
Re
Voltage gain
In the case of a circuit with an unbypassed emitter resistor, the ac
voltage at the emitter follows the ac input at the transistor base.
So, a CC circuit (an emitter follower) has a voltage gain of 1.
With both CE and CB circuits, the ac input (v) is developed
across the base-emitter junction, and the ac output (v) is
produced at the transistor collector terminal. (see Fig 6-42). Thus,
the magnitude of the voltage gain is the same for CB and CE
circuits with similar component values and transistor parameters.
The CE voltage gain equation can be used for the CB circuit, with
the omission of the minus sign that Indicates CE phase inversion.
Although the voltages gains are equal for similar CB and CE
circuits, the low input impedance of the CB circuit can
substantially attenuate the signal voltage, and result In a low
amplitude output. This is demonstrated in Example 6-12.
Example 6-12
A 50 mV signal with a 630 C) source resistance is applied to the circuit in Fig.
6-43. Calculate v0 for: (a) CE circuit operation with L at the transistor base,
and R bypassed. (b) CB circuit operation with v at the emitter, and the base
resistors b y passed. The transistor parameters are h e = 1.5 kO and h = 100.
Solution
(a) CE circuit
A=
1.5k0
hie
= 319
Zb = h =
Z
1 kO
=
= 970 C)
v, x Z,
r+Z1
= 30.9 my
= 1 k Q II lOO k01147 kO
50mVx9700
600Q+970C)
p VCC
.4,
Figure 6-42
CE and CB olt age gain.
2 0 4
ISV
CC
= 9.9 V
(b) CB circuit
IOOk(3
R1
hk(IlRL)
1.5 kO
hie
Ze =1
= 319
a3
hfe
= 14.850
1 = 14.81=014.85 0 115.6 kQ
= ZIR
x Z,
50 mVx 14.81 0
r5 +Z
6000+14.810
Figure 6-43
=1.2rnV
00 =AXV,319X1.2mV
383 mV
Practise Problems
6-8.1 Using the appropriate CE equations from Table 6-3, calculate Z,, Z0,
and A for a C8 circuit (as in Fig. 6-38) with the following component
values and parameters: R, = 561<0, R2 = 391<0, R = 5.6 1<0, R
3.3 kO, R1 = 47 1<0, h ie = 1 kO, h ie 100.
6-8.2 Determine v0 for the circuit in Problem 6-8.1 when a 30 mVac signal
with r5 = 400 0 is capacitor-coupled to the transistor emitter.
E
Section 6-2
kQ
Section 6-3
6-6 Sketch the T-equivalent (r-parameter) circuit for a transistor
connected In GB configuration. Identify each component of
the circuit and discuss Its origin. Also, sketch a simplified
form of the transistor low-frequency equivalent circuit.
6-7 Sketch the h-parameter quivalent circuit for a transistor
connected in CE configuration. Identify each component of
the circuit and discuss its origin.
6-8 Define tile, hf, ho, and h, and show how each parameter
may be derived from the transistor characteristics. Also,
state typical h-parameter values for a low current transistor.
6-9 Sketch an approximate ti-parameter CE transistor model
that may be used for most purposes. Briefly explain.
6-10 Draw a CE transistor hybrid-7t model. Briefly explain.
6-11 Define r 'e, and write eauations for calculating r 'e at 25C,
and at other temperatures.
Section 6-4
6-12 Briefly explain the operation of the CE circuit described in
Question 6-3.
6-13 Draw an h-parameter equivalent circuit for the CE circuit
described in Question 6-3. Identify all components.
6-14 Write equations for Z, Z0, and A. for the h parameter circuit
In Question 6-13.
6-15 Draw an h-parameter equivalent circuit for the CE circuit
described Pi Question 6-4. Identify all components.
6-16 Write equations for Z, Z0, and A. for the h-parameter circuit
in Question 6-15.
6-17 Sketch a base-biased pap transistor CE circuit. Include a
capacitor-coupled signal source an ,1 load resistor. Draw the
h-parameter equivalent circuit identifying all components.
6-18 Write equations for Z1. Z, and A. for the h-parameter circuit
in Question 6-17.
Section 6-5
6-19 Referring to the CE circuit described In Question 6-3. 'cpl.r
the effect of removing the bypass capacitor from RE.
6-20 Draw an h-parameter equivalent circuit for the CE circuit In
Question 6-19.
205
2 0 6
6-21 Write equations for Z1, Z0 . and A v for the h-parameter circuit
in Question 6-20.
6-22 Sketch a collector-to-base biased pnp transistor CE circuit
with two center-bypassed base resistors and an unbypassed
emitter resistor. Include a capacitor-coupled signal source
and load resistor. Draw the h-parameter equivalent circuit
Identifying all components.
6-23 Write equations for Z1 . Z0. and A for the It-parameter circuit
in Question 6-22.
Section 6-6
Section 6-7
Section 6-8
6-37 Compare the performance of CE. CC . and CB circuits, and
discuss typical applications of each type of circuit.
6-38 Write equations for the Impedances seen looking Into' the
base, emitter, and collector terminals of a transistor in a
circuit. Briefly explain each equation
Chapter-6 Problems
Section 6-1
Calculate V for the circuit in Fig. 6-43 when the load is
6-1
capacitor-coupled. as shown, and when the load is directly
connected to the collector terminal.
(mA
2.0
1.8
1.6
1.4
1.2
1.0
IC
Figure 6-44
0.8
0,6
0.4
0.2
0
0
10
12
14
16
18 20(V)
VCE
6-2 Determine V5 for the circuit In Fig. 6-43 when a 600,0 signal
source is capacitor-coupled to the input, and when the
signal source is directly connected.
Section 6-2
6-3 The transistor characteristics for the circuit in Fig. 6-43 are
shown in Fig. 6-44. Draw the dc and ac load l i nes fox hc
circuit when It Is operated In CE configuration with R
bypassed. Also, determine the maximum possible
symmetrical output voltage swing.
207
2 0 8
6-4 Draw the new ac load line for the circuit In Problem 6-3
when R1 is changed to 12 kft
6-5 Using the device characteristics in Fig. 6-44, draw the dc and
ac load lines for the CE circuit shown In Fig. 6-45.
6-6 The CE circuit in Fig. 6-46 uses collector-to-base bias with a
bypass capacitor. Draw the dc and ac load lines for the
circuit using the device characteristics In Fig. 6-44. The
transistor has hFE = 100.
VCC
)5V
R,R
t8k0
nC,
RL
1.8 kfl
R2
Section 6-3
8.2LQ
hl
T22kT
Figure 6-45
75
100
(pA)
25 1 50
3.0616.12 9.i 12.3 (A)
Determine the 1je value for the transistor.
6-10 The transistor in Problem 6-9 has V maintained constant
at 7.5 V. and 'B measured at several levels of VBE as follows:
0' CC
0. 8
0.681 0.72
60
80 (pA)
20 F 40
Determine the he value for the transistor.
6-11 The transistor in Problems 6-9 and 6-10 has I maintained
constant at 40 pA, and corresponding levels of I and V
measured as follows:
Var
I"
2 4116
4.7
4.8
4.9 1 5 (MA)
Determine the h.0 value for the transistor.
6-12 Calculate a and r for the transistor referred to in Problems
6-9 through 6-11.
6-13 Determine the value of r'e for a transistor with a 2 mA
emitter current if its junction temperature is 80CC.
6-14 The collector and base currents of a transistor are measured
as 1.28 mA and 20 WA, respectively. Calculate r '. and r,
for the transistor.
20 V
R3
10 kc1
R,
R2
VWrr'V
k171 k0
c
q
Figure 6-46
VcE
Ic
R,
27 kU
Section 6-4
6-15 The CE circuit in Fig, 6-47 has the following transistor
parameters: life = 1 kO, lift 85, hoe = 2 uS. Calculate Z,, 4,.
and A.
82kc
Figure 6-47
/l8kO
209
Ra
:o kO
6-17 The base biased CE circuit in Fig. 6-48 has the following
transistor parameters: h e = 1.3 kO, hj e = 40, hoe = 1.5 pS.
Calculate Z, Z0 , and A0.
6-18 The collector-to-base biased CE circuit in Fig. 6.49 has the
following transistor parameters: h i e = 1.3 kc), life = 40. h oe =
1.5 IJS. Calculate Z, Z0 , and A1,.
6-19 Recalculate Z 1 , Z0 . and A 1 , for the circuit in Problem 6-17
when the transistor is replaced with one having h e = 1.5 kQ,
= 1 pS, and h10 = 100.
Figure 6-48
r-
V0
LSk^i
/?,
R,
Section 6-5
4 and A. when
RL
'00 kQ
6-22 The circuit in Problem 6-15 has RE replaced with two seriesconnected resistors..... = 1.5 kQ, and R E2 = 3,9 kQ.
Calculate 4, and k \vheli onl y R 3 is capacitor-bypassed.
and when only R- 9 Is capacitor-bypassed.
Iiture 6-49
Section 6-6
6-23 The transistor parameters for the CC circuit in Fig. 6-50 are:
85. h00 = 2 P S. Calculate 4 and Z0.
h = 1 kQ, h,
6-24 Recalculate 4 and Z. for Problem 6-23 when the transistor is
replaced with one having ft = 1.4 kIl and life =
6-25 The CC circuit in Fig. 6-51 has the following transistor
parameters: h e = 1.3 k1 and tfe = 40. Calculate 4 and Z0.
6-26 A CC circuit using voltage divider bias (as in Fig. 6-50) has
the following component values: R 1 = 33 kO, R2 = 47 Ml, RE
= 15 Ml, R L = 47 k(). The transistor parameters are: hie = 1.2
Ml and hi e = 120. Calculate 4 and Z0.
Section 6-7
6-27 The CB circuit In Fig. 6-52 has a transistor with the
following parameters: h, e = 1 Ml, hfe = 85, hoe 2 jiS.
Calculate 4, Z0 , and A0.
oV
Cl
27 kO)
-I
+44
Figure 6-50
2 1 0
6-30 Recalculate Z1, Z0, and A for the circuit In Problem 6-29
when the transistor Is replaced with one having tie = 1.5 kfl,
100.
h0 , = 1 ii, and
vc
-T
120 kO
4"
C2
Vv^
RE
00 ki)
Figure 6-51
VCC
R1
27k1)S.6kfl
C
Rr
R1.
I
47k0
HF-vW-1
L koJ56ko
6-52
IV
f- 0. 2 311 niV
F
- k
(.1
82 Id)
RL
200 Id)
Figure 653
7
Semiconductor
Device and IC
Fabrication
211
Chapter
Chapter Contents
IrttTOclUctiOn
7-1 Processing of Semiconductor Materials 212
7-2 Diode Fabrication and Packaging 213
7-3 Transistor Construction and Performance 215
74 Transistor Fabrication 216
7-5 Integrated CITCUitc 219
7-6 Integrated Circuit Components 220
7-7 Transistor and IC Packaging 222
Review Questions 223
)bjectii-'es
tou will be able to:
I Describe the process of preparing
semiconductor material for device
manufacture, and explain diffusion
and epitaxial growth.
2 Draw sketches to show the
fabrication of alloy and diffused
diodes.
3 Explain the manufacturing
requirements for transistors to
produce satisfactory current gain,
frequency response, power
dissipation. etc.
4 Describe the various transistor
fabrication methods and their
performance characteris tics.
5 Discuss manufacturing methods for
the production of integrated
circuits.
trcnssor
arpar3n
-.tr Vfl4
2 1 2
Introduction
The method employed to manufacture a semiconductor device
determines its electrical characteristics and, thus, dictates Its
applications. For example, low-current fast-switching diodes and
transistors must be fabricated differently from high-power devices.
The process that produces a transistor with high current gain may
result in undesirable large junction capacitances. Also, a
technique that gives a small junction capacitance might produce
devices wiLh low breakdown voltages. An inte.qratecl circuit (IC)
consists of many transistors, diodes, and other components in one
package. Usually, all of the components are fabricated on one
small silicon chip.
single-crystal
of
Bars
semiconductor material are sliced
wafers
for device
into
manufacture.
Silicon
Figure 7-2
Chapter 7 - Semiconductor
2 13
Diffusion
For processing, semiconductor wafers contained in an enclosure
are heated by means of radio frequency (Rfl heating coils. This is
Illustrated in Fig. 7-2. When wafers of n-type material are raised to
a high temperature in an atmosphere containing p-type Impurity
atoms some of the impurities df]iise into each wafer. This converts
the outer layer of the n-type material into p-type. (Fig 7-3). The
diffusion process can be continued by further heating the wafers
in an atmosphere containing n-type impurity atoms, so that npn
layers are produced, as illustrated. Because the diffusion process is
very slow (about 2.5 pm per hour), very narrow diffused regions can
be created by careful timing.
Epitaxia! Growth
Figure 7-3
The diffusion process converts n-
7-1.1
n- type
- .----- p- t5e
sili=- ts
&pei by
-diffusim
- t
I
I
fl-t
Figure 7-4
Electronic Dcvkcs and Circuits, 4th ed.
2 1 4
Al' rLrmn Cr
iri&Cr" oe.
diode
fabrication
Figure
\Ito
SStr.1te
2ULIUES
P t-'.,ps
Ir
'-5
Diode iibrication methods. For
the sioy diode, a pellet
coruair "g p-t y pe impurities is
rnel:ed Into n-type material. A
di i 'iied diode is created by
,'se.0 r-s s is afer ofn-type material
in .i 1 umoCphere containing pt ype 'purt,es
rt
Diffused diode
tahrlC ,iti on
'-"
4..cr'I
n- type
re
tyI22
Diode Packaging
As discussed in Section 2 1. semiconductor diodes vary widely In
ize, depending on their application. Figure 7-6 shows typical
ingle diode packages for low, inediuiu, and high current devices.
In Fig. 7-7 multiple diode packages are illustrated. Two diodes in a
,urlace mount package (see Section 7-7) are shown in Fig. 7-7(a).
cod two in a power-transistor-type package are illustrated in Fig.
7-7(b) Note front the circuits that the cathode terminals are
case.
internall y commnoned fit
A rectifier asembI y is shown in Fig. 7-7(c). This Is four diodes
connected to function as a bridge rectifier and contained In one
package. One side of the package has a metal plate for mounting
on a heat sink (see Section 8-8). The two output terminals are
Identified us + and -, and the other two terminals are for the ac
input.
(a) Surface
mounting
diode
package
tr-.':
Lc1
1l
i,4de
2 1 4 (b) Transistor
style di d
package
El I
,i.i v_ew
cathe
s-a*i -cu-rt
dio-.Ie
Figure 7-6
Individual diodes vary in size
according to the current they are
required to pass.
1
3
nirrnit
frc,t vie,
top view
2?
ne,-jJCrycurrt
dicde
1
3
cixit
C rcr.t
si
view vie,
Figure 7-7
Some multiple diode packages
{I1I:
Cilcui-
2 15
7-3
Current Gain
Good current gain requires that most charge carriers from the
emitter pass rapidly to the collector. So, there should be little
outflow of charge carriers via the base terminal, and there siould
be few carrier recombinations within the base. These condtions
dictate a very narrow, lightly doped, base, (see Fig. 7-8).
r.arrcr- 1rghr1
base for
Nn
EC
High Power
High-power transistors must have large emitter-base surfces to
provide the required quantity of charge carriers. Large collectorbase surfaces are also required to dissipate power ;ithout
overheating the collector-base junction, (Fig. 7-8).
Frequency Response
hIgh
Figure 7-8
High current gain requires a
narrow lightly-doped transistor
base, and high power dissipation
demands a large CB junction area.
For the highest possible frequency response, the trans tor base
region must be very narrow to ensure a short transit time (if charge
carriers from emitter to collector. (see Fig. 7-9). Input capacitance
must also be kept to a minimum, and this requires a small area
emitter-base junction as well as a highly-resistive (lightly doped)
base region.
Because power transistors require large junction surfaces, arid
high-frequency performance demands small junction areas, there
is a conflict in high-frequency power transistors. To keep the
Junction area to a minimum and still provide adequate chargecarrier emission, the emitter-base junction is usually in the form of
a long thin zig-zag strip.
Switching Transistors
Fast switching demands the same low junction capacitance
required for good high-frequency performance. A switching
transistor should have a low saturation vo'tage and a short storage
time, (see Section 8-5). For low saturation voltages, the collector
region must have low resistivity, (Fig. 7-9). Short storage time
requires fast recombination of charge carriers left in the depletion
region at the collector-base junction. Fast recombination is
assisted by additional doping of the collector with gold atoms.
r.srrrv
resisUve base
for sbart
trensit tilt
1k'-re000tive
colioflor for lcw
-saOza::rrl 010355
ELC
arall ES
joartion area
for lOw
CIgar
Figure 7-9
A small BE junction area and
narrow base are required for higlm
frequency performance and fast
switching. Low saturation voltage
is promoted by a low-resistive
collector reg;0n
2 1 6
Explain the design requirements for transistors with (a) high power
dissipation, b) high breakdown voltage.
rz
7-4
Transistor Fabrication
-. Ilor Tra ,z is to rs
---n
p
transistor
ht Allo y
Fi'ure 7-10
A pop alloy tranSistor is
g p-r pe
int ruc ted by meltin
pellets on the surface of an n-ispe
aer.
lOVx lOmA
= 100 MW
The base-emitter voltage is VIlE = 0.7 V. and the collector-base
voltage is.
10 V - 0.7 V
CB = V( . E - VBE =
= 9.3 V
The power dissipated at the base-emitter junction is.
0.7 V x 10 mA
- 7 mW
V BE x Ic
C
10 mS,
+
Vcs,
9.3v
1+
J
1+
07V -
Figure 7-11
217
eeittet
holes etzh
ioto e0trate
Figure 7-12
A very narrow base region gives
microal/oy transistors good highfrequency performance.
Diffused Mesa
In the production of mesa transistors, several thousand transistors
are simultaneously formed on the wafer, by the diffusion process.
As shown in Fig. 7-13, the main body of the wafer becomes the ntype collectors, the diffused p-regions become the bases, and the
final n-regions are the emitters. Metal films are deposited on the
base and emitter surfaces for contacts.
The transistors could be separated by the usual process of
scribing lines on the surface of the wafer and breaking It into
individual units. However, this produces very rough edges that
result in relatively high leakage currents between collector and
base. So, before cutting the wafer, the transistors are isolated by
etching away the unwanted portions of the diffused area to form
troughs between devices. As illustrated, the base and emitter
regions now project above the main wafer which forms the
collector region. This is the mesa structure. The narrow base
widths that can be achieved by the diffusion process make the
mesa transistor useful at very high frequencies.
Epitaxial Mesa
troLeh etched to
sqaarate devsces
trOl. etsj to
sera:e cba-:ces
ba.se
osac:
r1
ositor- /
ntacs
_; /
/
-
-e
te
ers::es cc___.
base
Figure 7-13
Mesa transistors are created by
etching troughs between
individual devices to give low
collector-base leakage currents,
9t)S
base
errLLtt
retest
to,, reobatise
Irate
daifsseeS
n
ba.o
high
sstexaa1 layer
1,-lyre mUerl)
One of the disadvantages of the process just described is that, Figure 7-14
because the collector region Is highly resistive, diffused mesa Epitaial mesa transistor. The
epitaxialprocess combined with
transistors have a high saturation voltage, (see Section 5-10). the mesa structure gives high
Such devices are unsuitable for saturated switching applications, breakdown voltages and low
This same characteristic (high collector resistance) is desirable for saturation levels.
2 1 8
a-otter
cortact
.1 CtO
ttact
rotter
!_z-
, trw Collector
-15
Figure
-k ci t'uoed planar transistor has
:e collector base junction
roe-ed, so that I-, is reduced
'0 leO low fete/c.
Annular
ito !ar Tran.ci.tur
A pcbliii which uc
tim s
oce_Je
cot cage
-ow
a-titter
P
I
r.tce1
arl.-el
Case
XttS
p-e'p. eoLt.
1
tflE
ithucoi
dta.-nni
to,,
rae--cl-i doped
o ,w rcnJ
heavily 3cpc
pope rim
voltages.
2 19
1rn
()
Can-it pe IC enclostire
Thin Film
Thin-film integrated circuits are constructed by dcposting films of
conducting material on the surface of a glass or ceramic base. By
controlling the width and thickness of the films, and by using
different materials selected for their resistivity, resistors and
conductors are fabricated. Capacitors are produced by
sandwiching a film of Insulating oxide between two conducting
films. Inductors are made by depositing metal film in a spiral
formation. Transistors and diodes are usually tiny discrete
components connected into the circuit.
tra'.sistOr
resistor
Thick Film
Thick-fun integrated circuits are sometimes referred to as printed
thin-film circuits. In this process, silk-screen printing techniques
are employed to create the desired circuit pattern on a ceramic
substrate. The inks used are pastes which have conductive,
resistive, or dielectric properties. After printing, the circuits are
high-temperature-fired in a furnace to fuse the films to the
substrate. Thick-film passive components are fabricated In the
same way as those in thin-film circuits. As with thin-film circuits,
active components are added as separate devices. A portion of a
thick-film circuit is shown in Fig. 7-18.
raced tOr
bstrate
Figure 7-18
2 7 0
7-6
Figure 7-19
Uncovered top view Ct h hrii
i nte g rated ircuit. Indu diiaf
components are interconnected
to torm a single circuit.
S Oflfl
fl-C.re
-, -T.-
pSrS L_ pi _c cr5
Figure 7-20
Integrated Circuit components
(parasitic)
have unwanted
interconnecting pn-junctions
that must be kept reverse biased.
221
Resistors
The resistivity of semiconductor material is a function of doping
density, so resistors can be produced by doping strips of material
and providing terminals, (Fig. 7-22). The range of resistor values
that may he produced by the diffusion process varies from ohms to
hundreds of kilohms. The typical tolerance, however, may bc no
better than 5%, and may even be as high as 20/b. However, if all
resistors are diffused at the same time, their tolerance ratio can
be good. For example, several resistors with the same nominal
value may all have a 20% tolerance, but have actual resistance
values within a few percent of each other.
Another method of producing resistors for integrated circuits
uses the thin-film technique. In this process a metal film is
deposited on a glass or silicon dioxide surface. The thickness,
width, and length of the film are regulated to give a desired
resistance value. Since diffused resistors can be processed while
diffusing transistors, the diffusion technique is the least expensive
and the most frequently used.
Capacitors
Because all pnjunctions have capacitance, capacitors may be
produced by fabricating suitable junctions. As in the case of other
diffused components parasitic junctions are unavoidable. Both
the parasitic and the main junction must be kept reverse biased to
avoid direct current flow. The depletion region width and junction
capacitance vary with changes in reverse bias, so for capacitance
value stability, a dc reverse bias greater than maximum signal
voltage levels must be maintained across the junction.
Integrated circuit capacitors may also be fabricated by utilizing
the silicon dioxide surface layer as a dielectric. A heavily-doped aregion Is diffused to form one plate of the capacitor. The other
plate is created by depositing a film of aluminum on the silicon
dioxide, (see Fig. 7-23). Voltages of any polarity maybe employed
with this type of capacitor, and the breakdown voltage is very
much larger than that for diffused capacitors. The junction areas
available for creation of IC capacitors are very small indeed, so that
normally only picofaraci capacitance values are possible.
Figure 7-21
A transistor
can be madeto
behave as a diode by connecting
the collector and base.
rEistnr tentitals
mvt ri
p-te
Figure 7-22
A monolithic IC resistor created
tal
fi
si1i
plate
diedde
&eltric
Figure 7-23
teiaJ.
f n-tye
plate
/
2 2 2
7-7
t_w.sistor
^9`
(I ide)
asc
e.rerre
Boctm vie,,
7-23
Loo-posser resin -encapsuled
transotor: TO-92 package.
Figure
traflS.Stor
;:
arsr,e
ttcm Vi
Figure -25
Lov . pois er metal can-enclosed
transistor; TO-18 package.
ca.s,e is
/r
3 .
IZV v,ed
side vi,,
Side
vie.,
bsttos
Vie,,.
CI
IC Packages
Like semiconductor devices, integrated circuits must be packaged
to provide mechanical protection and terminals for electrical
connection. Several standard packages In general use are
illustrated in Fig. 7-27.
Figure 7-26
Metal can-type and plasticencapsuled high power
transistors.
Chapter 7 - Semiconductor Device and IC Fabrication
223
r9
2
tc
II
acearaflCe
- -
side vs.,
'i
;I
Sottcn vieg
r -
2 3
.2
and 10-3
Sketch the terminal arrangements for TO-92, T0-5,
transistor packages, and identify the emitter, base, and collector
terminals on each package.
Sketch metal can and DIL integrated circuit packages, and show the
terminal numbering systems.
Figure 7-2'
Integrated circuits are t)picalJ
packaged in metal cans, dual-in
line, or surface-mount plastu
enclosures.
2 2 4