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--

COD

---

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
--JORGE MORENO
-- 2102197
entity elevador_jorge is
Port ( P1, P2, P3, P4 : in STD_LOGIC;
STOP, START : in STD_LOGIC;
MO1, MO2, FUN : out STD_LOGIC;
FC1, FC2, FC3, FC4, FC5 : in STD_LOGIC);
end elevador_jorge;
architecture Behavioral of elevador_jorge is
signal CR1, CR2, CR3, CR4, CR5, CR6, CR7, CR8, CR9, CR10, CR11, CR12, CR, M1, M2
: STD_LOGIC:= '0';
begin
CR <= ( NOT(STOP) AND (START OR CR)); --- ENCLAVAMIENTO START
--PISO1
CR1 <=( NOT(STOP) AND (START OR CR) AND ((FC1 AND FC2) OR M1) AND (P2 AND FC2 AN
D (NOT(FC3)) AND (((NOT (M2))) OR CR1)) ); -- SERIE
CR2 <=( NOT(STOP) AND (START OR CR) AND ((FC1 AND FC2) OR M1) AND (P3 AND (NOT(F
C4) OR NOT(FC3)) AND (( (NOT (M2))) OR CR2)) ); -- PARALELO
CR3 <=( NOT(STOP) AND (START OR CR) AND ((FC1 AND FC2) OR M1) AND (P4 AND (NOT(F
C4) OR NOT(FC5)) AND (((NOT (M2))) OR CR3)) ); -- PARALELO
--PISO2
CR4 <= ( NOT(STOP) AND (START OR CR) AND ((FC2 AND FC3) OR M1 OR M2) AND (P1 AN
D FC2 AND (NOT(FC1)) AND ((((NOT (M1)) )OR CR4)) )); -- SERIE
CR5 <= ( NOT(STOP) AND (START OR CR) AND ((FC2 AND FC3) OR M1 OR M2) AND (P3 AND
FC3 AND (NOT(FC4)) AND ((((NOT (M2)) ) OR CR5)) )); -- SERIE
CR6 <= ( NOT(STOP) AND (START OR CR) AND ((FC2 AND FC3) OR M1 OR M2) AND (P4 AND
(NOT(FC4) OR NOT(FC5)) AND (((NOT (M2))) OR CR6)) ); -- PARALELO
--PISO3
CR7 <= ( NOT(STOP) AND (START OR CR) AND ((FC3 AND FC4) OR M1 OR M2) AND (P2 AND
FC3 AND (NOT(FC2)) AND ((((NOT (M1)) ) OR CR7)) )); -- SERIE
CR8 <= ( NOT(STOP) AND (START OR CR) AND ((FC3 AND FC4) OR M1 OR M2) AND (P4 AND
FC4 AND (NOT(FC5)) AND ((((NOT (M2)) ) OR CR8)) )); -- SERIE
CR9 <= ( NOT(STOP) AND (START OR CR) AND ((FC3 AND FC4) OR M1 OR M2) AND (P1 AND
(NOT(FC2) OR NOT(FC1)) AND (((NOT (M1))) OR CR9)) ); -- PARALELO
--PISO4
CR10 <=( NOT(STOP) AND (START OR CR) AND ((FC4 AND FC5) OR M2) AND (P3 AND FC4 A
ND (NOT(FC3)) AND (((NOT (M1))) OR CR10)) ); -- SERIE
CR11 <=( NOT(STOP) AND (START OR CR) AND ((FC4 AND FC5) OR M2) AND (P2 AND (NOT(
FC3) OR NOT(FC2)) AND (((NOT (M1))) OR CR11)) ); -- PARALELO
CR12 <=( NOT(STOP) AND (START OR CR) AND ((FC4 AND FC5) OR M2) AND (P1 AND (NOT(
FC2) OR NOT(FC1)) AND (((NOT (M1))) OR CR12)) ); -- PARALELO
---- SALIDA MOTORES ----

M1 <= (CR1 OR CR2 OR CR3 OR CR5 OR CR6 OR CR8) AND (NOT (M2)) ;
M2 <= (CR4 OR CR7 OR CR9 OR CR10 OR CR11 OR CR12) AND (NOT (M1)) ;
FUN <= (CR);
MO1 <= M1;
MO2 <= M2;
end Behavioral;

--- PINES

## Switches
NET "FC1"
NET "FC2"
NET "FC3"
NET "FC4"
NET "FC5"
#NET "sw<5>"
#NET "sw<6>"
#NET "sw<7>"
#NET "sw<8>"
#NET "sw<9>"
#NET "sw<10>"
#NET "sw<11>"
NET "P1"
NET "P2"
NET "P3"
NET "P4"
## Buttons
#NET "cpu_resetn"

LOC=J15 | IOSTANDARD=LVCMOS33; #IO_L24N_T3_RS0_15


LOC=L16 | IOSTANDARD=LVCMOS33; #IO_L3N_T0_DQS_EMCCLK_14
LOC=M13 | IOSTANDARD=LVCMOS33; #IO_L6N_T0_D08_VREF_14
LOC=R15 | IOSTANDARD=LVCMOS33; #IO_L13N_T2_MRCC_14
LOC=R17 | IOSTANDARD=LVCMOS33; #IO_L12N_T1_MRCC_14
LOC=T18 | IOSTANDARD=LVCMOS33; #IO_L7N_T1_D10_14
LOC=U18 | IOSTANDARD=LVCMOS33; #IO_L17N_T2_A13_D29_14
LOC=R13 | IOSTANDARD=LVCMOS33; #IO_L5N_T0_D07_14
LOC=T8 | IOSTANDARD=LVCMOS18; #IO_L24N_T3_34
LOC=U8 | IOSTANDARD=LVCMOS18; #IO_25_34
LOC=R16 | IOSTANDARD=LVCMOS33; #IO_L15P_T2_DQS_RDWR_B_14
LOC=T13 | IOSTANDARD=LVCMOS33; #IO_L23P_T3_A03_D19_14
LOC=H6 | IOSTANDARD=LVCMOS33; #IO_L24P_T3_35
LOC=U12 | IOSTANDARD=LVCMOS33; #IO_L20P_T3_A08_D24_14
LOC=U11 | IOSTANDARD=LVCMOS33; #IO_L19N_T3_A09_D25_VREF_14
LOC=V10 | IOSTANDARD=LVCMOS33; #IO_L21P_T3_DQS_14

#NET "btnc"
#NET "btnd"
NET "STOP"
NET "START"
#NET "btnu"
## LEDs
NET "MO2"
#NET "led<1>"
#NET "led<2>"
#NET "led<3>"
#NET "led<4>"
#NET "led<5>"
#NET "led<6>"
#NET "led<7>"

LOC=C12 | IOSTANDARD=LVCMOS33; #IO_L3P_T0_DQS_AD1P_15


LOC=N17 | IOSTANDARD=LVCMOS33; #IO_L9P_T1_DQS_14
LOC=P18 | IOSTANDARD=LVCMOS33; #IO_L9N_T1_DQS_D13_14
LOC=P17 | IOSTANDARD=LVCMOS33; #IO_L12P_T1_MRCC_14
LOC=M17 | IOSTANDARD=LVCMOS33; #IO_L10N_T1_D15_14
LOC=M18 | IOSTANDARD=LVCMOS33; #IO_L4N_T0_D05_14

LOC=H17 | IOSTANDARD=LVCMOS33; #IO_L18P_T2_A24_15


LOC=K15 | IOSTANDARD=LVCMOS33; #IO_L24P_T3_RS1_15
LOC=J13 | IOSTANDARD=LVCMOS33; #IO_L17N_T2_A25_15
LOC=N14 | IOSTANDARD=LVCMOS33; #IO_L8P_T1_D11_14
LOC=R18 | IOSTANDARD=LVCMOS33; #IO_L7P_T1_D09_14
LOC=V17 | IOSTANDARD=LVCMOS33; #IO_L18N_T2_A11_D27_14
LOC=U17 | IOSTANDARD=LVCMOS33; #IO_L17P_T2_A14_D30_14
LOC=U16 | IOSTANDARD=LVCMOS33; #IO_L18P_T2_A12_D28_14

NET "FUN"
#NET "led<9>"
#NET "led<10>"
#NET "led<11>"
14
#NET "led<12>"
#NET "led<13>"
#NET "led<14>"
NET "MO1"

LOC=V16 | IOSTANDARD=LVCMOS33; #IO_L16N_T2_A15_D31_14


LOC=T15 | IOSTANDARD=LVCMOS33; #IO_L14N_T2_SRCC_14
LOC=U14 | IOSTANDARD=LVCMOS33; #IO_L22P_T3_A05_D21_14
LOC=T16 | IOSTANDARD=LVCMOS33; #IO_L15N_T2_DQS_DOUT_CSO_B_

##LEDs_RGB
#NET "led16_b"
#NET "led16_g"
#NET "led16_r"
#NET "led17_b"
#NET "led17_g"
#NET "led17_r"

LOC=V15 | IOSTANDARD=LVCMOS33; #IO_L16P_T2_CSI_B_14


LOC=V14 | IOSTANDARD=LVCMOS33; #IO_L22N_T3_A04_D20_14
LOC=V12 | IOSTANDARD=LVCMOS33; #IO_L20N_T3_A07_D23_14
LOC=V11 | IOSTANDARD=LVCMOS33; #IO_L21N_T3_DQS_A06_D22_14

LOC=R12
LOC=M16
LOC=N15
LOC=G14
LOC=R11
LOC=N16

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IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;

#IO_L5P_T0_D06_14
#IO_L10P_T1_D14_14
#IO_L11P_T1_SRCC_14
#IO_L15N_T2_DQS_ADV_B_15
#IO_0_14
#IO_L11N_T1_SRCC_14

## 7
#NET
#NET
#NET
#NET
#NET
#NET
#NET
#NET

segment display
"ca"
LOC=T10 | IOSTANDARD=LVCMOS33; #IO_L24N_T3_A00_D16_14
"cb"
LOC=R10 | IOSTANDARD=LVCMOS33; #IO_25_14
"cc"
LOC=K16 | IOSTANDARD=LVCMOS33; #IO_25_15
"cd"
LOC=K13 | IOSTANDARD=LVCMOS33; #IO_L17P_T2_A26_15
"ce"
LOC=P15 | IOSTANDARD=LVCMOS33; #IO_L13P_T2_MRCC_14
"cf"
LOC=T11 | IOSTANDARD=LVCMOS33; #IO_L19P_T3_A10_D26_14
"cg"
LOC=L18 | IOSTANDARD=LVCMOS33; #IO_L4P_T0_D04_14
"dp"
LOC=H15 | IOSTANDARD=LVCMOS33; #IO_L19N_T3_A21_VREF_15

#NET
#NET
#NET
#NET
#NET
#NET
#NET
#NET

"an<0>"
"an<1>"
"an<2>"
"an<3>"
"an<4>"
"an<5>"
"an<6>"
"an<7>"

LOC=J17 | IOSTANDARD=LVCMOS33; #IO_L23P_T3_FOE_B_15


LOC=J18 | IOSTANDARD=LVCMOS33; #IO_L23N_T3_FWE_B_15
LOC=T9 | IOSTANDARD=LVCMOS33; #IO_L24P_T3_A01_D17_14
LOC=J14 | IOSTANDARD=LVCMOS33; #IO_L19P_T3_A22_15
LOC=P14 | IOSTANDARD=LVCMOS33; #IO_L8N_T1_D12_14
LOC=T14 | IOSTANDARD=LVCMOS33; #IO_L14P_T2_SRCC_14
LOC=K2 | IOSTANDARD=LVCMOS33; #IO_L23P_T3_35
LOC=U13 | IOSTANDARD=LVCMOS33; #IO_L23N_T3_A02_D18_14

## Pmod Header JA
#NET "ja<1>"
#NET "ja<2>"
#NET "ja<3>"
#NET "ja<4>"
#NET "ja<7>"
#NET "ja<8>"
#NET "ja<9>"
#NET "ja<10>"

LOC=C17
LOC=D18
LOC=E18
LOC=G17
LOC=D17
LOC=E17
LOC=F18
LOC=G18

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IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;

#IO_L20N_T3_A19_15
#IO_L21N_T3_DQS_A18_15
#IO_L21P_T3_DQS_15
#IO_L18N_T2_A23_15
#IO_L16N_T2_A27_15
#IO_L16P_T2_A28_15
#IO_L22N_T3_A16_15
#IO_L22P_T3_A17_15

## Pmod Header JB
#NET "jb<1>"
#NET "jb<2>"
#NET "jb<3>"
#NET "jb<4>"
#NET "jb<7>"
#NET "jb<8>"
#NET "jb<9>"
#NET "jb<10>"

LOC=D14
LOC=F16
LOC=G16
LOC=H14
LOC=E16
LOC=F13
LOC=G13
LOC=H16

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IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;

#IO_L1P_T0_AD0P_15
#IO_L14N_T2_SRCC_15
#IO_L13N_T2_MRCC_15
#IO_L15P_T2_DQS_15
#IO_L11N_T1_SRCC_15
#IO_L5P_T0_AD9P_15
#IO_0_15
#IO_L13P_T2_MRCC_15

## Pmod Header JC
#NET "jc<1>"
#NET "jc<2>"
#NET "jc<3>"
#NET "jc<4>"
#NET "jc<7>"
#NET "jc<8>"
#NET "jc<9>"
#NET "jc<10>"

LOC=K1
LOC=F6
LOC=J2
LOC=G6
LOC=E7
LOC=J3
LOC=J4
LOC=E6

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IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;

#IO_L23N_T3_35
#IO_L19N_T3_VREF_35
#IO_L22N_T3_35
#IO_L19P_T3_35
#IO_L6P_T0_35
#IO_L22P_T3_35
#IO_L21P_T3_DQS_35
#IO_L5P_T0_AD13P_35

## Pmod Header JD
#NET "jd<1>"
#NET "jd<2>"
#NET "jd<3>"
#NET "jd<4>"
#NET "jd<7>"
#NET "jd<8>"
#NET "jd<9>"
#NET "jd<10>"

LOC=H4
LOC=H1
LOC=G1
LOC=G3
LOC=H2
LOC=G4
LOC=G2
LOC=F3

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IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;

#IO_L21N_T3_DQS_35
#IO_L17P_T2_35
#IO_L17N_T2_35
#IO_L20N_T3_35
#IO_L15P_T2_DQS_35
#IO_L20P_T3_35
#IO_L15N_T2_DQS_35
#IO_L13N_T2_MRCC_35

##Pmod Header JXADC


#NET "xa_n<1>"
#NET "xa_p<1>"
#NET "xa_n<2>"
#NET "xa_p<2>"
#NET "xa_n<3>"
#NET "xa_p<3>"
#NET "xa_n<4>"
#NET "xa_p<4>"

LOC=A14
LOC=A13
LOC=A16
LOC=A15
LOC=B17
LOC=B16
LOC=A18
LOC=B18

##VGA Connector
#NET "vga_r<0>"
#NET "vga_r<1>"
#NET "vga_r<2>"
#NET "vga_r<3>"

LOC=A3
LOC=B4
LOC=C5
LOC=A4

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IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;

#IO_L8N_T1_AD14N_35
#IO_L7N_T1_AD6N_35
#IO_L1N_T0_AD4N_35
#IO_L8P_T1_AD14P_35

#NET
#NET
#NET
#NET

"vga_g<0>"
"vga_g<1>"
"vga_g<2>"
"vga_g<3>"

LOC=C6
LOC=A5
LOC=B6
LOC=A6

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IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;

#IO_L1P_T0_AD4P_35
#IO_L3N_T0_DQS_AD5N_35
#IO_L2N_T0_AD12N_35
#IO_L3P_T0_DQS_AD5P_35

#NET
#NET
#NET
#NET

"vga_b<0>"
"vga_b<1>"
"vga_b<2>"
"vga_b<3>"

LOC=B7
LOC=C7
LOC=D7
LOC=D8

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IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;

#IO_L2P_T0_AD12P_35
#IO_L4N_T0_35
#IO_L6N_T0_VREF_35
#IO_L4P_T0_35

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IOSTANDARD=LVDS;
IOSTANDARD=LVDS;
IOSTANDARD=LVDS;
IOSTANDARD=LVDS;
IOSTANDARD=LVDS;
IOSTANDARD=LVDS;
IOSTANDARD=LVDS;
IOSTANDARD=LVDS;

#IO_L9N_T1_DQS_AD3N_15
#IO_L9P_T1_DQS_AD3P_15
#IO_L8N_T1_AD10N_15
#IO_L8P_T1_AD10P_15
#IO_L7N_T1_AD2N_15
#IO_L7P_T1_AD2P_15
#IO_L10N_T1_AD11N_15
#IO_L10P_T1_AD11P_15

#NET "vga_hs"
#NET "vga_vs"

LOC=B11 | IOSTANDARD=LVCMOS33; #IO_L4P_T0_15


LOC=B12 | IOSTANDARD=LVCMOS33; #IO_L3N_T0_DQS_AD1N_15

##Micro SD Connector
#NET "sd_sck"
#NET "sd_reset"
#NET "sd_cd"
#NET "sd_cmd"
#NET "sd_dat<0>"
#NET "sd_dat<1>"
#NET "sd_dat<2>"
#NET "sd_dat<3>"

LOC=B1
LOC=E2
LOC=A1
LOC=C1
LOC=C2
LOC=E1
LOC=F1
LOC=D2

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IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;

#IO_L9P_T1_DQS_AD7P_35
#IO_L14P_T2_SRCC_35
#IO_L9N_T1_DQS_AD7N_35
#IO_L16N_T2_35
#IO_L16P_T2_35
#IO_L18N_T2_35
#IO_L18P_T2_35
#IO_L14N_T2_SRCC_35

##PWM Audio Amplifier


#NET "aud_pwm"
LOC=A11 | IOSTANDARD=LVCMOS33; #IO_L4N_T0_15
#NET "aud_sd"
LOC=D12 | IOSTANDARD=LVCMOS33; #IO_L6P_T0_15
##Accelerometer
#NET "acl_miso"
#NET "acl_mosi"
#NET "acl_sclk"
#NET "acl_csn"
#NET "acl_int<1>"
#NET "acl_int<2>"

LOC=E15
LOC=F14
LOC=F15
LOC=D15
LOC=B13
LOC=C16

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IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;

#IO_L11P_T1_SRCC_15
#IO_L5N_T0_AD9N_15
#IO_L14P_T2_SRCC_15
#IO_L12P_T1_MRCC_15
#IO_L2P_T0_AD8P_15
#IO_L20P_T3_A20_15

##Temperature Sensor
#NET "tmp_ct"
#NET "tmp_int"
#NET "tmp_scl"
#NET "tmp_sda"

LOC=B14
LOC=D13
LOC=C14
LOC=C15

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IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;

#IO_L2N_T0_AD8N_15
#IO_L6N_T0_VREF_15
#IO_L1N_T0_AD0N_15
#IO_L12N_T1_MRCC_15

##USB-RS232 Interface
#NET "uart_cts"
#NET "uart_rts"
#NET "uart_rxd_out"
#NET "uart_txd_in"

LOC=D3
LOC=E5
LOC=D4
LOC=C4

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IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;

#IO_L12N_T1_MRCC_35
#IO_L5N_T0_AD13N_35
#IO_L11N_T1_SRCC_35
#IO_L7P_T1_AD6P_35

##Omnidirectional Microphone
#NET "m_clk"
LOC=J5 | IOSTANDARD=LVCMOS33; #IO_25_35
#NET "m_data"
LOC=H5 | IOSTANDARD=LVCMOS33; #IO_L24N_T3_35
#NET "m_lrsel"
LOC=F5 | IOSTANDARD=LVCMOS33; #IO_0_35
##USB HID (PS/2)
#NET "ps2_clk"
#NET "ps2_data"

LOC=F4 | IOSTANDARD=LVCMOS33; #IO_L13P_T2_MRCC_35


LOC=B2 | IOSTANDARD=LVCMOS33; #IO_L10N_T1_AD15N_35

##Quad SPI Flash


#NET "qspi_csn"
#NET "qspi_dq<0>"
#NET "qspi_dq<1>"
#NET "qspi_dq<2>"
#NET "qspi_dq<3>"

LOC=L13
LOC=K17
LOC=K18
LOC=L14
LOC=M14

##SMSC Ethernet PHY


#NET "eth_rxd<0>"
#NET "eth_rxd<1>"
#NET "eth_txd<0>"
#NET "eth_txd<1>"
#NET "eth_crsdv"
#NET "eth_intn"
#NET "eth_mdc"
#NET "eth_mdio"
#NET "eth_refclk"
#NET "eth_rstn"

LOC=C11 | IOSTANDARD=LVCMOS33; #IO_L13P_T2_MRCC_16


LOC=D10 | IOSTANDARD=LVCMOS33; #IO_L19N_T3_VREF_16
LOC=A10 | IOSTANDARD=LVCMOS33; #IO_L14P_T2_SRCC_16
LOC=A8 | IOSTANDARD=LVCMOS33; #IO_L12N_T1_MRCC_16
LOC=D9 | IOSTANDARD=LVCMOS33; #IO_L6N_T0_VREF_16
LOC=B8 | IOSTANDARD=LVCMOS33; #IO_L12P_T1_MRCC_16
LOC=C9 | IOSTANDARD=LVCMOS33; #IO_L11P_T1_SRCC_16
LOC=A9 | IOSTANDARD=LVCMOS33; #IO_L14N_T2_SRCC_16
LOC=D5 | IOSTANDARD=LVCMOS33; #IO_L11P_T1_SRCC_35
LOC=B3 | IOSTANDARD=LVCMOS33; #IO_L10P_T1_AD15P_35

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IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;
IOSTANDARD=LVCMOS33;

#IO_L6P_T0_FCS_B_14
#IO_L1P_T0_D00_MOSI_14
#IO_L1N_T0_D01_DIN_14
#IO_L2P_T0_D02_14
#IO_L2N_T0_D03_14

#NET "eth_txen"
#NET "eth_rxerr"

LOC=B9 | IOSTANDARD=LVCMOS33; #IO_L11N_T1_SRCC_16


LOC=C10 | IOSTANDARD=LVCMOS33; #IO_L13N_T2_MRCC_16

---- SIMULACION
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--USE ieee.numeric_std.ALL;
ENTITY PRUEBA IS
END PRUEBA;
ARCHITECTURE behavior OF PRUEBA IS
-- Component Declaration for the Unit Under Test (UUT)
COMPONENT elevador_jorge
PORT(
P1 : IN std_logic;
P2 : IN std_logic;
P3 : IN std_logic;
P4 : IN std_logic;
STOP : IN std_logic;
START : IN std_logic;
MO1 : OUT std_logic;
MO2 : OUT std_logic;
FC1 : IN std_logic;
FC2 : IN std_logic;
FC3 : IN std_logic;
FC4 : IN std_logic;
FC5 : IN std_logic
);
END COMPONENT;
--Inputs
signal P1 : std_logic := '0';
signal P2 : std_logic := '0';
signal P3 : std_logic := '0';
signal P4 : std_logic := '0';
signal STOP : std_logic := '0';
signal START : std_logic := '0';
signal FC1 : std_logic := '0';
signal FC2 : std_logic := '0';
signal FC3 : std_logic := '0';
signal FC4 : std_logic := '0';
signal FC5 : std_logic := '0';
--Outputs

signal MO1 : std_logic;


signal MO2 : std_logic;
-- No clocks detected in port list. Replace <clock> below with
-- appropriate port name
BEGIN
-- Instantiate the Unit Under Test (UUT)
uut: elevador_jorge PORT MAP (
P1 => P1,
P2 => P2,
P3 => P3,
P4 => P4,
STOP => STOP,
START => START,
MO1 => MO1,
MO2 => MO2,
FC1 => FC1,
FC2 => FC2,
FC3 => FC3,
FC4 => FC4,
FC5 => FC5
);

-- Stimulus process
stim_proc: process
begin
-- hold reset state for 100 ns.
START <= '1';
wait for 100 ns;
FC5 <= '1';
FC4 <= '1';
wait for 100 ns;
P1 <= '1';
wait for 100 ns;
FC4 <= '1';
FC3 <= '1';
FC5 <= '0';
wait for 100 ns;
FC3 <= '1';
FC2 <= '1';
FC4 <= '0';
wait for 100 ns;
FC2 <= '1';
FC1 <= '1';
FC3 <= '0';
wait for 100 ns;
STOP <= '1';
wait;
end process;

END;

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