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haracteristics
eed Control
OBJECTIVE
1. Unde
2. PloUi .
3. Unde
4.
Plqitlnij
4
4
4
DISCUSSION
The field-effect transistor (FET) is a semiconductor device which depends for its operation on
the control of current by an electric field and conducts the current with a single carrier, hole
or electron. According ~, ~c~h! ~fr~cture, there are two types of FETs, the Junction Field
4
t
t .
t
B.
C.
t
t
D.
It has no offset voltage at zero drain current, and makes an exceii~OJ !?i911~fchopper.
E.
F.
G.
Its key disadvantage is the relatively small GBP of the device compared to the BJT.
..
C:::- :- : .
... . .
4
4
4
The structure and operation of the FET .are different to those of the BJT.
BJT contains majority and minority catri$rs which flow through two p-n junctions, while the
current of the FET is only th~ rnajority carrier flowing in drifting .
width can be controlled by
4
4
4
t
4
26-1
4
4
4
of ~~~T ~nd
the input resistance of the JFET is smaller than that of the MOSFET (up to 10 14 0) due to a
pn-junction between the gate and channel.
advantages ir:t m~qqf;;~cturing so that the MOSFET is more important than the JFET in
microel~ctrqh!P~ ;~i~~dbstry .
In this
experiment you
will
study the
basic electrical
The
Compared
Prody~t(GBP),
higher input
~mpedance,
... ------
-' ,._
-. -: :-~- -:
----
the
sour~ t};;: dit~ (G), and the drain (D) terminals . The circuit symbol shown
is the n-channet ~~~;r. ~dr~ pchannel JFET, the arrow at the gate points in the opposite
containing the
direction.
resistor.
Gen~f~lly
ID
loss
.,-----VGs=O
-----VGs<O
VGs=VP
tL
f Vos(sat.)
2b(X},V(x)
Fig. 26-1
Vos
26-2
..
The voltage across drain-source V 0 s, which results in a draip current 10 from drain to source.
This drain current passes through the channel SYffOQJ'lci~
consid43r . tg~n-channel
with./.t~~~~~~~.;;source
voltage Vos .
drain-:s~~r~1~pt;lut~s a voltage drop along the channel , which is more positive at the
dralgf~~{ejJ~etioh than at the source-gate junction . This reverse-bias potential across the
p-n junction causes a depletion region to form as shown in Fig. 26-1 .
increased, the 10 increases, resulting
i~
current 10 then
in the VGs=O
~~ ';:i~~~,:~~:ea~;ed,
the depletion
voltage VGs is
increased to the pinch-off value Vp or VGs(OFF). the drain current reduces to 0, and the JFET is
completely turned off.
are two important param~t~r~ pf the JFET device and they are indicated in the transfer
characteristic curve .H.t 6~,~~~. :i
lo
s
Fig. 26-2
0 V to the pinch-off
voltage, Vp or VGs(oFF> the voltage at which the depletion region is formed without any drain
current and at which no drain
26-3
41
4
4
4
Fig. 26-3 shows the typical n-channel JFET drain characteristic curves plotted the actual
drain current 10 at different values of drain-sourCf't.rVQJ.t~g~ )fos for a range of gate-source
voltage values VGs
or
Sllturat ion region
.,
II-
lo
10 rnA
5 .62 rnA
- -~
VGs=-1
:r_ :
2.5 rnA
1
0.625 rnA '
VGs=-2
15
Fig. 26-3
VGs=O
VGs=-3
Cutoff region
Vos
--:- .:.-:
until a point (V05 = 4 V) at which the current reaches saturation and loss = 10 rnA
From the
previous discussion we know that the internal depletion region acts to limit the drain current.
If the gate-source voltage is set atVGs
a saturation level is
region, starting
current.
If
=-1
for VGs
is a single carrier, each characteristic curve therefore passes through the origin.
ofc:lrain current
approximation:
26-4
lo
ID
loss
Vos=15V
5.62mA
2.5mA
0.625 A
' ~~~'+---+--+--+---+
VGs
VGs(off)
Fig. 26-4
The popular
sometimes called the Insulated Gate Field Effect Transistor (IGFET), is constructed as
either a depletion MOSFET (DMOS) or enhancement MOSFET (EMOS) .
In the
_-.;;,:,:-~:-:,:,i::
"-
. .. .. .
layer between the gate and substrate of a MOSFET can easily be pdrt~tQfed, if
;:;:::::'.;::;:;:_._:-
voltage is applied.
friction.
- .
an excessive
electrostatic discharge would occur, resulting in a possible arc across the thin insulating layer
causing permanent damage.
To avoid
tf1is
shorted with a conductive ring or conductive foam in shipping and the conductive ring must
be removed after soldering .
26-5
4
~
4
4
t
t
t
''
gate-voltage..,cootroJI~d
Similar to the
The main
difference between MOSFET and JFET is..~~~~ig~; !a~~; between the gate and p-substrate
(not a p-n junction) of the NMOSFET.
resistance is much
G-4~
s
lo
VGs>O
. ~:;t::~::=:;~::..::.:..::_:__. Vos
8
Fig. 26-5
Fig. 26-6 shows the ~ ~~Q~fTr y~~racteristics of depletion and enhancement NMOSFETs.
The depletion
volt~si. nl;~p~~ Values of VGs reducing the drain current until the pinch-off
voltage Vp, aftef~tWefi; ~6drain current occurs. The transfer characteristic is the same for
gate-source
isolated from the channel for both negative and positive values of VGs. the device can be
operated with either polarity of VGs and no gate current resulting in either case .
(b)
ID
~ID
Go---1
+
VGS
Vt
Nos?:.. Vos(sat))
Fig. 26-6
26-6
1. Depletion MOSFET
Fig. 26-7 shows the structure and circuit syl$b~l Qf t~e n:..channel depletion MOSFET.
gate on an oxide layer over a semiconductor substrate forms the depletion MOSFET device.
The gate-sour~ vp~~ge to this kind of MOSFET can be either positive or negative.
For the
voltag$
YF'
:;~}{":
si~e
anct~ha~tJ..1,Pri~l device.
Drain Terminal
n-<;h~'lJlel
..sql$1~~!~
Drain (D)
(G)
Gate~
Source (S)
Fig. 26-8 shows the structure and circuit symbol of n-channel enhancement MOSFET.
substrate is a lower-doped p-type
higher-doped n-type
s~miqc:5pductor
semicondudprQi~teti~l.'
The
holes in the substrate region under the gate leaving a depletion region.
26-7
.
~.
"
voltage is sufficiently positive, electrons are attracted into this depletion region making it then
act as an n-channel between drain and source.
Although the enhancement MOSFET is more restricted in operating range than is the
depletion device, the enhancement device is very useful in large-scale integrated circuits in
which the simpl~r~jtruction and smaller size make it a suitable device .
Drain
Dra i n
Gate~ ~ate~
Source
NChannel
Fig. 26-8
Enb.:~ncfiment
Source
P Chann e I
A high JOP~Y91tage
Power MOSFET
The power Metal-Oxide-Semiconductor FET
(power MOSFET)
is
unipolar and
The
26-8
=::
'
''
1i
11
linearity, etc.
Since the key advantages of small size anq lightweight, the power MOSFET
Power MOSij.~)f !~ ;*~fl integrated power device which contains tens of thousands small
terrlliil~:
t1
'
Source
Gate Polysilicon
Oxide
Gate
4
4
p+ Body Region
'
41
Drift Region
n- Epi Layer
n+ Substrate
(1 00)
t
t
t .
t
o rai~
Metallization
Drain
Fig. 26-9
41
t
The power MOSFET shown in Fig . 26-9 is a 4-layer sandwich configqratjbg df n(n-)pn.
device\V~uPg~taHrlg. In the
tfrlbdate voltage is
device, two back-to-back pn-junctions exist between drain and source~ >
The lower-doped n region is a drift region which increases the
applied , the device is always in off state whenever the drain-source voltage is either positive
f
f
4
4
or negative.
4
4
26-9
l
Static Characteristics of Power MOSFET
th~'' 1R;~~$e
propQrftl~ncif tdth~
re~iai :hd it can
drain current, that is, the MOSFET operates in the constant resistance
be considered as a resistive component.
The on-state
drain-sourc~
resistance Ros(on> is the key parameter which determines the power losses at a given drain
current.
voltage (typically 2 to 4 V) .
t~e
~P~91fies
....::-.
($Qil~~~qwer MOSFET
-:-.-.-...-:-.
:G}.::"_::::--:-:-.-.
As mentioned ~(<rite ~
temperature
.-:.<..-..:-:.-:-:-:-::{:::{::::-;:,:::- . -
--:-:-: -:
to that of a BJT device. A comparison of the forward-biased safe operating areas is shown
in Fig. 26-10. The de and pulse SOAs of power MOSFET are superior to those ofJge BJT
under de (solid line) and pulse(dotted line) operating conditions.
DCSOA
Fig. 26-10
BJT SOA
26-10
.,
;j
'i
and reliability . This is a strict challenge to design engineers how to promote the power
density from 5.7 W/in3 to 10 W/in 3 .
(ZVS)
can be obtained .
Higher switching
at the smaller size and shorter response time of filtering devices may be
used so that the circuit size is reduced and the power density is promoted.
Lower switching
loss means that a lowe;- temperature rise -can be obtained so that the requirement of heat
sink is lowered .
In addition, ZVS operation can reduce the effects o( transient dv/dt and
When the
MOS~~f . is
~~)(imizes efficiency
switch-mode powe~r~ui~!~ l$~' ~s) circuits.
In brief, the ZVS tes!J!liRYn
The research for the MOSFET operation in ZVS circuits leads the development of MOSFET
technology to a new generation of fast built-in body diode. The main purpp~esf.lr~tQ Jower
gf (f\1(~. t~ m1f1imize
In higt'Jffr~qCency and
In a full-bridge ZVS circuit , if the reverse recovery process of built-in body diode doesn't
complete before the MOSFET is turne,g pff~ ~lbe transient dv/dt will result in the MOSFET
failure . When the ZVS circuit
because the permissible
==-:-=-:='": .
reve~~n~covery
--=:=: : .::.<::
26-11
Basically the ZVS converter cannot switch at zero voltage under a light-load condition so that
the MOSFET in on-state will be forced to turn off,
full-controlled bridge
c~r.cuit,
~imiit=Jr tP~Q~
operation of forced-switching
tr~(lsient.~ill~r~~te
r~ducingthe
De!~r;pti~.f'
of Experimental Circuit
10m..i;driJn~ower dissipation
Po= 100 mW, drain to source leakage current loss ::;:()i~n;tAmln. to 6.5 mAmax. (test
conditions: Vos=10 V, VGs=O V).
The 2SK2698 is a silicon n-channel MOSFET.
voltage
v,h
~ ~l~t l~~~dJtions:
2 :~)\'l;ln: . t.;4Vmax
; I
26-12
AC
12V
C1
220~
'' ..1ot<
~f ~-----~>--------.
VR1
C2
R3
1K
220~
AC
rol'~
~
12V
1K
a o s
I
'
s
AC
ov
Fig. 26-11
charactQri$t~~~~asurements
,::::-\r= :::_:=;={\:?_: ;: = ::=\Hi:J:;.:_:::, .: .-::
by J.t~h~' btldge
rectifier BR 1 and
17 Voc to 6 .1 V for g9te qias and the potentiometer VR2 is used to control the
the JFET is cC> ri:tfucted as common source configuration and a positive voltage is
applied to the gate .
For the MOSFET characteristic measurements,. the connect plugs must bEt placed in
positions 1, 4, 5, and 8 to construct the MOSFET as common so.u rce configuration
and to apply a negative voltage at the gate .
When the
26-13
,.
"'..
..
AC
36V
ill
..
..
._.
jl
0000
UID
0000
Jl
I
I
I
I
I
'
''
VR1
Fig. 26-12
The additional 12-V DC supply provides the working voltage for the
operational amplifier UL
The combination .o f
the. U1
speed controller ~hiclt can be adjusted to provide the predetermined motor speed.
The
reference voltage is provided by the Zener diode ZD1 and the diode 01 connected in
series (temperature-compensated configuration) and is adjusted by the speed control
potentiometer VR1.
t
t
'
R2
0.1
26-14
EQUIPMENT REQUIRED
1 - KL-53015 Module
1 - KL-51 001 Module
1 - KL-58002 Module
1 -Analog Multimeter
2 - Digital Multi meter (DMM)
<~:~~-
A.
J ~ET/MOSFET
D 1.
Static Characteristics
q@
...v~~,,..,
odule .
In this case,
lead
JFET Pin
Ohmmeter
Lead
Red (-)
Black(+)
JFET Pin
Ohmmeter
Result
JFET Pin
Ohmmeter
Lead
JFET Pin
Ohmmeter
Black (+)
Lead
Result
Result
26-15
Black (+)
Red (-)
JFET Pin
Ohmmeter
Lead
D
Black ( +)
s
Red
Red (-)
Black(+)
Result
03.
According
MOSFET
Pin
Ohmmeter
Lead
MOSFET
Red (-)
Black (+)
D
Black(+)
Result
MOSFET
MOSFET
Black (+)
Red (-)
Pin
Red (-)
Ohmmeter
Lead
Result
MOSFET
Pin
Ohmmeter
Lead
MOSFET
Black(+)
Red (-)
Pin
Lead
Result
Result
05.
.Ohmmeter
26-16
,...
02. Connect 110 V AC power source to Modules KL-51 001 and KL-58002 .
s~~J:itl~fd~ Module
positions 1, 4, 6, and 7.
0 4. Two DMMs are required in the following procedur~ ,
::::;.;:::::::::~
=V~~zi Kn. .
~>~~~!~ ~~~~~: JFET G-S terminals for measuring the VGs values,
Adjustih~
the potentiometer VR2 for each of the listed VGs values, measure
Calcu .
fr9m
PP!>ition 1 to position 2.
Connect a DVM
across the JFET G-S . .terriiirtalr:; for measuring the VGs values.
DVM across the...
potentiometer VR2
Ri .tat
-~~asuring
Connect a
Adjusting the
26-17
n . . ln\1\1
VGs
ov
ii>
1V 1.5V 2Vc
0 .5V
"'v
i >i
VR3
i \
s\1
.
3 .5V 4V 4 .5V 5V
5.5V 6V
lo
curves (transfer characteristic curve) using the results in
Determine the pinch-off voltage Vp and describe the
Vas
~~~~!'l~a;l~ut~te the
lo
Vos
OV
6\J
1V
lo
26-18
7V
8V
9V
Adjust the VR2 and set VGs value to -1 .0 V. Adjyst the VR1 for each of the Vos
values listed in the table below.
VR3. and calculate the lo values
2V
3V
4V
5V
6V
?V
8V
9V
VR3 and calculate the lo values using the equation lo=VR3/1 KO.
OV
D 10.
1V
2V
4V
5V
6V
OV 11V 12V
Using the
curves) ..
3V
r>
diffe ,. , r i .a
. itntl,I!Jatlth
26-19
Io
the JFET/
on the upper
Place the
m::.rc. position.
positions 1, 4, 5, and 8.
~h~<range
In this case, thi$'$IMMs are
>' --------- - ... -...
,et
:_,:-::,:::<:::-::::::::::<;:::
used as DVMs for measuring the MOSFET gate-sourc~ 'V~!t~ge VC.sand the
drain current 10 .
05. Turn on thepower of Module KL-51001.
op~ratlng . . in
26-20
Adjust the
= VR"4/1KO.
Connect a DVM
1V
usin~
the equation lo
= VR4 I
1 KO.
5.5V 6V
08. Plot the lo-VGs curve (transfer characteristic curve) using the results of steps
6 and 7.
Io
26-21
frame.
Locate the
It is located on
Place the
ground.
Result
26-22
CONCLUSION
A. JFET/MOSFET Static Characteristics
In the exercise of JFET/MOSFET static
resistances of gate-source, gate-drain and drain-source using an Ohmmeter.
a low resistance of 100
n .
drain-sg~rce
using an Ohmmeter. You observed that a very high resistance exists between
gat!~ urce
Therefore
~~ ~~~~~ltype
is
of the
26-23
I~ value
exercis~
.showed
vol~~g~
;,:::;:-::::
of
C)ftJ1 plhJ. is
star~~~Ofbtate
U1 pH11 is 10.7 V and the voltage drop across R2 is 0.035 Vas the motor rotates at
full speed by adjusting the VR 1.
26-24