Unit IV: Field Effect Transistors (FETs): JFET, Characteristics and Parameters, JFET Biasing,

MOSFET Characteristics and Parameters

Introduction to FETs:

FET stands for the Field-effect transistor. These transistors are designed to overcome the
drawbacks of the bipolar junction transistors. As the basic transistors have the junction of
the emitter in the mode of forwarding bias this makes the device to operate at low
impedance levels. This introduces considerable amounts of noise levels. FETs possess all
the characteristics which can overcome the drawbacks of bipolar junction transistors and
can be a good replacement for the vacuum tubes as well as BJTs. It also consists of three
terminals. But these terminals are referred to as the source, drain, and gate.

These FETs are known for their unipolar characteristics. The reason behind its
characteristics is that the functioning of this transistor depends upon the concentration
of either holes or electron carriers. Field effect transistors can also be used in switching
circuits, buffer amplification circuits and in integrated circuits.

A Field Effect Transistor (FET) is a three-terminal semiconductor device. Its operation is

based on a controlled input voltage. By appearance JFET and bipolar transistors are very
similar. However, BJT is a current controlled device and JFET is controlled by input voltage.
Most commonly two types of FETs are available.

 Junction Field Effect Transistor (JFET)

 Metal Oxide Semiconductor FET (IGFET)

JFET(Junction Field Effect Transistor)

The functioning of Junction Field Effect Transistor depends upon the flow of majority
carriers (electrons or holes) only. Basically, JFETs consist of an N type or P type silicon bar
containing PN junctions at the sides. Following are some important points to remember
about FET −
 Gate − By using diffusion or alloying technique, both sides of N type bar are heavily
doped to create PN junction. These doped regions are called gate (G).
  Source − It is the entry point for majority carriers through which they enter into the
semiconductor bar.
 Drain − It is the exit point for majority carriers through which they leave the
semiconductor bar.
 Channel − It is the area of N type material through which majority carriers pass
from the source to drain.

There are two types of JFETs commonly used in the field semiconductor devices:
N-Channel JFET and P-Channel JFET.
Schematic Symbol of JFET:

Construction of JFET:
 N – Channel JFET −It consists of an n – type silicon bar forming the conduction
channel for the charge carriers. The pn – junction forming diodes are connected
internally and a common terminal called GATE is taken out from the p - Region. The
other two terminals viz. Source and Drain are taken out from the bar.
  P – Channel JFET − It consists of a p – type silicon bar forming the conduction
channel for the charge carriers. The pn – junction forming diodes are connected
internally and a common terminal called GATE is taken out from the n - Region. The
other two terminals viz. Source and Drain are taken out from the bar.

Working operation of N Channel JFET:

Both N-channel JFET and p-channel JFET operated in the same way, although the charge
carriers are inverted i.e. electrons are majority carriers in n-channel and holes are majority
carriers in p-channel. Here we explain n-channel jfet operation because it is more
preferable.
The width of the channel varies in accordance with the magnitude of the bias applied to the
gate terminal and source-drain terminal. As shown in the figure above we explain how
channel width change when we apply either a positive voltage or negative across it. Let’s
have a detailed look at it.

Jfet operates in three conditions depending upon the voltage applied across terminals:
(i) No voltage: When neither any voltage is applied across source to drain terminal i.e. Vds
= 0 nor any bias is applied to the gate terminal i.e. Vgs= 0, the depletion region around the
p-n junction are of equal thickness and symmetrical in nature.

(ii) When Vgs =0 and Vds is increased from 0:

When a positive voltage is applied to the drain terminal with respect to source terminal
without connecting the gate terminal to the supply, the electrons starts moving from source
terminal to drain terminal whereas conventional drain current Id flows through the
channel from Drain to the source. Due to this flow of current, the uniform voltage drop
occurs across the channel resistance which reverses bias the diode.

(iii) When Vgs =decreased and Vds is increased from 0:

When the gate is negative bias with respect to the source and drain is applied with a
positive bias with respect to the source, the p-n junction got reverse biased and forms
depletion region. When the drain current flows through the channel, there is a voltage drop
along its length. The result is that the reverse bias at the drain end is more than that at the
source end making the width of depletion layer more at the drain. With the increasing
resistance and reducing current Id , the channel starts narrowing. If we further increase the
negative voltage across the gate, depletion layers meet at the centre and the drain current
cut off completely. Similarly, if we reduce the negative voltage across the gate, the depletion
layers start reducing causing decrease in resistance and increase in drain current Id.
JFET Characteristics:

N-Channel JFET Drain Characteristics:

The N-channel JFET characteristics or transconductance curve is shown in the figure below
which is graphed between drain current and gate-source voltage. There are multiple
regions in the transconductance curve and they are ohmic, saturation, cutoff, and
breakdown regions.

Ohmic Region:
The only region in which transconductance curve shows linear response and drain current
is opposed by the JFET transistor resistance is termed as Ohmic region.
Saturation Region
In the saturation region, the N-channel junction field effect transistor is in ON condition
and active, as maximum current flows because of the gate-source voltage applied.
Cutoff Region
In this cutoff region, there will be no drain current flowing and thus, the N-channel JFET is
in OFF condition.
Breakdown Region
If the VDD voltage applied to the drain terminal exceeds the maximum necessary voltage,
then the transistor fails to resist the current and thus, the current flows from drain
terminal to source terminal. Hence, the transistor enters into the breakdown region.

(ii) Transfer characteristics:

By keeping the drain-source voltage constant VDS and finding the drain current Id for
various values of gate-source voltage Vgs ,the transfer characteristics can be determined
experimentally.

As shown in the figure above, we observe the following things from its curves are: When
Vgs = 0 then Drain current Id = Idss
When Vgs = Vd then Drain current Id = 0 Drain current decreases with an increase in
negative gate-source bias.

Parameters of JFET:
The JFET has parameters which determine the performance of it –

 AC drain resistance (rd) − It is defined as the ratio of the change in the drain-source
voltage (ΔVDS) to the corresponding change in the drain current (ΔI D) at constant
gate-source voltage (VGS).
AC drain resistance (rd)=ΔVDS/ΔID
  Trans-conductance (gm) − It is defined as the ratio of change in drain current (ΔIDS)
to the change in gate – source voltage (ΔVGS) at constant drain-source voltage.
The trans-conductance of JFET is expressed either in mA/V or micro siemens.
Transconductance (gm)=(ΔID)/(ΔVGS)
 Amplification Factor (μ) − It is defined as the ratio of change in drain-source
voltage (ΔVDS) to the change in gate-source voltage (ΔVGS) at constant drain current.
The amplification factor of JFET shows how much control the gate voltage has over the
drain current.
Amplification Factor (μ)=(ΔVDS)/(ΔVGS)

Advantages of JFET

 It has the high input impedance. This permits high degree of isolation between
input-output circuit.
 JFET has a negative resistance temperature coefficient. This avoids the risk of
thermal runaway.
 A JFET has a very high power gain.
 A JFET has smaller size, high efficiency and longer life.

Applications of JFET

 A JFET can be used as a switch.

 JFET can be used as an amplifier.
 JFET can be used as a chopper.
 JFET can be used as a buffer.
 JFET can be used as voltage controlled resistors in the operational amplifiers.
 JFET is used in cascade amplifier and in RF amplifiers.
 JFET is used in communication devices.
 JFET is used in digital circuits.
MOSFET (Metal Oxide Semiconductor Field Effect Transistor):
FETs have a few disadvantages like high drain resistance, moderate input impedance and
slower operation.
To overcome these disadvantages, the MOSFET which is an advanced FET is invented

MOSFET stands for Metal Oxide Silicon Field Effect Transistor or Metal Oxide
Semiconductor Field Effect Transistor. This is also called as IGFET meaning Insulated Gate
Field Effect Transistor. The FET is operated in both depletion and enhancement modes of
operation. The following figure shows how a practical MOSFET looks like.

Classification of MOSFETs
Depending upon the type of materials used in the construction, and the type of operation,
the MOSFETs are classified as in the following figure.

After the classification, let us go through the symbols of MOSFET.

The N-channel MOSFETs are simply called as NMOS. The symbols for N-channel MOSFET
are as given below.
The P-channel MOSFETs are simply called as PMOS. The symbols for P-channel MOSFET
are as given below.

Construction of a MOSFET:

The construction of a MOSFET is a bit similar to the FET. An oxide layer is deposited on the
substrate to which the gate terminal is connected. This oxide layer acts as an insulator
(sio2 insulates from the substrate), and hence the MOSFET has another name as IGFET. In
the construction of MOSFET, a lightly doped substrate is diffused with a heavily doped
region. Depending upon the substrate used, they are called as P-type and N-type MOSFETs.
The following figure shows the construction of a MOSFET.

The voltage at gate controls the operation of the MOSFET. In this case, both positive and
negative voltages can be applied on the gate as it is insulated from the channel. With
negative gate bias voltage, it acts as depletion MOSFET while with positive gate bias
voltage it acts as an Enhancement MOSFET.
Construction of N- Channel MOSFET:

Let us consider an N-channel MOSFET to understand its working. A lightly doped P-type
substrate is taken into which two heavily doped N-type regions are diffused, which act as
source and drain. Between these two N+ regions, there occurs diffusion to form an
Nchannel, connecting drain and source.

A thin layer of Silicon dioxide (SiO2) is grown over the entire surface and holes are made
to draw ohmic contacts for drain and source terminals. A conducting layer of aluminum is
laid over the entire channel, upon this SiO2 layer from source to drain which constitutes
the gate. The SiO2 substrate is connected to the common or ground terminals.
Because of its construction, the MOSFET has a very less chip area than BJT, which is 5% of
the occupancy when compared to bipolar junction transistor. This device can be operated
in modes. They are depletion and enhancement modes. Let us try to get into the details.

Working of N - Channel depletion mode MOSFET:

For now, we have an idea that there is no PN junction present between gate and channel in
this, unlike a FET. We can also observe that, the diffused channel N between two N+regions,
the insulating dielectric SiO2 and the aluminum metal layer of the gate together form
a parallel plate capacitor.
If the NMOS has to be worked in depletion mode, the gate terminal should be at negative
potential while drain is at positive potential, as shown in the following figure.
When no voltage is applied between gate and source, some current flows due to the voltage
between drain and source. Let some negative voltage is applied at VGG. Then the minority
carriers i.e. holes, get attracted and settle near SiO2 layer. But the majority carriers, i.e.,
electrons get repelled.
With some amount of negative potential at VGG a certain amount of drain current ID flows
through source to drain. When this negative potential is further increased, the electrons get
depleted and the current ID decreases. Hence the more negative the applied VGG, the lesser
the value of drain current ID will be.
The channel nearer to drain gets more depleted than at source like in FET and the current
flow decreases due to this effect. Hence it is called as depletion mode MOSFET.

Working of N-Channel MOSFET Enhancement Mode :

The same MOSFET can be worked in enhancement mode, if we can change the polarities of
the voltage VGG. So, let us consider the MOSFET with gate source voltage VGG being positive
as shown in the following figure.
When no voltage is applied between gate and source, some current flows due to the voltage
between drain and source. Let some positive voltage is applied at VGG. Then the minority
carriers i.e. holes, get repelled and the majority carriers i.e. electrons gets attracted
towards the SiO2 layer.
With some amount of positive potential at VGG a certain amount of drain current ID flows
through source to drain. When this positive potential is further increased, the
current ID increases due to the flow of electrons from source and these are pushed further
due to the voltage applied at VGG. Hence the more positive the applied VGG, the more the
value of drain current ID will be. The current flow gets enhanced due to the increase in
electron flow better than in depletion mode. Hence this mode is termed as Enhanced
Mode MOSFET.

P - Channel MOSFET:

The construction and working of a PMOS is same as NMOS. A lightly doped n-substrate is
taken into which two heavily doped P+ regions are diffused. These two P+ regions act as
source and drain. A thin layer of SiO2 is grown over the surface. Holes are cut through this
layer to make contacts with P+ regions, as shown in the following figure.
Working of PMOS
When the gate terminal is given a negative potential at VGG than the drain source
voltage VDD, then due to the P+ regions present, the hole current is increased through the
diffused P channel and the PMOS works in Enhancement Mode.
When the gate terminal is given a positive potential at VGG than the drain source
voltage VDD, then due to the repulsion, the depletion occurs due to which the flow of
current reduces. Thus PMOS works in Depletion Mode. Though the construction differs,
the working is similar in both the type of MOSFETs. Hence with the change in voltage
polarity both of the types can be used in both the modes.
This can be better understood by having an idea on the drain characteristics curve.

Drain Characteristics:

The drain characteristics of a MOSFET are drawn between the drain current ID and the
drain source voltage VDS. The characteristic curve is as shown below for different values of
inputs.
Actually when VDS is increased, the drain current ID should increase, but due to the
applied VGS, the drain current is controlled at certain level. Hence the gate current controls
the output drain current.
Transfer Characteristics:
Transfer characteristics define the change in the value of VDS with the change
in ID and VGS in both depletion and enhancement modes. The below transfer characteristic
curve is drawn for drain current versus gate to source voltage.
 Comparison between BJT, FET and MOSFET

Now that we have discussed all the above three, let us try to compare some of their
properties.

TERMS BJT FET MOSFET

Device type Current controlled Voltage controlled Voltage Controlled

Current flow Bipolar Unipolar Unipolar

Terminals Not interchangeable Interchangeable Interchangeable

Operational modes No modes Depletion mode only Both Enhancement and Depletion modes

Input impedance Low High Very high

Output resistance Moderate Moderate Low

Operational speed Low Moderate High

Noise High Low Low

Thermal stability Low Better High