BASIC ELECTRICAL AND ELECTRONICS

ENGINEERING

Aligeti Akhil
23001-CS-034
 FET’S AND MOSFET’S

Introduction:
• The field effect transistor (FET) is a three terminal semiconductor device in which the
current is controlled by an electric field.
• A FET is an example of a unipolar device. It works only depending on the majority carriers.
(i.e.., either holes)
• FET’s are voltage controlled devices, in contrast to bipolar transistors, which are current
controlled.
 CLASSIFICATION OF FETS

• The FET’S are classified into two types . They are

1.JFET (Junction Field Effect Transistor, and
2. MOSFET( Metal Oxide Semiconductor Field Effect Transistor)
The MOSFETs are also called as Insulated Gate Field Effect Transistor
(IGFET)
 CONSTRUCTION OF JFET

• The basic construction and circuit symbols of N-channel and P-channelFETs are shown in
figure.
• A junction field effect transistor (JFET) is a three terminal semiconductor device in which
current conduction is by one type of charge carrier i.e.., electrons or holes.
• The three terminals are designate as Gate (G),Source(S) and Drain(D).
• It consists of a P-type or N- type silicon bar(channel) containing two PN-junctions at the both
sides the silicon bar forms the conducting channel for the charge carriers.
• If the silicon bar is of N-type , it is called N-channel JFET and if the silicon bar is of P-type, it
is called a P-channel JFET.
 CONSTRUCTION AND CIRCUIT SYMBOLS OF
JFET

1.Gate(G): Both the p-type regions are connected to internally and a single wire is taken out.
This is called Gate Terminal. It is similar to base in BJT. It controls the flow of carrier through
the channel.
2.Source(S): It is the terminal through which the majority carriers (electrons in case of N-
channel or Holes in case of P-channel) enters the channel (lik emitter in BJT).
3.Drain(D):It is the terminal, through which the majority carriers leaves the channel( like
collector inBJT).
4.Channel: The region between the source and drain, sandwiched between the two gates is
called the channel and the majority carriers move from source to drain through this channel.
 SUPPLY VOLTAGE OF JFET

• Figure shows N-channel JFET polarities whereas and shows the P- channel JFET polarities.
• Note that in each case, the voltage between the gate and source is such that the gate is
reverse biased.
• This is the normal way of JFET Connection. The drain and source terminals are
interchangable i.e., either end can be used as source and the other end as drain.
The following points may be noted,
(1) The input circuit (i.e.., gate to source) of a JFET is reverse biased. This means that the device has
high input impedance.
(2) The drain is so biased w.r.t. source that drain current I D flows from the source to drain.
(3) In all JFET’s , source current IS is equal to the drain current i.e.., .
 PRINCIPLE OF OPERATION OF N-
CHANNEL JFET

1. When VGS =0 and VDS=0 :

* when no voltage is applied between drain and source and gate and sourcei.e..,
VGS=0 and VDS=0. So drain current is zero shown in figure
2. When VGS=0 and VDS is increased from zero
• When a voltage VDS is applied between drain and source terminals and voltage on the gate is
zero, the two PN- junctions at the sides of the bar establish depletion layers.
• The majority charge carriers i.e.., electrons (holes in case of P-channel FET) flow from source
to drain through a channel between the depletion layers hence drain current I dflows through
the channel from Drain to source.
• As VDS is gradually increased from zero, ID increases proportionally as per Ohm’s law.
3. When VGS is negative and VDS is increased:
When a reverse bias voltage VGS is applied between the gate and source, and the VDS is
increased, the width of the depletion layers are increased.
At particular VGS the two depletion regions may touch each other, this is referred to as put-in at,
this condition the channel resistance is inifinite, the corresponding V GS is known as Pinch off
voltage.
 DRAIN CHARACTERISTICS OF JFET

Definition: The curves which shows the relationship between the drain current (I D) and
drain to source voltage (VDs) for different values of (VGS) are called “drain
characteristics of JFET”.
* Keeping VGS fixed at some value, drain-source voltage is changed in steps.
Ohmic Region :
* In this region,drain current (ID) is directly proportional to drain to source voltage (V DS)
* For applying the low values of VDS, drain current ID varies directly with voltage following
OHM’S law.
Pinch-Off Region:
• Here, JFET operates as a constant-current device because I D constant and is relatively
independence of VDS.
• It is due to the fact that as VDS increase, channel resistance also increases proportionally thereby
keeping ID practically constant.
3. Breakdown Region:
• The voltage between the drain and the source (VDS) is high enough to causes the JFET’S
resistive channel to break down and pass uncontrolled maximum current.
• If the JFET enters the breakdown region where ID increases to an excessive value.
Pinch-Off Voltage: It is the maximum drain-source voltage at which the drain current essentially
becomes constant.
MUTUAL CHARACTERISTICS OF JFET
DEFINITION: The graph which show the relationship between the drain current (I D) and the
gate to source voltage (VGS) for constant value of drain to source voltage is called “Mutual or
transfer characteristics of JFET.”
ID=IDSS[1-VGS/ VGS(off)] 2

PARAMETERS OF JFET:
• A JFET has certain parameters which determine is performance in a circuit.
• The main parameters of JFET when connected in common source mode are :
1. A. C. DRAIN RESISTANCE(rd)
2. Trans-conductor(gm)
3. Amplification factor
1. A. C. Drain Resistance: It is the a. c. resistance between drain and source
terminals when JFET operates in the pinch-off region
• It is the ratio of change in drain to source voltage to the change in drain
current at constant gate to source voltage

2.Trans- conductance :
* The control that the gate voltage has over the drain current is measured by
trans-conductance.
3. Amplification Factor: It is the ratio of change in drain to source voltage to
the change in gate to source voltage at constant drain current (I D).
Specification of JFET:
1. Saturation current(IDSS): It is the maximum drain saturation current at VGS=0in
the 2. Pinch-off voltage: It is the voltage at which the current I D reaches to its
constant saturation level.
3. TRANS- CONDUCTANCE: It is the change in the drain current for given
change in gate to source voltage with the drain to source voltage constant.
4.Drain Resistance: It is the a. c resistance between drain and source terminals,
when the FET is operating in the pinch-off region.
5. Cut-off Voltage: It is the value of gate to source voltage at which the drain
current is zero.
6. Drain Source ON Resistance: It is the d. c resistance of the channel when the
depletion region are absent, when the device is biased on the channel ohmic region
of the characteristics.
7.VDGO(Drain-gate Breakdown voltage): It is the drain-gate breakdown voltage
with the source open- circuit.
8.VGSS(Gate-source Breakdown voltage): It is the gate- source breakdown
voltage with drain shorted to the source.
Application of JFET:
1.JFETs are used in RF amplifiers.
2.JFET is used as a buffer amplifier.
3. JEFT can be used as a chopper.
4. JFET can be used as a electronic switch.
5. JFET is used as a voltage variable resistor.
6. It is used a oscillator circuits because frequency drift is low.
MERITS OF JFET OVER BJT
Advantages:
1.It has very high input impedance.
2. It is less noisy than BJT.
3. FET’s are much easier to fabricate in IC’s.
4. High power gain.
5.FET is voltage controlled device.
DEFINITION: MOSFET is an important semiconductor device and is widely
used in many circuit application.
Types of MOSFET:
1. Depletion MOSFET (D- MOSFET)
2.Enhancement-MOSFET (E-MOSFET)
1.DEPLETION MOSFET : This MOSFET can be operated in both depletion
mode and enhancement mode by changing the polarity of VGS. When negative
gate-to-source voltage is applied, the N-channel D-MOSFET operates in the
depletion mode.
However, with positive gate voltage, it operates in the enhancement mode.
Since a channel exists between drain and source, ID flows even when VGS=0.
That is why D-MOSFET is Known as normally-ON MOSFET.
2. Enhancement-MOSFET: As it is name indicates, this MOSFET operates
only in the enhancement mode and has no depletion mode. It works with large
Positive gate voltage only. It differs in construction from the D-MOSFET in
the structurally there exists no channel between the drain and source. Hence, it
doesn’t conduct VGS=0. That is why it is called normally –OFF MOSFET.
CONSTRUCTION AND WORKING OF N-CHANNEL DEPLETION TYPE
MOSFET :
CONSTRUCTION :
* Figure shows the basic construction of N-channel depletion type MOSFET.
• It consists of two heavily doped N+ regions are diffused into a lightly doped p-
type substrate.
• One N+ regions acts as Source (S) and another N+ acts as drain (D).
• A metal aluminium is deposited over the entire surface of the SiO 2 layer in such
a way it covers the entire channel region as shown in figure . This aluminium
layer is called as gate(G).
Working of N-channel Depletion Type MOSFET:
1.When VGS=0 and VDS is applied between source and drain :
• *when the VGS =0 and VDS is applied between source and drain, then the drain current flows
because there is a channel exists between source and drain.
• For the reason, D-MOSFET is normally ON when VGS=0V.
2. When VGS=-ve and VDS=+ve (depletion mode):
• When negative voltage is applied to gate (G), the free electrons in N-channel will move
towards the P-type subtract (like charge are repel) and attract holes from P-type substrate
(opposite charge are attract).
• This will results recombination of electrons and holes in N-channel.
3. When VGS=+ve and VDS =+ve(Enhancement Mode):
• Depletion MOSFET can also be operated in Enhancement mode by simply applying
positive voltage to gate.
• Application of positive gate voltage results in induced negative channel in the N-type
channel. This the conductivity of the channel gets increased.
Construction
*Figure shows the basic construction of N-channel Enhancement type MOSFET.
*A N-channel Enhancement MOSFET consists of lightly doped P-substrate.
*Two heavily doped N+ regions are diffused into a lightly doped p-type substrate.
*This two N+ regions act as the source and the drain.
*On the SiO2 layer, a metal layer is formed to cover the entire channel region.
This aluminium layer is called the gate(G).
Working
1.When VGS=0 and VDS is applied between source and drain:
• When VGS =0V, then ID current is zero because there is no channel exists
between source and drain.
• The substrate has only a few thermally produced free electrons ( minority
carriers).
2.When positive voltage is applied to Gate and VDS is applied between source
and drain :
• When positive voltage is applied to gate. The substrate will be connected to
the common terminal will be connected to the ground
* The induced negative charge become minority carriers in the p-type of
substrate, which provides channel for the flow electrons from source to drain is
called N-type inversion layer.
Construction
• The figure shows the construction details of CMOSFET.
• CMOSFET actually stands for complementary MOSFET, means that
the logic device has both PMOS and NMOS within its design.
• Enhancement-mode MOSFETs are used in integrated circuits to
produce CMOS type logic gates and power switching circuits in the
form of as PMOS(P-channel)and NMOS (N-channel) gates.
• The drain of both the MOSFETs are combine and single terminal is
taken
• In the circuit two MOSFETs that are complementary to each other
are used.
• The drains of both the MOSFETs are combined and single terminal
is taken.
• The circuit diagram of CMOSFET inverter .
Working
• When the input voltage Vinis high or equal to VDD then NMOS(Q1)is
turned ON and PMOS(Q2) is turned OFF. The out V0 is zero.
• When the input voltage Vin is low or equal to 0V, then PMOS (Q1) is
turned ON and NMOS (Q1) is turned OFF. So the output voltage V0 is
high.
• In this way the CMOSFET works as an inverter.
Vin Q1(NMOS) Q2(PMOS) V0

High(Logic 1) ON OFF LOW

Low(Logic 0) OFF ON HIGH