UNIT-4-Contents

JFET Construction and working

JFET drain and transfer
characteristics
JFET current equation.
FET parameters
Small signal model
 UNIT-4-Contents
Construction and characteristics of
MOSFET
Comparison of JFET & MOSFET
.
Field effect transistor introduction
FET is a unipolar Device.
Fet is a voltage controlled Device.
Current conduction is either by holes or
by electrons.
Advantages FET over BJT
1.its operation depends on the flow of
majority charge carriers only.Hence it is a
unipolar device
 Advantages FET over BJT
2.It has high input impedance.
3.It is less affected by radiation.
4.it has better thermal stability.
It is less noisy compared with JFET.
In IC form it is easy to fabricate rather
than BJT.
Disadvantage : Relatively small gain
band width product.
FET
 FET Family
Field effect transistor ts broadly
divided in to two categories.
They are
1.Junction field Effect transistor
2.Metal oxide Semiconductor field
effect transistor.
Junction field Effect transistor
further
FET Family
Subdivided into
a. n-channel junction field effect
transistor.
b. p-channel junction field effect
transistor.
MOSFET is further subdivided in
to
FET Family
a.Enhancement MOSFET
b.Depletion MOSFET
Enhancement MOSFET is further
subdivided into n channel & p channel
MOSFET.
Depletion MOSFET is further
subdivided into n channel & p channel
MOSFET.
JFET CONSTRUCTION
JFET CONSTRUCTION(nchannel)
JFET Consists of four terminals.They are
source ,Drain ,Gate & channel.
Source : Source is the terminal through which
majority charge carriers enters in to the bar.
It is analogous to emitter in BJT.
Drain: Drain is the terminal through which
majority carriers leaves the channel. Drain is
more positive with respect to the channel.
It is analogous to collector in JFET.
JFET CONSTRUCTION(nchannel)
Gate : Gate is a control electrode.gate is of
opposite polarity with respect to source and
drain.Two heavily doped ‘p’ regions are
diffused in to n channel top and bottom layers.
These two p regions together is called as gate.
Channel : The region of n-type material
between two gate regions is channel through
which majority carriers move from source to
drain.
JFET CONSTRUCTION(nchannel)
Bias Voltages
VDD : Drain Junction Must be
always forward Biased.
V gg : Gate Junction Must be
always reverse Biased.
 JFET Operation(nchannel)
Case- I(When VDD is applied and Vgg is
Zero )
In FET electrons will from source to
drain resulting drain current ID.
Case-II(a) (When VDD is applied and Vgg
is Zero )
Here maximum drain current flowsand it
is equal to IDSS
JFET Operation(nchannel)
Case-II (When VDD and Vgg are applied)
When Gate Junction is Reverse Biased FET will act
like a two Reverse Biased Diodes Connected Back to
Back.
And Hence two Depletion Regions will form in the
Channel.Two depletion Regions are widened.
Constriction is more towards drain terminal rather than
source.
This Reduces the Channel width hence drain current I D
Decreases.
 JFET Operation(nchannel)

When gate to source voltage is further

increased a stage is reached at which both
the depletion regions will meet together.
This is called as “pinch off region”. In
this region drain current is zero .
JFET Operation(nchannel)
Here Current Conduction is mainly
depends on the reverse bias gate voltage.
Hence FET is a voltage controlled Device.
Current flow is due to the extension with
increasing reverse bias of the field
associated with region of uncovered
charges.
Hence the name Field effect transistor .
 JFET symbols
n Channel JFET p Channel JFET
JFET SYMBOLS
JFET characteristics
Curves that explains the Relation ship
between voltage and current are
characteristic curves.
FET characteristics are of two types
1.Drain characteristics
2. Transfer characteristics
FET characteristics – Circuit diagram

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n channel JFET Drain characteristics
Drain characteristics

Diagram
Drain characteristics

Drain characteristics are plotted by taking drain to

source voltage on x axis and drain current on Y
axis keeping VGS as constant.
Ohmic Region (OA) here VGS= 0
As VDS is increased from ZeroID increases linearly
[OA].
Reciprocal of the slope of the characteristics gives
the Drain Resistance RD.
Drain characteristics

Drain Resistance is calculated in Ohmic Region .

 Unit of Drain Resistance is Ω.
This Region is called ohmic Region.Point A is Known
as Knee point.
Magnitude of current mainly depends up on
1.Number of majority carriers available in the channel.
Drain characteristics

2.Length of the Channel.

3.Cross sectional area of the channel.
Application of OA region
In this region FET is mainly used as a voltage Variable
Resistor.
Drain characteristics

In region AB drain current increases

slowly compared to ohmic Region.
Pinch Off region (BC)
 when VDS is reached certain maximum
value VDS = VP there is no further
increase in IP.
Region (CD)
Drain characteristics

In this Region drain current ID

increases more rapidly as VDS is
increased.
It is because break down of the gate to
source Junction due to avalanche effect.
Reciprocal of the slope of the
characteristics gives the Drain
Resistance RD
 N channel JFET Transfer Characteristics.
These curves establishes a relationship between ID
and VGS keeping VDS as constant.
When VGS = 0 Drain current is maximum and is
equal to IDSS.
As VGS is increased channel width Reduces and
drain current ID reduces.
At one Particular Gate voltage Channel is pinched
off
The maximum reverse gate voltage where the
channel is pinched off is known as pinch off
voltage.
 N channel JFET Transfer
Characteristics.
Trans conductance
Trans conductance can be calculated
from the slope of the transfer
characteristic . It is Denoted as
Its unit is mho.
Expression for saturation current
In transfer characteristic VDS is
maintained as constant at a suitable
Value Greater than the Reference
Voltage.
Gate voltage is increased till ID is
reduced to Zero.
The shape of the transfer characteristic
is half parabola.
Transfer characteristic curves
Transfer Characteristics
Expression for saturation current
The characteristic is
approximately represented by the
half parabola.
Expression for saturation current
Expression for saturation current
 Slope of the transfer characteristic at
IDss
We have Substituting
 JFET small signal model
In this drain current ID is controlled
byVGS and it is included as current source
from drain to source.
Input impedance is high.Hence it is
shown as open circuited at input
terminals.
Out put Resistor rD is connected between
source and drain .
JFET small signal model
In this equivalent circuit if rD is
ignored then the current source is
controlled by Vgs .Thus FET is a Voltage
Controlled Device.
JFET small signal model diagram
 n-Channel Enhancement MOSFET Construction
n Channel MOSFET consist of a highly doped
‘p’ type substrate.
In to this two heavily doped regions are
diffused.
These n regions will act as source and drain.
A thin layer of silicon dioxide is grown over
the surface of the substrate.
A metal area is overlaid on the entire oxide
layer .Metal contacts are made to source and
drain.
n-Channel Enhancement MOSFET
Construction Diagram.
Metal area of the gate in conjunction
with silicon dioxide layer and
semiconductor channel forms a parallel
plate capacitor.
Since gate is insulated from the
substrate this device is called insulated
junction field effect transistor.
This sio2 layer provides extremely high
input impedance to the device.
n-Channel Enhancement MOSFET
Construction
Parallel plate capacitor action : When
the applied gate voltage is positive, due
to parallel plate capacitor action an
inversion layer i.e an n-channel is
created in the p type substrate.
A channel has been enhanced hence
the name enhancement MOSFET
n-Channel Enhancement
MOSFET Construction
N channel enhancement MOSFET
operation
N channel enhancement MOSFET
operation
Here substrate is grounded and
positive voltage is applied at the gate.
positive charge on the gate induces
equal negative charge on the substrate
between source and drain regions.
The negative charge of electrons which
are minority in the P type substrate
forms an inversion layer
N channel enhancement MOSFET
operation
As the positive voltage of Gate is
increases,the induced negative charge
in the semiconductor increases .Hence
conductivity increases.
Current flows from source to drain
through the induced channel.
Thus drain current is enhanced by the
positive gate voltage.
Enhancement Characteristics
N channel Depletion MOSFET
construction
In n channel depletion MOSFET n channel
is diffused between the source and drain .
Case-I
When VGS = 0 and drain is at positive
potential
the electrons flows through the n channel
from source to drain. Hence the Drain
current flows.
Case-II: Gate voltage is made negative
 N channel Depletion MOSFET
construction
Positive charge consisting of holes is induced
in to the channel through sio2 layer and gate
capacitor.
Positive charge causes depletion of the mobile
charges in the channel.
Thus depletion region is produced in the
channel.
The channel will be wedged due to the
depletion region and drain current reduces.
Case –III
When VDS is further increased ID increases and it
become practically constant at certain value of voltage
called “pinch off voltage”.
The drain current almost get saturated beyond pinch
off voltage.
N channel Depletion MOSFET working
 Depletion MOSFET-Enhancement
mode.
Depletion MOSFET can be operated in the
Enhancemode.
It is necessary to apply positive gate voltage so
the negative charges are induced in to ntype
channel.
Hence conductivity of channel increases there
by causing the drain current to increase.
Deplition Mosfet can also be called as Dual
Mosfet since it ia working inboth the modes.
Depletion Mosfet Characterstics
 Comparison of MOSFET and JFET
MOSFET JFET
Here transverse electric Here transverse electric
field will induce across field will induce across
an inversion layer reverse bias pn junction
diode.
Input impedance is very Input impedance is High
High. ( ) of the order of
Drain resistance is low Drain Resistance is high
Easy to fabricate Difficult to fabricate
compared with JFET compared with
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MOSFET.
 Application of MOSFET:
 In VLSI technology MOSFETS are
preferred rather than JFETS.
Disadvantage of MOSFET : Extremely
high protection is needed for the gate
circuit due to thin sio2 layer.

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