1) A detector senses cars at a highway-farm road intersection. If no cars, the highway light stays green. If cars are detected, the highway light turns amber then red, and the farm road light turns green.
2) Design a 6-state counter using only 2-input NAND gates and T flip-flops. Draw the timing diagram for 6 clock cycles.
3) Design a circuit using D flip-flops such that the output Z becomes 1 after the input X remains 1 for 3 clock cycles, and is otherwise 0. Draw the state diagram and circuit design.
1) A detector senses cars at a highway-farm road intersection. If no cars, the highway light stays green. If cars are detected, the highway light turns amber then red, and the farm road light turns green.
2) Design a 6-state counter using only 2-input NAND gates and T flip-flops. Draw the timing diagram for 6 clock cycles.
3) Design a circuit using D flip-flops such that the output Z becomes 1 after the input X remains 1 for 3 clock cycles, and is otherwise 0. Draw the state diagram and circuit design.
1) A detector senses cars at a highway-farm road intersection. If no cars, the highway light stays green. If cars are detected, the highway light turns amber then red, and the farm road light turns green.
2) Design a 6-state counter using only 2-input NAND gates and T flip-flops. Draw the timing diagram for 6 clock cycles.
3) Design a circuit using D flip-flops such that the output Z becomes 1 after the input X remains 1 for 3 clock cycles, and is otherwise 0. Draw the state diagram and circuit design.
Q1. A busy highway is intersected by a little used farm road. Detectors
are installed that cause the signal, C, to go high in the presence of cars on the farm road at the crossing. We wish to control traffic lights at the intersection so that the absence of any cars waiting to cross or turn right on the highway from the farm road, the highway light will remain green. If any car/cars is/are detected at the farm road intersection, we turn the highway light to amber and then to Red and the farm road light to green. The farm road light to remain green only while the detectors detect car(s) on the farm road junction but never longer than 20 seconds. The farm road light then moves to amber and then to Red and the highway light to green. The highway lights are not to be interrupted for 40 seconds after it turns green.
Q2. Design a synchronous modulo 6 counter. Assume a gate delay of τ sec.
and a FF delay of 3τ seconds. Use only 2 input NAND gates to realize your combinational logic. Use T flip flops for your design. Draw the timing diagram for six cycles for all the outputs and T inputs.
Q3. Design a synchronous circuit using positive edge triggered D FF with
one external input X and one output Z. When X remains 1 for three successive clocks, the output Z goes to 1 on the third clock timing event. For all other combinations of X and clock the output Z is to be 0 and the machine returns to the rest state. Draw the State Diagram and design the state machine.