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  • Fdc:Semi Sept 2011. Atkt Exam (Time 3Hrs and Marks:100)

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    Manoj Vinchu
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    The document contains instructions for an exam on digital electronics concepts. It includes 6 questions with multiple parts each. Question 1 is compulsory and covers the topics of Master slave JK flip flops, cache memory, and embedded operating systems. Questions 2 through 6 each have 3 parts on topics such as binary to gray code conversion, two's complement arithmetic, toggle flip flops, multiplexers, Karnaugh maps, sum of products form, NAND gates, preset and clear, delay flip flops, demultiplexers, shift registers, and Boolean algebra equations. Students are instructed to attempt any 4 of questions 2 through 6.

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    The document contains instructions for an exam on digital electronics concepts. It includes 6 questions with multiple parts each. Question 1 is compulsory and covers the topics of Master slave JK flip flops, cache memory, and embedded operating systems. Questions 2 through 6 each have 3 parts on topics such as binary to gray code conversion, two's complement arithmetic, toggle flip flops, multiplexers, Karnaugh maps, sum of products form, NAND gates, preset and clear, delay flip flops, demultiplexers, shift registers, and Boolean algebra equations. Students are instructed to attempt any 4 of questions 2 through 6.

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    Attribution Non-Commercial (BY-NC)
    Download as DOCX, PDF, TXT or read online from Scribd
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    8 views2 pages

    Fdc:Semi Sept 2011. Atkt Exam (Time 3Hrs and Marks:100)

    Uploaded by

    Manoj Vinchu
    The document contains instructions for an exam on digital electronics concepts. It includes 6 questions with multiple parts each. Question 1 is compulsory and covers the topics of Master slave JK flip flops, cache memory, and embedded operating systems. Questions 2 through 6 each have 3 parts on topics such as binary to gray code conversion, two's complement arithmetic, toggle flip flops, multiplexers, Karnaugh maps, sum of products form, NAND gates, preset and clear, delay flip flops, demultiplexers, shift registers, and Boolean algebra equations. Students are instructed to attempt any 4 of questions 2 through 6.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOCX, PDF, TXT or read online from Scribd
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    FDC:SemI Sept 2011. ATKT exam (time 3hrs and marks :100) Instructions: Q1 is compulsory. Q2 to Q6 attempt any four.

    r. Q1.a.Explain Master slave JK flip flop. b.What do you understand by cache memory? c.Explain embedded operating systems. Q2 .Design a binary to gray code convertor. Q3 a.Subtract using twos complement arithmetic. 1) 2) b.Explain toggle flip flop. c.Implement the expression using 8:1 multiplexer. F(A,B,C,D)=M(1,3,5,6,8,10,12,14,15) Q4.a.Make a Kmap for the function : f=AB + AC + C+ AD+ ABC +ABC b.Express it in sop form c.Minimise it and realize the minimized expression using nand gates only. Q5 a.Explain the use of preset and clear. b. explain delay flip flop c. implement full subtractor using demux. Q6 a.what are shift regiseters. b.explain the race around condition. C.Using Boolean algebra solve: i)A+A.B+A.B=A+B (20) (20) (20) (20) (20) (20)

    2)A.B+A.B+A.B=A+B

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