Reg.

No: Regulation-2007
(A)

SRI RAMAKRISHNA ENGINEERING COLLEGE, COIMBATORE

(Autonomous Institution, Approved by AICTE and Affiliated to Anna University, Chennai)
AUTONOMOUS EXAMINATIONS - MAY 2014
THIRD SEMESTER - B.TECH INFORMATION TECHNOLOGY
07AF303 – DIGITAL INTEGRATED CIRCUITS AND LOGICAL DESIGN
Answer ALL questions

Duration: 3 Hours Maximum: 100 Marks

PART - A (10 x 1 = 10 Marks)
1. Decimal 63 equals ___________ in octal .
a)77 b)111 c) 112 d)78

2. Write the Boolean expression for 3 input NAND Gate.

a)A+B+C = Y b) A.B.C = Y c) A+B-C =Y d) (A+B).C=Y

3. Construct a logic circuit using AND,OR, and NOT gates from following expression.
a) (A+B) . (A+B) =Y b) (A+B). C =Y c) (A+B).(C+D).(A+C) =Y

4. State two Demorgans theorems.

a) b)

c) d)

5. RS flip flops has active ________ Inputs.

a) High b) Low c) Low high d) Medium

6. A(n) ________JK flip flop was both positive & negative edge of clock pulse for
date transfer.
a) positive edge b) negative edge c) master slave d) none of these

7. A half adder circuit is used for adding only ________ column of a binary addition
Problem
a) 1’s b) 2’s c) 4’s d) 8’s

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 8. A counter that triggers all the flip flops at same instant is called
a) ripple b) synchronous c) parallel d) series

9. ___________ is the fastest at all Logic families for high speed application.
a) TTL b) ECL c) RTl d) none

10. A _______ counter is a shift register that has a recirculating line with a pattern as
0’s & 1’s .
a) Synchronous b) ring c) ripple d) None

PART-B (5 X 2= 10 MARKS)

1. Given the two binary numbers X=(1010100)2 and Y=(1000011)2, perform the
subtraction using 2’s complement.
2. Simplify the Boolean function F(x,y,z)=∑(0,2,6,7) using k-map.
3. Draw the logic diagram of half adder and write its truth table.
4. Whether ROM is classified as non-volatile? Why?
5. Define ASM chart.

PART - C (5 x 16 = 80 Marks)

11. a Find the complement of the following expression

) i) (4)
ii) (4)
iii) Convert into gray (11001011)2 (4)
iv) Convert into hexadecimal (10110001101011.11110010)2 (4)

(OR)
b) i) Express the following function in sum of minterms and product of (10)
maxterms F(A,B,C,D)=
ii) Obtain the Canonical POS for F(A,B,C)= ) (6)

12. a) Simplify the Boolean function F(A,B,C,D)=Ʃ(1,3,5,7,9,11) with don’t (16)

care condition d(A,B,C,D)=Ʃ(8,12,14,15) in SOP and POS. Realize it

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 using NAND and NOR gates respectively.

(OR)
b) Using Quine-McCluskey method, obtain the prime implicants for the (16)

following Boolean function. F(A,B,C,D)=Ʃ(1,2,3,7,8,9,10,11,14,15)

13. a) i) Implement the following function using multiplexer: (8)

F(A,B,C,D)= Ʃ(0,1,3,4,8,9,15)
ii) Obtain a static hazard free asynchronous circuit for the following (8)
function F= and F=
(OR)
b) i) Explain working of Master/Slave JK flip flop. (8)
ii) Design and explain the working of an up–down ripple counter. (8)

14. a) i) Construct a 4-bit parallel binary adder/subtractor using IC 7483. (8)

Explain its working principles.
ii) Construct an 8-bit magnitude comparator using IC 7485. (8)

(OR)
b) A combinational circuit is defined by functions. (16)
F1(A,B,C,D)=∑(3,5,6,7)
F2(A, B,C,D)=∑(0,2,4,7). Implement the circuit with a PLA.

Compulsory Question:
15. i) Write short notes on ECL and CMOS. (8)
ii) Explain the operation of inverter with tri-state output in TTL family (8)
with necessary diagram.
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