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PowerBlock 50 FPGA-4600/4110 Module

Real-Time Signal Processing and I/O Engine
Ultra-compact, rugged form factor with innovative conductioncooled design for harsh environments Features Xilinx Virtex-4 FX Series FPGA Gigabit Ethernet connection for external front-panel I/O High-bandwidth PCI Express interface to system backplane for inter-processor communication Customizable I/O capability
The PowerBlock 50 FPGA-4600/4110 Module from Mercury Computer Systems is a real-time signal processing and I/O card specifically designed for use in PowerBlock 50 ultra-compact embedded computers. Featuring either a Xilinx Virtex-4 FX60 or FX100 FPGA (field-programmable gate array) device, the module is ideal for demanding real-time sensor interfacing and signal processing applications. An integrated I/O daughtercard provides external I/O. The standard daughtercard provides support for two Gigabit Ethernet connections and an RS-232 serial connection. The standard internal chassis interconnection module allows only a single Ethernet and RS-232 connection to be routed to the chassis front-panel bulkhead plate. The FPGA4600/4110 can support up to 28 single-ended GPIO connections and 7 LVDS connections via a customized daughtercard and interconnection module. The FPGA-4600/4110, when integrated as part of a complete PowerBlock 50 system, can load onboard flash under the control of the chassis root-complex processor module.

Processing Engine
The Xilinx Virtex FX Series features dual integrated 405 Power Architecture cores for optional use, and can provide up to 60 or 100 thousand logic blocks, depending on the device chosen. The FPGA is supported by a 64-bit bank of DDR2-400 SDRAM for high-speed data memory accesses and an additional bank of NOR flash memory for self-boot and persistent memory store.

Flexible I/O Subsystem

The FPGA-4600/4110s flexible daughtercard architecture allows the I/O for the board to be customized to meet specific application needs. The fully integrated module has three components: Main card houses the Xilinx FPGA device. Heat spreader is an aluminum heat sink used to spread the heat to the chassis walls. I/O daughtercard connects to a flex-circuit for carrying I/O signals to and from the PowerBlock 50 chassis front panel.

I/O Architecture
The PowerBlock 50 FPGA-4600/4110 Module connects to the PowerBlock 50 system backplane via four PCI Express lanes, providing 8 Gbps of full-duplex data bandwidth as the primary interconnect to other components in the system. A standard I2C serial bus is also brought off-board for system management, allowing the FPGA-4600/4110 to be monitored from the chassis root-complex processor module.
EEPROM Temp Sensor DDR2 256/512 MB Daughtercard Daughtercard Connector Backplane Connector #1 I2C
100 MHz PCIe x1 PCIe x4

EEPROM I2C RS-232 Buffer External I/O Connector

Backplane Connector #2

PCIe x3

Virtex-4 FX-60/100 (FF1152 Package)

100 MHz 250 MHz

28x GPIO 7x LVDS IO MGT MGT

Dual Gigabit Ethernet PHY

Transformer

PPL
Local Bus 16b

250 MHz 100 MHz

CPLD

Intel NOR Flash 32/64 MB

Not used on standard daughtercard

Figure 1. PowerBlock 50 FPGA-4600/4110 Module block diagram

Figure 2. Integrated I/O daughtercard architecture

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The I/O subsystem of the PowerBlock 50 system is designed for easy customization, depending on the I/O requirements of the target application. This is done through the modification of the individual processing module daughtercards, the I/O flex circuit, and, if required, the front-panel connector bulkhead plate. This design allows the PowerBlock 50 to be easily configured and tailored to meet the needs of virtually any high-performance signal processing application.

Backplane Interconnect Switch fabric 4-lane PCI Express serial interconnect, 10 Gbps, full-duplex System management I2C-based system management bus (SMBus) Integrated I/O Ethernet I/O Two Gigabit Ethernet ports on standard I/O daughtercard Serial I/O RS-232 on standard I/O daughtercard General-purpose I/O (for use with custom I/O daughtercard) 28x single-ended, LVTTL GPIO pins 7x LVDS (or 14x single-ended) GPIO pins Software Development tools Network-based FPGA flash upload capability Operating System Support Linux via proxy control from the root complex card Custom Engineering I/O daughtercard design kit and custom services available on request.

Mercury Professional Services

Customized configurations for the I/O subsystem are possible in addition to other customized system offerings at the board or system level. Consult with Mercurys professional services team to discuss your unique needs and requirements. With over 25 years of experience in addressing real-time multiprocessing complexities, Mercury can work with you to develop a custom solution, as required by your application. Our areas of expertise include embedded hardware design, algorithm optimization, and middleware framework development, as well as experience in meeting difficult environmental requirements.

Software Environment
The FPGA-4600/4110, when integrated as part of a complete system, comes with Linux BSP support.

Configurations
The PowerBlock 50 is sold only as a complete, fully configured system. The PowerBlock 50 FPGA-4600/4110 Module is not sold as a stand-alone module.

Environmental* Temperature Operating Storage Humidity 0 to 55C per VITA-47 CC1 -40C to +85C per VITA-47 CC1 15-90% RH, non-condensing

Specifications
Mechanical Size with daughtercard 100 mm x 89 mm x 15 mm (3.9 in x 3.4 in x 0.59 in) Weight Main card 83 g (2.93 oz) Fully integrated module 174 g (6.85 oz) Processing Engine FPGA Xilinx Virtex-4 FX60 or FX100 device FX60 60k logic block, 128 DSP slices, 4.2 Mb RAM FX100 100k logic block, 160 DSP slices, 6.8 Mb RAM External Memory SDRAM DDR2-400 64-bit SDRAM FX60 256 MB FX100 512 MB NOR flash FX60 32 MB FX100 64 MB

*The environmental parameters listed are for the system as currently qualified using the supported components as specified in the engineering development kit (EDK). Qualification in your application is dependent upon the heat exchange unit chosen, as well as the cooling fluid used. For further details, consult factory.

Electrical Input voltage 12V DC 2.5A (maximum) 3.3V DC 1.5A (maximum) Power consumption Absolute maximum 35W (application dependent) Typical 13-18W (application dependent)

Some of Mercurys products are subject to the jurisdiction of the U. S. International Traffic in Arms Regulations (ITAR). Please contact your Mercury sales representative for more information. PowerBlock ia a registered trademark and Challenges Drive Innovation is a trademark of Mercury Computer Systems, Inc. Other products mentioned may be trademarks or registered trademarks of their respective holders. Mercury Computer Systems, Inc. believes this information is accurate as of its publication date and is not responsible for any inadvertent errors. The information contained herein is subject to change without notice. Copyright 2008 Mercury Computer Systems, Inc. 1640.03E-DS-0908-PB50_fpga4600

Worldwide Locations Mercury Computer Systems has R&D, support and sales locations in France, Germany, Japan, the United Kingdom and the United States. For office locations and contact information, please call the corporate headquarters or visit our Web site at www.mc.com.

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