3GPP TSG RAN Meeting #16 Marco Island, FL, U.S.A.

, 4 7, June 2002

R1-02-0812
CR-Form-v5

CHANGE REQUEST

25.211 CR 157

rev

Current version:

5.0.0

For HELP on using this form, see bottom of this page or look at the pop-up text over the symbols. Proposed change affects: Title: Source: (U)SIM ME/UE X Radio Access Network X Core Network

Clarification for uplink HS-DPCCH/HS-PDSCH timing TSG RAN WG1 Date: 15th May, 2002 Release: REL-5

Work item code: HSDPA-Phys Category: F

Use one of the following categories: Use one of the following releases: F (correction) 2 (GSM Phase 2) A (corresponds to a correction in an earlier release) R96 (Release 1996) B (addition of feature), R97 (Release 1997) C (functional modification of feature) R98 (Release 1998) D (editorial modification) R99 (Release 1999) Detailed explanations of the above categories can REL-4 (Release 4) be found in 3GPP TR 21.900. REL-5 (Release 5)

Reason for change:

With current specification of uplink HS-DPCCH/HS-PDSCH timing, there is the possibility that the UE changes the start of the HS-DPCCH relative to the start of the UL DPCCH without the Node B having the possibility of doing the same change.

Summary of change: Statement added clarifying that the UE shall only modify the start of HS-DPCCH relative to Ul DPCCH when downlink signalling on timing adjustment takes place. Consequences if not approved: Clauses affected: Other specs affected: Node B risks losing slot synchronisation of HS-DPCCH. 7.7 Other core specifications Test specifications O&M Specifications

Other comments:

How to create CRs using this form:

Comprehensive information and tips about how to create CRs can be found at: http://www.3gpp.org/3G_Specs/CRs.htm. Below is a brief summary: 1) Fill out the above form. The symbols above marked contain pop-up help information about the field that they are closest to. 2) Obtain the latest version for the release of the specification to which the change is proposed. Use the MS Word "revision marks" feature (also known as "track changes") when making the changes. All 3GPP specifications can be downloaded from the 3GPP server under ftp://ftp.3gpp.org/specs/ For the latest version, look for the directory name with the latest date e.g. 2001-03 contains the specifications resulting from the March 2001 TSG meetings.

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3) With "track changes" disabled, paste the entire CR form (use CTRL-A to select it) into the specification just in front of the clause containing the first piece of changed text. Delete those parts of the specification which are not relevant to the change request.

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Release 5

47

3GPP TS 25.211 V5.0.0 (2002-03)

Uplink/downlink timing at UE
At the UE, the uplink DPCCH/DPDCH frame transmission takes place approximately T 0 chips after the reception of the first detected path (in time) of the corresponding downlink DPCCH/DPDCH frame. T0 is a constant defined to be 1024 chips. The first detected path (in time) is defined implicitly by the relevant tests in [14]. More information about the uplink/downlink timing relation and meaning of T0 can be found in [5].

7.7 Uplink DPCCH/HS-DPCCH/HS-PDSCH timing at the UE

Figure 37 shows the timing offset between the downlink associated uplink DPCCH, the HS-PDSCH and the uplink HSDPCCH at the UE. The code-multiplexed uplink HS-DPCCH sub-frame starts m*256 m 256 chips after the start of thean uplink DPCCH slot with m selected by the UE such that the ACK/NACK transmission starts within the first 0255 chips after 7.5 slots following the end of the received HS-PDSCH sub-frame. UE and Node B shall only update m in connection to UTRAN reconfiguration of downlink timing. Note that due to autonomous adjustments of the DPDCH/DPCCH transmission time instant by the UE described in [5], the relationships described in this section may cease to be valid. More information about the uplink timing adjustments can be found in [5].
Tslot 2560 chips Uplink DPCCH 3Tslot 7680 chips HS-PDSCH at UE UEP (7.5Tslot = 19200 chips) HS-DPCCH m256 chips 3Tslot 7680 chips 0-255 chips

Figure 37: Timing structure at UE for UL HS-DPCCH control signalling

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