Kinetis L Series

TM
Kinetis L Series
powered by
ARM Cortex-M0+ Processors
Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C-Ware, the Energy Efficient Solutions logo, Kinetis, mobileGT, PowerQUICC, Processor Expert, QorIQ, Qorivva, StarCore, Symphony and VortiQa are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, CoreNet, Flexis, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine, Ready Play, SafeAssure, the SafeAssure logo, SMARTMOS, TurboLink, Vybrid and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. 2012 Freescale Semiconductor, Inc.
powered by
ARM Cortex-M0+ ARM Cortex-M4(F)
TM
Kinetis Microcontrollers
Design Potential. Realized
Vybrid Controller Solutions

Rich Apps in Real Time.
i.MX Application Processors

Your Interface to the World.
QorIQ Processors built on Layerscape Architecture

Accelerating the Networks IQ
Industrys most scalable ultra-low-power, mixedsignal MCU solutions based on the ARM Cortex-M4 and CortexM0+ architectures.
Real-time, highly integrated solutions with best-in-class 2D graphics to enable your system to control, interface, connect, secure and scale.
Industrys most versatile solutions for multimedia and display applications, with multicore scalability and market-leading power, performance & integration.
Industrys first softwareaware, core-agnostic networking system architecture for the smarter, more capable networks of tomorrow end to end.
Consumer Industrial
Consumer Automotive Industrial
Networking Industrial
Freescale has the industrys broadest range of solutions built on ARM technology for automotive, industrial, consumer and networking applications.
Find your ideal solution at the price, performance and power level you desire, and leverage the extensive software and tool bundles available to speed and ease your design process.
3
TM
Kinetis L Series
Processor ARM Cortex-M0+ Up to 48MHz Typical ~50uA/MHz ( VLPR Mode ) 8kB 256kB Flash 1kB 32kB SRAM 16 121 Pin
Kinetis K Series
ARM Cortex-M4 ( with optional SPFPU ) Up to 50 / 72 / 100 / 120 / 150MHz Typical ~200uA/MHz ( VLPR Mode ) 32kB 1MB Flash 8kB 128kB SRAM 32 256 Pin Baseline / Mixed-Signal and optional FlexMemory, USB, Segment LCD, CAN, Ethernet, Graphic LCD, DRAM-CTRL, NAND-FlashCTRL, Crypto, Anti-Tamper From $0.99 ( MK10x, 32KB, 32QFN ) Freescale free RTOS called MQX
www.freescale.com/MQX
Performance
Ultra Low Power
Memory
Pin-Count Features MQX-Lite +USB and Peripherals Drivers (also within Processor Expert Code Generator)
Baseline / Mixed-Signal and optional Segment LCD, USB
including USB / Ethernet / MS File System / Peripherals Driver
Price
From $0.49 ( MKL02x, 8KB, 16QFN )
Demo Board
www.freescale.com/FREEDOM www.freescale.com/TOWER
www.freescale.com/KINETIS
TM
Note: Availability device dependent
Feature rich Easy-to-use Increased control Sleek design Extended battery life
Sensor HMI Medical Industrial IO
Motor
Data Logger
Communication
Kinetis L Series MCUs

powered by
Instrumentation
ARM Cortex-M0+ Processors
TM
8/16-bit MCU
Connectivity
32-bit MCU
User Interface
Power Consumption
Ultra low sleep/ power-down currents
Maximum energy-efficiency (CoreMark/mW)
Computation
+ -
Unique platforms, MCU dependent/$$$ Limited choice, single-source
logsin
n
Software/Cost of Ownership
Scalable, reusable platforms with modern software techniques/$ Broad MCU portfolios, multi-source
Scalability
TM
http://www.youtube.com/watch?v=cbEx-vY9GSk
TM
MCU
ARM Cortex-M0+ Core
48MHz, 1.77 CoreMark/MHz, 2-Stage Pipeline, 1-Cycle GPIO, Micro Trace Buffer
Enablement Bundle
System
Asynchronous DMA Bit Manipulation Engine Cross Bar Switch
Freedom / Tower Development Platform

Low-cost, reusable, multiple expansion options
90nm TFS Memory

Low-power, high-reliability 8-256KB Flash 1-32KB SRAM
Energy Management
Clock & Power Gating, LVD RUN/WAIT/STOP modes <50A/MHz, 4s wake-up
Integrated Development Environment

CodeWarrior, IAR, Keil, GNU, Code Red
Precision Analog
12/16-bit ADC 12-bit DAC Analog Comparator
Communications & UI
USB OTG + V. Reg. Low Power SCI, SCI, SPI, IIC, IIS Segment LCD, Touch Sensing
Processor Expert / MCU Solution Advisor

Software generation tool for device drivers/start-up code. Interactive MCU selector
Clock Management
Internal (1KHz, 32KHz, 4MHz) Crystal Osc. (32KHz / 3-32 MHz) PLL/FLL for 48MHz operation
Timing & Control

Timer/PWM Module Low Power Timer Periodic Interrupt Timer Real Time Clock
MQX Lite RTOS

Lightweight, small footprint, Processor Expert integrated
Operating Voltage: 1.71Volt to 3.6Volt Operating Temperature: -40C to +105C
Freescale free RTOS called MQX www.freescale.com/MQX
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Kinetis K Series Kinetis L Series
Performance / Functionality
ARM Cortex-M4(F) ARM Cortex-M3 ARM Cortex-M0+ ARM Cortex-M0
ARM Cortex-M1
FPGA
Low Cost MCU
High End MCU
TM
ARM Cortex-M0+ Whats the + stand for?

Processor consumption as low as 9A/MHz 30% power reduction from Cortex-M0 56% increased energy efficiency from Cortex-M0 Outstanding result of 1.77 CoreMark/MHz 2 to 40 times higher performance compared to 8/16-bit architectures including TI MSP430, Microchip PIC18 & PIC24, and Atmel ATXmega 9% increased performance from Cortex-M0
Enhanced
Enhanced
Enhanced New Enhanced New
ARMv6-M architecture, NVIC, etc Single-cycle fast I/O access port facilitates bit-banging and software protocol emulation, keeping an 8-bit look and feel Up to 50% faster than normal I/O Micro Trace Buffer (MTB) for faster debug Interrupt latency decreased by 1 cycle Single-cycle 32b x 32b multiply instruction Re-locatable Vector Table
Ultra Low Power embedded systems or mixed signals devices
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Most energy-efficient 32-bit processor on the market.
45 40 35 30 25 20 15 10 5 0
Cortex-M0 Cortex-M0+ A (16-bit) B (16-bit) C (8-bit) D (8/16-bit)
42.14
x 2.25
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Processor Energy Efficiency in CoreMark/mA
Power reduction leading to consumption as low as 9uA/MHz (core only) 2-stage pipeline improving energy efficiency with increased throughput/mA Interrupt latency decreased by 1 cycle Increased performance with CoreMark/MHz raised to 1.77
18.6
10.09
5.29 6.04
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Reduced 2 stage pipeline
Decreasing interrupt latency by 1 cycle
Enhanced
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16-bit Multiplication Example
12,000
CoreMark Code in kB
10,206
10,000
1 cycle 2 Byte Code Size
10,066
8cycles, 8Byte Code Size
8,000
6,446
6,000 4,896 4,000
5,418 48cycles*, 48Byte Code Size
*8051 needs at least 1cycle per instruction byte fetch as they only have an 8-bit interface
2,000
0 Corex-M0+ A (16-bit) B (16-bit) C (8-bit) D (8/16-bit)
CoreMark code compiled optimized for size. Same MCUs as for CoreMark/mA benchmark.
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Kinetis L Series Technology

60 52 50 42 40
Kinetis MCUs
Best trade-off between static and dynamic power consumption.
Optimizing consumption
Gate count optimized, starting 12kGate Reduced accesses to the program memory
Dynamic Power scales well with process

But beware of static consumption 90nm is a good trade-off
30 20
11 10 0 180nm
Static
Save precious runtime cycle:

3 0 40nm 32-bit processing capability Shorter 2-stage pipeline: faster non-sequential accesses
1 90nm
Dynamic
uW for minimal configuration
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Kinetis L Series Technology / Power Modes

Mode Definition MCU can be run at full speed. Supports Compute Operation clocking option where bus and system clock are disabled for lowest power core processing and energy-saving peripherals with an alternate asynchronous clock source are operational. MCU maximum frequency is restricted to 4MHz core/platform and 1 MHz bus/flash clock. Supports Compute Operation clocking option. LVD protection is off and flash programming is disallowed. Allows all peripherals to function, while CPU goes to sleep reducing power consumption. No Compute Operation clocking option. Similar to VLP Run, with CPU in sleep to further reduce power. No Compute Operation clocking option. MCU is in static state with LVD protection on. Energy-saving peripherals are operational with Asynchronous DMA (ADMA) feature that can wake-up DMA to perform transfer and return to current mode when complete. AWIC detects wake-up source for CPU. Lowest power mode with option to keep PLL active. Partial stop clocking options for more peripheral functionality available. MCU is in static state with LVD protection off. Energy-saving peripherals are operational with ADMA feature. AWIC detects wake-up source for CPU. MCU is in low leakage state retention power mode. LLWU detects wake-up source for CPU including LPTMR, RTC, TSI, CMP, and select pin interrupts. Fast <4.3us wake-up. MCU is placed in a low leakage mode powering down most internal logic. All system RAM contents are retained and I/O states held. LLWU controls wake-up source for CPU similar to LLS mode. Similar to VLLS3 with no RAM or register file retention.
Run
VLP Run (VLPR) Wait VLP Wait (VLPW)
AWIC
Stop
VLP Stop (VLPS) LL Stop (LLS)
LLWU
VLL Stop 3 (VLLS3) VLL Stop 1 (VLLS1)
VLL Stop 0 (VLLS0)
Pin wakeup supported. LPTMR, RTC, TSI and CMP wake-up supported with external clock. No RAM or register file retention. Optional POR brown-out detection circuitry.
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Kinetis L Series Technology / Power Modes

Mode CPU/Bus Freq.
48/24 MHz
Details
Peripheral Clocks
ENABLED
Typical Idd @ 3V, 25C

6.38mA (133uA/MHz) 4.44mA (93uA/MHz) 3.98mA (83uA/MHz) 219uA (55uA/MHz) 170uA (43uA/MHz) 156uA (39uA/MHz) 3.88mA
Recovery Time
-
RUN
48/24 MHz 48/- MHz 4/1 MHz
MAXIMUM CPU/Bus frequency. Compute clocking option SUPPORTED
DISABLED Compute Operation* ENABLED
VLPR
4/1 MHz 4/- MHz
RESTRICTED CPU/Bus frequency. Compute clocking option SUPPORTED LVD OFF. Flash programming NOT supported
DISABLED Compute Operation*
AWIC
WAIT VLPW STOP
48/24 MHz
MAXIMUM CPU/Bus frequency. CPU in SLEEP, peripherals functional. Compute clocking option NOT supported RESTRICTED CPU/Bus frequency. CPU in SLEEP, peripherals functional. Compute clocking option NOT supported. LVD OFF. Flash programming NOT supported MCU in static state, LVD ON. Energy-saving peripherals functional with ADMA. AWIC detects wake-up source for CPU.
DISABLED
4/1 MHz
DISABLED
112uA
4us
309uA
4.3us
VLPS
Same as STOP mode. LVD OFF.

MCU in low-leakage state retention power mode. LLWU detects wake-up source for CPU including LPTMR, RTC, TSI, CMP, and select pin interrupts. Fast wake-up. MCU in low-leakage mode, most internal logic OFF. All RAM contents retained and I/O states held. LLWU controls wake-up source for CPU similar to LLS mode. Similar to VLLS3 Pin wakeup supported. LPTMR, RTC, TSI and CMP wake-up supported with external clock. Optional POR brown-out detection circuitry.
2379nA
1738nA 1344nA 713nA 411nA (POR) / 205nA (no POR)
4.3us
4.6us 53us 115us 115us
LLWU
LLS VLLS3 VLLS1 VLLS0
*Compute Operation shuts off bus and system clock for lowest power core processing. Peripherals with an alternate asynchronous clock source can continue to operate. Note: device dependent
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Kinetis L Series AWIC and LLWU

Wake-up source Available system resets Low-voltage detect Low-voltage warning Pin interrupts ADC CMP0 I2C UART0 Description RESET pin when LPO is its clock source Power management controller - functional in Stop mode Power management controller - functional in Stop mode Port control module - any enabled pin The ADC is functional when using internal clock source Interrupt in normal or trigger mode Address match wakeup Any interrupt provided clock remains enabled
Asynchronous Wake-up Interrupt Controller
UART1 and UART2

RTC TSI NMI TPMx LPTMR SPI
TM
Active edge on RXD

Alarm or seconds interrupt Any interrupt NMI pin Any interrupt provided clock remains enabled Any interrupt provided clock remains enabled Slave mode interrupt Multiple wakesources selectable
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Kinetis L Series AWIC and LLWU

Wake-up source PTB0 PTC1 PTC3 PTC4 PTC5 PTC6
Low Leakage Wake-up Unit
PTD4
PTD6
LPTMR0
CMP0 TSI0 RTC Alarm RTC Seconds
TM
The LLWU implements optional 3cycle glitch filters, based on the LPO clock.
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Kinetis L Series Technology / Clock

Internal RC OSCs
FLL External Clock Input 32 kHz to 40 kHz or 3 MHz to 32 MHz crystal PLL
Power- and Clock Gating
1kHz LPO
Low Power Boot configure reset time to eliminate power spikes
RTC
RTC Output
Power Management Low Voltage Detection, POR
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Kinetis L Series Technology / System

ARM CortexM0+ and NVIC Crossbar
Support concurrent access from Master (Core and DMA) to Slaves (Memory and Peripherals)
MTB
Micro-Trace buffer is an efficient way of expanding debug capabilities
SRAM
Vector re-location Up to 50% faster than normal I/O
Rapid GPIOs (Fast IO)
Asynchronous Direct Memory Access

Bit Manipulation Engine

Flash Memory Controller
TM
Speculation pre-fetch and 4-Way by 4-set x 32-bit for a total of 64bytes
provide 0 wait state access times when hit
Support decorate load and store
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Kinetis L Series SWD & MTB

SWD Serial Wire Debug ARM Implementation: 2 wire debug interface low cost trace solution information is read back over serial wire interface
Low cost and pin count
MTB Macro-Trace Buffer
Fasten your development
Micro-Trace buffer is an efficient way of expanding debug capabilities New to the ARM Cortex M0+
Stores change of flow information is a user defined area of system RAM Address branched from Address branched to Encodes cause of the branch (exception/instruction) Debugger can read back the trace packets and recreate an instruction by instruction trace.
When enabled, the MTB records changes in program flow (branches and interrupts) reported by the processor into a configurable region of the SRAM.
Subsequently either an on-chip or off-chip debugger may extract the trace information which would allow reconstruction of an instruction flow.
MTB
Can be configured either by application code or by the debugger Tracing can be halted when the buffer is full or can be allowed to wrap Watch points offer trace start/stop based on address or data value
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Kinetis L Series Bit Manipulation Engine (BME)

Provides hardware support for atomic read-modify-write operations to the peripheral address space. Uses "decorated storage as a means for providing additional semantics for load and store operations. decoration is additional information encoded into the peripheral address used to reference the peripheral memory space.
GPIOA_PDOR ^= 0x02; // Logical XOR

0000005E 00000060 00000062 00000064 00000066 00000068 0x.... LDR R0,??DataTable6_5 ;; 0x400ff000 0x6800 LDR R0,[R0, #+0] 0x2102 MOVS R1,#+2 0x4041 EORS R1,R1,R0 0x.... LDR R0,??DataTable6_5 ;; 0x400ff000 0x6001 STR R1,[R0, #+0]
BME
Uses 12 Bytes

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Kinetis L Series Bit Manipulation Engine (BME)

Provides hardware support for atomic read-modify-write operations to the peripheral address space. Uses "decorated storage as a means for providing additional semantics for load and store operations. decoration is additional information encoded into the peripheral address used to reference the peripheral memory space.
AND OR XOR Bit Field Insert (BFI) Decorated Loads Load and Clear One Bit (LAC1) Load and Set One Bit (LAS1) Unsigned Bit Field Extract (UBFX)
BME C Code Code Size Size 12Bytes 6Bytes
// Macro used to generate hardcoded XOR address #define BME_XOR_ADDR(ADDR) (*(volatile uint32_t *)(((uint32_t)ADDR) | (3<<26))) BME_XOR_ADDR(&GPIOA_PDOR) = 0x02;
00000014 0x.... LDR R0,??DataTable6_6 ;; 0x4c0ff000 00000016 0x2102 MOVS R1,#+2 18 0x6001 STR R1,[R0, #+0]
Task Logical XOR operation
Improvement
50% 75%
Uses 6 Bytes
Reduce code
Reduce cycles
Bit Field Insert 24Bytes 6Bytes

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Kinetis L Series Energy Saving Peripherals (1)

Intelligent peripherals increasing time in deep sleep modes with no CPU
Peripheral DMA Low Power Functionality Allows energy-saving peripherals (ex. ADC, UART and Timer/PWM) to trigger asynchronous DMA request in STOP/VLPS modes to perform DMA transfer and return to current power mode with no CPU intervention Supports asynchronous transmit and receive operations to the bus clock supporting communication down to STOP/VLPS modes. Configurable receiver baud rate oversampling ratio from 4x to 32x allowing higher baud rates with lower clock sources Supports slave mode address match wake-up function and first message capture down to STOP/VLPS modes Supports multiple address match wake-up function down to STOP/VLPS modes Supports asynchronous wakeup on resume signaling down to STOP/VLPS Supports 16-bit timer input capture, output compare and PWM functions down to STOP/VLPS modes Supports 16-bit timer and pulse counter functions in all power modes Supports 32-bit seconds counter with seconds interrupt and programmable alarm in all power modes with include temperature and voltage compensation
UART
SPI I2C USB LPTPM (Timer/PWM) LPTMR (Timer/Pulse Counter) RTC
Note: Availability device dependent 26

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Kinetis L Series Energy Saving Peripherals (2)

Intelligent peripherals increasing time in deep sleep modes with no CPU
Peripheral Low Power Functionality Supports single conversions in multiple result registers down to STOP/VLPS modes with hardware averaging and automatic compare modes Supports threshold crossing detection in all power modes along with a triggered compare mode for lower average power compares
ADC
CMP (Analog Comparator)
DAC Segment LCD

TSI (Capacitive Touch Sense Interface)
Supports static reference in all power modes

Supports alternate displays and blink capability in all power modes
Supports wake-on capacitive touch on single channel in all power modes
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Kinetis L Series asynchronous DMA (aDMA)

Inter-module-connection with aDMA
Peripheral Touch Sense Interface CMP I2S LPUART Wakeup source End of scan Scan out of range Compare detected Receive data ready Transmit data needed Receive data ready Transmit data needed Compare/capture detected Counter overflow External edge detected Conversion complete Kinetis L-Series devices support DMA operation in low power modes Stop modes can be entered with the System Clock enabled Allows peripherals with STOP mode functionality to trigger asynchronous DMA request The MCU will wake from STOP mode to WAIT, process the DMA request and then reenter the STOP mode with no CPU intervention The MCU can be placed in a Compute mode with peripherals configured for STOP. In this mode, the CPU can continue to process data at very low dynamic power Peripherals with STOP mode functionality can continue to operate and trigger DMA transfers
LPTPM
Port Control and Interrupts ADC
Use Case: ADC performing conversions, DMA transferring conversion results into RAM buffer and CPU processing/filtering the data all done with minimal power ~ 300uA at 4MHz Core speed
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Kinetis L Series
12-bit / 16-bit SAR Up 4 pairs of differential (DP) and 24 single-ended (SE) inputs Output modes: DP: up to 16-bit, 13-bit, 11-bit, 9-bit SE: up to 16-bit, 12-bit, 10-bit, 8-bit Single or continuous conversion Hardware averaging CPU offload Configurable Reduce # of interrupts sample time conversion speed/power conversion and average complete flag / interrupt 4 input clock sources operation in Low-Power modes Automatic compare with interrupt for less-than, greater-than or equal-to, within range, or out-of-range, programmable value CPU offload Selectable voltage reference Reduce # of Temperature sensor interrupts Self-Calibration mode
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Kinetis L Series
Operational over the entire supply range Programmable hysteresis control Selectable interrupt: on rising-edge falling-edge or both rising or falling edges Selectable inversion on comparator output Two software selectable performance levels higher power: short propagation delay low power: longer propagation delay DMA transfer support Internal 6-bit DAC as comparator reference
Integration
Embedded 6-bit DAC
CMP_OUT

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Kinetis L Series
12-bit resolutions guaranteed monotonic On-chip programmable reference generator output, 14096 Vin to Vin and step 14096 Vin Vin can be selected from two reference sources 2-word data buffer Hardware or software triggering DMA support
Supports static reference in all power modes
Data buffer can be configured to operate in Normal mode, Swing mode, or One-Time Scan mode

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Kinetis L Series
Up to 6ch and 2ch 16-bit Timer Clock source selectable Prescaler 1, 2, 4, 8, 16, 32, 64, or 128 Can increment on every edge of the asynchronous counter clock Can increment on rising edge of an external clock input synchronized to the asynchronous counter clock Free-running counter or modulo counter Counting can be up or up-down Can be configured for input capture, output compare, or edge-/center-aligned PWM mode Input capture mode the capture can occur on rising edges, falling edges or both edges Output compare mode the output signal can be set, cleared, pulsed, or toggled on match Interrupt and/or DMA request per channel Support module interconnect trigger
TM
Measure and control
32
Kinetis L Series
2ch 32-bit Independent timeout periods for each channel Generate triggers at periodic intervals, when enabled (single shot, continues) Can trigger aDMA Can generate interrupts
Reduce interrupts and cycles offload CPU

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Kinetis L Series
LPTMR 16-bit Timer / Pulse Counter Prescaler for clock source Configurable input source for pulse counter (rising-edge or falling-edge) Support for glitch filtering Supports free-running mode or reset on compare Hardware trigger output Interrupt can generate asynchronous wakeup from any low-power mode Real Time Clock (RTC) 32-bit seconds counter with roll-over protection and 32-bit alarm 16-bit prescaler with compensation that can correct errors between 0.12 ppm and 3906 ppm Register write protection Lock register requires POR or software reset to enable write access 1 Hz square wave output
Pulse Counter

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Kinetis L Series
USB USB 1.1 and USB 2.0 compliant Low- and full-speed device controller On-The-Go protocol logic MQX-Lite Supports +USB and Peripherals On-The-Go (OTG) Drivers (also within Processor Host Expert Code Generator) Device 16 bidirectional end points DMA or FIFO data stream interfaces Low-power consumption USB Voltage Regulator The USB Voltage Regulator module is a LDO linear voltage regulator to provide 3.3V power from an input power supply varying from 2.7 V to 5.5 V. It consists of one 3.3 V power channel. When the input power supply is below 3.6 V, the regulator goes to pass through mode.
TM
Reduce BOM
Low drop-out
linear voltage regulator with one power channel (3.3V) voltage: 300 mV
Output current: 120 mA. 3 power modes: RUN, STANDBY and SHUTDOWN Low quiescent current in RUN mode (typ. 120uA) Very low quiescent current in STANDBY mode (typ. 1 uA) Automatic current limiting (290mA) Automatic power-up Pass-through mode for regulator (input voltages <3.6 V) Small output capacitor: 2.2 uF
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Kinetis L Series
Operation in Master or Slave mode Modes: Flexibility Full-duplex Single-wire bidirectional Programmable transmit bit rate Double-buffered TX and RX data register Serial clock phase and polarity options Slave select output Mode fault error flag with CPU interrupt Selectable shifting MSB-first LSB-first Programmable 8- or 16-bit data transmission length Hardware match feature on receive 64-bit FIFO mode for high speed/large amounts of data transfers Support transmission of both Transmit and Receive by DMA

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Kinetis L Series
Compatible with The I2C-Bus Specification Support for System Management Bus SMBus (SMBus) Specification, version 2
Multimaster operation Software programmable for one of 64 different serial clock frequencies Software-selectable acknowledge bit Interrupt-driven byte-by-byte data transfer Arbitration-lost interrupt with automatic mode switching from master to slave Calling address identification interrupt START / STOP signal generation/detection Repeated START signal generation/detection Acknowledge bit generation and detection Bus busy detection General call recognition 10-bit address extension Programmable glitch input filter Wakeup on slave address match Range slave address support DMA support
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Kinetis L Series
Full-duplex, standard non-return-to-zero (NRZ) format Double-buffered transmitter and receiver with separate enables Programmable baud rates (13-bit modulo div.) Interrupt-driven or polled operation: Transmit data register empty and transmission complete Receive data register full Receive overrun, parity error, framing error, and noise error Support Idle receiver detect for LIN Active edge on receive pin Break detect supporting LIN Hardware parity generation and checking Programmable 8-bit or 9-bit character length 1-bit or 2-bit stop bits Receiver wakeup by idle-line or address-mark Optional 13-bit break character generation / 11-bit break character detection Selectable transmitter output polarity 5-channel DMA interface (on UART1 and UART2)
TM
UART0 supports 4x to 32x over sampling ratio
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Kinetis L Series
Transmitter with independent bit clock and frame sync supporting 1 data channel Receiver with independent bit clock and frame sync supporting 1 data channel Maximum Frame Size of 2 words Word size of between 8-bits and 32-bits Word size configured separately for first word and remaining words in frame Asynchronous 1 32-bit FIFO for each transmit and receive channel Supports graceful restart after FIFO error
TM
Perfect for audio data transfer / applications
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Kinetis L Series
Support up to 16 electrodes Configurable up to 4096 scan times Configurable software or hardware scan trigger Internal reference oscillator for highaccuracy measurement Compensate for temperature and supply voltage variations High sensitivity change with 16-bit resolution register Capability to wake MCU from low power modes Support DMA data transfer Free API Fully supported by touch sensing library www.freescale.com/TSS
Avoid high cost/ high power consumption !
GPIO & Software method requires ext. components, not low power (needs CPU) , offer poor noise immunity External ASIC method cost of external component, increased PCB space

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Kinetis L Series
Up to 64 LCD pins Selectable front plane/back plane Up to 63 front plane signals Ideal for Up to 8 back plane signals battery Programmable powered LCD frame frequency applications Blink modes and frequency LCD duty cycle from static to 1/8 LCD power supply switch (ext. VLL3 power supply option) All segments blank during blink period Blink operation in low-power modes Reduced BOM Internal charge pump (LCD bias voltages, requires only 4 external capacitors) Internal regulated voltage source with a 4-bit trim register (contrast control) LCD display fault detect circuit (LFD) Waveform storage registers (WF) Most failures, where an LCD segment is either unexpectedly on or off, result in Back plane reassignment to assist in erroneous information that can mislead. vertical scrolling on dot-matrix displays LFD function finds faults in the LCD Low power consumption display, display connector, and board Support for segment fault detection connections between the MCU and the
display.

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Kinetis L Series
Reducing the gray area under the energy curve.
Power
Initialization
Collect Data
Compute
Ultra-low Active Current
ENERGY SAVINGS
Ultra-low Standby Current
(Deep) Sleep Mode
(Deep) Sleep Mode
(Deep) Sleep Mode
Very Low Active and Standby Power Consumption
Energy Saving Peripherals
Reduced Processing Time
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Kinetis L Series
http://www.youtube.com/watch?v=FfsMCwUjNxw
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Kinetis L Series Family

Common Features
System
ARM Cortex-M0+ Core, 48MHz Multiple low-power modes & peripherals, low-power Boot, Clock Gating 1.71-3.6V, -40 to 105C [1]
Optional Features
Key Features Family Flash SRAM Pin Count
64-121
USB OTG Y
Seg LCD Y
DMA Y
ADC
16-bit
DAC
12-bit
I2S
Y
TSI
Y
KL46
128-256KB
16-32KB
Memory
90nm TFS Flash, SRAM Internal Memory Security/Protection
KL36 KL34
64-256KB 64KB
8-32KB 8KB
64-121 64-100
Y Y
Y Y
16-bit 12-bit
12-bit
Analog Peripherals
12/16-Bit ADC, 12-bit DAC High-Speed Comparator
KL26 KL25 KL24
128-256KB 32-128KB 32-64KB
16-32KB 4-16KB 4-8KB
64-121 32-80 32-80
Y Y Y
Y Y Y
16-bit 16-bit 12-bit
12-bit 12-bit
Y Y
Serial Interfaces
UART (Including 1 LPUART) SPI, IIC
KL16 KL15 KL14
256KB 32-128KB 32-64KB
16-32KB 4-16KB 4-8KB
64-80 32-80 32-80
Y Y Y
16-bit 16-bit 12-bit
12-bit 12-bit
Y Y
Timers
Real Time Clock [2] 16bit Low Power TPMs (GP Timer/PWM) Low Power Timers 32bit Periodic Interrupt Timer
[1] Feature not available on CSP packages [2] For KL02, use software to support
KL05 KL04
8-32KB 8-32KB
1-4KB 1-4KB
24-48 24-48
Y Y
12-bit 12-bit
12-bit
KL02
8-32KB
1-4KB
16-32
12-bit
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Kinetis L Series Family

Flash Memory
256KB
KL4x USB + Seg. LCD Segment LCD USB General Purpose Entry Level Small Footprint Package KL2x KL1x KL2x KL2x KL1x KL2x KL1x KL2x KL1x KL2x KL1x KL0x KL0x KL3x KL2x KL1x KL4x KL3x KL2x KL1x KL2x KL1x KL2x KL1x
KL4x KL3x KL2x KL4x KL3x KL2x KL3x KL2x KL1x KL2x KL1x
128KB
KL3x
KL2x KL1x KL2x KL1x KL1x KL2x KL1x
32KB 16KB 8KB
64KB
KL0x KL0x KL0x

16 QFN
KL0x
KL0x KL0x KL0x
KL0x KL0x KL0x

32 LQFP / QFN 35 WLCSP
Package
48 LQFP /QFN 64 LQFP 80 LQFP 100 LQFP / 121 MBGA
20 WLCSP
24 QFN
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Kinetis MCU Series Ecosystem & Enablement

Hardware
New
IDE & Code Generation

Freescale & 3rd party IDEs

Run-Time Software & Product Selector

Freescale MQX Lite RTOS
www.freescale.com/mqx
New
Freescale Freedom Platform

FRDM-KL25Z www.freescale.com/FRDM-KL25Z

Low -cost/power platform for entry-level developers ($12.95 / 10 SRP) Integrates a fully featured debugger, that works with all featured tool chains.
Freescale CodeWarrior v10.3: free 64KB Keil MDK: free 32KB IAR EWARM: free 32KB Atollic TrueStudio: free 8KB GCC ARM Embedded via Launchpad.net Additional tool support from Code Red and others in Q412
Free, light-weight MQX kernel customised for small resource MCUs Packaged as a Processor Expert component Upwards compatible with MQX RTOS
Freescale Processor Expert Code Generator
Freescale Tower System

TWR-KL25Z48M www.freescale.com/TWR-KL25Z48M
Free software generation tool for device drivers / start-up code 7 steps from project creation to debug dramatically reduces development time Available within CodeWarrior or as a standalone plug-in for IAR/Keil/GNU IDEs

Solution Advisor
www.freescale.com/sa
Web-based interactive MCU selector Filters for operating characteristics, packaging, memory configuration & peripherals. Verifies muxing compatibility Save, download and print summary reports and pin muxing configurations
Modular, open-source development platform with reusable peripheral modules offering connectivity, analog, graphics LCD and motor control functionality
GNU
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Enablement HW Debugger
Cyclone stand-alone automated programmers
Multilink Universal
Multilink Universal FX
Tracelink
J-Link Ultra
Segger Flasher
I-jet
JTAGjet for ARM
JTAGjet-Trace for ARM
JTAGjet-Trace for Cortex-M
ULINK2
ULINK Pro
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CodeWarrior IDE
or 3rd Party Solutions (i.e. IAR, KEIL, )
+ MQX RTOS
or 3rd Party Solutions (i.e. Greenhills (-velOSity), CMX, C/OS-III, Emcraft Systems (CLinux), FreeRTOS, SEGGER embOS, Quadros (RTXC), )
+ Processor Expert
Productivity
+
as a Real-time Monitor, non intrusive
+ Tower System
+
Processor Module
53
+
TWR-PROTO Peripherals
TM

Teaming up
Productivity ARM Ecosystem
Stacks MQX RTOS BSP
Tool chains
Libraries
Easy to use
Ready-made Components
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Kinetis K Series MCUs, ARM Cortex-M4 Processor

Kinetis L Series MCUs, ARM Cortex-M0+ Processor K70
+ Graphic LCD
K20
+ USB + LCD
K60
+ Ethernet & Crypto
KL2
+ USB + LCD
K50
+ Measurement
K10
KL1
KL0
KL4
K40
+ LCD
+ USB
KL3
+ LCD Freescale Kinetis MCU portfolio consists of multiple hardware- and software-compatible devices powered by ARM Cortex-M4 and ARM Cortex-M0+. Kinetis family concept enable memory and feature scalability as well as exceptional low power and performance. All Kinetis MCUs are supported by a comprehensive Freescale and third-party hardware and software enablement system. + USB
K30
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Kinetis K Series MCUs, ARM Cortex-M4 Processor

Kinetis L Series MCUs, ARM Cortex-M0+ Processor MC9S08Px MCUs, proprietary HC9S08 Core K Series K70 K60 K50 K40 K30 K20 K10 KL4 KL3 KL2 KL1 KL0 KW01 S08Px KM3 KW20 L Series M Series
24-bit sigma delta ADC & PGA
W Series
Sub 1-GHz Radio
W Series
2.4 GHz 802.15.4 RF
HC9S08 Series
8-bit Core
more to come
+ Graphic LCD + Ethernet & Crypto + Measurement + USB and LCD + USB + LCD Baseline Bridge to MC9S08Px
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Kinetis Microcontrollers
Design Potential. Realized
Vybrid Controller Solutions

Rich Apps in Real Time.
i.MX Application Processors

Your Interface to the World.
QorIQ Processors built on Layerscape Architecture

Accelerating the Networks IQ
Industrys most scalable ultra-low-power, mixedsignal MCU solutions based on the ARM Cortex-M4 and CortexM0+ architectures.
Real-time, highly integrated solutions with best-in-class 2D graphics to enable your system to control, interface, connect, secure and scale.
Industrys most versatile solutions for multimedia and display applications, with multicore scalability and market-leading power, performance & integration.
Industrys first softwareaware, core-agnostic networking system architecture for the smarter, more capable networks of tomorrow end to end.
Consumer Industrial
Networking Industrial
Freescale has the industrys broadest range of solutions built on ARM technology for automotive, industrial, consumer and networking applications.
Find your ideal solution at the price, performance and power level you desire, and leverage the extensive software and tool bundles available to speed and ease your design process.
58
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Kinetis MCU Series Solution Advisor

The Solution Advisor helps you quickly identify best-fit processor solutions. Interactive MCU selector guide based on:
Operating characteristics Packaging and memory options A library of configurable hardware modules
www.freescale.com/SolutionAdvisor
Dynamic, sort able, downloadable solution matrix Pin Muxing verification and suggested placement
Session and Contact Management

Save, restore, invite, and share
Generates session summary reports
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32-bit Energy-efficiency Class-leading Coremark/mW Scalability & Integration Kinetis L to K Series (Cortex M0+ to M4) Enablement Freescale bundle + ARM ecosystem
powered by
8-bit Ultra Low Static <1uA Low cost From <$0.50 Ease-of-use Freedom Platform, Processor Expert & MCU Solution Advisor
ARM Cortex-M0+ ARM Cortex-M4(F)
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TM

Kinetis L Series

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TM

ARM Cortex-M0+ Processors

ARM Cortex-M0+ ARM Cortex-M4(F)

Vybrid Controller Solutions

i.MX Application Processors

QorIQ Processors built on Layerscape Architecture

Consumer Automotive Industrial

Consumer Automotive Industrial

Ultra Low Power

Baseline / Mixed-Signal and optional Segment LCD, USB

including USB / Ethernet / MS File System / Peripherals Driver

From $0.49 ( MKL02x, 8KB, 16QFN )

Note: Availability device dependent

Kinetis L Series MCUs

ARM Cortex-M0+ Processors

Ultra low sleep/ power-down currents

Maximum energy-efficiency (CoreMark/mW)

Freedom / Tower Development Platform

90nm TFS Memory

Integrated Development Environment

Processor Expert / MCU Solution Advisor

Timing & Control

MQX Lite RTOS

Operating Voltage: 1.71Volt to 3.6Volt Operating Temperature: -40C to +105C

Freescale free RTOS called MQX www.freescale.com/MQX

Kinetis K Series Kinetis L Series

ARM Cortex-M4(F) ARM Cortex-M3 ARM Cortex-M0+ ARM Cortex-M0

Low Cost MCU

High End MCU

ARM Cortex-M0+ Whats the + stand for?

Enhanced New Enhanced New

Ultra Low Power embedded systems or mixed signals devices

ARM Cortex-M0+ Whats the + stand for?

Processor Energy Efficiency in CoreMark/mA

ARM Cortex-M0+ Whats the + stand for?

Decreasing interrupt latency by 1 cycle

ARM Cortex-M0+ Whats the + stand for?

1 cycle 2 Byte Code Size

5,418 48cycles*, 48Byte Code Size

0 Corex-M0+ A (16-bit) B (16-bit) C (8-bit) D (8/16-bit)

Kinetis L Series Technology

Best trade-off between static and dynamic power consumption.

Dynamic Power scales well with process

Save precious runtime cycle:

uW for minimal configuration

Kinetis L Series Technology / Power Modes

VLP Stop (VLPS) LL Stop (LLS)

VLL Stop 3 (VLLS3) VLL Stop 1 (VLLS1)

VLL Stop 0 (VLLS0)

Kinetis L Series Technology / Power Modes

Typical Idd @ 3V, 25C

48/24 MHz 48/- MHz 4/1 MHz

MAXIMUM CPU/Bus frequency. Compute clocking option SUPPORTED

DISABLED Compute Operation* ENABLED

4/1 MHz 4/- MHz

DISABLED Compute Operation*

WAIT VLPW STOP

Same as STOP mode. LVD OFF.

LLS VLLS3 VLLS1 VLLS0

Kinetis L Series AWIC and LLWU

Asynchronous Wake-up Interrupt Controller

UART1 and UART2

Active edge on RXD

Kinetis L Series AWIC and LLWU