PHASE SHIFT

KEYING

TOPICS
1.

Definition of PSK

2.

Generation/Detection of PSK

3.

Phase Diagram

4.

Signal Space Diagram

5.

Different Kinds of PSK

DEFINITION
PSK

is a form of M- ary modulation

where a change

in phase can be

represented by many bits

The analog carriers phase is varied by

the digital signal.

DIFFERENT KINDS OF PSK

BPSK

Binary Phase Shift Keying

QPSK

Quaternary Phase Shift Keying

8-PSK

8-Phase Shift Keying

16-PSK

16-Phase Shift Keying

GENERATION OF PSK

PSK is generated with respect to the classification it

belongs

a.

BPSK uses only one balance modulator

b.

QPSK uses two balance modulator and a 90deg phase

shifter

c.

8-PSK- utilizes an inverter, 2-to-4 level converter and a

product modulator

PHASOR DIAGRAM

Shows the entire output phasor of the different PSK

technique

SIGNAL SPACE DIAGRAM

also known as constellation diagram

The entire phasor is not drawn only the relative position of its
peak.

BINARY PHASE SHIFT KEYING

With BPSK two output phases are possible for a single

carrier frequency. One output phase represents a logic 1
and the other a logic 0.

As the input digital signal changes state, the phase of the

output carrier shifts between two angles that are 180 out
of phase.

BPSK is a form of suppressed carrier, square-wave

modulation of a continuous wave (CW) signal.

BINARY PHASE SHIFT KEYING

BPSK Transmitter

simplified block diagram of a BPSK modulator. The balanced

modulator acts like a phase reversing switch.

BINARY PHASE SHIFT KEYING

(a) Balanced ring modulator; (b) Logic 1 input; (c) Logic 0 input.

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BINARY PHASE SHIFT KEYING

BPSK modulator: (a) truth table;

(b) phasor diagram; (c) constellation diagram.
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BANDWIDTH CONSIDERATIONS OF BPSK

Output phase vs. time for a BPSK modulator.

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SAMPLE PROBLEM

For a BPSK modulator with a carrier frequency

of 70MHz and an input bit rate of 10Mbps,
determine the maximum and minimum upper
and lower side frequencies, draw the output
spectrum, determine the minimum Nyquist
bandwidth, and calculate the baud.

BANDWIDTH CONSIDERATIONS

Minimum lower side frequency (LSF):

LSF = 70 MHz-5 MHz = 65 MHz
Maximum upper side frequency (USF):
USF = 70 MHz+5 MHz = 75 MHz

The minimum Nyquist bandwidth (fN) for

the worst-case binary input conditions is

fN = 75 MHz 65 MHz = 10 MHz
and the baud rate is fb = 10 megabaud.

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OF

BPSK

BPSK RECEIVER

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QUATERNARY PHASE SHIFT KEYING

Angle

modulated, constant amplitude digital

modulation, M-ary encoding technique where

N=2 and M=4

Four

output phases are possible for a single

carrier frequency
Binary

input data combined into groups called

dibit
The

rate of change of the output baud is one-

half of the input bit rate

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QUATERNARYQPSK
PHASE
SHIFT KEYING

17

MODULATOR

QUATERNARY
PHASEMODULATOR
QPSK
SHIFT KEYING

(a) truth table; (b) phasor diagram; (c) constellation.

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QSample
UATERNARY
PHASE
Problem
SHIFT KEYING
For the QPSK modulator previously shown, construct the truth
table, phasor diagram, and constellation diagram.
Solution:
For a binary data input of Q=0 and I=0, the two inputs to the I
balanced modulator are 1 and sinwct, and the two inputs to the
Q balanced modulator are 1 and coswct.
Consequently, the outputs are
I balanced modulator = (-1)(sinwct) = -1.sinwct
Q balanced modulator = (-1)(coswct) = -1.coswct
And the output of the linear summer is
-1.coswct 1.sinwct = 1.414sin(wct - 135o)
For the remaining digit codes (01, 10, and 11), the procedure
is the same.

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ASSIGNMENT 1

1.
2.

Provide the output phases, phase diagram and

constellation diagram for the following input
combination if the phase inverter will be changed
to -90deg and the carrier signal is cos wct

00
10

QUATERNARYQPSK
PHASE
SHIFT KEYING

MODULATOR

Output phase vs. time for a QPSK modulator.

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BANDWIDTH CONSIDERATIONS

QPSK

The output of the balanced modulators can be expressed

mathematically as q = (sinwat)(sinwct)
where wat = 2pfbt/4 and wat = 2pfct .
Thus
q = (sin2pfbt/4)(sin2pfct)
= cos2p(fc - fb/4)t cos2p(fc + fb/4)t
The output frequency spectrum extends from fc - fb/4 to fc + fb/4
and the minimum bandwidth (fN) is
fN = ( fc - fb/4) (fc + fb/4)

= 2fb/4 = fb/2.

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OF

QUATERNARY
PHASE
BANDWIDTH
CONSIDERATIONS
SHIFT KEYING

OF

QPSK

Fig. 13-17. Bandwidth considerations of a QPSK modulator.

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BANDWIDTH CONSIDERATIONS

OF

QPSK

Sample Problem

For a QPSK modulator with an input data rate (fb) equal

to 10 Mbps and a carrier frequency of 70 MHz, determine

the minimum Nyquist bandwidth (fN) and the baud.
Compare the results with those achieved with the BPSK

modulator

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Solution:

The bit rate in both the I and Q channels is equal to

BANDWIDTH
one-half of the transmission
bit rate or
CONSIDERATIONS
OF QPSK
fbQ = fbI = fb/2 = 10Mbps/2 = 5Mbps
The highest fundamental frequency presented to
either balanced modulator is
fa = fbQ/2 = fbI/2 = 5Mbps/2 = 2.5Mbps.
The output wave from each balanced modulator is
(sin2pfat).(sin2pfct)
= cos2p(67.5MHz)t - cos2p(72.5MHz)t
The minimum Nyquist bandwidth is
fN = (72.5MHz - 67.5MHz) = 5MHz.
The baud equals the bandwidth; thus baud rate is 5
megabaud.
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ASSIGNMENT 2

Solve for the bandwidth and baud rate for the

following given data; q = {sin2(4KHZ)t}{sin2(3
3Ghz)t}

QPSK RECEIVER

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QPSK RECEIVER

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Again, the received QPSK signal (-sinwct + coswct) is

one of inputs to the Q product detector. The other
input is the recovered carrier shifted 90 in phase
(i.e., coswct).
The output of the Q product detector is
qQ = (-sinwct + coswct).(coswct)
= + cos2wct - cos2wct - sin0 .

After LPF, the terms of cos2wct will be filtered out,

leaving Output = 1/2 Vdc = logic 1.
The demodulated I and Q bits (1 and 0,
respectively) correspond to the constellation
diagram and truth table for the QPSK modulator
shown in Figure 13-15.

OFFSET QPSK (OQPSK)

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EIGHT PHASE SHIFT KEYING (8-PSK)

With 8-PSK,three bits are encoded, forming tribits and
producing eight different output phases
With 8-PSK, n=3, M=8
Thus bit rate is three times the baud rate
TRIBIT CODE: 000 = PHASE 1, 001 = PHASE 2,
010 = PHASE 3,011 = PHASE 4,
100 = PHASE 5, 101 = PHASE 6
110 = PHASE 7, 111 = PHASE 8

Q and I channel determine The polarity

- logic 1- (+V) -logic 0-(-V)

C and C channel determine the magitude
1 = 1.307v, 0 = 0.541v

8-PSK MODULATOR

BIT SPLITTER
(SERIAL TO
PARALLEL)

fb
3

2-input DAC

PULSE AMPLITUDE MODULATED

SIGNAL (4 LEVELS)

2-input DAC
PULSE AMPLITUDE MODULATED
SIGNAL (4 LEVELS)
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8-PSK GENERATION

0.541 sin(2pfct )
0
0

000

- 0.541v

- 1.307v

1.307 cos(2pfct )

NOTE: BECAUSE C, C NOT THE SAME, I-CHANNEL PAM

WILL NEVER EQUAL Q-CHANNEL PAM

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8-PSK GENERATION: OUTPUT PHASES

For TRIBIT CODE: 000

0.541 sin(wct ) 1.307 cos(wct ) 1.41 sin(wct 112.5 )

PROOF:

sin( X Y ) sin X cos Y cos X sin Y

1.41sin(2pfct 112.5 )

1.41sin(2pfct ) cos(112.5) 1.41cos(2pfct ) sin(112.5)

1.41(.383) sin(2pfct ) 1.41(.924) cos(2pfct )
0.541sin(2pfct ) 1.307 cos(2pfct )
0 0 0 ==> -112.5 degrees

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8-PSK GENERATION: OUTPUT PHASES

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8-PSK GENERATION: OUTPUT PHASE VERSUS TIME

FOR 8-PSK: (a) OUTPUT PHASES. = 8
(b) SEPARATION BETWEEN PHASES IS 360/8 = 450
A 8-PSK SIGNAL CAN UNDERGO A +/- 22.5 degrees PHASE SHIFT
DURING TRANSMISSION AND STILL RETAIN ITS INTEGRITY.

FOR 8-PSK, EACH PHASOR IS EQUAL IN MAGNITUDE

(1.41v)
THE TRIBIT CODE INFORMATION IS CONTAINED
ONLY IN THE PHASE OF THE SIGNAL

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ASSIGNMENT 3
Provide the output phases, phase diagram and
constellation diagram for the following input
combination if the phase inverter will be changed
to -90deg and the carrier signal is cos wct
A. 001
B.110
C.101
D.111d`
E.010

BANDWITH CONSIDERATION OF 8-PSK

FOR 8-PSK, THERE IS ONE CHANGE IN PHASE AT THE

OUTPUT FOR EVERY THREE DATA INPUT BITS.
(A GROUP OF THREE BITS = 1 PHASE = 1 SYMBOL)

THE BAUD RATE = 1/3 BIT RATE =

fb
3

Bandwidth = Baudrate =

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Sample Problem
FOR AN 8-PSK MODULATOR WITH A CARRIER
FREQUENCY OF 70 MHz AND AN INPUT BIT RATE
OF10 Mbps,
DETERMINE a) Bandwidth b) BAUD RATE

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Given :

Solution:

fc 70 MHz

fb 10 MHz

fb
a) B
3.33 MHz
3

b.) Baud = fb / 3 = 3.33mbaud

SIXTEEN PHASE SHIFT KEYING (16-PSK)

M-ARY CODING SCHEME WITH M = 16, N = 4
SIXTEEN OUTPUTS PHASES ARE POSSIBLE
THE INPUT BINARY DATA IS COMBINED INTO
GROUPS OF 4 (N = 4) BITS CALLED QUADBITS
QUADBIT CODE: 0000 = PHASE 1 .. 1111 = PHASE 16,
1 SYMBOL = 1 PHASE = 4 BITS
BAUD RATE (SYMBOLS PER SEC)= 1/4 BIT RATE (BITS PER SEC)

WITH 16-PSK, THE ANGULAR SEPARATION BETWEEN

AJDACENT PHASES IS 360/16 = 22.5 degrees. FOR
INTEGRITY TO REMAIN, PHASE SHIFT max = +/- 11.25
degrees
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BANDWITH CONSIDERATION OF 16-PSK

FOR 16-PSK, THERE IS ONE CHANGE IN PHASE AT THE
OUTPUT FOR EVERY FOUR DATA INPUT BITS.

fb
4
fb
B
4

(A GROUP OF four BITS = 1 PHASE = 1 SYMBOL)

THUS, THE BAUD RATE = 1/4BIT RATE =

16-PSK GENERATION: OUTPUT PHASES

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