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Lokender Singh Shekhawat

50, Fozdar New Park, Ahmedabad, Gujarat, 382345


Phone: +91-8141-96746
Email: shekhavl123@gmail.com , 14mecc08@nirmauni.ac.in
LinkedIn: https://in.linkedin.com/in/lokender-singh-shekhawat-47ab6732
Profile
Presently working in the Signal Integrity & Power Integrity (SIPI) team to do the SIPI analysis. SIPI analysis
includes S-Parameter extraction of PCB and Package, System Modelling of Power Delivery Network, I/O pads
ring modelling, Target Impedance measurement, Jitter Measurement. Automation of manual tasks using
scripting language (AEL, Python & Shell) to reduce the overall time (setup time) and effort.
Work Experience
Organization: STMicroelectronics, Greater Noida (UP)
Job Title:

Technical Intern (12 Months)

Job Profile:

Extraction of S-Parameter for PCB and Package using Cadence Sigrity Tool PowerSI to
obtain the PDN (Power Delivery Network) impedance.
Doing the PDN optimization for meeting the target impedance requirement in Keysight
ADS.
System modelling for high speed links with integrated board, package, I/O pad ring models,
CPM, output buffer SPICE netlists and then doing the transient simulations in integrated
environment in Keysight ADS.
Co-Simulation of obtained system level models and total variation in power supply was
extracted in ADS.
The extracted power supply profile is then used to obtain the clock jitter.
Automation of manual tasks using scripting language like Shell to reduce the overall effort
and time spent.
Automation of importing design (i.e. netlists file such as SPICE file), Template design
(Schematic/Layout design) and DDS (Data Display Window) handling for PDN
Optimization (Power Integrity Analysis) in Keysight ADS.
Done the python interface with the Keysight ADS tool for doing the computation task.
Knowledge of the ASIC Flow and the usage of Library Views in the flow.
Knowledge of STA and SRAM Memory.
Developed a web gui for design engineers for IP qualification and approval at various
stages.

Organization: Reliance Communication Pvt. Ltd. Ahmedabad (Gujarat)


Job Title:

Summer Training (1 Months)18 Months)

Job Profile:

Exposure to Networking, Switching, IP addressing/sub-netting, Optical Tome Domain


Reflectometer (OTDR), E1 Carrier Systems and MNP.

Technical Skills
Programming Languages: C, Verilog, Application Extension Language (Keysight ADS)
Softwares /Tools:
Keysight ADS, HSPICE, Cadence PowerSI, Xilinx ISE, ANYSYS Apache
RedHawk, Matlab, HFSS, Network Simulator-2
Scripting Languages:
Shell, Python, TCL,
Kits/Board:
FPGA Board

Education Qualification
Name of Course
M.Tech. - EC

Year of Passing
Pursuing

B.Tech. - ECE

2013

Name of Board/University
Nirma University,
Ahmedabad, Gujarat
Rajasthan Technical University,
Kota, Rajasthan

SPI / %
7.8 (Up to Sem III)
72.26%

Qualified Gate with 407 score in 2015.


Projects Undertaken
FPGA Based Projects in M.Tech. (Sem I)
Design and Implementation on FPGA Board: Flip-Flops, Encoder, Decoder, Multiplexer, Counter and ALU
design.
Gesture Recognition Based Robot as a major project in B.Tech. (Sem VIII)
In this project, the Robot is controlled by Hand Gesture. A person has to wear a small transmitting device in
his hand which includes an accelerometer. The transmitting device included a comparator IC(LM324IC) for
analog to digital conversion and an encoder IC(HT12E) which is use to encode the four bit data and then it
will transmit by an RF Transmitter module.
At the receiving end an RF Receiver module receivers the encoded data and decodes it by a decoder IC
(HT12D). This data is then processed by a microcontroller (P89V51RD2) and then Motor driver (L293D) will
control the motor.
Communication Between Python and 8051 Micro-Controller as minor project in B.Tech. (Sem VII)
This project emphasis on the serial communication between Python and the microcontroller 8051. Both
Python and 8051 are serially configured and Python user can send a command to turn on/off a LED connected
to the 8051. Python-Serial module is used for the purpose.

White Paper
Power Integrity Analysis for Jitter Failures and Automation of PDN Optimization
MOOCs Online Courses

Youtube : VLSI-Expert : Udemy : Udemy : EDX : -

Physical Design Flow


Static Timing Analysis
SOC Verification Using System Verilog
The Complete Developer Course 2.0
Introduction to Linux

Declaration
I hereby declare that the above written particulars are true and correct to the best of my knowledge and
belief.
Date & Place:

(Lokender Singh)

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