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Data Sheet
Description
Features
Applications
Solar Inverters, Wind Turbine Inverters
Industrial Process Control
Data acquisition systems
Switching Power Supply Signal Isolation
General Purpose Analog Signal Isolation
Traditional Current Transducer Replacements
Functional Diagram
VDD1 1
IDD1
IDD2
8 VDD2
VIN+ 2
7 VOUT+
VIN- 3
6 VOUT-
GND1 4
SHIELD
5 GND2
NOTE:
A 0.1 F bypass capacitor must be connected
between pins 1 and 4 and between pins 5 and 8.
Figure 1.
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
Symbol
Description
VDD1
Supply voltage for input side (4.5 V to 5.5 V), relative to GND1
VIN+
VIN
GND1
GND2
VOUT
Negative output
VOUT+
Positive output
VDD2
Option
(RoHS Compliant)
-000E
-500E
Package
Stretched
SO-8
Surface
Mount
Tape &
Reel
X
X
IEC/EN/DIN EN
60747-5-5
Quantity
80 per tube
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry.
Example:
ACPL-C79B-500E to order product of Surface Mount package in Tape and Reel packaging with IEC/EN/DIN EN 60747-5-5
Safety Approval and RoHS compliance.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
RoHS-COMPLIANCE
INDICATOR
C79B
YYWW
EEE
1
DATE CODE
12.650 (0.5)
6.807 0.127
(0.268 0.005)
1.905 (0.1)
4
LOT ID
7
3.180 0.127
(0.125 0.005)
0.381 0.130
(0.015 0.005)
45
0.450
(0.018)
0.750 0.250
(0.0295 0.010)
1.590 0.127
(0.063 0.005)
0.200 0.100
(0.008 0.004)
11.50 0.250
(0.453 0.010)
1.270
(0.050) BSG
Regulatory Information
The ACPL-C79B/C79A/C790 is approved by the following organizations:
IEC/EN/DIN EN 60747-5-5
Approved with Maximum Working Insulation Voltage VIORM = 1414 Vpeak.
UL
Approval under UL 1577, component recognition program up to VISO = 5000 Vrms/1min. File E55361.
CSA
Approval under CSA Component Acceptance Notice #5, File CA 88324.
Symbol
Value
Units
Conditions
L(101)
8.0
mm
L(102)
8.0
mm
0.5
mm
>175
CTI
Isolation Group
IIIa
Symbol
Value
I-IV
I-IV
I-IV
I-IV
I-III
Climatic Classification
55/105/21
Units
VIORM
1414
Vpeak
VPR
2652
Vpeak
VPR
2262
Vpeak
VIOTM
8000
Vpeak
Safety-limiting values
(Maximum values allowed in the event of a failure)
Case Temperature
Input Current [2]
Output Power [2]
TS
IS,INPUT
PS,OUTPUT
175
230
600
C
mA
mW
RS
109
Notes:
1. Insulation characteristics are guaranteed only within the safety maximum ratings, which must be ensured by protective circuits within the
application.
2. Safety-limiting parameters are dependent on ambient temperature. The Input Current, IS,INPUT, derates linearly above 25C free-air temperature at
a rate of 2.53 mA/C; the Output Power, PS,OUTPUT, derates linearly above 25C free-air temperature at a rate of 4 mW/C.
Symbol
Min.
Max.
Units
Storage Temperature
TS
55
+125
TA
40
+105
Supply Voltages
VDD1, VDD2
0.5
6.0
VIN+, VIN
VDD1 + 0.5
VIN+, VIN
VDD1 + 0.5
Output Voltages
VOUT+, VOUT
0.5
VDD2 + 0.5
Notes:
1. DC voltage of up to 2 V on the inputs does not cause latch-up or damage to the device; tested at typical operating conditions.
2. Transient voltage of 2 seconds up to 6 V on the inputs does not cause latch-up or damage to the device; tested at typical operating conditions.
3. Absolute maximum DC current on the inputs = 100 mA, no latch-up or device damage occurs.
Symbol
Min.
Max.
Units
TA
40
+105
VDD1
4.5
5.5
VDD2
5.5
VIN+, VIN
200
+200
mV
Notes:
1. 200 mV is the nominal input range. Full scale input range (FSR) is 300 mV. Functional input range is 2 V.
Min.
Typ.[1]
Max.
Unit
Test Conditions/Notes
Fig.
VOS
0.6
mV
TA = 25C
3, 4
|dVOS/dTA|
10
V/C
TA = 40C to +105C;
absolute value
G0
8.16
8.2
8.24
V/V
TA = 25C; Note 2
6, 7
G1
8.12
8.2
8.28
V/V
TA = 25C; Note 2
6, 7
G3
7.95
8.2
8.44
V/V
TA = 25C; Note 2
6, 7
Magnitude of Gain
Change vs. Temperature
dG/dTA
0.00041
V/V/C
TA = 40C to +105C;
Note 3
NL200
0.05
9, 10
Magnitude of NL200
Change vs. Temperature
dNL200/dTA
0.0003
%/C
TA = 40C to +85C
11
%/C
TA = +85C to +105C
11
NL100
0.02
9, 10, 11
FSR
300
mV
12
13
14
Parameter
DC CHARACTERISTICS
0.13
0.004
0.06
IIN+
0.1
dIIN+/dTA
0.05
nA/C
RIN
22
VOCM
1.23
OVR
0 to 2.5
|IOSC|
11
mA
Output Resistance
ROUT
21
VOUT+ or VOUT
Input DC Common-Mode
Rejection Ratio
CMRRIN
76
dB
Note 2
Signal-to-Noise Ratio
SNR
60
dB
15, 16
Signal-to-(Noise + Distortion)
Ratio
SNDR
56
dB
15, 16
f3 dB
Input to Output
10%-10%
Propagation Delay
50%-50%
tPD10
1.6
2.3
19
tPD50
2.6
19
90%-90%
tPD90
2.6
3.3
19
tR/F
1.7
Step input
19
CMTI
15
kV/s
PSR
78
dB
IDD1
13
18.5
mA
20
IDD2
12
mA
5 V supply
20
6.8
11
mA
3.3 V supply
20
12
AC CHARACTERISTICS
140
10
200
kHz
17, 18
POWER SUPPLIES
Notes:
1. All Typical values are under Typical Operating Conditions at TA = 25C, VDD1 = 5 V, VDD2 = 3.3 V.
2. See Definitions section.
3. Gain temperature drift can be normalized and expressed as Temperature Coefficient of Gain (TCG) of 50 ppm/C.
4. When FSR is exceeded, outputs saturate.
5. Because of the switched-capacitor nature of the input sigma-delta converter, time-averaged values are shown.
6. Under Typical Operating Conditions, part-to-part variation 0.04 V.
7. Under Typical Operating Conditions, part-to-part variation 1 dB.
8. Under Typical Operating Conditions, part-to-part variation 1 dB.
9. Ripple voltage applied to VDD1 with a 0.1 F bypass capacitor connected; differential amplitude of the ripple outputs measured. See Definitions
section.
10. The input supply current decreases as the differential input voltage (VIN+ VIN) decreases.
Symbol
Min.
Input-Output Momentary
Withstand Voltage
VISO
5000
Resistance (Input-Output)
RI-O
Capacitance (Input-Output)
CI-O
Typ.
Max.
Unit
Test Condition
Note
Vrms
1, 2
>1012
0.5
pF
f = 1 MHz
Notes:
1. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 6000 Vrms for 1 second (leakage detection
current limit, II-O 5 A). This test is performed before the 100% production test for partial discharge (method b) shown in IEC/EN/DIN EN 607475-5 Insulation Characteristic Table.
2. The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
voltage rating. For the continuous voltage rating, refer to the IEC/EN/DIN EN 60747-5-5 insulation characteristics table and your equipment level
safety specification.
3. This is a two-terminal measurement: pins 14 are shorted together and pins 58 are shorted together.
1.0
0.9
0.9
0.8
0.8
0.7
VDD2 = 3.3V
0.6
OFFSET - mV
OFFSET - mV
VDD2 = 5V
0.5
0.4
0.4
4.75
5
5.25
VDD1 - SUPPLY VOLTAGE - V
0.3
5.5
1.0
8.24
0.9
8.23
0.7
0.6
0.5
4
4.5
VDD2 - SUPPLY VOLTAGE - V
5.5
8.21
8.20
VDD2 = 3.3V
VDD2 = 5V
8.19
8.18
0.4
8.17
0.3
-40
-20
20
40
60
TA - TEMPERATURE - C
80
100
8.16
4.5
120
8.23
8.26
8.22
8.24
8.21
8.22
G - GAIN - V/V
8.28
8.20
VDD1 = 5V
8.19
8.17
8.14
4
4.5
VDD2 - SUPPLY VOLTAGE - V
5.5
8.18
8.16
3.5
5
5.25
VDD1 - SUPPLY VOLTAGE - V
8.20
8.18
4.75
8.24
8.16
3.5
8.22
GAIN - V/V
OFFSET - mV
0.8
GAIN - V/V
VDD1 = 5V
0.6
0.5
0.3
4.5
0.7
5.5
8.12
-40
-20
20
40
60
TA - TEMPERATURE - C
80
100
120
0.050
0.045
0.045
NL200, VDD2 = 5V
0.040
NL - NONLINEARITY - %
NL - NONLINEARITY - %
0.050
0.035
0.030
0.025
NL100, VDD2 = 5V
0.020
0.010
4.5
4.75
5
5.25
VDD1 - SUPPLY VOLTAGE - V
0.025
NL100
0.020
3.5
4
4.5
VDD2 - SUPPLY VOLTAGE - V
5.5
3.0
2.5
VOUT - OUTPUT VOLTAGE - V
NL - LINEARITY - %
NL200
NL100
-20
20
40
60
TA - TEMPERATURE - C
80
100
VOUT
2.0
VOUT+
1.5
1.0
0.5
0.0
-0.5
-0.4
120
-0.3
-0.2
-0.1
0
0.1
0.2
VIN+ - INPUT VOLTAGE - V
0.3
0.4
25
VIN+ = 0 to 300mV
RIN - INPUT IMPEDANCE - kohm
0.030
-0.4
-0.2
0
0.2
VIN+ - INPUT VOLTAGE - V
NL200
0.035
0.010
5.5
20
15
10
5
0
-5
-10
-15
-20
-25
-30
-0.6
0.040
0.015
0.015
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0.00
-40
VDD1 = 5V
0.4
0.6
24
23
22
21
-40
-20
20
40
60
TA - TEMPERATURE - C
80
100
120
64
64
61
58
SNDR
55
52
49
43
-20
20
40
60
TA - TEMPERATURE - C
80
100
5
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
100
150
200
250
300
VIN+ - INPUT VOLTAGE - m Vpp
350
400
180
150
120
90
60
30
0
-30
-60
-90
-120
-150
-180
100
PHASE - DEGREES
NORMALIZED GAIN - dB
1,000
10,000
100,000
FREQUENCY - Hz
1,000,000
tPD90
tPD50
tR/F
tPD10
tPD10, tPD50, tPD90: 200mV/s step input; tR/F: step input
-20
20
40
60
TA - TEMPERATURE - C
1,000
10,000
FREQUENCY - Hz
100,000
1,000,000
PROPAGATION DELAY - s
49
40
100
120
80
100
10
52
43
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
-40
SNDR
55
46
46
40
-40
SNR
58
SNR, SNDR - dB
SNR, SNDR - dB
61
SNR
120
15
14
13
12
11
10
9
8
7
6
5
-0.4
-0.2
-0.1
0
0.1
0.2
VIN+ - INPUT VOLTAGE - V
0.3
0.4
Definitions
Gain
Gain is defined as the slope of the best-fit line of differential output voltage (VOUT+ VOUT) vs. differential input
voltage (VIN+ VIN) over the nominal input range, with
offset error adjusted out.
Nonlinearity
Nonlinearity is defined as half of the peak-to-peak output
deviation from the best-fit gain line, expressed as a percentage of the full-scale differential output voltage.
C1
0.1
F
R3
***
U1
78L05
IN OUT
R5
10
VDD1
C2
0.1
F
10.0 K
VDD2 (+5 V)
1
C3
47 nF 3
U2
C4
0.1 F
+15 V
2.00 K
R2
4
GND1
HV-
Figure 21. Typical application circuit for motor phase current sensing.
5
ACPL-C79B/
ACPL-C79A/
ACPL-C790
C6
47 pF
GND2
C8
0.1 F
GND2
U3
+ TL032A
R1
2.00 K
+
RSENSE
***
11
C5
47 pF
GATE DRIVE
CIRCUIT
***
POSITIVE
FLOATING
SUPPLY
HV+
MOTOR
Common Mode Transient Immunity, CMTI, also known as Common Mode Rejection
C7
R4
0.1 F
10.0 K
-15 V
GND2
GND2
VOUT
Application Information
Application Circuit
The typical application circuit is shown in Figure 21. A
floating power supply (which in many applications could
be the same supply that is used to drive the high-side
power transistor) is regulated to 5 V using a simple threeterminal voltage regulator (U1). The voltage from the
current sensing resistor, or shunt (RSENSE), is applied to
the input of the ACPL-C79B/C79A/C790 through an RC
anti-aliasing filter (R5 and C3). And finally, the differential
output of the isolation amplifier is converted to a groundreferenced single-ended output voltage with a simple
differential amplifier circuit (U3 and associated components). Although the application circuit is relatively
simple, a few recommendations should be followed to
ensure optimal performance.
12
PC Board Layout
The design of the printed circuit board (PCB) should follow
good layout practices, such as keeping bypass capacitors
close to the supply pins, keeping output signals away from
input signals, the use of ground and power planes, etc. In
addition, the layout of the PCB can also affect the isolation
transient immunity (CMTI) of the ACPL-C79B/C79A/C790,
due primarily to stray capacitive coupling between the
input and the output circuits. To obtain optimal CMTI
performance, the layout of the PC board should minimize
any stray coupling by maintaining the maximum possible
distance between the input and output sides of the circuit
and ensuring that any ground or power plane on the PC
board does not pass directly below or extend much wider
than the body of the ACPL-C79B/C79A/C790. Figure 22
shows an example PCB layout.
TO GND1 TO VDD1
TO VDD2 TO GND2
C4
C2
U2
TO RSENSE+
R5
VOUT+
VOUT
C3
TO RSENSE
Note: Drawing not to scale
ACPL-C79B/C79A/C790
40
440 V
380 V
220 V
120 V
35
30
25
20
15
10
5
0
15
10
20
25
MOTOR PHASE CURRENT - A (rms)
30
Figure 23. Motor output horsepower vs. motor phase current and supply
voltage.
13
35
For product information and a complete list of distributors, please go to our web site:
5V
+Input
Input
VDD1
Ra
Rb
VIN+
C
VIN
ACPL-C79B/
ACPL-C79A/
ACPL-C790
GND1
Figure 24. Simplified differential input connection diagram.
Output Side
The op-amp used in the external post-amplifier circuit
should be of sufficiently high precision so that it does not
contribute a significant amount of offset or offset drift
relative to the contribution from the isolation amplifier.
Generally, op-amps with bipolar input stages exhibit
better offset performance than op-amps with JFET or
MOSFET input stages.
In addition, the op-amp should also have enough
bandwidth and slew rate so that it does not adversely
affect the response speed of the overall circuit. The postamplifier circuit includes a pair of capacitors (C5 and C6)
that form a single-pole low-pass filter; these capacitors
allow the bandwidth of the post-amp to be adjusted independently of the gain and are useful for reducing the
output noise from the isolation amplifier.
The gain-setting resistors in the post-amp should have a
tolerance of 1% or better to ensure adequate CMRR and
adequate gain tolerance for the overall circuit. Resistor
networks can be used that have much better ratio tolerances than can be achieved using discrete resistors. A
resistor network also reduces the total number of compo
nents for the circuit as well as the required board space.
Voltage Sensing
The ACPL-C79B/C79A/C790 can also be used to isolate
signals with amplitudes larger than its recommended
input range with the use of a resistive voltage divider at
its input. The only restrictions are that the impedance of
the divider be relatively small (less than 1 k) so that the
input resistance (22 k) and input bias current (0.1 A)
do not affect the accuracy of the measurement. An input
bypass capacitor is still required, although the 10 series
damping resistor is not (the resistance of the voltage
divider provides the same function). The low-pass filter
formed by the divider resistance and the input bypass
capacitor may limit the achievable bandwidth.
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Data subject to change. Copyright 2005-2014 Avago Technologies. All rights reserved.
AV02-2460EN - August 28, 2014