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1

VA R TA N
medical systems

HIGH ENERGY C-SERIES CLINAC DATABOOK APPENDIX B, Rev. L


FOR TRAINING PURPOSES ONLY

A 3artner for life

System Drawings, Schematics and Block Diagrams

Drawing No.

Drawing Title

Where Used

Page(s)

Sheet(s)

ED02001
ED02033
ED02029
00872585
00872586
ED02038
ED02002
ED02003
ED00056
ED00022
ED02036
00872588
ED00031
ED02035
00872582
ED00028
00872593
ED00027
ED00026
ED02004
ED00029
EDxxxxx
ED00025
ED02006
ED02024
ED02017
00872590
00872591
ED02031
ED02032
ED00033
ED02028
ED02015
ED02016
ED02037
ED02005
EDxxxx
EDxxxx

ACCELERATOR FUNCTIONAL DIAGRAM


AC POWER DISTRIBUTION SYSTEM DIAGRAM
EMERGENCY OFF & UVR SCHEMATIC
BEAM-ON RELAY POWER SYSTEM DIAGRAM
BEAM-ON SIGNAL FLOW SYSTEM DIAGRAM
BEAM-ON RELAY POWER BLOCK DIAGRAM
-12V ON SYS 1EM DIAGRAM
+24V ON & WATER/VAC SYSTEM DIAGRAM
MODULATOR SYSTEM DIAGRAM
RF & AFC SYSTEM SCHEMATIC
GUN PULSE CONTROL SYSTEM DIAGRAM
ANALOG GUN DRIVER HOT DECK SCHEMATIC DIAGRAM
STEERING SYSTEMS DIAGRAM
ION CHAMBER SIGNALS SYSTEM DIAGRAM
DOSIMETRY SYSTEM DIAGRAM
BUNCHER STEERING SYSTEM DIAGRAM
POSITION STEERING SYSTEM DIAGRAM
ANGLE STEERING SYSTEM DIAGRAM
ACCELERATOR SOLENOID SYSTEM DIAGRAM
BCD ENERGY CODE SYSTEM DIAGRAM
SIMPLIFIED BMAG CONTROL & MONITORING
SIMPLIFIED KSOL CONTROL & MONITORING
TEE DRIVE CONTROL SYSTEM DIAGRAM
MOTOR POWER CONTROL SYSTEM DIAGRAM
MOTION CONTROL SIGNAL SYSTEM DIAGRAM
HARDWARE/SOFTWARE MOTION ENABLE LOGIC SYSTEM DIAGRAM
GANTRY MOTOR DRIVE SYSTEM DIAGRAM
COUCH LATERAL AND LONGITUDINAL MOTOR DRIVE SYSTEM DIAGRAM
GANTRY & COUCH POSITION READOUT SYSTEM DIAGRAM
COLLIMATOR POSITION READOUT SYSTEM DIAGRAM
BEAMSTOPPER CONTROL DIAGRAM
COLLISION SENSING AND RESET LOGIC SYSTEM DIAGRAM
TRIGGER PULSE GENERATION AND ROUTING SYSTEM DIAGRAM
DIGITAL DOSIMETRY AND HARDWARE BEAM CONTROL SYSTEM DIAGRAM
STAND MOTHER BOARD PCB CONNECTORS DIAGRAM
LIGHTS & LASERS CONTROL SYSTEM DIAGRAM
VARIAN CARDRACK LAYOUT
C3 AUXILLIARY ELECTRONICS

C3
C3
C3
C3
C3
Cl, C2, C3
C3
C3
C3
Cl, C2, C3
C3
Cl, C2
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
Cl, C2, C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3

3
4
6
8
10
12
15
16
18
22
24
25
26
27
28
30
31
32
33
34
35
36
37
40
41
43
45
47
49
51
53
54
55
57
59
63
64
65

1
2
2
2
2
3
1
2
4
2
1
1
1
1
2
1
1
1
1
1
1
1
3
1
2
2
2
2
2
2
1
1
2
2
4
1
1
2

Interlocks:

Note: Listed alphabetically. For ENSW, FOIL, TARO TDR'V, see MODE MOTIONS Interlocks
Drawing No.
ED02100
ED02101
ED02102
ED02103
ED02104
ED02105
ED02106
ED02107
ED02108
ED02109
ED02110
ED02111
ED02112
ED02113
ED02114
ED02115
ED02116
ED02117
ED02118
ED02119
ED02120
ED02121

Drawing Title
ACCESSORY CODES & ACC INTERLOCK SYSTEM DIAGRAM
AIR & GAS INTERLOCKS SYSTEM DIAGRAM
BMAG & KSOL INTERLOCKS SYSTEM DIAGRAM
CDOS INTERLOCK SYSTEM DIAGRAM
CMNR INIERLOCK SYSTEM DIAGRAM
DOOR INTERLOCK SYSTEM DIAGRAM
EXQ1, EXQ2, EXQT INTERLOCKS SYSTEM DIAGRAM
FLOW INTERLOCK SYSTEM DIAGRAM
GFIL INTERLOCK SYSTEM DIAGRAM
HVCB INTERLOCK SYS1EM DIAGRAM
HVOC INTERLOCK SYSTEM DIAGRAM
ION1 & I0N2 INTERLOCKS SYSTEM DIAGRAM
KEY INTERLOCK SYSTEM DIAGRAM
KFIL INTERLOCK SYSTEM DIAGRAM
LVPS INTERLOCK SYSTEM DIAGRAM
MOD INTERLOCK SYSTEM DIAGRAM
MODE MOTIONS INTERLOCKS SYSTEM DIAGRAM
F'NDT INTERLOCK SYSTEM DIAGRAM
PUMP INTERLOCK SYSTEM DIAGRAM
STPS INTERLOCK SYSTEM DIAGRAM
VAC1 & VAC2 INTERLOCKS SYSTEM DIAGRAM
VSWR INTERLOCK SYSTEM DIAGRAM

Where Used
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3

Page(s)
68
69
70
71
72
73
74
75
76
77
78
80
81
82
83
84
86
87
88
89
90
91

Revision History

Revision
A

Date
Mar 2004

Description
Initial Version
Updated several drawings (see revision lists).
Added Position Readout System Drawings. Updated C2 86 C2 Clinac Beam-on
Relay Power Diagram to show C3 Non-EMC and EMC Versions.

Sep 2004
Oct 2004

D
E

Jan 2005
Mar 2005

Added AC Power Distribution System Diagram.


Added Ion Chamber Signals and Gun Pulse Control System Diagrams.

Added Opaque backgrounds, new Modulator Diagrams.

Jul 2005
Oct 2005

H
I

Mar 2006
Oct 2008

Revised EMC Modulator Diagrarn.Stand Mother PCB Connectors and Interlock


System Diagrams
Updated several drawings for new Signal Conditioning PCB's/
Reformatted text size to enhance clarity

J
K

Dec 2009
Feb 2010

Corrected conversion faults, and some updates


Update on Beamstopper drawing

Dec 2010

Added Console, Aux Electronics and KSOL drawings. Changed ToC

3
Trim Coils
(for 20 MV,
22MeV only)

Primary
Collimator
Position
Steering
Coils

RF In

Accelerator
(Guide)

20
VacIon
Pumif

Buncher
Steering
Coils

Bend
Magnet

Target
Actuator

Angle T
Steering
Coils
Target

RF Window

Solenoid

Angle R
Steering
Coils

Energy
Slit

Solenoid

Gridded
Gun
Coil No. 2

Drift Tube

First
Collimator

Carrousel

Beryllium
Window

Flattening
Filter
Accelerator Solenoid
Power Supply
(In Stand)
Buncher Steering Coils

Ion
Chamber

Driver
(In Stand)

Driver
(In Stand)

Position Steering Coils

Secondary
Collimator
Upper
Collimator
Jaws

Driver
(In Stand

Driver
(In Stand)

.=.;>

POST
Servo
B20"

POS R
Servo
B19

"B21 in Cl Clinacs

Lower
Collimator
Jaws
BAL ANG T
GAIN Servo
B6

44

BAL ANG R
GAIN Servo
B15

.=>

Driver
(In Stand)

Varian Cardrack

Electron Applicator
(Not used in
X-ray Modes)

Driver
(In Stand)

111

lsocenter
(100cm from
Target Plane)

Driver
(In Stand)

Tri
l
l

Program PCB
BEAM STEERING
B
B A A P P T S
U
UNNOOR
0
N
NGGS S I L
R T R T R T M1

A
N
G
R

HIGH ENERGY C-SERIES CLINACS


ACCELERATOR FUNCTIONAL DIAGRAM

1
A A A
N
NN
G
GG
T R T

Rev. B: Revised for legibility. B.K. 12/00


Rev. C: Added colors. B.K. 03/01
Rev. D: Revised margins for databook. B.K. 05/01
Rev. E: Redrew with CorelDraw. B.K. 01/03
Rev. F: Added Servo Bal, Gain Pots. B.K. 07/03

FOR TRAINING PURPOSES ONLY


Drawn:

Bill Kirkness

04/00

ED02001

Revised:

Bill Kirkness

07/03

Sheet 1 of 1

Rev.

4
Primary Power Distribution Chassis
Primary 30
AC Power
208V
50/60 Hz
Or
380-440V
50/60Hz

Line Filter

HVPS

30
X>

0 0

Modulator High
Voltage Power Supply
Plate Transformer

FL1

CB1
3
Note: CB8, Ti are not present
in 60 Hz Clinacs

TB1

0A,B
50-Hz: 0A,Neutral
LINE 1

30

.0 0

=VI

CB8

Step-Start

Mode B

High Voltage Contactor Panel

Step-down
Transformer

4
60 Hz
Path

Beam-On

Auxiliary Power Distribution PCB P/N 1104015


(See Sheet 2 for P/N 890450)

50 Hz
Path

J6

Isolation
Transforme

J11

120V_A

LINE 2
0
CB7

70--,.--62407--64

-0 CONTPWRA (120V AC)

06
90--- --00%

J10

OC

J14

208V_A
=i>

DQ THY
FIL

J11
1
Reg
Control
Relay

30
i==>

,=>

2
0
0
CB11

J17

V
ACCOM

10
12
Motor Power
Relay

CONTPWRA, B: Auxiliary
Electronics, Vaclon P.S.,
Gun Driver, Lamps, etc.

4,r7

i==>

ILKFIL

ACCOM

ACCOM

EQUIPGND

EQUIPGND

Computer Control
System

W4

CONTPWRA
=>

Low Voltage
Power Supplies

ACCOM

Note: The Klystron Filament Boost Assembly


is mounted on a bracket above the
Primary Power Distribution Chassis.

HIGH ENERGY C3 CLINACS


AC POWER DISTRIBUTION SYSTEM DIAGRAM

Bend Magnet, Solenoid


Power Supplies (In Stand)

FOR TRAINING PURPOSES ONLY

W19 )0.1 Water Pump (In Stand)


Rev. B: Corrected EQUIPGND return path. B.K. 04/05
Rev. C: Updated interlock reference notes. B.K. 09/05

<i=

CONTPWRA

4
FRF1
21 77
.1-1
W16

-12V ON
16

Console
W3

KFIL Relay
(6VAC cot)

/77
EQUIPGND

CB6

V
REGCOM

CONTPWRB

1
CB3

30: Motor & Steering


Power Supplies (In Stand)

Klystron Filament
Boost Assembly
T6

REGCOM

Overload
Protector

30

MOTORS

MN THY
FIL

.="41E-finrirtrnir
...
T7

15
ACCOM

30
=c>

15

DeQing and Main


Thyratron Filament
Transformers (In Orig.
Thyratron Chassis)

MNFILPWR (118V AC)

R6: 7.50, 25W

, 0

Pump
Relay

CB10

W60

DQFILPWR (118V AC)

T3
236V
(Constant
Voltage)

13

CB3

PUMP

4
2

J1

Stand
Power
Relay

STAND
POWER

236V CT
(Constant
Voltage)

15

EQUIPGND

0 0

.==>

T4

9e66 208VPWRC

CB9

rh

Large Fans
(In Modulator Cabinet)
=>

=>

70.-104 208VPWRA

208V_C

208VPWRA
208VPWRC

Start Relays
(See Dwg No.
ED02029)

4 4

RF Driver
(In Stand)
=>

0 CONTPWRB (120V AC)

J11
REG

Large Fans
(In Stand)

208VPWRC

GFILPWR2 (118V AC)

CB13

120V_B

208VPWRA

GFILPWR1 (118V AC)

1
2
->
_
0 . 0
3
4
--0
0

-->

C.T.

T2

11

CONT
PWR

ACCOM

OA

Klystron Filament Stepdown Xfmr (In Stand)

KLYFIL2 (-236V AC)


10

0A,B
50-Hz: OA, Neutral s->

W60

KLYFIL1 (-236V AC)

Drawn:

Bill Kirkness

01/05

ED02033

Revised:

Bill Kirkness

10/05

Sheet 1 of 2

Rev.

5
Primary Power Distribution Chassis
Primary 30
AC Power
208V
50/60-Hz
or
380-440V
50/60 Hz

Line Filter

HVPS
30
=D 00
CB1

Modulator High
Voltage Power Supply
Plate Transformer

FL1

3
Note: CB8, Ti are not present
in 60-Hz Clinacs.

TEl

0A,B

Beam-On

High Voltage Contactor Panel

Step-down
Transformer

50-Hz: 0A,Neutral
LINE 1
60-Hz
Path

30

-0

Step-Start

Auxiliary Power Distribution PCB P/N 890450


(See Sheet 1 for P/N 1104015)

KLYFIL1 (-236VAC)

CB8

10
Isolation
Transforme

T2

0
CB7

0 CONTPWRA (120V AC)

4 70-04

0
0
CB5

120V_B

J10
FAN PWRA
=>
J11

OC

7 -7- 4 208VPWRA
10
208VPWRC

==t>

208V C

0
CB9

J14

208V A

15

Stand
Power
Relay

30

T3
236V
(Constant
Voltage)

Reg
Control
Relay

13

CB3

PUMP

Pump
Relay

CB2
10
12
MOTORS Motor Power
Relay
41(_oi
30 6---'
o__ crr'
o__;/_
Nr.
=I>
CB6
7/
3

P/ 12

CONTPWRA, B: Auxiliary
Electronics, Vaclon P.S.,
Gun Driver, Lamps, etc.

0.0

V
REGCOM

R617.50, 25W

<==

-12V ON
16

Computer Control
System

ILKFIL
=I>

W4

J7

CONTPWRA

Console
W3

J8

5
0

KFIL Relay
(6VAC coil)

CONTPWRB

CONTPWRA

=>

ACCOM

ACCOM

EQUIPGND

EQUIPGND

f-P7
EQUIPGND

Low Voltage
Power Supplies
<I=

ACCOM

Note: The Klystron Filament Boost Assembly


is mounted on a bracket above the
Primary Power Distribution Chassis.

P/J1

W16

30: Motor & Steering


Power Supplies (In Stand).

Klystron Filament
Boost Assembly

=>

Overload
Protector
11

REGCOM

V
ACCOM

ACCOM

4
3

=>

15

DeQing and Main


Thyratron Filament
Transformers (In Orig.
Thyratron Chassis)

FILPWR2 (118VAC)

15

J1

, 0

FILPWR1 (118VAC)

J17

3
STAND
POWER

T4
236V CT
(Constant
Voltage)

W60

J11

/
EQUIPGND

Large Fans
(In Modulator Cabine

FAN PWRC

OA

RF Driver
(In Stand)
i=".>

CONTPWRB (120V AC)

i=>

GFILPWR2 (118VAC)

Start Relays (See


Dwg No.
ED02029)

ACCOM

REG

Large Fans
(In Stand)

GFILPWR1 (118VAC)

1 "--"7-` 2

.=> 0 . 0 oT
3
4

C.T.

=I>

FAN PWRA
FAN PWRC

CONT
PWR

J11

120V A

LINE 2

0A,B
50 Hz: 0A,Neutral 0

Klystron Filament Ste down Xfmr (In Stand

KLYFIL2 (-236VAC)

39
., 230V

W60

J6

Bend Magnet, Solenoid


Power Supplies (In Stand)

HIGH ENERGY C3 CLINACS


AC POWER DISTRIBUTION SYSTEM DIAGRAM

W17

FOR TRAINING PURPOSES ONLY

W19 )0.1 Water Pump (In Stand)


Drawn:

Bill Kirkness

01/05

ED02033

Revised:

Bill Kirkness

10/05

Sheet 2 of 2

Rev.

6
Stand Mother PCB (Back-connected)

Note: K6, K7 pin numbers are different on -01, -02 versions. See Dwg. 872586.
,J3

W18

EMOFFO

Power on: +24V from Console LVPS


Power off: +25.2V from Emergency Batt.
3
J4
LIFT+
To Couch
4
Lift Motor
LIFT
2

Emergency
Battery +

4
120,...e98

4
8

EMOFFO

J14

J4
14

J6

13

7
Q4

K12

A K15 B

(K10)

(K6)

TB1

Wt
Auxiliary
Electronics
Front Panel

KHV1
KHV2
Beam-on Relays
(shown de-energized)
J1

Console Backplane
J26
13
,
14
=I>

RT3

W9

J30

EMOFF1

Cable
1104828

EMOFFO

28

CONTPWRB
Emergency Off Relays
(shown energized)

4o

STAR _A4 48,.


4
sTART_B4 76....L011
c=
4=
I

W18

EMOFF6

J2
13

EMOFF6

J20
18

J3

14

Harness Emergency Off Panel


890639
S2

2 ..-----. 1
o
CB12

12
3o
;_11
,,L.
0 CUSEtOFF
4

EMBATT+

Stand Door Sw's


7 7

(K2) <=

PLON_B
LIFTBRK+

J5

=t>
=r>
J21

START

4
Harness

Of 0

TB2

4
2

0 4=

<1=

10

Console

Emergency Off
Panel

)W62
Lift Motor
Driver

'o
CONTPWRA06-7--o'
30 1
CONTPWRBC)--

J7

W4

1(7,
ar

START A3
rt Relays
Sw
ta ene rgl z e d )
(sho

15
25 13

Modulator Door Sw's

44
J2

EMOFF4

FET
Sw's

EMOFF7

Note: In newer Clinacs, the


connection shown as a
dashed line is used. S2 is
mounted on a bracket and
connected in series with the
Modulator door E.O. Sw's
J13 886683

12

=t>

=>
J24
12

34

1 Ku 16

14

r- 18

CB1

P2
2

(N.C. Aux. Contacts)

E.O. Sw.

13

J9

Harness
890617
I I

Dedicated Keyboard

(Catch-all Panel)

<1=.

To Couch
Longitudinal 15
Brake
16

PPD Chassis

Auxiliary Power Distribution PCB 1104015-03

Start Here

(Relay No's in parentheses are for older front-connected PCB.)

4
,

1 120V A j11

4
.--Lo3 120V B
o o
CB13

Customer E.O. Sw's

44

K1

(Catch-all Panel)

4
START A4

START 2

4
-----aa7=-dap--

START 1

PPD Chassis
Motion Disable
Panel
(Optional)
J2

J3
13
_
25

Emergency
Pendant

Beam-Off State
6

EMOFF4
1
EMOFF2

Couch Side Panels (2)

Couch
Patch
Panel
W26

120V A
OA

13

J29
13

EMOFF4

J14
13

25

25

EMOFF2
P

25

iT

J18
1
2

4 J23

17-

EMOFF3

T2
4

J26

B
120V_B

EMOFF2
=t).

Harness
890076

Without the Motion Disable


option, cable W26 connects
directly to J2 of the Stand
Mother PCB.

HIGH ENERGY 03 CLINACS


EMERGENCY OFF & UVR SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released. Replaces Drawing No.
872592. B.K. 01/04

Revised:

Bill Kirkness

01/04

ED02029

Rev.

Sheet 1 of 2

7
Stand Mother PCB (Back-connected)

EMOFFO

Note: K6, K7 pin numbers are different on -01, -02 versions. See Dwg. 872586.

W18

Power on: +24V from Console LVPS


Power off: +25.2V from Emergency Batt.

To Couch
Lift Motor

J4
LIFT+

Emergency
Battery +

o6

PPD Chassis

Auxiliary Power Distribution PCB 1104015-03

Start Here

(Relay No's in parentheses are for older front-connected PCB.)

J6

EMOFFO

RT2

fT

128

o4

EMOFFKHV
=(>

=(>

13

CR19

TB1

J6
E.O. Sw.
1 0 0-7

KHV1
KHV2
Beam-on Relays
(shown energized)

210

-LC11

RT3

J9

W9

J3(

J26
13 <1=
14

Cable

12
J24
12

EMOFFO
c==

W3

28

J8
12

Harness Emergency Off Panel

28

CONTP2B
Emergency Off Relays
, ,......., I
(shown energized)
CB12 <=
0
START_A4 80v

18
EMOFF1

4
=>

34
J3

To Couch
Longitudinal 15
Brake
1E

EMBATT+

J6

W18

EMOFF6

Stand Door Sw's

START

FET
SW's

='
sTART

11

c=.

J2
4

1 2

inl

=:,

25 1 13

Emergency Off
Panel

1.,
)W62
Lift Motor
Driver

ri

15

J7

W4

EMOFF7
Note: In newer Clinacs, the
connection shown as a
dashed line is used. S2 is
mounted on a bracket and
connectecijn series with the
Modulator door E.O. Sw's.

3o ,
7,5.4.0 11 CUSELAOFF
J13

Harness
886683 Modulator Door Sw's

EMOFF1

EMOFF2

TB2
START A3

IF

S2

14

:3

44

PLON B
LIFTBRK+

J2 890639
13

EMOFF6

1J20

022

.11 1104828

14
"

Console Backplane
Auxiliary
Electronics
Front Panel

CB1

P2
2

(N.C. Aux. Contacts)

(Catch-all Panel)

LIFT-

Harness
899617

Dedicated Keyboard
J4
14 <=
13 =4>

J14

1
0

Start Relays
(shown energized)
0
7
4
CONTPWRAQ----47--o7
30 '
66.4..09 <=
CONTPWRBO--E
3 C-4-0
0 9

==>

EMOFF10

2 eT., 1 120V A
4 (3--3 120V B j11

Customer E.0, Sw's

'---C13130

K1

(Catch-all Panel)

W100(,

START_A4
-->

START 2

START 1

PPD Chassis
Motion Disable
Panel
(Optional)
.13
13
25

EMOFF4
EMOFF2

C
. ouch
Patch
Panel
J2
13
25

W26 I
J29
13
25

Couch Side Panels (2)

EMOFF4

.114
13

EMOFF2
-->

25

TB1
11
2

120V A

J23 I 1

OA

<1=

EMOFF3
EMOFF2
=D>

MICI

12

4:
120V B

1II

OB

Harness
890076
Emergency
Pendant

Beam-On State

Without the Motion Disable


option, cable W26 connects
directly to J2 of the Stand
Mother PCB.

HIGH ENERGY C3 CLINACS


EMERGENCY OFF & UVR SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Revised:

Bill Kirkness

01/04

ED02029

Rev.

Sheet 2 of 2

A
7

Primary Power Distribution Chassis


Auxiliary Power Distribution PCB
890450, 1104015-01, -02

Main Thyratron Chassis


PFN
Screen
Interlocks

CB7
0A 0

J1
120V B
6

10 0 2 ,Lift
30

OB 0

08

T2

CONT
PWR

LINE 2

TB2
S1 0 5

4 7

,p)

CONTPWRB

START 1

J4

Cable 8,9_0666-01

J3

P/J1 0

Chassis
Door
Interlock

Modulator
Door
Interlocks

S1-3
S5-11
TB2
CN/0c</0---<<--- 6
P/J11
P/J12

S4
C\/

START 2

Crowbar
(Aux Contacts)

6
TB1

1-6

17i

AC Door
Interlock Sw.
im\\./

K6, K7 Pin Connection Diagram


(PCB P/N 890450, 1104105-01,
1104105-02)

OA
L>
OB

(S9Primary
Power

C
.=>

0
o

To High
> Voltage Plate
Transformer
via K2, K3, K4

HVINTLK

HVINT B2
11

Customer Terminal Strip (TB2)

J1
,=>

o7 HVINT A2

HVINT_A1

2o

J1

=2>

ACDOORILOUT

HVINT_B1

17

18

oto

10

ACDOORILIN
8

20

J1 .
08

MODE B

MODE A

BEAMON
-->

AC COM

KHV 2

KHV 1

MODE A MODE B
(Auxiliary Contacts)

Note: On Auxiliary Power Distribution PCB's P/N 890450, 1104015-01, 1104015-02, the
KHV1 and KHV2 Beam-On relays (K7 and K6) have 2 solder pins for each
connection tab, arranged as shown above (viewed from the solder side of the PCB).
Beginning in May 2001, the 1104015-03 version of the PCB was introduced. K6 and
K7 were replaced by relays having a standard pin layout.

Non-EMC Modulator
(See Sheet 2 for EMC Modulator)
8

Rev. B: Updated for current production. B.K. 06/99


Rev. C: Added note for K6 & K7. B.K. 03/01
Rev. D: Corrected TB2 no's, added colors. B.K. 04/01
Rev. E: Added note for K6 & K7 replacement. B.K. 05/01
Rev, F: Redrawn with CorelDraw. B.K. 01/03
Rev. G: Added TB1, K1 contacts, FL1. B.K. 08/04
Rev. H: Corrected K6, K7 pin no's, notes. B.K. 06/05
Rev. I: Revised for consistency. B.K. 01/06

HIGH ENERGY C3 CLINACS


BEAM-ON RELAY POWER SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:

Bill Kirkness

03/95

872585

Revised:

Bill Kirkness

01/06

Sheet 1 of 2

Rev.

9
Primary Power Distribution Chassis
Auxiliary Power Distribution PCB
110415-03

Universal Thyratron Chassis

0A 0
OB 0

J2

Thyratron Chassis Backplane

CB7
10 0 2 OA
30 0 4

CB13
T2

OB

120V B

Thyratron P.S. Plug-in

7..
06--2Cr1
1 00

CONT
PWR

LINE 2

CONTPWRB3A

J4

W60

J4

120VAC

la

lc _1.21211A.o_at,

Q2

CB12

==>

START 1

START 2

+24V from Door and


Screen Interlocks

Crowbar
(Aux Contacts)

ACDOORILOUT

TB1
AC Door
Interlock Sw.
--0\//0

FL1

OA

Primary
Power

Line Noise
Filter

OB

Customer Terminal Strip (TB2)

=>

To High

)0. Voltage Plate


Transformer
via K2, K3, K4
0,

18
ACDOORILIN

ACDOORILOUT

K6, K7 pin no's are for PCB 1104015-03, with -01, -02
no's shown in parentheses (See note on Sheet 1)

2
100,....r."-;1
6

2
10

HVINT Al

EM OFF

EM OFF 2

HVINT B1

HVINT B2

J1

_L HVINT A2

_L

MODE B

2(10)
11

10(9)

2(10)
68

'o

MODE A

KHV 2

10 9

KHV

J1

06 (8)

BEAMON

V
AC COM

HV ON

MODE B MODE A
(Auxiliary Contacts)

Note: FL1 not present in some older systems.

HIGH ENERGY C3 CLINACS


BEAM-ON RELAY POWER SYSTEM DIAGRAM

EMC Modulator
(See Sheet 1 for Non-EMC Modulator)

FOR TRAINING PURPOSES ONLY


Drawn:

Bill Kirkness

03/95

872585

Revised:

Bill Kirkness

06/05

Sheet 2 of 2

Rev.

10

Console

Primary Power Distribution Chassis

Console Backplane

Auxiliary Power Distribution PCB

B4: Timer Interface PCB

J24

43

W3

FAIL SAFE 1

jg

BMEN1
-->

U3
IN

49

KHV2

OUT

When the BEAM ENABLE key is in the DISABLE


position, there is no +24V ON power available toU3
or U2. When the Clinac is in STANDBY, the +24V
ON line is zero volts, so that even if the key is in the
ENABLE position there is no power for U3 or U2.

GND
R5

21
Ulb

Beam Control Logic


(Actual configuration
depends on PCB version)

41

KHV1

KHV1

LOGIC GND

BMEN2

B3: Output Interface PCB 100012755

The circuit is designed so that if any component in


FAIL SAFE 1 or FAIL SAFE 2 should fail while the
beam is off, either K6 or K7 would not be energized
at Beam On, resulting in no beam and an HWFA
interlock.

CR21

KHV+

02
6

27

LOGIC GND
GN '/

FAIL SAFE 2

U2

50

OUT

2(11)

GND

3 13

+24V

FAIL SAFE LOGIC:

KHV2
=>
84

0Qi
6

P1

+24V ON

Ula

CR20

50

11

12

11
12

13

J1

+24VPWR
OGIC GND

Note: Numbers for PCB 883830


are shown in parentheses.

KHV+

HVONKHV+

013

13
Auxiliary
Contacts

LOGIC GND

KHV+

20

154 fTh

BEAM ON (Light)
(=

44=

BMEN1
-->
BMEN2
J26

0
21
10 11 12

<1=

BMON/OFF/RDY
-->
BEAM OFF (Light)
10

ACDOORILIN

2f19

IN1

)_

Emergency Off, Mode


A, Mode B relays.
(See Dwg. 872585)

0
CONTPWRB
i=>

Keyboard
J4

10 11 12

9
-->

G 2

HV ON

1(_)2

KHV2

Customer Terminal Strip (TB2)

0
KHV 1

\/
AC COM

Note: This drawing applies to the Auxiliary Power Distribution PCB

P/N 1104015-01, 02. See Sheet 2 for later versions.

DC COM

DC COM

S7
4B

04C
BEAM ENABLE
Key Switch

10

HIGH ENERGY C3 CLINACS


BEAM-ON SIGNAL FLOW SYSTEM DIAGRAM

=>
Keyboard PCB

Rev. B: Added colors. B.K. 03/01


Rev. C: Revised for greater legibility. B.K. 03/01
Rev. D: Revised margins for databook. B.K. 05/01
Rev. E: Redrawn with CorelDRAW. B.K. 02/03
Rev. F: Updated. B.K. 12/03
Rev. G: Added KHV+ circuitry. B.K. 09/04
Rev. H: Updated for new Output I/F PCB. B.K. 01/06

FOR TRAINING PURPOSES ONLY


Drawn:

Bill Kirkness

03/95

872586

Revised:

Bill Kirkness

01/06

Sheet 1 of 2

Rev.

11

Console

Primary Power Distribution Chassis

Console Backplane

Auxiliary Power Distribution PCB

B4: Timer Interface PCB

J24
=> [9
43

W3

BMEN1

FAIL SAFE 1
49

IN

KHV2

When the BEAM ENABLE key is in the DISABLE


position, there is no +24V ON power available toU3
or U2. When the Clinac is in STANDBY, the +24V
ON line is zero volts, so that even if the key is in the
ENABLE position there is no power for U3 or U2.

OUT
GND
2

U1b

Beam Control Logic


(Actual configuration
depends on PCB version)

41

KHV1

27

KHV+

KHV1

02

B3: Output Interface PCB 100012755

The circuit is designed so that if any component in


FAIL SAFE 1 or FAIL SAFE 2 should fail while the
beam is off, either K6 or K7 would not be energized
at Beam On, resulting in no beam and an HWFA
interlock.

CR21

LOGIC GND

=>

BMEN2

LOGIC GND

FAIL SAFE 2
1

50

2(11)
+24V

FAIL SAFE LOGIC:

U3

U2
OUT
GND
2

3 13

04 '9'

U1a
KHV2

9(6)
84
(8)

+24V ON

J1

01

P1
50

HVONKHV+
=(>

13

CR20
COM
LOGIC GND
KHV+

Note: Numbers for PCB 883830


are shown in parentheses.

Auxiliary
Contacts

LOGIC GND
KHV+

20

<--

<)=.

11

154

0:153_

<1=

.1261

BMEN1

BEAM ON (Light)
<=.

BMEN2

BMON/OFF/RDY
=>

10 1 11 1 12 1

\c-_519

W1

Keyboard
JA

10

12

3
0
+24VPWR

BEAM OFF (Light)


<C=
ACDOORILIN Emergency Off, Mode
A, Mode B relays.
(See Dwg. 872585)

o7
10
6

10
==>

0
CONTPWRB

Customer Terminal Strip (TB2)

06

KHV 2
Note: This drawing applies to the Auxiliary Power Distribution PCB
P/N 1104015-03 and up. See Sheet 1 for earlier versions.

BEAM ENABLE
Key Switch

HV ON

KHV 1
\4C COM

\/
AC COM
\ -_)C
. COM

HIGH ENERGY C3 CLINACS


BEAM-ON SIGNAL FLOW SYSTEM DIAGRAM

3C
4C
0

BEAMON

>
Keyboard PCB

FOR TRAINING PURPOSES ONLY


Drawn:

Bill Kirkness

03/95

872586

Revised:

Bill Kirkness

01/06

Sheet 2 of 2

Rev.

11

12
30 Primary Power
from Facility
Circuit Breaker

Main Thyratron
Chassis

,==>

I PUMP
T1 (30)
Buck-Boost
(PPD)

CB2
(PPD)

UNE I

MIX 1
...,-----.
o
CB3
(PPD)

CB6
(PPD)

To Water Pump

Crowbar
(Auxiliary
Contacts)

K6
Pump
(PPD)
3
=>

To 30 Supplies,
Filaments, Large Fans,
Steering P.S.,
Gun, RF Driver

0.--(;,
=>
K5
WaterNac
(PPD)

Customer
Terminal Strip
(TB2B)

Mode B
Select

AC Door
Interlock Sw.
\/0-0
->

K3-4
(PPD)

Modulator
Screen &
Door Sw's
K1

K10-3
(APD)

<=

Mode A
Select

I MOTORS 2
3
=>

od

TN(PPD)
Toro0
rs)

Grid Bias
Power
Supply

(See Clinac-to-Customer
Connection Diagram in
Data Book Section 1)

Mode B

I To Beamstopper,
>Aerotech P.S.
Aux Elec. Fans

=I>

02
-->

CB4
(PPD)

30 AC power to
Motor Power Supplies

(Cl Clinacs)
(K7 removed and its contacts
jumpered in some C1 Clinacs)
0

I CONTROL

To Console LVPS,
Other Power Supplies
Fans, Lamps etc.

F2 01

CBI HOLD
(+24V or Batt.)

F3 02
=>

CB5
(PPD)
START I

=>

Console
Electronics
Cabinet

Beam On

=>

=>

Beam On

K2
(PPD)
=`.>

Low Voltage
Power Supply

+24V
=1>

Start
Button
o o

4
....]

Clinac
,,> Emergency
Off Svv's

1 Console
Emergency

Note: PPD: Primary Power Distribution Chassis


APD: Auxiliary "
Note: This sheet originally drawn by Wil Clark,
07/92, as Dwg. 872584.

12

Step-Start

=>
To Console & Cardrack
Beam On Circuits
IIMMIMMIRMIMIIMNIMIMIIIO

K24-1
(APD)
k

3/

(C2 Clinacs)

HVPS

From opto-couplers on
Timer Interface PCB

,,

Customer
Emergency
Off Sw's

BeamOn

KHV+

=>

Modulator
Emergency
Off Sw's

CBI =
(PPD)

=>

High
Voltage
Power
Supply

HIGH ENERGY C-SERIES CLINACS


BEAM-ON RELAY POWER BLOCK DIAGRAM

=>

FOR TRAINING PURPOSES ONLY

Cl & C2 Clinacs
(See Sheets 2 & 3 for C3 Clinacs)

Drawn:
Rev. A: Approved and released to replace Dwg. No. 872584.
B.K.10/04

Revised:

Bill Kirkness

10/04

ED02038
Sheet 1 of 3

Rev.

13
Main Thyratron
Chassis
Crowbar

30 Primary Power
from Facility
Circuit Breaker

(Auxiliary
Contacts)

PUMP
3
=>

Customer
Terminal Strip
(TB2B)

Mode B
Select

cr----P-o---30. To Water Pump


K6
Pump
(PPD)

AC Door
Interlock Sw.
\7.
0-

17

STAND POWER
3/

LINE 2

30 AC power to
Magnet Power
Supplies in Stand

K5
Water/Vac
(PPD)

d)S1

MOTORS

18

T2 (10)
Isolation
(PPD)

3
K25
Motor
Power
(PPD)

Mode A
Select

30 AC power to
Motor Power
Supplies in Stand

K4-4
(PPD)

Modulator
Screen &
Door Sw's

CN1

(See Clinac-to-Customer
Connection Diagram in
Data Book Section 1)

Mode B

CONTROL
CONTPWRA
=>

)1/0

CONTPWRB
-->

=t).

EMOFFO
(See Dwg.
E D4)20.29)

To Console LVPS,
Other Power Supplies
Fans, Lamps etc.
o o _
CB12
(APD)

START

CONTPWRB3A
=>

KHV2

c=f>

K7
(APD)

Console
Electronics
Cabinet

Fail-Safe Circuits
(See Dwg. No. 872586)

HVONKHV+

KHV1

EMOFFKHV

_L

Step-Start
K2 Aux.
Contacts

Emergency Off Relays

To Console & Cardrack


Beam On Circuits

+24V
==t>

Emergency Off Sw's


(See Dwg. No. ED02029)

=l>

BeamOn

KHV+
1=,

KHV2
Low Voltage
Power Supply

K2
(PPL,

From opto-couplers on
Timer Interface PCB I KHV1

C0

HVPS

CB1
(PPD)

High
Voltage
Power
Supply

HIGH ENERGY C-SERIES CLINACS


BEAM-ON RELAY POWER BLOCK DIAGRAM

Note: PPD: Primary Power Distribution Chassis


APD: Auxiliary "

C3 Non-EMC Clinacs
(See Sheet 3 for EMC Clinacs,
Sheet 1 for C1 and C2 Clinacs)

FOR TRAINING PURPOSES ONLY


Drawn:
Revised:

Bill Kirkness

10/04

ED02038

Rev.

Sheet 2 of 3

A
13

14
Main Thyratron
Chassis
Crowbar

30 Primary Power
from Facility
Circuit Breaker

(Auxiliary
Contacts)

PUMP
3/

=> /

K6
Pump
(PPD)

=>

To Water Pump

,=>

STAND POWER

K1
3/
/

LINE 2

30 AC power to
c"=
-11/''
D.
Magnet Power
K5
Supplies in Stand
Water/Vac
(PPD)

3/

K9
(APD)

Modulator
Screen &
Door Sw's

CO
>1
C

Mode A
Select

Grid Bias
Power
LI Supply

30 AC power to
Motor Power
Supplies in Stand

K25
Motor
Power
(PPD)

(See Clinac-to-Customer
Connection Diagram in
Data Book Section 1)

Kl=

MOTORS
12 (10)
Isolation
(PPD)

Customer
Terminal Strip
(TB2B)

AC Door
Interlock Sw.

Mode B
Select

=>

CONTROL
CONTPWRA
CONTPWRB

EMOFFO
(See Dwg.
E DS:120,29)

To Console LVPS,
)01, Other Power Supplies
Fans, Lamps etc.
0 0

CONTPWRB3A

CB12
(APD)

START

=1>

Console
Electronics
Cabinet

AFail-Safe Circuits
(See Dwg. No. 872586)

Emergency Off Relays

To Console & Cardrack


Beam On Circuits

HVONKHV+

KHV2

KHV+
High
Voltage
Power
Supply

3
KHV2
Low Voltage
Power Supply

+24\/

Emergency Off Sw's


(See Dwg. No. ED02029)

=>

From opto-couplers on
Timer Interface PCB I KHV1

HVPS

CB1 =>
(PPD)

HIGH ENERGY C-SERIES CLINACS


BEAM-ON RELAY POWER BLOCK DIAGRAM

Note: PPD: Primary Power Distribution Chassis


APD: Auxiliary "

14

C3 EMC Clinacs
(See Sheet 2 for Non-EMC Clinacs,
Sheet 1 for C1 and C2 Clinacs)

FOR TRAINING PURPOSES ONLY


Drawn:
Revised:

Bill Kirkness

10/04

ED02038

Rev.

Sheet 3 of 3

15

Console

Dedicated Keyboard
Power Distribution PCB

Start Here

PSI

TB_It
2
r
-12V
2

Couch
Pendant Holder
Switches

Keyboard PCB
J4

-12V

Auxiliary Electronics Chassis


Auxiliary Electronics Backplane

J28

IL PNDT

J5
-12V

W1

PWM PCB's
XA4

B7: Carrousel,
Mode, BMag PCB
See Couch
Schematic
Diagrams

Key Switch

20c
P1

4
W26
=>

Console Backplane

-12V
=C,

13

J15

J26

IL CDOS

B3: Output Interface PCB


883830
P1
49

,-.9 - -12V ON

J23

P1

-->

=>

13

W10

Thyratron
Chassis

=f>

EMC systems
only. See MOD
HVOC System
Diagrams

Crowbar
(Aux. Contacts)
2a,b,c

=t>

R6,00

IL MOD

IL MOD

28c

IL HVOC

6c

IL TDRV

.,W27 (Stand
-'Harness)

-L XA2
20c

10b

20c

10b

J2

R2
R1
TP2 0-,\An..rilikAA,
J9

J17

J11

Customer Terminal Strip


(TB2)
-->

W3

10

IL DOOR

J14
<I=

Vaclon P.S.
See VAC1 &
VAC2 Interlocks
System Diagram

=>

See GFIL
Interlock System
Diagram

Low Gas
Pressure
Switch

CEO

Beamstopper, Flow Switches, Klystron


Oil Level Switch

IL EXQ1

See FLOW
Interlock System
Diagram

Notes: -12V ON is the reference voltage for all C-series Clinac


hardware-detected interlocks and is also used for -12V
power in the Dedicated Keyboard.
See individual Interlock System Diagrams for interlock
signal return paths to Console.

IL EXQT
IL EXQ2

Primary Power
Distribution
Chassis
4
PUMP

P2/J2

IL FLOW

HIGH ENERGY C3 CLINACS


-12V ON SYSTEM DIAGRAM

_20
CB1

IL VAC2

Gun Driver
Gas System

5
17

I IL VAC1

10

Neutron Door
Switch

P1
19

4 4

Room Door
Switch

TP6

=,

4 4 Air System
Low Jr
Pressure
Switch

J3

IL HVOC

=>

B18: Symmetry &


Excess Charge PCB

H20

19c

HVOC & MOD Interlocks


in EMC systems only.

IL CMNR

18

IL FOIL
IL TARG

Gantry Patch Panel

Al: Aux Power Dist. PCB

TP6
0

See PCB
Schematic
Diagram,
EXQ1,2,T
Interlock
System
Diagram

6b
7b

HVOC & MOD


Interlocks in NonEMC systems only.

B12: Fault Signal


Conditioning PCB

=C>

11
11 -sl-SV
-7
1

10b

J42

A2: Fault Cond.


PCB

J2

P1

3a

XA3
20c

44

Modulator Cabinet

Varian Cardrack Backplane

14

rILKSOL

=t>

ILCROBAR

8b

=(>

W6

_E

IL BMAG

J39

47

<1=

See PCB
Schematic
Diagram,
MOD, HVOC
Interlock
System
Diagrams

6a

20c

J33

J14

P1

W67

To MLC

J24

(K2 on PCB 100012755.


See schematic for pin no's)

J14

See Schematic
Diagram; also
BMAG & KSOL,
MODE MOTION
Interlock System
Diagrams

Stand Mother PCB

W4

10b

Rev. F: Redrawn with CorelDraw. B.K. 02/03


Rev. G: Increased conn. font size for legibility. B.K. 06/03
Rev. H: Made more room for this list. B.K. 03/04
Rev. I: Added note for DKB usage. B.K. 03/05
Rev. J: Updated interlock reference notes. B.K. 09/05
Rev. K: Updated for new Output I/F PCB. B.K. 01/06
Rev. L: General update. B.K. 02//06

FOR TRAINING PURPOSES ONLY


Drawn:

Bill Kirkness

05/00

ED02002

Revised:

Bill Kirkness

01/06

Sheet 1 of 1

Rev.

15

16

Console
PSI

Start Here
TB

J7

Beam Enable Key Switch


+24V
=t,

0-0>6

W4

OCONTPWRA

S7

Primary Power
Distribution
Chassis

Auxiliary Power
Distribution PCB

J9

F6
10 ;11)TUD

+24V
=2-

Modulator Cabinet

Dedicated Keyboard

Power Distribution PCB

B13

J11

120V A

J5

120V B

Console Backplane
4

B3: Output Interface PCB 883830

10

(See Sheet 2 for PCB 100012755)

J13
53

+24V

WI

J2i
P1 XB3

+24V ON

11

J4
+24V ON
=t>
BM EN1

50

10

BM EN2
<=,

12
55

8
CB7

11

(=;

12

(=

T2

CONTPWRB

Keyboard PCB

11'
J24
16

WTR/VAC

K2 is energized by the
Control Computer
when the Clinac is in
the ON State.

15

FIL RELAY

13

READY

When the Clinac is in


STANDBY, K2 is
released, removing
the power from all
relay drivers and
other functions
powered by +24V ON.

12

LASER CONT

11

35

=ii>

7
10

RM LT CONT

16

U29

33

39
40
49

=>

49

BM_EN2

=t>

111/2

29
19

GUNADJEN .
MODE CMD

J25
MODE CMD

27

CAL CMD

28

U25

40

22

=1>

45

CAL CMD

5
CB2
To Water
0 0-Pump
via K28
,
>0 0-

To K9
Fail-safe
KHV Relay
Circuits

Gantry
Patch
Panel

95,,
1 /4_.)
C=

J47
=>
19 _To Carrousel,
Mode, BMag PCB

Pump Motor
Overload Sensor
<=
J2
25

J35
WTR/VAC

12

29

CR DOS RESET

30

16

MOD MODE B
BM_EN1

Backplane

=1>

17

39 To K12

4 4

MOT POT PWR

,>0 0

To K8

MOD MODE A

J2

21

N.C.

1 To K5

Auxiliary Electronics
Chassis

GUN V MODE (N/U)

19

0To EMI
0 0: Power
---- Supplies

J14

GHV ON CONT

20

CB3

WTR/VAC

To K11

LASER CONT

MOD MODE B

18

18

READY

MOD MODE A

17

U30

FIL RELAY (N/U)

;=>

50

13

RM LT CONT

FIL RELAY is used only


in C2 & C2 Clinacs.
GUN V MODE is used
only in Clinacs with
Analog Gun Drivers

14

WTR/VAC

-->

11.
Relay
Drivers

J8

vYs.3

22

21

45

29

W32
I

I
I
I

Filament Timer
(on panel)

25

H2OFLOAT
(CONTPW RB
via water
over-temp &
float switches
in the Stand)

21
29

;:;
<1=

4
.12;

-8 4 4b

.11= .1141;
LL

Gun Driver
WTR/VAC

2
N.C.

38

To K1, K2 47
N.C.

; <=;

Vaclon P.S.
CAL CMD

46

HIGH ENERGY C3 CLINACS


+24V ON & WATER/VAC SYSTEM DIAGRAM

RN3
10

J1
To B18-21 (EXQ PCB) 22

W19

J14

W6
4
Note: GHV ON CONT is high whenever an energy mode is selected, low in NO MODE.

16

OC

<= 0

208V 3-0
Primary
AC Power

W,2,s0

TP10
7

OB

To T3, T4, RF Driver


& Large Fans

GUNADJEN

Varian Cardrack Backplane

TB1

CB

4 4 4

Rev. E: Redrawn with CorelDraw. B.K. 02/03


Rev. F: Revised for clarity. B.K. 01/04
Rev. G: Increased space for this list. B.K. 04/04
Rev. H: Output I/F: Pin 50 was 53. B.K. 05/05
Rev. I: Updated interlock reference notes. B.K. 09/05
Rev. J: Updated for new Output I/F PCB. B.K. 01/06

FOR TRAINING PURPOSES ONLY


Drawn:

Bill Kirkness

06/00

ED02003

Revised:

Bill Kirkness

01/06

Sheet 1 of 2

Rev.

17

Console
PSI

Start Here
TB21

J7

+24V

Beam Enable Key Switch


+24V

=>

S7

W4

J5

0 53

P1

+24V

+24V ON

XB3

120VA

=>

11

BM EN2

12

T2

12

CONTPWRB

Keyboard PCB

44

J2,

WTR/VAC

16

FIL RELAY

K3 is energized by the
Control Computer
when the Clinac is in
the ON State.

13

READY

12

LASER CONT

11

16

U17

33

=t>

35
7

=t>

10

RM LT CONT

11

=>

39

FIL RELAY is used only


in C2 & C2 Clinacs.

When the Clinac is in


STANDBY, K3 is
released, removing
the power from all
relay drivers and
other functions
powered by +24V ON.

Relay
Drivers

40

GUN V MODE is used


only in Clinacs with
Analog Gun Drivers

49
50

15

17

14

18

13

20

12

19

11

21

18

30

17

28

16

U18

IN3

WTR/VAC
FIL RELAY (N/U)
READY

RM LT CONT
=>
=f>

40

BM EN1

7'1

=t>

19

MODE CMD

J25

29
19

==>

22
45

WTR/VAC
CAL CMD

VII

SO

38 47 46

1111 .11411
22

To Water
0 0 Pump
=>
via K28

Fail-safe
KHV Relay
Circuits

0 0
=t>

44
5

Pump Motor
Overload Sensor

=t>
I_To Carrousel,
Mode, BMag PCB

W32

25

1J35
22

21
,

45

29

Gun Driver
WTRA/AC

Filament Timer
(on panel)

25

21

-^

0 0-

J47

J42

MODE CMD

CB2

Gantry
Patch
Panel

Backplane
GUNADJEN ."

To K9

=t>

BM EN2

To K5

39 To K12

MOD MODE B

CAL CMD

.121

MOD MODE A

W2

29

To EMI
,0 0 Power
Supplies
0 0

N.C.
J14

GUN V MODE (N/U)


=>

CB3

13

,==>

10 To K8

=>

GHV ON CONT

MOT POT PWR

WTR/VAC

To K11

LASER CONT

MOD MODE B

4 4

35

=t>

Auxiliary Electronics
Chassis

CR DOS RESET

J8
33

=D,

MOD MODE A

J2

120V B
CB7

55

=>

<=6

Start
Relays

10

BM EN1

11

50

=,>

+24V ON

10

(See Sheet 1 for PCB 883830)

J11

J4

J26

J13

0 CONTPWRA
B13

3 I

Console Backplane
B3: Output Interface PCB 100012755

29

H2OFLOAT

=>

N.C.

38

4
<= 0

To K1, K2

47

N.C.

46

OB
00

22

208V 3-0
Primary
AC Power

'

Vaclon P.S.
CAL CMD

HIGH ENERGY 03 CLINACS


+24V ON & WATER/VAC SYSTEM DIAGRAM

J1

To B18-21 (EXQ PCB)

OA

To T3, T4, RF Driver


& Large Fans

RN3
10

TB1

CB

Vy2,0

TP10
7

(CONTPWRB
via water
over-temp &
float switches
in the Stand)

44

=>

GUNADJEN

Varian Cardrack Backplane

Primary Power
Distribution
Chassis

Auxiliary Power
Distribution PCB

J9

F6

10

=:>

Modulator Cabinet

Dedicated Keyboard

Power Distribution PCB

W19
(`=

FOR TRAINING PURPOSES ONLY

J14

W6
Note: GHV ON CONT is high whenever an energy mode is selected, low in NO MODE.

Drawn:

Bill Kirkness

06/00

ED02003

Revised:

Bill Kirkness

01/06

Sheet 2 of 2

Rev.

17

18
Modulator

6-0 Bridge Rectifier


(12 UDB7.5)
720-Hz Ripple

CB1, K1-4 located


in Primary Power
Distribution Chassis

3-0 Primary
Power

0 00 0

CR1 CR2 CR3

S5

K4
MODE B

c6Th 0 00 0
CB1
K1
K2
HVPS HV ON StepStart

DeQing
Thyratron
V1
8503AF

56

A-

S4

CR4 CR5 CR6

C1
8.7pF
7.5kV

C3 0.1pF, 20kV _
(10 in series)

CR23-25

R22
5M
20W

3;

03
2
1

One of three primaries shown,


fed by0A-0B. Other two are
fed by 0B-0C, 0C-0A.

Mode A: 11

CR10 CR11 CR12


7.7

50-60%
deQing

R23
5M
20W

R9
100
1W

Filament
Voltage
6.3V RMS

(Nominal)
Mode B: 13 KV @ 1.3 A

0 V Ref

R10, 470
1W

J2

500pF
5KV

R101
33.2k

T2

R11, 10
25W

PEN Voltage Monitor to Meter Interface PCB


PEN Programming Voltage from Cardrack

R25
250

PPP

Modulator
Equipment
Ground and
PEN Shield,
One point.
-6.5 pSec
C. Filament
L Voltage
6.3V RMS
(Regulating)

10
14

Klystron Current
Monitor
0.1 V/A
No correction

21
28

18

5.5 to 8.0
Volts

26,DD

RF Power
Output
J1

Pulse
Transformer
Oil Tank
(in Stand)

_P=

Klystron
VKS8252

0 V Ref.

1.3 mSec

16

PFNV

Klystron Oil
Tank (in Stand)
Pulse
Transformer
Ti

11,

0 V Ref.

B2: Trigger Pulse Amplifier

Klystron Triggers from Console

R1
250

4
16
21
18

T5
1g
6,7
F,H

R12
100, 5W L6, 66pH

Toroid

26,00

Modulator PRF:
4X: 400 Hz.
6X, 8X, 10X: 360 Hz.
All other energies: 180 Hz.

C17
01pf
1kV

J3-G

CONT PWR 02 from


Primary Power Distribution
1
J3-H

th

2600

16
10

19

21

18

C11
001pf=
5kV

Cl and C2
factory
selected

-120V nominal, no load


5

C6
.024pF

C18
100pF
5kV

Oil Level Sensor

C4

Klystron Voltage Monitor


Approx. 24,000:1 @ 40C
with 25' RG-58/U cable

i
TP3

R19, 1k

FLOW IL
< J7-D

C2

161.

De-spiking
Network

/I/
C15
.01pf = R21
1kV
4700

J7 C

Weldment

R20
4700, 1W

340V DC, unregulated


24,BB

Klystron Oil Tank


Equipment Ground

Pulse Transformer Data:


Turns Ratio: 1:11
Impedance Ratio: 1:121
Effective Pulse Width (70%):
6.5 pSec

0 V Ref.
236 Volts RMS
Regulated
3-4 Volts

+120V nominal, no load


(+50V with 20 mA load)

Notes:
See Sheet 2 for C2 Modulator Systems.
See Sheet 3 for 03 Modulator Systems.
See Sheet 4 for EMC Modulator Systems.

Cl Modulator Systems

I 251Wk

C12
100pF
5kV I

B3: Grid Power Supply


14

R2
250

i=>
R13

RF Drive
Input

-s U 0

HVPS Current Monitor to Console Monitor Panel and Fault Signal Cond. PCB

End Clipper current


monitor to MOD 1/1_
detection on Fault
Signal Conditioning
PCB in Cardrack

KLYI

Pulse Cables (4)


12.50 RG8 Triax for current
handling capability and
impedance matching

21-01-01-0

,q,1,,02

BI: DeQing Amplifier


PEN Voltage Waveform to Console Monitor Panel

T6
-LI 9 I I
II
From Pri.
Pwr. Dist. K5

End Clipper Ito Console


NOTE: Calibration: 1 V/A

T5 (Toroid)
P/N 873897
/ /

R17 (Thyrites)
(12 in parallel)

-9 Volts

C101
1500pF
50V

Pwr Dist. T4

TP2

T = 2 (LC)"
T = 2" (36.5 pH . 0.28 pF)"
T = 6.39 pSec discharge pulse width

R103
10M

ITT"

C19

R102
3320

R105
470

T3

HVPSI

R104
470

J1

@ 1.6 A

H-1.3 mSec

C4-C9 0 046 pF, 30 kV (6)

mi*L8

R24
250

C1 thru
C100
1000pF
500V

R1 thru
R100
499k
C2
8.7pF
7.5kV

S2

2;

Crowbar
R6,7
2.2k
75W

Compensated High
Voltage Divider

L5
66pH

CR7 CR8 CR9

116

Main
Thyratron
V2
CX1159

R1 2500, 215W
(10 in series)

5
4

From Screen and


Door Switches

(3 in series)

S3

6/o5

Tap Selector Sw:


Position Line Voltage
6
196/340
5
208/360
4
220/380
3
230/400
2
240/415
1
254/440
(Voltages are for
Delta/Wye configurations)

End Clipper Circuit


+10V nominal fault
,signal, 0.1 Volt/Amp

R3,4
2.2k. 75W

CR14 S3HVM7.5
(4 in series)

L3 & L4 70 H in parallel

=1>
R5
250
275W

Ti: High Voltage


Plate Transformer
829735

4.5 to 5.5
Volts

CR13-18 S6HVM5
(6 in series)

=>
MODE A
K3

OB-5-15

1.25H

7 pSec

(T3

KFIL
Interlock

KLYV

Primary Power Distribution

HIGH ENERGY C-SERIES CLINACS


MODULATOR SCHEMATIC DIAGRAM
Rev. F: Redrawn with CorelDraw. B.K. 02/03
Rev. G: Updated for current production. B.K. 09/03
Rev. H: Added Kl, CB1. B.K. 04/05
Rev. I: Updated for current production. B.K. 05/05
Rev. J: Added sheets for C2,C3. B.K. 06/05
Rev. K: Clarified Sheet 4 signals. B.K. 08/05
Rev. L: Cleared some print faults GdR 10/08

FOR TRAINING PURPOSES ONLY


Drawn:

Wil Clark

03/95

ED00056

Revised:

Gino den Ridder

10/08

Sheet 1 of 4

Rev.

19
Modulator

6-0 Bridge Rectifier


(12 UDB7.5)
720-Hz Ripple

CB1 , K1-4 located


in Primary Power
Distribution Chassis

3-0 Primary
Power

Ti: High Voltage


Plate Transformer
829735

K4

76.
CR1 cR2 CR3

Tap Selector Sw:


Position Line Voltage
6
196/340
5
208/360
4
220/380
3
230/400
2
240/415
1
254/440
(Voltages are for
Delta/Wye configurations)

6
5

Cl
8.7pF
7.5kV

RI 2500, 215W
(10 in series)

R22
5M
20W

CR7 CR8 CR9

t
3 ip

03

C10
0.001pF
5KV

C2
8.7pF
7.5kV

S2

L3 & L4: 70 H in parallel

CR10 CR11 CR12

R10, 470
1W

16

-LULU-

-(1111s_

tilt'
From Pri.
Pwr. Dist. K5

R11, 10
25W

PFN Voltage Monitor to Meter Interface PCB


PFN Programming Voltage from Cardrack

MP

;1c) flp lc' rip

handling capability and


impedance matching

Modulator
Equipment
Ground and
PFN Shield,
One point.

KLYI
-6.5 pSec

Filament
Voltage
6.3V RMS
C (Regulating)

Klystron
VKS8252

0 V Ref.

PPP

Klystron Current
Monitor
0.1 V/A
No correction

Pulse
Transformer
Oil Tank
(in Stand)

10
14
21
28

18

5.5 to 8.0
Volts

26,DD

PFNV

Klystron Oil
Tank (in Stand)
Pulse
Transformer
Ti

21
18

J3-G

CONT PWR 02 from


Primary Power Distribution
1
J3-H

6,7
F,H

T5
17

R12
100. 5W
R13

26,DD

Modulator PRF:
4X: 400 Hz.
6X, 8X, 10X: 360 Hz.
All other energies: 180 Hz.
TB

R1
250

4
16

C17 2I51Wk
.01pf
1 kV I

14

26,DD

16

L6, 66pH

C11
.00114f ---5kV

C12
100pF -F
5kV I

B3: Grid Power Supply


7

10

24,BB

19

21

-120V nominal no load

R19, lk

Cl

C6
.024pF

C18
100pF
5kV

J7 C
FLOW IL

utr

< J7-D
Oil Level Sensor

-vvv-eC2

De-spiking
Network

yye dment
.

Cl and C2
factory
selected

C4
--"s1

/7/
TP3

==>

R2
250

R20
4700,1W

340V DC, unregulated

RF Drive
Input

0 V Re

B2: Trigger Pulse Amplifier

Klystron Triggers from Console

Output

Toroid

Cs)
HVPS Current Monitor to Console Monitor Panel and Fault Signal Cond. PCB

RF Power

1.3 mSec

16

End Clipper current


monitor to MOD I/L
detection on Fault
Signal Conditioning
PCB in Cardrack

Pulse Cables (4)

12.50 RG8 Triax for current

-13 AO -13 -13


: DeQing Amplifier

PFN Voltage Waveform to Console Monitor Panel

T5 (Toroid)
P/N 873897
)11 /

R1 (Thyrites)
(12 in parallel)

m.L8

<1=i

End Clipper Ito Console

NOTE: Calibration: 1 V/A

10_

C4-C9 0.046 pF, 30 kV (6)

R24 R25
250 250

-9 Volts
500pF
5KV
C8 C7

R101
33.2k
470

C19
.006pF

T2

Frorri
ii
Pwr. Diet. T4

0 V Ref

R9
100
1W

1:1

T3
TP2

C101
1500pF
50V

HVPSI
-1.3 mSec

J1

low

Filament
Voltage
6.3V RMS

Mode A: 11 KV @ 1.6 Al
Mode B: 13 KV @ 1.3 A (Nominal)

R104

k_signal, 0.1 Volt/Amp

T - 2 . (LC)
T = 2 . (36.5 pH . 0.28 pF)''
T = 6.39 pSec discharge pulse width

TITTIT

Main
Thyratron
f? V2
u CX1159

Cl thru
R1 thru
C100
R100
499k 1000pF
500V
R102
3320

R8
loon

R23
5M
20W

Crowbar
R6,7
2.2k
75W

Compensated High
Voltage Divider

66pH

End Clipper Circuit


+10V nominal fault

CR14 S3HVM7.5
(4 in series)

L7

From Screen and


Door Switches

11_,,

S3

Q\02

One of three primaries shown,


fed by0A-0B. Other two are
fed by GB-0C, 0C-0A.

4.5 to 5.5
Volts

=>

RV1 RV2

CR23-25
C3 0.1pF, 20kV _
(10 in series)
(3 in series)

5
4

50-60%
deQing

CR13-18 S6HVM5
(6 in series)

CR4 CR5 CR6

DeQing
Thyratron
V1
8503AF

MODE B

CB1
K1
K2
HVPS HV ON StepStart

R5
250
275W

oc-0
-z 0 0-0 0

25H

=I>
MODE A
K3

0A-66-50-50B-66--0 0-0 0

Li

C15
.01pf = R21
1kV
4700

Klystron Voltage Monitor


Approx. 24,000:1 @ 40C
with 25' RG-58/U cable

177
Klystron Oil Tank
Equipment Ground

Pulse Transformer Data:


Turns Ratio: 1:11
Impedance Ratio: 1:121
Effective Pulse Width (70%):
6.5 pSec
R6
236 Volts RMS
7.5c).,,
1 Regulated
=i

+120V nominal, no load


(+50V with 20 mA load)

r-r3

KFIL
Interlock

Primary Power Distribution


HIGH ENERGY C-SERIES CLINACS
MODULATOR SCHEMATIC DIAGRAM

Notes:
See Sheet 1 for Cl Modulator Systems.
See Sheet 3 for 03 Modulator Systems.
See Sheet 4 for EMC Modulator Systems.

C2 Modulator Systems

FOR TRAINING PURPOSES ONLY


Drawn:

Wil Clark

03/95

ED00056

Revised:

Gino den Ridder

10/08

Sheet 2 of 4

Rev.

19

20
Modulator

12 UDB7.5 rectifiers
(Changed in 1999 to 2
3-0 modules
P/N 1104994-02

CB1, K1-4 located


in Primary Power
Distribution Chassis

L1 1.25H

000

=t,
R5
250
275W

Ti: High Voltage


Plate Transformer
829735

MODE A
K3
3-0 Primary
Power

CR1 CR2 CR3

0-0
0B-66-0 0-0 0-0C-673 5 5

K4

MODE B

CR4 CR5 CR6


.Tat

CB1
K1
K2
HVPS HV ON StepStart

Tap Selector Sw:


Position Line Voltage
6
196/340
5
208/360
4
220/380
3
230/400
2
240/415
1
254/440
(Voltages are for
Delta/Wye configurations)

Cl
8.7pF
7.5kV

Mode A: 11 KV @ 1.6 A

CR10 CR11 CR12


7.17.

(Nominal)

J2

50-60%
deQing

R104
470

0 V Ref.

R10, 470
1W

C101
1500pF
50V

TP3

-9 Volts

TP4
/ 7 /
Modulator
Equipment
Ground and
PEN Shield,
One point.

T2
T6

KLYI
-6.5 pSec

Filament
Voltage
6.3V RMS

Bl: DeQing Amplifier


16

PFN Voltage Monitor to Meter Interface PCB

18
5

B4

5.5 to 8.0
Volts

==f>

PFNV

0 V Re

26,DD

TP2,--

Pulse
Transformer
Oil Tank
(in Stand)

Klystron Oil
Tank (in Stand)
Pulse
Transformer
Ti

MUM

TP1

B2: Trigger Pulse Amplifier

Klystron Triggers from Console

R3 R2

4
16
21
18

<1=
6,7
F,H

26,DD

Modulator PRF:
4X: 400 Hz.
6X, 8X, 10X: 360 Hz
All other energies: 180 Hz.

T5
17

R12
100 5W

-C17 25W
.01pf
lkV
B3: Grid Power Supply
7

14

16

CONT PWR 02 from


Primary Power Distribution
1
J3-H

10

J3-G

R13
1k

4
3

26,DD

C11
001pf=
5kV

C12
100pF -r
5kV I

-120V nominal no load


5

R19, 1k

R2
250

Cl
Cl and C2
factory
selected

Oil Level Sensor

C2

'----1 Klystron Voltage Monitor


Approx. 24,000:1 @ 40C
with 25' RG-58/U cable
/7/
Klystron Oil Tank
Equipment Ground

Pulse Transformer Data:


Turns Ratio: 1:11
Impedance Ratio: 1:121
Effective Pulse Width (70%):
6.5 pSec

C15
.01pf = R21
lkV
4700

FLOW IL
J7-D

De-spiking
Network

/7/

J7 C

C6
.024pF

C18
100pF
5kV

RF Drive
Input

e.1.1

Weldment

R20
4700 1W

340V DC unregulated
24,88

19
21

==t>

L6, 66pH

R1
250

C.

Toroid

0=.

HVPS Current Monitor to Console Monitor Panel and Fault Signal Cond. PCB

RE Power
Output
J1

\a"

1.3 mSec
10
14
21
28

Klystron Current
Monitor
0.1 V/A
No correction

<1=

PEN Voltage Waveform to Console Monitor Panel

Klystron
VKS8252

0 V Ref.

I
F-L
C Trri.
Pwr. Dist. T4

R11, 10
50W

End Clipper Ito C nsole

PEN Programming Voltage from Cardrack

TP5

R101
33.2k

i\\*....../ t
/ NOTE: Calibration: 1 V/A

PrOp-Of

End Clipper current


monitor to MOD 1/1_
detection on Fault
Signal Conditioning
PCB in Cardrack

Pulse Cables (4)


12.50 RG8 Triax for current
handling capability and
impedance matching

FrWn ri.
Pwr. E3st.T4

B4

21-01-614300

B4

R105
470

C19
.006pF

R102
3320

R103
10M
J2

T4 (Toroid)
P/N 829154

C4-C9 0.046 pF, 30 kV (6)

L8

R24 R25
250 250

R1 thru
R100
499k

R9
Ion

. TTTT

Main
Thyratron
ft V2
V CX1159

Si Crowbar
R6,7
2.2k
75W

Compensated High
Voltage Divider

T - 2 . (LC)
T= 2 . (36.5 pH =0.28 pF)"
T = 6.39 pSec discharge pulse width 7,

L7

From Screen and


Door Switches

R1 2500, 215W
(10 in series)

1vv

Filament
Voltage
6.3V RMS
T3

HVPSI

Mode B: 13 KV @ 1.3A

R8
1000
10IN

RV3 RV2

11-6

C11
0.001pF
5KV

R23
5M
20W

L3 & L4: 70 H in parallel

C3 0.1pF, 20kV _CR23-25


5
(10 in series) 'Y S3HVM7
(3 in series)

End Clipper Circuit


+10V nominal fault
,_signal, 0.1 Volt/Amp

CR14 S3HVM7.5
(4 in series)

==>

L5
a 66pH

C2
8.7pF
7.5kV

/7/

fb

R22
5M
20W

CR7 CR8 CR9

One of tree primaries shown,


fed by0A-0B. Other two are
fed by B-C, 0C-0A.

H -1.3 mSec

CR13 UDE5
(6 in series)

000

DeQing
Thyratron
V1
8503AF

OA-6730

4.5 to 55
.
Volts

6-0 Bridge Rectifier


720-Hz Rip I

236 Volts RMS


Regulated
El

+120V nominal, no load


(+50V with 20 mA load)

KFIL
Interlock

1T3

Primary Power Distribution


HIGH ENERGY C-SERIES CLINACS
MODULATOR SCHEMATIC DIAGRAM

Notes:

See Sheet 1 for Cl Modulator Systems.


See Sheet 2 for C2 Modulator Systems.
See Sheet 4 for EMC Modulator Systems.
B4, the Thyratron Terminal PCB, shown 3 places.

C3 Non-EMC Modulator Systems


20

FOR TRAINING PURPOSES ONLY


Drawn:

Wil Clark

03/95

ED00056

Revised:

Gino den Ridder

10/08

Sheet 3 of 4

Rev.

21

Modulator

12 UDB7.5 rectifiers
(Changed in 1999 to 2
3-0 modules
P/N 1104994-02

CBI, KI-4 located


in Primary Power
Distribution Chassis

3-0 Primary
Power

Ti: High Voltage


Plate Transformer
829735
11
A pi

R3
/ 250
275W

..a.
.....
At.
CR1 CR2
CR3

CR13-18 S6HVM5
(6 in series)

0-0
12513-675-0 0-C) 02)C-0
-75 0 0-0 0

CR4
CR5
.a.
.2.
6:'

CR6

C1
8.7pF
7.5kV

..11.

I\

Ib.

CR7

4 -

CR8

CR9

R1 thru
R100
499k

C10
0.001pF
5KV

C2
8.7pF
7.5kV

si
CR10 CR11

ti

R8
1000
10W

R2
5M
20W

CR12

Filament
Voltage
6.3V RMS

Mode A: 11 KV @ 1.6 Am
(Nominal)
Mode B: 13 KV @ 1.3

J1

A3: Thy. P/S Plug-in PCB

0 V Ref.

50-60%
deQing

24a b c

PFNVTEST

26a,b,c

GRID 2

22a b c

R1

R9
100

TTTTTT

PFN V Meter Signal to Meter Interface PCB

31c

PFN V Waveform to Console Monitor Panel

26c

PFN V Programming Voltage from Program PCB

27c

HVPSI+ Waveform Signal to Console Monitor Panel

22c

Klystron Triggers from Console

23b

500pF5KV
C8 07

6a,b,c

9=0

0 V Ref.

T3
I I
From Pri.
Pwr. Dist. T4

Filament
Voltage
6.3V RMS

PPP

Pulse
Transformer
Oil Tank
(in Stand)

PFNV

Klystron
VKS8252

0 V Ref.

-0

-1.3 mSec Mode A


-1.5 mSec Mod B
1_0.1
4

10a,b,c

End Clipper current


monitor to MOD I/L
detection on Fault
Conditioning PCB

/1/

5.5 to 8.0
Volts

000

Pulse Cables (4)


12.50 RG8 Triax for current
handling capability and
impedance matching

Modulator
Equipment
Ground and
PFN Shield,
One point.

R101
33.2k

R1 (Chassis): 10,75W

Al: Thyratron Grid Control PCB

,,e01-0 1-0 (o

-9 Volts

C101
1500pF
50V

R105
470

R13, 470
1W
ivy's

NOTE: Calibration: 1V/A

R102
3320

R11: 47.50

Ti (Toroid)
P/N 873897

C3 0.0565 pF, 30 kV (6)

C4
.006pF

R2 47.50

TP1 TP2 TP3 TP4


+5V +15V -15V Gnd

Klystron Current
Monitor
0.1 V/A
No correction

Klystron Oil
Tank (in Stand)

Pulse
Transformer
Ti

ll:oroid T3
0 0

RF Power
Output

HE

C.

RE Drive
Input

021
lp

(*)

30c

DeQing Amplifier

T = 2 x (LC)'
T = 2 x (36.5 pH x 0.28 pF)'
T = 6.39 pSec discharge pulse width I

L4

R16
R15
250 250

C1 thru
C100
1000pF
500V

T4

(1-1
F ro r11
1ri.
P
Pwc Dist. T4

HVPSITEST

R104
470
R103
10M

1:1

T5

Main
Thyratron
4 V1
U CX1159

Compensated High
Voltage Divider

L5
66pH

All.

-1.3 mSec Mode A


-1.5 mSec Mode B

From Screen and


Door Switches

Crowbar

One of three primaries shown,


fed by 0A-0B. Other two are
fed by 0B-0C, 0C-0A.

R14
2.2
23.6W

R4-13 2500, 225W


(10 in series)

R1
5M
20W

S3

5;;

6/0

Tap Selector Sw:


Position Line Voltage
6
196/340
5
208/360
4
220/380
3
230/400
2
240/415
1
254/440
(Voltages are for
Delta/Wye configurations)

CR23-25
S3HVM5
(3 in series)

End Clipper Circuit


+10V nominal fault
0.1 Volt/Amp

CR19-22 S3HVM7.5
(4 in series)
,=>
RV1 RV2

L2 & L3: 70 H in parallel

K4
MODE B

CBI
K1
K2
HVPS HV ON StepStart

C5-9 o.spF, 2kV


(5 in series)
(addei 1999)

DeQing
Thyratron
V2
8503AF

0A-6-00

4.5 to 5.5
Volts

L1 1.25H
=*.

MODE A
K3

4 i
y

6-0 Bridge Rec ifier


720-Hz Ripple

C3
pF

23c
Modulator PRF:
4X: 400 Hz.
6X, 8X, 10X: 360 Hz.
All other energies: 180 Hz.

T
J2-1

CONTPWRB from
Primary Power Distribution
1
J2-6

7
6

5
4

13a,b,c

8a,b,c Q >>
Trigger Pulse Amplifier

R18
1k

4a,b,c

C2

Grid Bias Supply

/ 7/

9a,b,c

15c
25c
24c
2a,b,c

HVPS I Meter Signal to Console Meter UF


-12V ON from Console (for HVOC, MOD Interlocks)

190
20c
25b
22c
23c
12c

MOD I/L
HVOC
STEP2SEN
FIL STEP 1
-->
FIL STEP 2
=I>

ata

TP3
Jil

Not used in High


Energy Clinacs
CLIPI+ From End Clipper Toroid

---1 Klystron Voltage Monitor

Cl

Approx. 24,000:1 @ 40C


with 25' RG-58/U cable

J10
R5
10k
1W
Cl
-01pf
1kV

J7-A
t=>
C4 R12
.01-110k
1kVT1/4W

Pulse Transformer Data:


Turns Ratio: 1:11
Impedance Ratio: 1:121
Effective Pulse Width (70%):
6.5 pSec

177Klystron Oil Tank

Equipment Ground
0 V Ref.

Cal

011

R6
236 Volts RMS
7.50 - Regulated
3-4 Volts
0-3

KFIL
Interlock

Primary Power Distribution

-7 pSec

KLYV

HIGH ENERGY C-SERIES CLINACS


MODULATOR SCHEMATIC DIAGRAM

Notes:
See Sheet 1 for C2 Modulator Systems.
See Sheet 2 for C2 Modulator Systems.
See Sheet 3 for 03 Modulator Systems.

C3 EMC Modulator Systems

FLOW IL

Oil Level Sensor

De-spiking
Network
R3
1.47k, 2W

J7-D f

r-

C4
.024uF

T 5kVi
-

J7 C

Weldment

03 R10
100pF= 10M
5kV SW

240V nominal, no load

A2 Fault Conditioning PCB


6b,c

R4
\l
/ loon, 1w

cl_5opF16
18a,b,c

15a,b,c

16a,b,c

J12

low

-120V nominal no load

20a,b,c

14a,b,c

Rc
12.50
550w

P9

FOR TRAINING PURPOSES ONLY


Drawn:

Wil Clark

03/95

ED00056

Revised:

Gino den Ridder

10/08

Sheet 4 of 4

Rev.

21

22

Cl, C2 Shunt Tee Systems with Digital Gun Drivers


FWD PWR
To Monitor Panel

OV ref.
6 to 7
pSec

OV ref.

REFL PWR (VSWR)


To Monitor Panel and
i
Fault Signal Conditioning
PCB in Cardrack

1 to 2
Volts

Water Load
#2
snn/s

Klystron
VKS8252

0)0... LOAD PWR 2

14

To Monitor Panel

RF Rotary
Joint

fs 10 dB

FWD

J1

12 pSe

1 to 2
Volts

(-P

DRV PWR
to Monitor Panel
30-dB Coupler

Detail A

REFL

FWD
4-Port Circulator consisting of:
Magic Tee
Ferrite Phase Shifter
3-dB Quadrature Hybrid

OV ref.

1 to 2
Volts

Dual 60-dB
Directional
Coupler

REFL

Dual 60-dB
Directional
Coupler

Klystron
Solenoid

AFC & Gun Pulse Control PCB


51: Up = View Pulse
Down = Sample & Hold

Low-pass Filters

TP9

Phase Shifter

AFC A

C3

From Pulse
Transformer

Accelerator Guide

10 dB
10 dB

Klystron
Current Monitor

Energy Switch
Out
In ,

[7c
1 to 2
Volts

C2

10 dB

10 dB
Klystron
J2 Voltage Monitor

TP8

Shunt Tee Power Variator

AFC B

J1
RF
Frequency Adjustment--). 0 Driver
Sensitivity Adjustment

)0.

14

Zero- F
.
Crossing
Detector

3-dB Quadrature Hybrid


LOAD PWR
To Monitor Panel'.

Hold

U6/U3

OV ref.

W52

8c

Sample
11

Cl

Si

U2

U4

71

5 dB

5 dB

U4

13c

Sample
Hold

U2
vvvs
Water Load
#1

4-- Logic Trigger Input J2

Mode Programming TS1-4

J1'.

W41

nJ2

W42

Detail B

P3-1
Gantry Patch
Panel

Stand Signal Patch Panel


Notes:
J45

1: For Klystron Current and Voltage waveforms, see


Modulator System Schematic Drawings.
2:

inRF FREQ CONT

All waveforms taken in Hi-X on frequency (typical).

3: RF Driver peak power output capability: 320 Watts Min.


Typical: Mode A: 80-120W.
Mode B: 160-220W.
Average Power Output Capability: 1.38W Min.
Frequency: 2856 MHz 200 kHz (Tuning Range).

W30

J2
8c

AFC B

3c

AFC & Gun Pulse


Control PCB
(see Detail A)

Gun Driver Backplane

Varian Cardrack Backplane

J21

Console
Patch Panel

J3
J4

J27

RF FREQ CONTE
J28

MAN. OFF, \ON

W2

J6
ri
Signal Conditioning
Backplane

EXT.

Program PCB

To Monitor Panel
AFC A AFC B

W3

Monitor Panel

22

J56

AFC A

AFC B

18

15 Volts

_E

FF J31

4. Klystron filament rectifier circuit was added in 2002. It is


available as an upgrade for older systems.

+15 Volts

J55

W13

AFC A

J36B

AFC B

AFC A

J4

(W3)

AFC B

20

AFC A

24

J5
AFC CONT

AFC Integrator PCB


(see Detail B)

Note: In C1 Clinacs, this PCB is


called the Difference Integrator.

AFC BAL

HIGH ENERGY C-SERIES CLINACS


RF & AFC SYSTEM DIAGRAM
Rev. B: Updated Sheet 2 for new AVCR AFC Control PCB
(C3 Clinacs). B.K. 01/00
Rev. C: Added colors. B.K. 03/01
Rev. D: Revised margins for databook. B.K. 03/01
Rev. E: Redrawn with CorelDraw. B.K. 02/03
Rev. F: General update. B.K. 12/03
Rev. G: Cleared some faults GdR. 10/08

FOR TRAINING PURPOSES ONLY


Drawn:

Wil Clark

08/96

ED00022

Revised:

Gino den Ridder

10/08

Sheet 1 of 2

Rev.

23

C3 Klystron Linear Mode Systems


FWD PWR
To Monitor Panel

ov ref.

OV ref.

REEL PWR (VSWR)


To Monitor Panel and
Fault Signal Conditioning
PCB in Card rack

Water Load
#2
vvv,

0), LOAD PWR 2

10 dB
10 dB

Blanking Flange
or Dry Load

1
.

Ito 2
Volts

Dual 60-dB
Directional
Coupler

REFL

Dual 60-dB
Directional
Coupler

Klystron
Solenoid

RF Rotary
Joint

10 dB

FWD

J1

Accelerator Guide

To Monitor Panel

Klystron
VKS8252

Klystron
Current Monitor

Energy Switch
Out
In

Detail A

I
4-Port Circulator consisting of:
Magic Tee
Ferrite Phase Shifter
3-dB Quadrature Hybrid

AFC & Gun Pulse Control PCB


Si: Up = View Pulse
Down = Sample & Hold

Low-pass Filters

TP9

Phase Shifter

Lo S1

U2

AFC A

Sample

From Pulse
Transformer

11

W53

U6/U3

OV ref.

J2 Klystron
Voltage Monitor

14

Hold

ZeroCrossing
Detector

3-dB Quadrature Hybrid

TP8
30-dB Coupler
External Servo Input

)0' J3

Frequency Adjustment

RF
Driver

Ap5-1
0

71

J4

RF DRV PWR
to Monitor Panel

J2

Logic Trigger Input

W41

Gantry Patch
Panel

Auxiliary Electronics Backplane

RFDRFRC+

23
25

3: RF Driver peak power output capability: 320 Watts Min.


Typical: Mode A: 80-120W.
Mode B: 160-220W.
Average Power Output Capability: 1.38W Min.
Frequency: 2856 MHz 200 kHz (Tuning Range).

J4
AFC A W15
AFC B

AFC B

25

i E

Detail B

W30

AFC Trigger

AFC B

AFC Balance

4c

J2
AFC & Gun Pulw
Control PCB
13c1(see Detail A)

Gun Driver Backplane

Varian Cardrack Backplane


Program PCB
To Monitor Panel
AFC A AFC B

Console Backplane
Monitor Panel

20

+15 Volts

MAN. OFF.

1
15 Volts

J17

AFC A

23

4. Klystron filament rectifier circuit was added in 2002. It is


available as an upgrade for older systems.

W42

AFC A
7c

245

i.

All waveforms taken in Hi-X on frequency (typical).

Hold

AVCR AFC Control

.148

1: For Klystron Current and Voltage waveforms, see


Modulator System Schematic Drawings.

Sample

U2

Ap 3-1

W119

Notes:

U4

J1

*
*

Sensitivity Adjustment

2:

AFC B

AVCR AFC PCB


(see Detail B)

HIGH ENERGY C-SERIES CLINACS


RF & AFC SYSTEM DIAGRAM

RFDRPG+
EXT.

FOR TRAINING PURPOSES ONLY


Drawn:

Wil Clark

08/96

ED00022

Revised:

Gino den Ridder

10/08

Sheet 2 of 2

Rev.

23

24

Console
STD Bus

(Ribbon
Cables)

CRTIMER
PCB

Console Backplane
B4: Timer Interface PCB

W29

J1

41

41

W61

DOSRV

25

25

P1

(See Dwg No.


ED02015)

Dose Rate
Servo Logic
(See Dwg No
ED02015)

25

25

DS SRV EN

27

27

CG TRIG EN

29

29

GDLY CONTEN

31

31

DBDSVEN

CG TRIG

36

GDLY CCNT 3

RV1

Gantry Patch
Panel

J16

W93

Portal Vision
Pulse Length
Servo PCB
P1

J2

12

P1

11

J4

U2:B

=>
Lowimpedance
line drivers

J5
3

8 15

21

14

3
W2

W11
.

J45

J32

25

25

24

26

26

34

34

GUNCLYAG

11

11

GUN WIDTH

33

33

GUN WDTH

10

10

J1

'70

GUN ELY CONTI


J27

DLGNTRG-

W2

50

49

49

34

W1

20
J20

J47

50

J25

CRGUNDLY

<

+15V

=>

J17

vy3o

31
32

W:15 J4

DLGNTRG+
=>
DLGNTRG<:?=,
GUNTRIG+

DLGNTRG4

5
6
7

GUNTRIG-

J35
30

CRGUNDLY

1R31
499

J2
W321-1
GUNCLYCONT

DLGNTRG+

J45

J1

GUN DLYAG

J42

DLGNTRG+

W13

12

12

GUNDLY CONT

23

J1

J22

J4

J5

=>

R32
499
Mode BCD
decoder and
logic (See
Drawing No.
ED02004)

I6X1

16
=".>

42

U3
(Drive-)

R1
U2
,

Fiber-optic cable

2
+5V

P1 16

P1

14c -

P1
RN4:A
030
27a ,VNA..-

32

W13

J16
32

CRGUNDLY
=>

W93

RN4:D
RN5:A
6---,N.A.A.,.
100K
RN4:B 6
7 RN5 B 3
100K
5
4
OOK
=>
+12V
C29 RN4:C
>-->
W1 Jumper Table:
TpF
AF: PortalVision only
RN5:C
BE: Non PortalVision
100K
CD: Future Use
R70
+1,2V
1 OK
12V
+12V
Gun Pulse
WI02,__
o
Width
Circuit
R55
R41
E. .B
1.5K
<, o
o
R1
58.2K 0
U
C
5
OK
01
+
0
.0047
R50
pF
63.4K
,r
J2
<,=
C==
31 24a Ull:A
Al
A,
2 B1
=>
3 C
32 24c
9D
Future
U7:8
Use 0 El
25a U10:8
3
Fl
l,ii
25c IMt> +5
Injection Timing
R5V
3
Delay Circuit
U5
23a 10:A 1K R52
2 A2
12.1K_L
U6
23c I M
+
3 132
C13
1
R20
100pF 47 10K
R71
4
C2
J1 RN3:B
.01 10K
0
C. IF
0 5 D2
27c

A* vv2

124X1
,
R25, 10K
14

'*

0
Negative Bias

'''' El

J16

100K

CG TRIG

13

J16
<

A2: AFC and Gun Pulse Control PCB

GDLYCONT

U7

U4 (x6)

C= <

J2

B13: Logic Interface PCB


Rev. G and up

<=

+5V

CATHOD4 .47
.
TP2

Auxiliary
Electronics
Backplane

Cardrack Backplane

00

CR

J24

13

R3

0.
GRID

Auxiliary
Electronics
Chassis
(in Stand)

CGTRIG

W28

Clamp Voltage
0
er
P1

R7
1K

PROH

A5: Optical
Interface PCB

Al2: Gun Driver


Pulser PCB

TP1

.KLY I

DOSRST

50

CRDIO PCB
J3 (or Jr)

Hot Deck Backplane

J1

50
(See Dwg No.
ED02015)

Pulse
Transformer
(in Stand)

Note: Signals perform the following functions:


GUNDLY CONT (Logic Level)
High: Forces Gun Driver to generate delayed gun pulses, using DLGNTRIG pulses as timing reference
Low: Forces Gun Driver to generate coincident gun pulses, using KLY I pulses as a timing reference
DLGNTRG (Pulse)
Occurs approximately 18 microseconds after the KLY I pulse. liming can be adjusted in the Service Mode
CRGUNDLY (Analog Voltage)
Determines the injection time delay between the KLY I pulses and the coincident gun pulses when
GUNDLYCONT is low. Typical delay approx. lpS

C25
.1
pF

RN3:C u
100K
yr

Nir

Y1 8

Y2 6

U7:E

W2 Jumper Table:
AB: Normal Use
BC: Future Use

RN3 D
A i CH lOOK
11.1 pF

Gun Driver Backplane


Gun Driver
HIGH ENERGY C3 CLINACS
GUN PULSE CONTROL SYSTEM DIAGRAM

R27, 10K
Gun injection timing
delay adjustments

FOR TRAINING PURPOSES ONLY


Rev. A: Approved and released. B.K. 03/05
Rev. B: Updated. B.K. 01/06

24

Drawn:

Bill Kirkness

03/05

ED02036

Revised:

Bill Kirkness

01/06

Sheet 1 of 1

Rev.

25
TB2
R2 330K
C2
20uF

TP1
+12V 10%

Light
Pipe

R5
10K
R6, 1K

R3
1M
II
C7
Cl
25pF 1000pF
CR1
MRD-510

R9
CR3
10K i

CR2

0
2N5769

,> R12
100K
TP2
12vy

AA

C6
2pF

T-1-1361V +10%

75
47pF

411
03
R14
1K

VCR6

CR5

(I

R6 ,
15K
2.5W

R15, 1K

2N5262

C6
.01pF
CR7
12V

Note: All diodes are 1N4446

TP2
D

+180V

05
2N5262

CR7

07
2N5262

CR9
C4
47pF

CR9

CR8

0
Q4
R10 1000
2N5771

Cl
2pF

C8
2pF

R9
681K

R16, 1000
C8
.01 F

CR20

02
1RF721

Q6
MST60

R19,1000

03
R11
TL431C 10K

CR17

CR1

R12
1000

R20,6800
vvv

TP1
R1
4700

C7
18pF

08
STIP50

Gun Pulse Amplifier

AA

0V

I_ 1'
Q2 0
I
2N5771
C3
10pF

e1
> R4
> 470K

CR4

C2
2pF

R5 R4
15K 15K CR10

+250V

R18, 15K

1000

Notes:
1. Before removing or replacing PCB's
Select Mode 0.
Turn Console Gun Triggers off.
Open a safety interlock switch.
Remove H.V. fuse.
Place a shorting stick on the Hot Deck chassis.
Turn off S2 on the Hot Deck.
2. Always replace B5-Q5 and B5-Q7 as a pair!
3. Always replace B4-Q6 and B5-Q6 as a pair!
(It's best to replace B4-Q8 also.)
4. When replacing PCB's, always replace B4 and B5 as a
pair!
5. Test point voltages and waveforms are measured with
respect to the grid pulse. Use a high-impedance
differential-input oscilloscope to view these waveforms
during operation.

R13
100
sivvs

CR5

T2
Filament
Step down
Transformer

R3 e
22.1K<'
CR5,y'
68V

0.1pF

1RF721

Gun

05
TL431C 10K

100y

J4

19

10
TP1

25K, 5W

CR15

C81 C110
106
tgpF
.047pF .047pF

06
MST60

100pF
R0
CR6 1

>R2
750

R7

CR6
13

C3
00pF

S2
A

+180V
01
CR7 I

Insulated Shaft
from Motor Pot

Q5
STIP50

500K, 10T

CAUTION: ALL CIRCUITRY


MAY BE AT 25,000 VOLTS!

DANGER!

R11
4.7K

01
CR10

CR16
f

Q7
STIP50

TP4

R13
1K A
CR11 CR9

R8
5.6K

150V

2N5769

CR8

C5
.01pF

TC9
0.1 pF

236V
AC

B6: Grid Pulser & Bias


UN Interlock (858760)

B5: Crowbar & Clamp Voltage Regulator


C-SERIES CLINAC ANALOG GUN DRIVER
HOT DECK SCHEMATIC DIAGRAM
Rev. B: Updated for current production. B.K. 01/00
Rev. C: Added TP1 to B5. B.K. 01/01
Rev. D: Added colors. B.K. 03/01
Rev. E: Revised Margins for Databook. B.K. 05/01
Rev. F: Redrawn with CorelDraw. B.K. 01/03
Rev: G: Minor corrections. B.K. 08/03

FOR TRAINING PURPOSES ONLY


Drawn:

Bill Kirkness

09/94

872588

Revised:

Bill Kirkness

08/03

Sheet 1 of 1

Rev.

25

26
_L
F2
Q.f0 14
Fl
13

Carrousel, Mode, Bmag PCB


(Interlocks not shown, for details see ED00029)

BMAG V

Analog
Mux for
BMAG
Control

+10V

TP TP TP TP
12 13 14 10
0 0 0 0

Angle Steering Coils

(0000 ,

#1 AWG

G (H Opposite)

Water Flow

TB2
V/I Converter
100 pA/Volt

8c

10

2c

12

BCD CODE IN

--10000'

A21 (on side of Gantry)

U4
R10 thru R24 7_
(Typical)
7 Address

Radial Angle
Steering Coils G&H

ji

Bend Magnet
Power Supply

A7
2a

BMAG SHUNT I
4a

13

Target

14

Bend Magnet Coi s


(Front View)
Gantry Upright

A21TB1

Energy Slit
A

(C Opposite)

Transverse Angle
Steerin Coils E&F

PWM #4
Ch. 1
Trim

(E Opposite)

23 H 24

ENIONME

(G Opposite)

Bellows
Gridded
Gun

Beryllium
Window

Buncher Steering Coils

Accelerator Solenoid

PWM #3
Ch. 1
Angle T

A21TB2 18
Flattening Filter or
Scattering Foil

Position Steering Coils

BA
1111

(Right)

Gun End Target End

14
Pole 1

Trim Coils DC
1111
ED 16
1111
E. (Right)
(Left)

ED

PWM #3
Ch. 2
Angle R

Auxil ary Electronics


Backplane

if

if

13

1111

Pole 3

(Left)

Radial Axis
+15V

B hF
Gun

Target

Program PCB

R10
R31

Al 5TB3

Ion Chambers

Al 5TB4

=I>

A15TB2 1 2 3

PWM #1
Ch. 1
Bun T

PWM #2
Ch. 1
Pos T

if

if

1"
--*Shunt Voltage

if

Ft

41
Feedback ,\ZNAA,_

PWM #2
Ch. 2
Pos R

B20: Transverse
Beam Position
Servo PCB

14 k

Auxiliary E ectronics
Backplane

if

Feedback
(X-rays only)

Transverse Axis

if
R27

RE Driver
B16: Integrator #2
PCB
(Transverse Andle)
=>

14
Klystron

ANG R

Feedback R42
WN

if

R7
R28

0
R26

R29

if

0
R30

HIGH ENERGY C3 CLINACS


STEERING SYSTEMS DIAGRAM

R9

26

Summing Point

15V

+15V

15V

Steering

ANG T
if Steering

1 5V

-1-0

+15V

Vt_oe

Program PCB

B20: Transverse
Beam Position
Servo PCB

15V

=>

19

+15V

Steering

<1=

Summing Points

R25

R6

.To Current Monitor

Steering

Q1-0

+15V

10 12 13 14
Auxiliary Electronics
Backplane

>

if if

B19: Radial
Beam Position
Servo PCB

15V

6 7 8

B19: Radial
Beam Position
Servo PCB

Accelerator Solenoid
Power Supply
Al5

PWM #1
Ch. 2
Bun R

4 5

TRIM

B15: Integrator #1
PCB
(Radial Angle)

Rev. B: Updated for current production. B.K. 12/00


Rev. C: Added colors. B.K. 03/01
Rev. D: Revised margins for databook. B.K. 05/01
Rev. E: Redrew with CorelDraw. B.K. 03/03
Rev. F: Added terminal strip designations. B.K. 03/04
Rev. G: Updated. B.K. 01/06

FOR TRAINING PURPOSES ONLY


Drawn:

Wil Clark

11/98

ED00031

Revised:

Bill Kirkness

01/06

Sheet 1 of 1

Rev.

27

Al: VacIon Control PCB

W74

Voltage Comparators
R66
1m

Jo
] IONCHR
ION CHT

RN2:F
vvs,
10K

:D

R11

DS11
R55

U4:A

U1:C

1K

4.99K
10K
R67
RN2:6
--,".^.----12V0--vv\
1ivi
10K RN2:G 7
NAN
10K
L

DS12
R56

U1:D

825K R8
vvs,
825K

ION2 CAL CAL COMMAND

14
<= -12V

U3:A

U3:6

10

W109

W32

29

35

36

36

J35

J42
29

45

<1=

221K R7 9

ION DCAL

J25

28 CAL CMD
<1=

Relay Driver
U25-16 (See
PCB Schematic
Diagram)

vv23
Varian Cardrack Backplane

B1-10: Program PCB


Pi J1
J1
ION 1 and I0N2 ION1 CAL
14 38 38
Pots (See PCB
=>
-ON2 CAL
Schematic
15 39 39
=>
Diagram)

1
Transverse Ion Chamber
Signal Plates

=>
U2:D

315: M111 Integrator

J6

IONA
=>
IONB

22

J
IONCHT+
+12V
=>

P1

27

Nil D

2 mSec
One-shot

Low Voltage Power Supply

P1

45

im4
Partf
nn Pl/J1
Radial Ion Chamber wit itru (Stand)
(Harness)
Signal Plates

ION1 CAL
4
ION2 CAL
<:==.

B3: Output Interface

J3
3 mSec
One-shot

WI

ION BCAL
ION CCAL

J2

35

Input Latches
U3-3,11 (See
PCB Schematic
Diagram)

(Harness)

22.1K

C.=
<!=,

IONACAL

R6 22'1K

, _
1

Console
Backplane

BI: Input Interface #1


P1

J22
J32 Wil
,
4 45 IL ION1
41I ,
=>
,
,
_
IL ION2
47
42 1--- 42
=>

DC COMMON

JE
R3

R10
20K

.22 pF

Part of

+12V

+12V

c-

44
R11:A
10K

33 pF

:C 15 U2:B
10K

R9
20K

7
8

1K

+12V

,
1-

W13

IL ION2
ION1 CAL

J1

_,,_.J45

=>

R5

J11
4

J7
IL ION1 --4

10K

Cl

Aux Electronics
Backplane

Gantry
Patch Panel

VacIon Power Supply

Dose Rate
Integrator (See
PCB Schematic
Diagram)

P1
CMU1

J2

J2
To Timer I/F
(See Dwg.
ED02016)

-E-

J6
IONCHR+

6
Chassis Interlock Switch 51

316: MU2 Integrator

IONCHT-

P1

=>
-12V

27

IONCHR-

22

=>

IONC
=>
IOND

Dose Rate
Integrator (See
PCB Schematic
Diagram)

P1

J2

J2

CMU2

To Timer I/F

Dwg.
F (See
ED02016)

=>

Radial Ion Chamber


Electrode Plate

619: Radial Position Servo


P1

27
21

A2: Vaclon HV PCB

IN+

OUT+

Cl11)
100 pF
RT5
250 mA

J11
IONCHT+

C14 250 mA

100 pF
IONCHTIONCHR-->
ION CHR
IONCHT
<1=t

IN-

OUT-

Ca_
.01 pF
R20
1K

9
R500PS
=>
T500PS
=>

OUT+

GROUND

2
R28
470K

RT7
250 mA

C
0.1 pF

PS5
IN+

IN-

OUT-

Beam Position
Servo (See
PCB Schematic
Diagram)

P1
POS'N 124
SERVO

J1

J1

36

Cl
0.1 pF

C161
01 pF
1K

10

43
To Auxiliary
Electronics
(See Dwg.
ED00031)

B20: Transverse Position Servo


P1

27
21

IONG
IONH
=>

Beam Position
Servo (See
PCB Schematic
Diagram)

J1
P1
POS'N
SERVO 1 F

J1
37

,=>

44

R500 SENSE
T500 SENSE

Transverse Ion Chamber


Electrode Plate

J27

36

2
R27
4706

RT6
=>

IONCHR+

IONF

PS4

RT4

=>

IONE

Console

24V/500V DC/DC converters


R23
Wv
10M
R24
om
100:1 voltage dividers
R25
R26
100K
100K

HIGH ENERGY C3 CLINACS


ION CHAMBER SIGNALS SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released. B.K. 03/05

Bill Kirkness

03/05

ED02035
Sheet 1 of 1

Rev.

A
27

28
=>
<t=

Charge-toVoltage
Converters
/1
Pll

Radial Plane
Ion Chamber
(Gantry)
P1
=>

Gain adj.
A+B
=1>

Summing
Amplifier
U7

Amplifier

Dose Rate
Amplifier
U8

Ion Chamber
Power Supply
(In Vaclon P.S.)

Calib MU2 to
Ion Chamber
Plates C & D

LI

44

U2

=t>

U1
R19 I 1R15 I 1R17
Difference
Amplifier
U3

A OR B
<1=

P1

Al
Gain adj.

Bal. adj.
Diffe ence
Amplifier
U5

AB

Servo
Amplifier
Ul

Sampleand-Hold
U3

R6

R7* R3"

Meter Cal.

R5*

J7

A OR B+ (A+B)

Sample
Trigger
U4, U3

Fault LED
Driver
02

Inverter
03

Summing point
400V
Comparator
U4

HV ON_
(KHV+)

Dual
One-shot
U3

Amplifier

*Note:
R3 & R6 = 22 k DS11
R4 & R7 = 22.1k
R5 & R8 = 825k

Vacion Control
PCB (in Vaclon
Power Sunnlvl

Sample
Trigger
U9
17

DS12

Al , A2

=>

A4

pos
Servo

Amplifier

FF
2

10k

EF

28

.7-744.
..

SYM MTR
P1
[7
6

Summing point

Steering Coil
PWM Drivers
J47
45

43

16c

16c
=:>

Radial
Angle
B3

To Radial
Angle &
Position
Steering
31, Coils

Radial
Position
B2

To Timer I/F PCB

Auxiliary Electronics
Backplane (in Stand)

Radial Symmetry
=i> To Meter I/F PCB

HIGH ENERGY C3 CLINACS


DOSIMETRY SYSTEM BLOCK DIAGRAM

Summing point

(Dose
Rate
Meter

44

U5, U4

B19: Beam Position Servo PCB

=t>

B1-8:
Program
PCB

SERVO ENABLE
from selected
X-ray PCB

B18: Symmetry & Excess


Q/Pulse Interlock PCB
Summation:
(C OR D) + (C+D)
AND
(C--D) + (GH)
= 1/2EXQT
from B18 Pin 5
(see Sheet 2)

To ION1 I/L
circu't on
Vac on
Contro PCB,
this sheet,
J7 6

15V

EF

ON

CMU1

+15V

<1=

SYMM VL OU1 16 --,vs/v--r.

Indicates Asymmetry

(A- B) + (E-F) from B19

Optical
Isolator
U1

2k
n Summing
point

Amplifier
05

ION 1CAL

Sampleand-Hold
U4-2

,=>

CR10

Fault LED
Driver
02

-15V

POS R
R8

Q1 U7

CR11
Comparator

ION 1
1

=t>

Indicates Excess Charge


Ch. 1 Charge
& Symmetry
06

P1
20

+15V

FET Switch

15
Summation:
(A OR B) + (A+B)
AND
(AB) + (EF)
= 1/2EXQT

BAL
ANG R

P1
10
=t>

AB

=:>

MU1
(Cal)

ANG R
R6
Summing
point

AFC TRIG

24

Comparator

Gain adj.

A+B

A4
Calibration
Driver
U2

Servo
Amplifier
U4-1

U6

AFC TRIG

Inverter

GAIN
ANG R
P1
R41

AFC TRIG
from Timer I/F PCB

R4

Bal. adj.

R1

B15: Symmetry Monitor &


Dose Rate Inte rator PCB

10N1 CAL
from
Program
PCB
(This sheet)

SolidState
Switching

U6

01
R8*

18

AO

Amplifier

CAL CMD

ION2 CAL
from
Program
PCB
(Sheet 2)

19

Ang e
Servo OFF

Amplifier

(B in)
-->

From Transverse Plane


Ion Chamber

I4I3

Amplifier

01, 02, 03,05, Q6 07

it
2

17

Integrator 1

U10

500V

16

18

P1

(E in)

P1

=t>

U9

(Fin)

Amplifier

(A in)

_L

<1=

Rev. B: Updated connections for C3 Clinacs. B.K. 04/00


Rev. C: Updated component no's for latest PCB's.B.K. 05/00
Rev. D: Added colors, Revised margins for databook. B.K.
05/01
Rev. E: Redrawn with CorelDraw. B.K. 02/03
Rev. F: Corrected Pin No's. B.K. 02/05
Rev. G: Updated. B.K. 01/06

FOR TRAINING PURPOSES ONLY


Drawn:

Tom Robins

06/94

872582

Revised:

Bill Kirkness

01/06

Sheet 1 of 2

Rev.

29
=>

Charge-toVoltage
Converters

Transverse Plane
Ion Chamber
(Gantry)

P1
(C in)
==>

27

I 22

_211

(H in)

16

Amplifier

Gain adj.

=>

U9

Summing
Amplifier
U7

C+D
=,>

Dose Rate
Amplifier
U8

Amplifier

Amplifier

Integrator 2
U2

=r)

U1

01 02 Q3 Q5, Q6 Q7

Amplifier
Difference
Amplifier
03

U10
18
C OR D

SolidState
Switching

Al
Bal. adj.
Diffe ence
Amplifier
=> U5

Calib MU2 from


Ion Chamber
Interlock PCB,
Sheet 1

Gain adj.

CD

Servo
Amplifier
01

Sampleand-Hold
03

Meter Cal.
(N.0 .)

B16: Symmetry Monitor &


Dose Rate Integrator PCB

AO

Amplifier
13
06
Angle
Servo
Sample
Trigger
04, U3

P1 1

Servo
Amplifier
04-1

06

Summing
point

AFC TRIG
==,5

HV ON
(KHV+)

Fault LED
Driver
08

Sample
Trigger
U9

Inverter
=>

09

n Summing
t5 point

Amplifier
011

=>

SYMM VL OU

Indicates Asymmetry

ON
Pos'r7V2
Servo

14

Summing point
-->

SYM MTR

SERVO ENABLE
from selected
X-ray PCB
Steering Coil
PWM Drivers

J47
46

10k

GH
".=>

23c Transverse
Angle
B3

-4'To T'verse
Angle &
Position
St eering
Coils

Transverse
Position
B2

To Timer I/F PCB

Auxiliary Electronics
Backplane (in Stand)

Radial Symmetry
> To Meter I/F PCB

P1

HIGH ENERGY 03 CLINACS


DOSIMETRY SYSTEM BLOCK DIAGRAM

FOR TRAINING PURPOSES ONLY

1/2EXQT I/L

To Sheet 1
B18 Pin 17

U5, U4

B20: Beam Position Servo PCB


CMU2

Fault LED
Driver
010
(CD) + (GH) from B20

B18: Symmetry & Excess


Q/Pulse Interlock PCB

15V

<1=

Amplifier

ION 2CAL

To ION2 I/1_
circul on
Vac on
Contro PCB,
Sheet 1,
J7 7

B1-8:
Program
PCB

16

CR21

A7

POST
R9

GH

CR22

=>

15

Sampleand-Hold
U4-2
2k

15 ,ers.n.,

AS, A6

I
D

+15V

Indicates Excess Charge

Comparator

ION 2
R14
15V

14

1U

17

Inverter

P1
_______ 21

+15V

FET Switch

=>

Ch. 2 Charge
& Symmetry
012

BAL
ANG T

P1
10

AFC TRIG
from Timer I/F PCB

C+D

Summation:
(C OR D) + (C+D)
AND
(CD) + (GH)
= AEXQT

MU2
(Cal)

ANG T
R7

14

-107

=>

Gain adj.

OFF

AFC TRIG

C OR D+ (C+D) Comparator
=>
A8
Summing point

GAIN
ANG T
P1
Y
R42

2k
ON

pill
Inverter

Bal. adj.

R1

N.0

P1

G )

P1

Drawn:

Tom Robins

06/94

872582

Revised:

Bill Kirkness

01/06

Sheet 2 of 2

Rev.

29

30

Console

Auxiliary Electronics Backplane

Console
Backplane

Varian Cardrack Backplane

PWM PCB XA1


P1

Program PCB

W19

+15V

Ji
32

Gantry Patch
Panel

J27

W2

P1

J47

47

16c

F22, 3

W57

J40

J3

7a,b,c

Channel
2

R8
8
0.1

R4

J1

32

11c

Current
Monitor

BUN R

14c

15V
F23, 3

27a,b,c

+15V

33

48

Channel
1

=>

10

=>

0.1

R5
33

BUN T

Current
Monitor

18c

4 4 4

21c

15V

J14

(Buncher steering coils are


at gun end of guide)

Al 5
TB1

W56

17

16

Guide
(View from
Gun End)

rqr

<1==

5
6
7
8

Rev. B: Updated for current production. B.K. 12/98


Rev. C: Added colors. B.K. 03/01
Rev. D: Revised margins for databook. B.K. 05/01
Rev. E: Redrawn with CorelDraw. B.K. 02/03
Rev. F: Added Console. B.K. 06/03
Rev. G: Minor corrections. B.K. 04/04
Rev. H: Updated. B.K. 03/05
Rev. I: Updated. B.K. 01/06

30

FOR TRAINING PURPOSES ONLY


Drawn:

Wil Clark

10/96

E000028

Revised:

Bill Kirkness

01/06

Sheet 1 of 1

Rev.

31

B19: Radial Position Servo

Summing
Points

P1
27

P1

W19

J1

36
1

J27
43

W2

J47
4

21

16c

J40

W57

J3

Channel
2

Current
Monitor

X-RAY ENABLE
from B1 or B2

F24, 3

7a,b,c

P1

8a,b,c

Primary
Ion Chamber

Gantry Patch
Panel

PWM PCB XA2


P1

J1

14

Auxiliary Electronics Backplane

Console
Backplane

=>

==>

0.1

11c
14c

B20: Transverse Position Servo

E>
P1

F25, 3

27a,b,c

P1
14

37

21

44

Channel
1

R11
28a,b,c
0.1

Secondary
Ion Chamber

Current
Monitor

X-RAY ENABLE
from 61 or B2

18c
21c

444

<1=

Program PCB
J14

15

14

+1 5V

(Position steering coils are


at beam exit end of guide)

A15
TB1

4 4 4

W56

2
3
15V

Guide
(View from
Gun End)

+1 5V

4
5
6

F--

15V

Solenoid Panel Assembly


Varian Cardrack Backplane

Console

Rev. B: Revised for better legibility. B.K. 01/00


Rev. C: Added colors. B.K. 05/01
Rev. D: Revised margins for databook. B.K. 05/01
Rev. E: Redrawn with CorelDraw. B.K. 02/03
Rev. F: Added configuration note. B.K. 03/04
Rev. G: Added Console, Stand, Gantry blocks. B.K. 09/04
Rev. H: Added Solenoid Panel. B.K. 04/05
Rev. I: Updated. B.K. 01/06

HIGH ENERGY C3 CLINACS


POSITION STEERING SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:

Wil Clark

05/96

872593

Revised:

Sill Kirkness

01/06

Sheet 1 of 1

Rev.

31

32
Auxiliary Electronics Backplane

Console
Backplane

B15: Radial Angle Servo

PWM PCB XA3

P1

P1

27

P1

S1

J1

W19

J1

J27

14

Gantry Patch
Panel

W2

J47

45

J40

J3

W57
1

Channel
2

16c
A

21

F24, 3

7a,b,c

P1

12

12

13

13

R11
28a,b,c --="r-49A\AAP-S--"" 25
0.1

25

8a b c
0.1

V
Current
Monitor

Primary
Ion Chamber

11c

14c

<1=

27a,b,c

=>

=>

B16: Transverse Angle Servo


P1
27

P1

S1

F25 3

14
35

21

35

=l>

46

Channel
1

=> 23c

4 4

Secondary
Ion Chamber

Current
Monitor
Program PCB
P1

P1

P1

18c

21c

P1
i0

R41

J14

20

Summing
Points
B19*

Angle T coils =
Angle R coils = 1.2a

A15
TB1

W33

28

27

4 4

1
P1

fI

P1

CD

+15V

B20*

R6

10

-dbISU
Angle T

5
8

<==

9
a)

ANG R
*Beam Position
Servo PCB's

-15V

10

+15V

Angle T

R7

R28
0

ANG T
-15V

10

,==>

gain

11
12

Bend Magnet Assembly

Varian Cardrack Backplane

Console

32

Rev. B:
Rev. C:
Rev. D:
Rev. E:
Rev. F:
Rev. G:
Rev. H:
Rev. I:

Updated for current production. B.K. 12/98


Added colors. B.K. 03/01
Revised margins for databook. B.K. 05/01
Redrawn with CorelDraw. B.K. 02/03
Added Console. B.K. 06/03
Minor corrections. B.K. 04/04
Updated. B.K. 03/05
Updated. B.K. 01/06

HIGH ENERGY C3 CLINACS


ANGLE STEERING SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:

Wil Clark

10/96

ED00027

Revised:

Bill Kirkness

01/06

Sheet 1 of 1

Rev.

33

Console

Stand

Varian Cardrack Backplane

Console
Backplane

Accelerator Solenoid
Power Supply

Auxiliary Electronics
Backplane
Input programming
information

Program PCB
TP13

P1

J1

W19

J27

J1

45

14

44

13

J47

J48

W34

Power In

TB1

14

=>

12

ii

10

R11
SQL I

=>

13

=t,

_L
17

17

22

<1=

<1=.

13

1
21

<l=

GND
OA
B
OC

1
P1

14

XA7

P1

B6: Meter
Interface PCB

5c

15a

A7: Carrousel, Mode, BMag


PCB (See Detail A)

Current shunt output


information

Detail A:
Carrousel, Mode, BMag PCB

Gantry

(Actual configuration
determined during final test.)

042

Solam:Ad Pane
A15-TB4 3

Wht

P1

[Sc

2
Red

1 A15-TB3

Red

Target End

Accelerator Solenoid
HIGH ENERGY 03 CLINACS
ACCELERATOR SOLENOID SYSTEM DIAGRAM
Rev. B: Revised for better legibility. B.K. 01/00
Rev. C: Added colors. B.K. 05/01
Rev. D: Revised margins for databook. B.K. 05/01
Rev. E: Redrawn with CorelDraw. B.K. 02/03
Rev. F: Added configuration note. B.K. 03/04
Rev. G: Added Console, Stand, Gantry blocks. B.K. 09/04
Rev. H: Added Solenoid Panel, B.K. 04/05

FOR TRAINING PURPOSES ONLY


Drawn:

Wil Clark

10/96

ED00026

Revised:

Bill Kirkness

09/04

Sheet 1 of 1

Rev.

33

34

Gun Driver

Console
STD Bus

Console Backplane

CRDIO PCB
DIO #1

(Ribbon
Cables)

J7 (or J3*)

W27

B3: Output Interface PCB


883830

17

17

19

19

21

21

23

23

P1

22 MODE BCD 1

12 N. 13
==>

23 MODE BCD 2
i=f>

24 MODE BCD 4

10

;11

5 MODE BCD 8

.=>

=C>

U2

U7
11

_I 27 I

27

B13: Logic Interface PCB Rev. E and Up


(Rev. AD Numbers in Parentheses)

U17

J3

W19

13

13

14

14

13

15

15

11

16

16

10

=l>

MODE CMD

W21

=1>

17

19

19

21
23

21

P1
21 CR CHK 1

<1=

10

10
11

27
29

29 1

31

31

U1 4B

U21B
6 00, 4
- -

25

27
28

13

919)

MODE BCD 8

Test)
J17

Gantry Patch Panel

13 14 15 16 26

4444

MODE BCD 2

U15B
cgi,vsz 4

14 15 16 17 19

MODE BCD 4

W32,1
P1

22 23 24 25

Auxiliary Electronics Chassis

U4

U1
10

.13

12

11

3
AA
BB

01
15

12

J42

Auxiliary Electronics Backplane

14 15 16 17 19 I

BUF BCD 1
==>

=t>
BUF BCD 2

13

CC

BUF BCD 4
BUF BCD 8

I 26

U15A

8 (8)

W30;

12

U21A
0<]* 1

MODE BCD 4

11

24 CR CHK 8

25 __
3
510
27

5(13)

U7 0

23 CR CHK 4

23

25

0.1v4

U14A

6c

3(1)

6 (12)

+24V

22 CR CHK 2

11

4(2)

MODE BCD 1
=C>
MODE BCD 2

B1-610: Program PCB

U2OB
7 c<pvl

(tn

13 14 15 16 26

JE

MODE BCD 8

U20A

J1

17

P1

MODE BCD 1

B1: Input Interface #1 PCB


J1

2(10)

U25

^*1>0

U8
10__-_11

U4 (U7

P1

(PCB 100012755 uses different drivers.


Refer to Schematic Diagram.)

DIO #0

Gun Driver Backplane

Varian Cardrack Backplane

444

26

26

BUF BCD 1

27

27

BUF BCD 2

28

28

BUF BCD 4

29

29

BUF BCD 8

J27

MODE_CHGi=>

A7: Carrousel,
Mode, BMag PCB

7-

19

MODE CMD

BUF BCD 1

BUF BCD 2

BUF BCD 4

2
=>

J47
19

P1
4a

--- 13a
See Dwg. No.
ED00029 for
Bend Magnet
Control and
Monitoring.

15c

=>

13c

BUF BCD 8
i=>

Energy Code
determines
Steering Coil
Driver gain &
current limit.

P1

14c

=>

A2, A3: PWM


Driver PCB's

14a 10a 15c 18a

12c
2

CARRCHK 1
*In 1996, the D10#0
and D10#1 PCB's
were replaced by
the CRDIO PCB.

r?

2
3
<!=

NOTES:

CARRCHK 2

CARRCHK 4

25c
MicroController &
FPGA Logic

22a
<i=

CARRCHK 8

20c
19a

In the Gun Driver, the MODE_CHG command causes the controller to read the Energy Code and set up the programmed high voltage, and also to read the
voltage from the GUN I pot on the selected Program PCB and set up the grid bias accordingly.

17c
18c
19c

The Control Computer writes the BCD Energy Code and the MODE CMD to the DIO output ports when an energy is selected, de-selected, or re-selected.
The Control Computer then immediately reads those ports to ensure that the commands were sent. Any error will result in a CTRL interlock. If the Check
Codes don't match the Energy Code, the Control Computer asserts a MODE (Cardrack) or CARR (Carrousel) Interlock.
On the Carrousel, Mode, BMag PCB, the MODE CMD causes the controller to read the Energy Code and command the appropriate mode motions. When
the Carrousel reaches the port for the selected energy, AND the locking pin is firmly seated, the controller returns the Carrousel Check Code to the Console.

34

23c

EN_CODE 0
EN CODE 1
EN_CODE 2
EN_CODE 3

HIGH ENERGY C3 CLINACS


BCD ENERGY CODE SYSTEM DIAGRAM
Rev. F: Redrawn with CorelDraw. B.K. 02/03
Rev. G: Correction: DIO PCBs are in STD Bus,
not Console Backplane. B.K. 07/03
Rev. H: Update for Trilogy Clinacs. B.K. 09/05
Rev. I: Updated for new Output I/F B.K. 01/06
Rev. J: Updated for CRDIO PCB. GdR 05/10

FOR TRAINING PURPOSES ONLY


Drawn:

Bill Kirkness

06/00

ED02004

Revised:

Gino den Ridder

05/10

Sheet 1 of 1

Rev.

35
Auxiliary Electronics Backplane
+10VB
0
R64-78
Typical

OR
1R
2R
3R
4R
5R
6R
7R
8R
9R

Gantry

78
77
76
75
74
73
72
71
70
69

Analog
Multiplexer
23 IN5 for BMAG
24 IN6 Interlock
25 IN7

Input
1
2
3
4
5
6
7
8
9
10

26 IN8
1 IN9
10 IN10
9 IN16

Output

17

OR
1R
2R
3R
4R
5R
6R
7R
8R
9R

TP15

Et
24
23
22
21
20
19
18
17
16
15

+10VA
R10-24
Typical
s.A/XV`

111:112111
1
2
3
4
5
6
7
8
9
10

Analog
Multiplexer
for Bend
Magnet I

23 IN5

24 1N6
25 1N7

Bend Magnet
Saturation

Note: R10-15 are spares.


R10-14 are not present
on newer PCB's.

12

U4

19 Ni
20 IN2
21 IN3
22 1N4

U15

R9 R8

M1

TP13 TP14 TP10

26 INS
11
1N9
10 1N10
9
IN16

R63 R27

13

16

Note: R64-69 are spares.


R64-68 are not present
on newer PCB's.

Bend
Magnet

U12

21 IN3
22 1N4

\/

BCD pat

19 Ni
20 IN2

TP12

Output

U7-7

28 3

17
Address
15 Inputs

>--E>

=>p

M4 1

Note: All U4 address inputs are high


during MODE Command,
selecting input 16 to saturate
the bend magnet..

14

M8
U2913
4,

29:A

2 B M COM

MODECOM

MODE CHG
(MODE Command to Digital Gun Driver)

R87, 100k

J1

TB1

J13
F2
14 00-0-- 32
13

12

12

11a

F1

11

31

11

J47
5
BCD Energy Code lines from
Logic Interface PCB and
MODE CMD line from Output
Interface PCB in Console.

+15V

BUFBCD2

B MODE1
1>
B MODE2

14c BUFBCD1

==5.

15c

13c

BUFBCD4

B_MODE4

i=f>

B_MODE8

=>

12a BUFBCD8

8
19

MODECMD

R92
100

U17:A
TP15

TP7

U17:6

DS5
(Green)

ILBMAG
(BMag Interlock)

2
R133 \/
100k
2+
AAAA_ __
18

4 U5 14

13

For Future Use]

NA
7

16

9
J32
10 U1 8:D

BMAGSHNT

22c
28
Shunt Voltage

14

Li> 27

12a

reit

Note: Shunt Voltage is 100mV


for 300A bend magnet current

TP9

TP8

9 9

BMAG I

U17:C

NULL

127b _

14a

26

Bend Magnet P.S.

5b 29

TP11

R85
100

Drive Current
13

8 U6 10

R93
1.82k

5 15

Te T64

12

1c

12V ON

NA

W34

BMAGVMON
(BMag V Monitor)

NA
R94
100

Gnd

10

J42

1 3a

J47

R96, 100
,NvV*

U18:B

OU1D--

P1

R100
1k

P1

45

V/I Converter
1V = 100pA

M2 16

Address
15 Inputs
14

Gantry Signal
Patch Panel

? ? ?

10

U17:D

Carrousel, Mode, BMag PCB


HIGH ENERGY 03 CLINACS
SIMPLIFIED BMAG CONTROL & MONITORING

FOR TRAINING PURPOSES ONLY


Rev. G: Redrawn with CorelDraw. B.K. 03/03
Rev. H: Revised for greater clarity. B.K. 04/04
Rev. I: Updated. B.K. 01/06
Rev. J: Corrected a conversion error. GdR. 05/10

Drawn:
Revised:

Wil Clark
Gino den Ridder

02/96

ED00029

05/10

Sheet 1 of 1

Rev,

35

36
Auxiliary Electronics Backplane
Stand

Klystron Focus Coil


Stand Mother
PCB
R2
4.994

7-

J36
8

R1
4.99k
=>

J14
=>

J27

10

10

11

=1>

C38,1uF

=I>

R99, 100k

=t>
R131
100k
.A.AM

+15V
R25
100

R128

10kor
R12
100k

TP2

C47

DS7
(Green)

R59
4.75k
=D.
+10V A
- TP5

14 8

36

8 U5:D 10

R6
10k

1uF

=t>

J47

KSOLI/L
(KSOL Interlock)

NAI

is

12V ON

Gnd

C41, 1uF

IF

R88, 100k
R130
1k

KLYSTRON
SOLENOID
POWER
SUPPLY

TB3

13

R97
1k

vv50

12

J48
7c
=>

17c

R109
100
U19

R98
200k

TP1

C37
1uF

+10V B

=;>

T TP3
R7
10k

=t>
10
=>

Carrousel, Mode, BMag PCB

HIGH ENERGY C3 CLINACS


SIMPLIFIED KSOL CONTROL & MONITORING

FOR TRAINING PURPOSES ONLY


Drawn:
Revised:

36

Gino den Ridder

Rev.

07/10
Sheet 1 of 1

37
Auxiliary Electronics Chassis

Stand
Patch
Panel

Auxiliary Electronics Backplane

B1: BCD Decoder and Relay Assembly PCB

P1
10
11

Cl r
,A

B10: Mode Control Logic PCB


P1

J14

P7

J37

TDRV MTR

_o 0

W45

BLK

P1
12

TDRV AIR SOL

12

w0 0

RED

=>

==>

[)7
CONTPWR 02
from Power
t Distribution

EQUIPGND

Turntable
Motor

BLU

ACCOM

.H
=.

13

==>

Air
Solenoid

Brake Relay

Note: Heavy black lines indicate

AC COMMON Ground
J16

MODE BCD
Comparator
and Logic

14

_78

16

36

TDRV BCD1 RTN


r
C TDRV BCD 1
W TDRV BCD 2

17

TDRV BCD 4

33

TDRV BCD 8

<1=

V
LOGIC
GND

Sequence:

1. 120V AC is switched to TDRVMOT and TDRVAIR, energizing K1 and L1.


2. L1 routes compressed air to the cylinder, driving the tee shaft upward.
3. During tee shaft motion, Si at the top of the air cylinder shaft shorts the motor black wire
to ground so both motor windings are in phase and the motor remains stationary.
4. When the tee shaft reaches the top, microswitch Si opens. AC power, phase-shifted by
Cl, now flows to the motor blue wire, causing the motor to rotate the turntable.
5. As the turntable rotates, the diodes decode its position and feed a BCD Code back to the
controller. (This code is the complement of the Energy Mode BCD Code from the
console.)
6. When the turntable reaches its proper position, the controller releases TDRVAIR AC
power.
7. K1 contacts short the black and blue motor leads, braking the motor and L1 releases the
air pressure in the cylinder.
8. Gas pressure in the tee forces the shaft down, opening S1 and removing motor power.
9. After 24 seconds, the controller releases TDRVMOT AC power.

V
P1

6
7
9
10 11
12 13 14 15 16 17 18 19 20 21 22 23 24
0 20 3
4
0000000000000
1c) 0 0 0 0 0 0 0 0

Rotary Switch S2

Note: S2 rotates 2 positions for each turntable stud

HIGH ENERGY C-SERIES SHUNT TEE CLINACS


TEE DRIVE CONTROL SYSTEM DIAGRAM

NOTE: In systems with Analog Gun Drivers, TDRVMOT power is also routed to the gun

motor pot.

Cl Clinacs

FOR TRAINING PURPOSES ONLY


Rev. B: Updated for current production machines. B.K. 01/00
Rev. C: Added colors. B.K. 03/01
Rev. D: Revised margins for databook. B.K. 05/01
Rev. E: Redrawn with CorelDraw. B.K. 03/03

Drawn:

Wil Clark

10/95

ED00025

Revised:

Bill Kirkness

03/03

Sheet 1 of 3

Rev.

37

38
Auxiliary ElectronicsChassis

Stand
Patch
Panel

Auxiliary Electronics Backplane


I/O Module
(Gordos PCB)

P17

CB2

T30

Distribution

W61

10 RED
11

J37

J63

W45

Cl
BLK

P1

TDRV MTR

Si
1 cri--62

12

=f>

TDRV AIR SOL !

19

P1

CONTPWR 02
3 from Power
T29 e-------0 0 K

5A

B1: BCD Decoder and Relay Assembly PCB

13

19

14
T31

r--

5A
00Or'....0 T32

W5

14

ACCOM

\./
Solid-state Re ays

r)7
EQUIPGND

El

K1

ft

13

Brake Relay

Turntable
) Motor

15
BLU

Air
Solenoid
Note: Heavy black lines indicate
AC COMMON Ground

B2: Carrousel &


Mode Control PCB
1
17
Microprocessor and
PROM Comparison 19
and Logic

J16
25
26

W64
TDRV BCD 1

TDRV BCD 2-

27

TDRV BCD 4-

28

TDRV BCD 8-

J66

25
26
27
28

<1=

LOGIC
GND

Sequence:
1. 120V AC is switched to TDRVMOT and TDRVAIR, energizing K1 and L1.
2. L1 routes compressed air to the cylinder, driving the tee shaft upward.

V V

3. During tee shaft motion, Si at the top of the air cylinder shaft shorts the motor black wire
to ground so both motor windings are in phase and the motor remains stationary.

P1

4. When the tee shaft reaches the top, microswitch Si opens. AC power, phase-shifted by
C1, now flows to the motor blue wire, causing the motor to rotate the turntable.
5. As the turntable rotates, the diodes decode its position and feed a BCD Code back to the
controller. (This code is the complement of the Energy Mode BCD Code from the
console.)
6. When the turntable reaches its proper position, the controller releases TDRVAIR AC
power.
7. K1 contacts short the black and blue motor leads, braking the motor and L1 releases the
air pressure in the cylinder.

2
00

10

11

12

13

14

15

16

17

18

19

Rotary Switch S2

20
0

21
0

22
0

23
0

24
0

Note: S2 rotates 2 positions for each turntable stud

8. Gas pressure in the tee forces the shaft down, opening Si and removing motor power.
9. After 24 seconds, the controller releases TDRVMOT AC power.
HIGH ENERGY C-SERIES SHUNT TEE CLINACS
TEE DRIVE CONTROL SYSTEM DIAGRAM

NOTE: In systems with Analog Gun Drivers, TDRVMOT power is also routed to the gun
motor pot.

C2 Clinacs
38

FOR TRAINING PURPOSES ONLY


Drawn:

Wil Clark

10/95

ED00025

Revised:

Bill Kirkness

03/03

Sheet 2 of 3

Rev.

39
Aux. Electronics Chassis

Stand Mother PCB (Back-connected)

BI: BCD Decoder and Relay Assembly PCB

P1

S2

RED

10

Auxiliary Electronics
Backplane

=>

11

CONTPWR1

W64

J9

1B

=>

Cl
F8

S4
0
TDRVMOT

J37

BLK

P1

W45

12

TDRVAIR

13
14

=>
J25
10
CONTPWRA
From Power
Distribution
A7: Carrousel,
Mode, BMag PCB

Turntable
Motor

eg 15

0012

BLU

14 (K1

C7
ACCOM

Air
Solenoid

Brake Relay
EQUIPGND

P1
71

J27

W65

J4

Note: Heavy black lines indicate

26c

TDRVAIRC

9c

TDRV BCD 1

8c

TDRV BCD 2-

10a

TDRV BCD 4
<I=

AC COMMON Ground

TDRVMOTC

9
10
11

TDRV BCD 8

12

<I=

LOGIC
GND

Sequence:

1. 120V AC is switched to TDRVMOT and TDRVAIR, energizing K1 and L1.


2. L1 routes compressed air to the cylinder, driving the tee shaft upward.
3. During tee shaft motion, Si at the top of the air cylinder shaft shorts the motor black wire
to ground so both motor windings are in phase and the motor remains stationary.
4. When the tee shaft reaches the top, microswitch Si opens. AC power, phase-shifted by
C1, now flows to the motor blue wire, causing the motor to rotate the turntable.
5. As the turntable rotates, the diodes decode its position and feed a BCD Code back to the
controller. (This code is the complement of the Energy Mode BCD Code from the
console.)
6. When the turntable reaches its proper position, the controller releases TDRVAIR AC
power.
7. K1 contacts short the black and blue motor leads, braking the motor and L1 releases the
air pressure in the cylinder.
8. Gas pressure in the tee forces the shaft down, opening Si and removing motor power.
9. After 24 seconds, the controller releases TDRVMOT AC power.
NOTE: In systems with Analog Gun Drivers, TDRVMOT power is also routed to the gun

motor pot.

C3 Clinacs

P1

3
0

4
0

5
0

Rotary Switch S2

6
0

9
0

0
A

10
0

11
0

12
0

13

14

15

16

17

18
0

19
20
21
22
23
24
0 0 0 0 0 0

Note: S2 rotates 2 positions for each turntable stud

HIGH ENERGY C-SERIES SHUNT TEE CLINACS


TEE DRIVE CONTROL SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn: Wil Clark

10/95

E000025

Revised:

03/03

Sheet 3 of 3

Bill Kirkness

Rev.

39

40
Modulator Cabinet
Auxiliary Power
Distribution PCB

Console

Stand
Stand Mother PCB (Back-connected)

Low Voltage P. S.

CONTPWRA
0

J7

R46

R49

100V
4
R48

dbT
o => 0
CB13

CR12

R50
'VVV

CONTPWRB

zo

100VRET

R1

U17

Console Backplane

,1=

100V
4

R53

ACCOM
8. R62

100V
0

C53

\/

START 1 START 2

Catch-all Panel

U16

70
100W

U6
(FPGA)

<l=

J8
22

W3

J24
2

J20
100 VON

W9

J30

18("1 100VEN 45
<1=

J14

MOTORS CONTROL
\./
DCCOM

46 SHNTON

DC5V \/
100VRET

Logic
Si

13
44 100V RST

120V B
J25

120V A

\/ DCCOM

70V0A

=>

BR1

=>

70VOB

Primary Power
Distribution Chassis

=>
70VOC

Cl

2
100VRET

T2

,M175
Motor Power Supply PCB

CB7
TB1

Customer
Facility
Primary
Power

013
OC
CB6
GND

W17

J12

OA

0
0
0

70V_C
<1=

ACCOM2

Notes: On the Stand Mother PCB, FPGA U6 normally asserts the signal 100VEN to high-side relay driver U10, holding K15 on
the Auxiliary Power Distribution PCB in the Modulator Cabinet. K15 switches 120V AC CONTPWRB to the coil of K25
in the Primary Power Distribution Chassis, applying 3-phase primary power to the Motor Power Supply in the Stand.
Should the +100V Power Supply Voltage exceed +120V for more than ten seconds, U16-8 will go high. This is sensed
by U6-1, with R49, R46 and C53 providing the time delay. U16-8, via optocoupler U17, will assert SHNTON to FPGA
U6. U6 will then negate the signal 100VEN, resulting in removal of primary power from the Motor Power Supply until
the 100V RESET button 51 is pressed or the power is cycled.
U16 will also turn on Power FET 09, providing a discharge path for the 100V Power Supply to ground via 7-ohm, 100W
resistor R1 on the Catch-all Panel. This will protect the power supply and the motor drivers by absorbing any excess
current due to back EMF generated by the Gantry Rotation or Couch Lift Motors if they are rotating at the time the
power is removed.
Also, in case of a power failure during gantry rotation or couch vertical motion, U6-2 will sense this condition immediately, resulting in the sequence described in the preceding paragraphs. When power returns, R4 and Cl will provide a
momentary 100V_RST command.
*-11 shown is P/N 1101524. In older versions, Pin numbering may be different; also, Secondary #3 ( for PortalVision) may
not be present, or may be present but not fused. See the databook schematic diagram.

40

70V B

S2-3
<1=

70V_A

,==>

E34

T"

J3

==>

Ti

S2-2

+27V
0

S2-1

S1-1

Sec #2
AC Al
=>
AC B1
AC Cl

15

(RI
/
1=t-

AC A2
AC B2
AC C2

Al

S1-4

B1

S1-3

Cl

31

Sec #1 Si 2

7
11
10

Pri

.0
To PortalVision
R-Arm Controller

S1-6
=>
S1-5

CR3

R1

Cl

CR4

Fl
CR1
14 Cr1_,C)N
FR
13

Si-R

\/
027R

4,5
Sec #3
"Used in Motor Power Supply
Assy. P/N 100011120

HIGH ENERGY C3 CLINACS


MOTOR POWER CONTROL SYSTEM DIAGRAM
Rev. B: Revised for better legibility. B.K. 01/01
Rev. C: Added colors. B.K. 03/01
Rev. D: Revised margins for databook. B.K. 05/01
Rev. E: Redrawn with CorelDraw. B.K. 01/03
Rev. F: Updated Motor Transformer for PortalVision. B.K. 07/03
Rev. G: General update. B.K. 01/06

FOR TRAINING PURPOSES ONLY


Drawn:

Bill Kirkness

12/00

ED02006

Revised:

Bill Kirkness

01/06

Sheet 1 of 1

Rev.

41

Couch

Pendant
Patch
Panel PCB

Left
Pendant
TX+

J3

P/J10

TX-

Couch
Patch
Panel PCB

J24
1ARX+PN1

P/J1

J4

TX+ 5
TX- 4

Left
Side Panel

2BRX+P2
=>
2BRX-P2

39

J30
1ARX+PN1
=>
1ARX-PN1
=5.

1ARX-PN1

Right
Pendant

W6

P/J17

P/O Stand
Mother PCB

10

13

2BRX-P2
=>

12

DATA+ 3

TB6
1

P/J18

DATA- 4

vv7

14

2BRX+P2

11

W26

J28

Console Backplane

26

26

27

VV9

J30

739
1ARX+PN1
13
1ARX-PN1
14

1BRX-LSP
=>
2ARX+RP
2ARX-RP
=>

Right
Side Panel

28

29

29

29

11

12

1ARX-PN1
.=>
2BRX+P2
,=>
2BRX-P2

=>
=>

13

2BRX+P2 0

=>

14

2BRX-P2 2 0
=>
S5A
Pendant/
Local
Switch

=>

10

10

2ARX-RP

12

=>

1BRX+LSP
=>
1BRX-LSP
=>
2ARX+RP

11

SCI PCB
31

15

15

16

17
-

13

=>

13

14

=>

See PCB
Schematic
Diagram

14

1BRX+LSP
1BRX-LSP
2ARX+RP
2ARX-RP
=>

1ARX+PN1

13

12
28

W30

J3

20

STD Bus

.=>

J14
1BRX+LSP

(Ribbon
Cables)

DATA+
DATA-

B5: Motor Interface PCB

CRADC PCB

Auxiliary Electronics Chassis Backplane


XA4
PWM PCB

XA3
PWM PCB

P1
30a

CARR
++

PLONG LWJ4
- +

8c 7c

32c 31c

P1

+ +

40 30

32c 31c

XA2
PWM PCB

30a

PROT LWJ3

20b

4c 3c

20b

Jr

PA
30a

PLAT UPJ
- + 32c 31c- 4c

20b

3c

30a

39

20b

44

32c 310- 4c

Jr

43

43

41 UPJ2 CONT

41

41

43 LWJ4 CONT

42

42 45 I.VVJ3 CONT

P1

COLROT UPJ

Jr

3c

J4U

21 22

4
211

4
J.1 I

4 4
1__J"
11

4 4

4
J4U

19 20

W1

125
P
CONT
39 _ 37 COLL
<1=,
UPJ1
CONT
44
39

XA1
PWM PCB

S3 (See
Databook
Dwg.)

W32

32

4 4

37

37

38

38

CONT
49 LAT 4=
51 LONG CONT

40

53 PSA ROTN CONT

40

<1=,

J3
DAC CHO

Voltage-toCurrent
Converters
10V = 2ma
(See PCB
Schematic
Diagram)

10

<=

DAC CH1

DAC CH2

DAC CH3

DAC CH4

DAC CH5

DAC CH6

DAC CH7

DAC CH8

10

DAC CH9

16-Channel
Digital-toAnalog
Converter
(See PCB
Schematic
Diagram)

To Low Voltage Motors (See Sheet 2)

P/O Stand Mother PCB

J6
GMOTCEI
To AMC
Drivers on
Catch-all
Panel
pee Dwg.
ED02017)

AGND

Current-toVoltage
9
8
U11
10

CR21

C49

U20:B

U20:A
7

CR27

CR26

Current-toVoltage
13
14
U21:D
12

U20:D

U20:C
15

14

J33
GANTC
1
LIFTC
1

11

10

vyiso
<=,

23
11

35

12

47

GANTRY CONT
LIFT CONT

J2
PLIFTCEI

16

13
1

LIFTLMUP

U7:D 12

AGND
10
8
Notes:
1. GMOTC and PLIFTC voltages should be
equal to the drive voltages on the
Service Mode Motor Status Display.
2. LIFT GO is asserted by FPGA U6 when
PSA MOT EN from the console is active.

FPGA
U6

LIFT GO

U7:C

LIFTLMDN

J36

CCWLIMGANT 29

31

GANLMCCW

13 GANLMCCW

CWLIMGANT 19

33

GANLMCW

2 GANLMCW

From
Couch
Vertical
Limit
Switches

HIGH ENERGY C3 CLINAC MOTION CONTROL


SIGNAL SYSTEM DIAGRAM

From
Gantry
Rotation
Limit
Switches

FOR TRAINING PURPOSES ONLY


Rev. A: Approved and released. B.K. 09/03
Rev. B: Updated. B.K. 01/06

Drawn:

Bill Kirkness

09/03

ED02024

Revised:

Bill Kirkness

01/06

Sheet 1 of 2

Rev.

41

42

Stand

Gantry

Auxiliary Electronics Chassis Backplane


XA4
PWM PCB

XA3
PWM PCB

XA2
PWM PCB

Collimator
Rotation Drive
Assembly

Gantry
Patch
Panel

XA1
PWM PCB

J13
25

8c

7c

32c 31c

4c

3c

32c 31c

4c

3c

32c 31c

4c

3c

32c 31c - 4c

3c

20

20

19

J31

12

4 4

11

4
J49

J311
41_

4444
J49

j31 F

8 17

S2 (Crossover)
3 0 0-

19

22

00
S19

22

S20

COLROTN+

J14
5

COLROTN-

J18
28

J49

UPJ1

=>

=>
LWJ3LWJ4+
=t>
LWJ4=;>

W14b

j113

J3

10

J21

J13

7
10

10

11

Lower Jaw 3
(X2)

J17

12

P/J31>

P/J32>

r4
14

JAW3
.=>
JAW3+

13

59 (Collision)

12

JAW4+
+12V
0

AW4

Collimator
Patch
Panel

W2S:

0- 6

10

P/O Stand Mother PCB

20 19

9 ON

JAW2+
=>
JAW2

22 21
I

S3 (Outer Limit)
3 --00

0- 4
S4 (Crossover)
0- 5 0 0--

0
ZS

J4

Lift Motion Enable


Logic (See Dwg.
ED02017)

S5 (Csin)

+12V

C5

A
I 41A

Upper Jaw 2
(Y2) PCB

JAW1+
-->
JAW1

W6S,

0_ CL

10

W29 P/J8

=t>
LWJ3

10

W53
(Wind-up
Cables)

UPJ2-

=t>

UPJ2+

> Drive Motor

UPJ1-

0
a

CARRMOT-

,=*

J10

0- 4

J1

Carrousel
Assembly

CARRMOT+

4
J49

ZS

Si (Outer Limit)
Z.) 0-

J3

21

4 4

J3
-A-

1
00

W57

J40

=t>

Upper Jaw 1
(Y1) PCB

Collimator
Distribution
Panel

S3 (See
Databook
Dwg.)

W33 P/J84

Collimator

0-0 I C)
S8 (Inner Limit)

11 C.)

S7 (Outer Limit)
10

S10 (Inner Limit)


8

1
S11 (Outer Limit)

I ZZ G I
22 21

Couch j29
4 4
Patch
Panel J13
15 8

P/O WS

I zu I I u I

24 zo

J27

24 23

20 19

J3

Note: On the Collimator Patch Panel, LWJ3+


becomes JAW3 and LWJ3 becomes JAW3+.

J31

N
v -- 1

-*H1
-e-OTh 8
Lower Jaw 4
(X1)

Lift Motor Assembly A10

4
J33

J13

13 12

W3C

P/O

P/J17

J20

Longitudinal
Drive Motor
Assembly A4

42

J2

Turntable
Assembly A4

J16

Lateral
Drive Motor
Assembly A3

HIGH ENERGY 03 CLINAC MOTION CONTROL


SIGNAL SYSTEM DIAGRAM

See ETR or Exact Couch, and ETR or


VEO Turntable, Schematic Diagrams for
details of Drive Motor Assemblies.

Couch

FOR TRAINING PURPOSES ONLY


Drawn:

Bill Kirkness

09/03

ED02024

Revised:

Bill Kirkness

01/06

Sheet 2 of 2

Rev.

43
Couch

Pendant
Patch
Panel
PCB

Left
Pendant

Console Backplane

Couch
Patch
Panel PCB

P/O Stand
Mother PCB

B4: Timer Interface PCB P/N 1104685 (Universal)


(Component No's in parentheses are for P/N 890720)
P1

DM STATUS
J3

J24

Au
Right
Pendant
_a_
o 0-

P/J11

10

P/J17

VV6

J9

16 PEND2DM

W26

J2

J30
PEND1DM

15

31

31

30

16

J39
PEND1DM
15

30

=I>

16 PEND2DM

7-

7-

S5A

r5-1

TB6

P/J18

19

W7
I

5
9
36 E11 10

35

35 =ELi

16

13

U32:A

(DS2-4 /1/'/
/i/s7
(U23)

Q9

500 mSec

(U23)

10

DM MOT EN

U32:C

51

Watchdog
Timer
(U6)

W28

J2
DM OVERRIDE

_ U37:A
R (U21)

WD ENABLE
WD STROBE

Right Side
Panel

e5-1

U23:610
(U21)Q
8

W1

J4

_0_
0 15

RSPNL DM

==>

DS2:D

(U23)

Keyboard PCB

MOTION
ENABLE

J14
LSPNL_DM

36

Dedicated Keyboard

Left Side
Panel

P1

vY_9

15

LSPNL DM
=I>
RSPNL DM

31

J4

J30

11 Q 7
75 mSec
(150 mSec
with Software
Version 2)

(Ribbon
Cables)

STD Bus
CRDIO PCB
U2
PLCC

B3: Output Interface PCB 883830

J8
OUT36

P1

OUT39

MOT EN 14

VV-25

15

17

OUT35

7
19
5

OUT24

U1
PLCC

OUT25

U9

11 2

10

J6

1 DM MOT EN

7
U19

U9

J23 _

G MOT EN 1 0
=>
COLL MOT EN 11
PSA/BMSTPR MOT EN 1

U19
U9

8 3

W10

1E
34
2'

J2

W26

23

U10

U15

21

IN59

13

19

OUT26

U10
15
Data Bus
Buffer

21

17

12

WD

DM STATUS 3

P/O Stand Mother PCB


To Gantry
Motor
(See Dwg.
872590)
To Lift
Motor
(See Dwg.
ED02024)

J3

Jb

GMOT+
GMOT-

<1=

GANTAMP+

00
0 0

Catch-All Panel
Gantry Rotate
Motor Driver
Al

GANTAMPLIFTAMP+

14
LIFT+
2

3 16

c<I NN

65 GANTEN

ENGANT

COLLEN

27

118

COLLEN

ENCOLL

011

AGND

4
J33
18

COLLMOTEN
U1813

U1:C
G 14

COUCH27s
COUCHEN 027R

HIGH ENERGY 03 CLINAC HARDWARE/SOFTWARE


MOTION ENABLE LOGIC SYSTEM DIAGRAM

GNTMOTEN -

R13

J4=

PLIFTC

From Lirrit Switch


Circtits on Stand
Mother PCB (See
Dwg. ED02324)

U15'D
14

6 1 COLL27

AGND

Couch Lift
Motor Driver
A2

<1==

MOVE GANT
U18:A

GMOT

LIFTAMP-

U2A

U1:A

R2
+27V

LIFT410

+27V
Motor
Power to
PWM
PCB's

W2

U2C
7 12

c<I'`Nt

17 COUCHEN ENCOUCH

PSBMMO
EN

34

FOR TRAINING PURPOSES ONLY

21

U6
FPGA
Rev. A: Approved and released. B.K. 08/03
Rev. B: Added Sheet 2 for new Output I/F PCB. B.K. 01/06

Drawn:
-- Revised:

Bill Kirkness

08/03

ED02017

Bill Kirkness

01/06

Sheet 1 of 2

Rev.

43

44

Couch

Pendant
Patch
Panel
PCB

Left
Pendant
ro_ d
o

J24
10

=>

Right
Pendant

P/J17

W6

P/J11

P/O Stand
Mother PCB

J9

J2E
PEND1DM

16 PEND2DM

=I>

_EL
0

Console Backplane

Couch
Patch
Panel PCB

B4: Timer Interface PCB P/N 1104685 (Universal)


(Component No's in parentheses are for P/N 890720)

W?

J20

J39
15 PEND1DM

31

31

31 LSPNL DM

36

30

35

35

16

30 RSPNL DM
i=t>
16 PEND2DM

16

16

15

J4
=5 ,

J30
15

0-1
S5A

4
44

=5.
36

=5

P1

DM STATUS
-->

12 U35:B 8
46i 13
(U19)
47

1
2
7

DS2:D
(DS2-4d?

U32:6

U23:6
(U21)Q

l
9
45 1 101

(U23)

9
U32:A
500 mSec

(U23)

10,

DM MOT EN

U32C

51

(U23)

W1

Dedicated Keyboard

Left Side
Panel
TB6

_EL
o 0

P/J18

W7

19

291

MOTION
ENABLE

J14
LSPNL DM
9
9

J26

Keyboard PCB

Watchdog
Timer

9
(U6)

81

J2

RSPNL DM

15

Nc-C)

Right Side
Panel

DM OVERRIDE
=5
WD ENABLE
-->
WD STROBE

_ U37:A
R (U21) u
41)

c
75 mSec
(150 mSec
with Software
Version 2)

(Ribbon
Cables)

STD Bus
CRDIO PCB
U2
PLCC

B3: Output Interface PCB 100012755

J8
OUT36
OUT39

P1
UA

U6

15

WD
<=
DM MOT EN
c==

MOT EN

17

OUT35

J23

19
OUT24

U1
PLCC

21

17

OUT25

15 IN59

23

DM STATUS 3
<1=

<1=

i<=
C==
J5

GMOT+
<1==
GMOT-

44

W2

Catch-All Panel

L_

I GANTAMP-

00
0 0

I LIFTAMP+

Gantry Rotate
Motor Driver
Al

GMOT
AGND

LIFTAMP1 65 GANTEN

+27V

U18:A
G4

+27V
Motor
Power to
PWM
PCB's

GANTAMP+

00
00

o 010

J2

W26

23

J43

J4
To Lift LIFT+
Motor
LIFT(See Dwg.
<=,
ED02024)

12

P/O Stand Mother PCB


To Gantry
Motor
(See Dwg.
872590)

WI 0
8

21
J6

U10

=t>

=>

19

OUT26

Data Bus
Buffer

G MOT EN 10
COLL MOT EN 11

ENGANT 28 4

U3:6

From Limit Switch


Circuits on Stand
Mother PCB (See
Dwg. ED02024

U15:D

COLLEN

14

27

COLLEN

ENCOLL 4

U1 4:A

03

U1:C
G 14

LIFTBRK+ s
COUCHEN 027R

J33

GNTMOTEN
18
4
COLLMOTEN

R13

<=i

34

U2:C
7 12

HIGH ENERGY C3 CLINAC HARDWARE/SOFTWARE


MOTION ENABLE LOGIC SYSTEM DIAGRAM

5 17 COUCHEN ENCOUCH
U6
FPGA

U14:6

5 PSBMMOEN

FOR TRAINING PURPOSES ONLY

Drawn:

Bill Kirkness

08/03

ED02017

Revised:

Bill Kirkness

01/06

Sheet 2 of 2

Rev.

Console Backplane

Stand Mother PCB (Front-Connected)


(See Sheet 2 for Back-connected)

B5: Motor
UF PCB

Catch-all Panel

J23
35

11

U6

U6

J33
2

11

cf-ro

10

R65
NVV'
4.99K

W10

Stand Wiring Harness


J33
U11

AMC Driver

43

0
U11

Voltage-toCurrent

Current-toVoltage

=I>
11

10

Low to
Inhibit

N/

Gantry Motor

9 04 6
7
4

C==

R54
10K

J1

W7

J43

Gantry Motor Assembly

<1=

13

15

11

14

\/

Tachometer

Switching Freq = 33 KHz

Gantry Limit Switches

SDGANT

(Normally closed, open at limit)

Notes:

J36

00

==>

CCW
+5V

SDGANT goes high to ena


Driver 100 mSec after Moti
to allow for K15 contact bo
12

1.

U18, U13
100-mSec
Delay

AMC
Enable
e.

1-21From Power-fail Detection Circuit (Schematic

' ' Sheet 1).


3. From red RESET button on the Collimator
Interface Mount.
4. From 600SR collimator collision sensor to initiate
controlled stopping at collision.
From
PortalVision collision detection circuit.
5.

=I>

CW
J23
PVGANTEN

=I>
2.

POWER_OK 0

U7

J14
U12

,==>

U12

10 U25
11

3
1

3. HW_RESET 29

U9

slYVV*
15

14
0
U12

U25

6
+27V 0

D CLR
>CLK

PTH4

4. RLMPCRLY 17 -.WV

-,./vvv,

5. PVCOLLOK

2
,
13

=i>

....I

V\AAt

PR

171

To other motor drive circuits for controlled stop


delay logic.

8.

All components are on the Stand Mother PCB


unless labeled otherwise.

RST Q
9\
6

U14

J23

10
9
8

6. GNTMOTEN I 18
J33

I ll R7

4
U7

7.

N/
U25 0 12

Software motion enable, AND'ed with hardware


motion enable on Output Interface PCB.

==>

+5V

J14 0

6.

3
-

From PortalVision Gantry Enable Circuit.

10K

U15

U21

10

U20

8
U23

Simplified
circuit
representation

/\

Rev. B: Updated for current production machines. B.K. 07/95


Rev. C: Added colors. B.K. 03/01
Rev. D: Revised margins for databook. B.K. 05/01
Rev. E: Redrawn with CorelDraw. B.K. 01/03
Rev. F: Sheet 1 was front-connected Stand Mother PCB. B.K.
01/04
Rev. G: Minor revisions. B.K. 04/04
Rev. H: Added component numbers, values. B.K. 04/05
Rev. I: Corrected signal flow from tachometer to AMC Driver
GdR 10/01

HIGH ENERGY C3 CLINACS


GANTRY MOTOR DRIVE SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:

Wil Clark

03/96

872590

Revised:

Gino den Ridder

10/01

Sheet 1 of 2

Rev.

45

46
To Motor I/F Pin 43 Current Monitor

)'(CRADC or ADC #0, Ch. 16)


Console Backplane

Stand Mother PCB (Back-Co nnected)


(See Sheet 1 for Front-connected)

B5: Motor
I/F PCB

:3

=C>

AMC Driver


U21

Vol age-toCurrent

14

43

=t>

Gantry Motor Assembly


J43

=I>

=C>

2
Current-toVoltage

9 04:. 6

RN21:A
10K

=>

=>

Low to
Inhibit

=t>

10

4-

Gantry Motor

J1

W78

e0 4

'NZ

12

15

11

14
Tachometer

Switching Freq - 33 KHz

Gantry Limit Switches


(Normally closed, open at limit)

FPGA U6

W27
00
CCW

U11

4.99K

U20

o-ro

10

R75

U20
J23 W10 J33

J33

IJ

Stand Wiring Harness

Catch-all Panel

.J36

1
174

RN2:G
stVVV`
10K

31

+5V

CCWLIMGANT
CWLIMGANT
2

SDGANT goes high to enable AMC Driver


100 mSec after Motion Enable to allow for
K9 contact bounce.

GLIMCCW
2

1.

LGGANTEN
(from PortalVision)
2.

R45

POWER_CHK

36

1K
J14
3. HW_RESET 29

RN15:D

U5
()PTOCOUPLER

ulaB

4.1 RLMPCRLY 17

uiaA

3.

From red RESET button on the Collimator


Interface Mount.

4.

From 600SR collimator collision sensor to initiate


controlled stopping at collision.

151

PWROK
8

64

From PortalVision collision detection circuit.

6.

Software motion enable, AND'ed with hardware


motion enable on Output Interface PCB.

7.

To other motor drive circuits for controlled stop


delay logic.

8.

All components are on the Stand Mother PCB


unless labeled otherwise.

COLL_RESET

10K

RN15:B

Sheet 1).

10

GANTENEPI

SHT_DN_G
J14

12.1 From Power-fail Detection Circuit (Schematic

SDGANT

RN2:E
,A.A/V`
10K

From PortalVision Gantry Enable Circuit.

11

33 GLIMCW

10K
J8

Notes:

19

ACC_COLLISION

10K
NO_HZD_OVR

4
=>

7.

.18
6. LGCOLLOK
4
(from PortalVision)

3
10K

EPI_COLLISION

GANTEN

J33
6

GNTMOTEN

18

RN14:G
sA/VV`
10K

6
=>

U2
()PTOCOUPLER

16

-1- 3

U1
FET
DRIVER

18
==>

8 ENGANT

HIGH ENERGY C3 CLINACS


GANTRY MOTOR DRIVE SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY

46

Drawn:

Wil Clark

03/96

872590

Revised:

Bill Kirkness

04/05

Sheet 2 of 2

Rev.

47

Console Backplane

Stand Mother PCB (Back-connected)


(See also Sheet 2)

B3: Output Interface PCB 100012755

From

U6
(FPGA) 36

U12

D60

1 J23

LONG BRAKE CONT

J33

WI 0

10

53

18

LONGCLUC

42

16

LATBRKC

LAT CLUTCH CONT

LATCLUC

2-1

) 3

16 7
0

10

47

16 3

18 AI

43
64

12 7

13 5

16

11

LATBRK+

LONG BRAKE CONT


t>

=C>

12

Collision
detection
circuits

<1=. 15

Note: Cable W100 is only used


when the Motion Disable
Panel is present.

(See also Sheet 2)

44

EMBATT+

TT

LAT BRAKE CONT

U4
46

Lateral
Drive

) U22

47

12
9

Ho
12

U16

13

13)

11 4

U2-

85

8
U16

PLONBRK+

3 8

U2-.

10

l7

LI

2 027R

From
DACO---/M-0--/V\An
Ch.7

P1

13

LAT CONT
==>

LONGCLU+

J25

51

12

37

HAZARD_NOTOVR 300MSEC

17

4027R

Longitudinal
Drive

P/J20

P/J1

PLONBRK+

027R

Back-Connected Stand Mother PCB:

10

Ui1

LONG CONT
.=;.>

After 300 mSec, U6 engages brakes, disengages clutches, disables


motions, shuts down motor drivers.

I '=>

The hazard logic is in a Field Programmable Gate Array (FPGA), U6.


In case of a collision or power failure, U6 releases brakes, engages
clutches, enables all motions, shuts down inputs to motor drivers.

Ch.8

4-

12

LATCLU+

027R

J13

F91
J_

10

10

Brake

From

15 .=>

LATCLU+

LATBRK+
Clutch

6 11

15

=>

18 To LED's

6
U2

10

=>

=t>
'6

Brake

4)
5

B5: Motor Interface PCB 1104140

J29 J27

LATBRK+

U16

J12

P/J16

U24
J2

44

Couch
Patch
Panel

(See also Sheet 2)

To ground via
Emergency
Pendant Switches

J33
3

6 LAT CLUTCH CONT

11

4 4

Couch

Stand Mother PCB (Front-connected)

J23

,=>

6 LONG CLUTCH CONT 45 2

13

06

027R

P1
2

r==>

07

B3: Output Interface PCB 883830


U23

12

LATCLU+
.39

=I>

Q5

W26

J2

611
7

37

J3

LONGCLU+

3 4

U13

From
DA0

(W100)

J2

PLONBRK+

U11
12

(See also Sheet 2)

04

12

U11

LAT BRAKE CONT


)

U1

.=t>

U7

,3 9 9

i>

U11

LONG CLUTCH CONT


t=>

U2

LONGBRKC 17-1 9

EMBATT+

Power
detection
circuit

Motion Disable
Panel (Optional)

To ground via
Emergency
Pendant Switches

11

18 To LED's
3

LONCLU+

027R

11

11

12

12

Clutch

Front-Connected Stand Mother PCB:

-E 4

.(1=

n case of a collision or power failure, 300MSEC releases brakes,


engages clutches, enables all motions, shuts down inputs to motor
O drivers.

W1(

To Stand Patch Panel,

Sheet 2

After 300MSEC times out, HAZARD_NOTOVR engages brakes,


disengages clutches, disables motions, shuts down motor drivers.
Rev. B: Updated for consistency with current production
machines. B.K. 12/98
Rev. C: Added colors, Back-connected Stand Mother PCB.
B.K. 03/01
Rev. D: Revised margins for databook. B.K. 05/01
Rev. E Redrawn with CorelDraw. B.K. 02/03
Rev. F: Added lateral motor drive control circuits and signals.
B.K. 12/03
Rev. G: Updated for new Output I/F PCB. B.K. 01/06

HIGH ENERGY C3 CLINACS COUCH LATERAL AND


LONGITUDINAL MOTOR DRIVE SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:

Wil Clark

03/96

872591

Revised:

Bill Kirkness

01/06

Sheet 1 of 2

Rev.

47

48

Couch
(See also Sheet 1)

From Sheet 1
12
LONGCO NT

11
10
9
8
7

Stand

Couch
Patch Panel

J351

Stand Mother
PCB

(See also Sheet 1)

Motion Disable
Panel (Optional)

(See also Sheet 1)

(See also Sheet 1)


J2

PWM PCB A2
Channel 4

F7
31a,b,c

J31
8

J10

J2
PLAT+
==>

(W,100)

19

19

30a
F8
PLAT-

32a,b,c

PWM PCB A4
Channel 4

20

910

J3

20

.0.0

9
0
14
20,,,r09
13

W26

127

29

Longitudinal Drive

4.0111

J12

19

19

13

20

25

21

13

25

=>

J13
910

F17
PLONG+
==>

31a,b,c

21

21

0
14

F18
32a,b,c

PLONG-

22

22

t>

P/J20

El

41

Limit Switches

+22

13
0

Auxiliary Electronics Backplane

Note: Cable W100 is only used


when the Motion Disable
Panel is present.

HIGH ENERGY C3 CLINACS COUCH LATERAL AND


LONGITUDINAL MOTOR DRIVE SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY

48

Drawn:

Wil Clark

03/96

872591

Revised:

Bill Kirkness

01/06

Sheet 2 of 2

Rev.

49

Couch

Stand
Lift Pot

Lateral Drive

11
J15

Console

Couch Patch
Panel ,R'CB

Cons* le Backplane
Gantry Rotation
Assembly

J5

Stand Mother PC

W783

R1

J33

GANTPOSN 7 9
=>
GANTPSNR
G PRO+
3
G PRO-

Ci-APC or
AD C#5 PC

B5: Motor Interface PCB P/N 100015235

R3

R5

STD Bus

10

J23
39

Voltage
Sources

Sample-andHold Circuits

_+_
U1

GANT POSN
=>

GANTRY POSN-R
31
36
13
_

29

GPRO+
=

014

14

30

GPR
<=

02

40

40

U15

J1

W31
,..,

il*

J
_
32

32

R2

J30

Longitudinal
Drive
LATPOSN

J19

W5

J12

PSAPRO+
<=
PSAPRO

=t>
R7

P/J17
3

W6

LONGPOSN

PSAPRO+

PSARO-

W26

J39

LIFTPOSN

LATPOSN

20

LONGPOSN

22

PROTPOSN

PSAPRO+

PSAPRO

77 PSA LIFT
5
,=>

POSN

41

PSA LAT POSN


41
16

42

427

22

32

32

17

33

20

ui 0

.>

PSA LONG POSN

,=.
7- PSA ROTN POSN
8

PSA
- R0 + 06
17
33
=
PRO 05
34 PSA
<,
33
_

19

19

U14

23

23

U5

U8

In 1996, the
ADC#0, #1
and DAC
PCB's were
replaced by
the Varian
CRADC PCB.

J13

Turntable
P/J3 P/J2
2

=>

R1

PSAPRO+

VV3

J33

PSAPROPROTPOSN

14
15

Note: Connections shown are for


ETR Couch. See Sheet 2 for
Clinacs with Exact Couch.

Note: Connections shown are for


software Releases 3-6. See
Sheet 2 for Release 7 and up.

HIGH ENERGY C3 CLINACS GANTRY & COUCH


POSITION READOUT SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Rev. A: Approved and released. B.K. 09/04
Rev. B: Updated. B.K. 11/05

Drawn:

Bill Kirkness

09/04

ED02031

Revised:

Bill Kirkness

11/05

Sheet 1 of 2

Rev.

49

50

Couch

Stand
Lift Pots

Lateral Drive

W11

Gantry Rotation
Assembly

J5

Voltage
Sources

R3
J1

W78 _

W12
=>
6

R4

GANTPSNR
=>
G PRO+

R1

J33
GANTPOSN

G PRO

<1=

CRADC PCB

B5: Motor Interface PCB P/N 100015235

Stand Mother PCB

R5

STD Bus

Console Backplane

3
J15

Console

Couch Patch
Panel PCB

371
31

vyiso

J23
GANT POSN

U27:A

31

36

Q4
02

GANTR
Y POSN-R

13

13

-+
29 GPRO

14

14

30 GPRO

40

40 15

39

Sample-andHold Circuits

Active
Filters

_+__ J1
U23

W31

J1

U17:C

U15

32

32

U22:C

U19

19

19
23

2
8

R6i44

R2

5
J30

Longitudinal
Drive

W5
J19

R7

J12

LATPOSN

22

J39
LIFTPOSN

20

LATPOSN
,=>
LONGPOSN

22

PROTPOSN
PSAPRO+

PSAPRO+

PSAPRO

PSAPRO

LATPSNR

PSAPRO+

3
^
20

W26

PSAPRO-

LATPSNR

41
42

41
42

PSA LIFT POSN


PSA LAT POSN

U22:D

U20

23

17

PSA LO
NG POSN

U17:A

U13

TN POSN
PSA RO

U17:6

U14

U7 :A

U9

16

32

32

18

17

17

33

33

33

J20
28

2 LATPSNR

J30
28

PSA PRO +
PSA PRO

06
03

R8i4

Turntable

27

LONGPOSN

25

PSAPRO+

29

PSAPRO+

26

PSAPRO

28

LONGPOSNR

30

PSAPRO

P/J2

R1

B6: Meter Interface PCB P/N 100015230

J8

P/J17

2
Active
Filters

W3
PSAPRO+

J1

21

Sample-andLine
Hold Circuits Dri;rs

23

W33
,

J2

LIFTPSNR

27

27

23 PSA LIFT POSN-R

U8:A

U7

U3:6

19

21

LONGPSNR

29

29

25 PSA LONG POSN-R

U8:B

U6

U3:C

23

23

23

PROTPSNR

30

TN POSN-R
26 PSA RO

U8:C

U5

U3:D

30

19

J33
1

PSAPRO
=>
R2

PROTPOSN
-->
PROTPSNR
=>
PSAPRO

3
5
7

PSAPRO+

Note: Connections shown are for


Exact Couch. See Sheet 1 for
Clinacs with ETR Couch.

14
15

Note: Connections shown are for


software Release 7 and up.
See Sheet 1 for Release 3-6.

HIGH ENERGY C3 CLINACS GANTRY & COUCH


POSITION READOUT SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY

50

Drawn:

Bill Kirkness

09/04

ED02031

Revised:

Bill Kirkness

11/05

Sheet 2 of 2

Rev.

51

Gantry
Collimator
Rotation Assy.

Stand

Gantry Signal
Patch Panel
W33

P84

j3

Aux Electronics
Backplane

J1

W13

CPRO+
R1
20

1J45

CPRO-

COLLP
OSN1

COLLP
OSN1

J14
32

=>

=;.>
=>

W14a

33

34

34

CPROUPJ1 POSN

35

35

UPJ1 PSNR

36

36

UPJ2POSN

37

37

UPJ2PSNR

16

16

LWJ3POSN

17

17

18

18

LWJ4POSN

19
J11

Voltage
Sources

J34
CPRO+
32

33

STD Bus

B5: Motor Interface PCB P/N 1104140

J32

===.

Collimator Patch Panel

Console Backplane

CPRO+

CPROR3 >

Console

=>

W1 1

J22

P1
10

J1

47

49

31 COLL

PRO+

Q4

50

50

7
2 COLL

PRO-

Q3

15

15

11

13

13

38

16

12

Sample-andHold Circuits

COLL POSN

47

16
14

14

40

17

13

LWJ3 POSN

23

23

55

33

33

14

24

24

56

J1 (or J2*)

LI

U6

UPJ1
POSN-R

17

W31

U12

UPJ1 POSN
UPJ2 POSN
=>
UPJ2 POSN-R

CRADC or
ADC#0 PCB*

LWJ4 POSN
=>

U7

34

34

09

11

11

U3

38

38

U2

17

17

U13

13

*In 1996, the


ADC#0, #1
and DAC
PCB's were
replaced by
the Varian
CRADC PCB.

J12

Wind-up CablesC,

Collimator
1

LWJ3PSNR

UPJ1 POSN
UPJ1 PSNR

LWJ3POSN
=>

UPJ2POSN
UPJ2PSNR
CPRO4
CPRO+
J14

Y1

4444
PP

CPR9+

10, 11 12 113 8,9

1.1:

14 J16

10.11 12 13 8,9

4 4

1J12

14

J18

Note: Connections shown are for


software versions 1-6.
See Sheet 2 for software
Release 7 and up .

4 4
)W101

)W102

J2

HIGH ENERGY 03 CLINACS


COLLIMATOR POSITION READOUT SYSTEM DIAGRAM

44 4444

SS

Upper Jaw 1 (Y1)

CPRO+

;
Y2
cB
J2

CPRO-

J1

L P CB

CPRO-

J13

LVVJ4PSNR

1Ji

44

LWJ4POSN

L_J

Collimator Distribution Panel

R5

Upper Jaw 2 (Y2)

R8

Lower Jaw 3 (X2)

R9

FOR TRAINING PURPOSES ONLY

R10

Lower Jaw 4 (X1)


Rev. A: Approved and released. B.K. 09/04
Rev. B: Updated. B.K. 01/06

Drawn:

Bill Kirkness

09/04

ED02032

Revised:

Bill Kirkness

01/06

Sheet 1 of 2

Rev.

51

52

Gantry

Stand

Collimator
Rotation Assy.
P84

Gantry Signal
Patch Panel
W33

Aux Electronics
Backplane
W13

j3
CPRO+

R1

R3
R2

1 J45

Voltage
Sources

CPRO-

=>

20

COLLPOSN 1

COLLPOSN1

47

47

=> 1

21

SN2
COLLPO
===>

-OSN2
COLLP

48

48

49

PRO+
31 COLL
4

Q5

50

50

32 COLL PRO-

Q1

32

34
35

35

36
37

==>

16
17
18

=>
J11

J32

W11

Active
Filters

Sample-andHold Circuits

U27:B

U24

U7:6

U10

J1

J22
10 COLL POSN

COLLPOSN2
==>

W31

J1

(Th
14

14

34

34

J34

32 CPRO+
33 CPRO34 UPJ1 POSN

33

=f>

W14a

CRADC PCB

B5: Motor Interface PCB P/N 100015235

CPRO+

J14

STD Bus

Console Backplane

CPRO-

Collimator Patch Panel

Console

UPJ1 PSNR

UPJ2POSN
36
UPJ2PSNR
37
16 LWJ3POSN
17 LWJ3PSNR

LWJ4POSN
18
19 LWJ4PSNR

15

15

13

13

16

16

=> 14

14

17

17

=> 23

23

=> 33

33

24

11 UPJ1 POSN
POSN-R
38 UPJ1
12 UPJ2 POSN
UPJ2 POSN-R
40
r=>
POSN
13 LWJ3
=>
LWJ3PSNR
55

LWJ4 POSN
14

LWJ4PSNR
56
=>

U27:C

U25

U17:D

U16

U27:D

U26

11

U6:A

U8

38

38

U22:6

018

17

17

U7:C

U11

20

20

U22:A

U21

13

13

U7:D

U12

40

40

J12

Wind-up Cables(,

Collimator
6

J11

Collimator Distribution Panel

J12

UPJ1PSNR
==>
LWJ3POSN
=>
UPJ2POSN
=>
UPJ2PSNR

CPRO-

CPRO<l=
CPRO+

CPRO+
J14

J1

[CB
2

444444

J13

Y2
PCB

52

co

CPRO==>
CPRO+
=>
J16
14
10,11 12 13 8.9

4444

J18

14

Note: Connections shown are for


software Release 7 and up.

See Sheet 1 for earlier


software versions.

M/102
2

444444

\Y\
Upper Jaw 1 (Y1)

10,11 12 13 8,9

LWJ4POSN

LWJ3PSNR

UPJ1POSN

J2

444 4

Rg\AY"-

Upper Jaw 2 (Y2)

Lower Jaw 3 (X2)

444444
R9

HIGH ENERGY 03 CLINACS


COLLIMATOR POSITION READOUT SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY

R10

Lower Jaw 4 (X1)

Drawn:

Bill Kirkness

09/04

ED02032

Revised:

Bill Kirkness

01/06

Sheet 2 of 2

Rev.

53

Stand Mother PCB (Back-connected)


e,cr

CONTPWR1 0

Console
Backplane

J11

F5

EXTBMSTP
=I>

J41

w59

J5

BMSTPRA2

+12V
J33

(See Schematic
Diagram Below)

12

-j-

P1
37
38

J23
=

\/

A3: 100VDC Motor


Controler PCB

B3: Output
Interface
PCB
Vri 0
s

CONTPWR2 0-0'10 BMSTPWR1


.=c>
BMSTPWR2
CONTPWR1

To.i
\/

--

10

1,4
J11

7,8

:
C
001-17

2,3
1

\/
ACCOM

6 4

Beamstopper

Gantry Signal
Patch Panel

BMSTPRA1

5,6

11
-

=I>

C)I

12V ON

10

NC

FLOW 1/1_

10

NC

DCCOM
10k

,i,/

U13
9

\/

F4

cr

RETBMSTP

=,

+24V

+12V

+24V

To.i
N/
Q1)
DS4

\/
DC

CONTPWR10
+24V

B1: Input
Interface #1
PCB

Auxiliary Electronics
Chassis Backplane

P1

J25

40

16 BMSTPR RET I/L

39

15 BMSTPR EXT

0
In

WI

J35

<I=

J42

16

BMSTRTIL

15

BMSTEXIL

26
27

W32

0
Ou

\/
DC

BMSTPRDM

BMSTPRDM
=t>

26

BMSTRTIL

BMSTRTIL

27

BMSTEXIL
<I=

BMSTEXIL

J2

41

In

Out

Limit Switches

A3: 100V DC Motor Controller PCB


W98
4
J11

....20y15 4

2
J11

R2

CR2

R3

CR4

CR1
R1

-LILI-0"
07

CR3

Note: If beamstopper not installed,


jumper plug W98 must be
plugged into the end of W95.

ELL

HIGH ENERGY 03 CLINACS


BEAMSTOPPER CONTROL SYSTEM DIAGRAM
Rev. B: Revised for better legibility. B.K. 01/00
Rev. C: Added colors. B.K. 03/01
Rev. D: Revised margins for databook. B.K. 05/01
Rev. E: Redrawn with CorelDraw. B.K. 02/03
Rev. F: Added A3 PCB schematic. B.K. 01/04
Rev. G: Updated, added W98, note. B.K. 01/06
Rev. H: Corrected Beamstopper connections. GdR. 02/10

FOR TRAINING PURPOSES ONLY


Drawn:

Wil Clark

02/97

ED00033

Revised:

Gino den Ridder

02/10

Sheet 1 of 1

Rev.

53

54

Stand

Gantry

Stand Mother PCB (Back-connected)

Auxiliary
Electronics
Backplane

J23
cOLLCONTACT2

Collimator

Collim3tor
Patch
Panel

Interface
Mount PCB

Collimator
Distribution
Panel

LED_PWR
0

6
J19
RST LMP F

+24V
U2
FPGA

ci)
41 NO HZD OVR 2

=,

11
130,-0
J14
09 RESETLMP
=>

U1OB
17

W65

J27
30

J34
RESETLMP

33

W1la

J14

J11
RST LMP

33

Wind-up
Cables

6--1

W1

J20
16]

J11

FE

29

J6
22

22

HW RESET

J6

171

HW RESET
+12V

51

+12V0

-->

12

11

10

HW RESET

J29

13

4
HW RESET

0
2

J23
.Z\12/j14

HW RESET 17

U13B
3 COLL RESET

35

Switch
Assy.

COLLCONTACT1
DC5V
0

Reset Switch
Assy. PCB
(Left Side)

Note: J19 was J10 on


-01, -02 versions
PVGANTEN

Note: Systems without PortalVison have a jumper


plug in J23 connecting pins 1 and 2, 3 and 4.

Reset Switch
Assy. PCB
(Right Side)

POD Driver PCB

Switch
Assy.

VR1

W112

COLLCONTACT2

X414

W,593

=;>
COLLCONTACT1
PVCOLLOK
<==
DC5V

R-Arm collision disables Clinac motions


Clinac collision disables R-Arm motions

5-Volt
Regulator

=>
2

1 00
J22

II

1 +5\/OUT

2
=>

RN3
yyy

J2,

J28

16

3
+12V

=>

SW_RESET-

J P

.=>

PortalVision R-Arm Control Rack


X50
22

<1=

23

Collision Sensing Logic

2
3
6

X501
-

W501
<=

Power Supply Unit or


Motor Transformer in
Clinac Stand
HIGH ENERGY 03 CLINAC COLLISION SENSING
& RESET LOGIC SYSTEM DIAGRAM

<=.
I

Note: Newer Clinacs have a


"Secondary 3" winding in
the Motor Transformer.

FOR TRAINING PURPOSES ONLY


Rev. A: Approved and released. B.K. 06/03
Rev. B: Drawing No. was E002014, already in use. B.K. 01/04
Rev. C: Updated. B.K. 01/06

54

Drawn:

Bill Kirkness

06/03

ED02028

Revised:

Bill Kirkness

01/06

Sheet 1 of 1

Rev.

55
STD Bus

Console Backplane
(Ribbon
Cables)

CRTIMER PCB

01
-S
aa
G2

S3
36
G3
30 S4
35
G4
9 S5

3
04

Lsi U2

3 DOS1

S
9
02

2 XDR1
ao XDP1

6
G3
30 S4
35
04
29 S5

38 PROH

37
05 (HMU1)

G5

47
01

27

2
03

25
40,

23

21
19

G5

CMIN

PLSITPB

50
41

CRADS1
<1=

MCHSYNC

=>
CRADS2

.,51
4 61,

U3

S2
39
G2
36

37
29
Si U1
01
G1

3. DOS2
01
0
2 XDR2
02

S3
G3

30 S4
35
G4
29 S5
G5

39

S2
9
02

40 XDP2
=>

36

S3
G3

37
o. (FIMU2)

02 2-1

15

03 zoli

13
11

,30 54
. 35
G4
.29 S5

38 XDRS

17

4
5

05

9
3

DOS RST
=>

45

>

43

=>

35
33

Dashed lines (

) indicate internal programmed connections. -->

31

B4: Timer Interface PCB P/N 890720


(From PortalVision)

W29

J1
U4

Varian Cardrack Backplane

DOS1
=>
TIME
-->
DOSRV

47

4
U3

6 5

27

11 =>

U33

23

CLK
13
GANT RTSW*

BEAM ON 1 from Con


trol CPU via CRDIO PCB
(See Dwg. No. ED02016)

U11A
12 Selector

J4
3-5
3-0
3-1
=>
3-2
=>
3-3
=>
3-4
=>
3-6
=>
3-7
0

27
17
19
_
21
_
23
25
29
_
31

CG TRIG EN
==>
KLY TRIG EN
GPRFEN
=>
RF TRIG EN
=>
EN LOW PRF
=>
DS SRV EN
=>
GDLY CCNT EN
=>
DBDSVEN
=>

AFC Sampleand-Hold Circuit


(See PCB
Schematic
Diagram)

15

it

13

11

MACH SYNC

AFC CONTI'
0
I
43 To RF
Driver
El 4

Trigger Sync
Pulse Clean-up
Circuit (See
PCB Schematic
Diagram)

From
3I Auxiliary
Power
4 I Dist. PCB

DOSE RATE SERVO GDLY

'DOSRST

CGTRIG DISABLE

50

PROH
0
CRADS1

41
39

U32

TP4

U32

PLSITB
GDLY CCNT EN

DOS2

37

CRADS2
4
SYNC
=>
GPRF
==>.
RFTRIG
=>
KLYTRIG
=>
CGTRIG

TP7

4
= U
'

BMOFF

29
SYNC

6 4 U27

P1
GDLY CONT 3
=>

To Gun
Driver

23

To RF
Driver

5
U12

4
5

13

U19

12

360/180
<1=
MCHSYNC

CAL+ from Output


Interface PCB

3
DLY'D HVON (From Dwg. No. ED02016)

TP23

45

2
RF TRIG EN
=>

43

CGTRIG

La

12
11

11
25

10

CGTRIG

U3

26
361

To Gun
Driver
(See Dwg.
ED02036)

CG TRIG EN 13

31

W28
-,

24

C-RF TRIG n
=>
TP24

CGTRIG DISABLE

35
33

U4, U6 are LowImpedance Line


Drivers

U33

RFTRIG

XDR1
=>
XDP1
0
XDR2
0
XDP2
=>
XDRS

AFC OUT

13

11

J2
27

21

TP25

0
B 4

9
KLYTRIG
=>
KLY TRIG EN 10
=>

To Modulator

22

C-KLY TRIG
3
=>

BEAM ON DLY
u1.7 io SCOPE SYNC H

17

MCHSYNC

MCHSYNC

19

360/180 6

4 180Hz 5

<1=
U11B
elector

21
23

2 360 Hz

U2
+2

SYNC
7

Oscilloscope
Connector on
Monitor Panel

J45

25
29

31
BEAM ON DLY (from
Dwg. #ED02020)

"Notes: GANT RTSW is only used with Software Version 2.


MACH SYNC is only used with Software Versions 2 and 3.
See Sheet 2 for CRDIO PCB, Timer I/F PCB P/N 1104685, Logic I/F PCB Rev. E and up.
See Drawing No. ED02016 for Digital Dosimetry and Hardware Beam Control.

AFC TRIG
0

DBDSVEN

PLSITPB

5
U22
Port 3
8-Bit
Latch

P1

500 pSec
U8 61

W9 A

19

J2

<1=.

W8

DIO #1 PCB

(71

W20

CLR

TP12

21

CMIN
0
SPARE

J2

U13

25

PLSITB50
=>
MSYNC

B14: AFC Control PCB

Dose Rate
Servo Latch

12

U18

8 MACH SYNC*
38
<1=

(36 mSec)

HIGH ENERGY C3 CLINAC TRIGGER PULSE


GENERATION & ROUTING SYSTEM DIAGRAM
Rev. B: Revised for clarity. B.K. 01/04
Rev. C: Added Pro-Log DIO PCB, new Logic Interface PCB.
B.K. 09/04
Rev. D: Added note for Gun Driver Signals. B.K. 03/05
Rev. E: Updated. B.K. 01/06

FOR TRAINING PURPOSES ONLY


Drawn:

Bill Kirkness

08/03

ED02015

Revised:

Bill Kirkness

01/06

Sheet 1 of 2

Rev.

55

56
STD Bus

Console Backplane
(Ribbon
Cables)

CRTIMER PCB

S1 U2

Si U4
3 DOS1
01
4 al.
-S

S2
G2

25

40 XDP1
=>

53
G3

23

30 S4
35
G4
9 S5

38 PROH
=t>
O'S, (HMU1)
37

G5

04

39

MCHSYNC
CRADS2

29
U3
01

di
9
36

02

G2

03

G3

30
5

G4
9 S5
05

G1

01

17
15

39

52
G2

40 XDP2
=>

36

S3
G3

38 XDRS
=>

35

S4
04

9 S5
G5

2 XDR2

08. (HMU2)
37

Dashed lines (

U2
PLCC

17

OUT45
OUT40
OUT41
OUT42
OUT43
OUT44
=>
OUT46
=>
OUT47
=>

27
17
19
21
23
25
29
31

CG TRIG EN
=>
KLY TRIG EN
=>
GPRFEN

EN LOW PRF
=t>
DS SRV EN
c>
GDLY CONT EN
DBDSVEN

U31A

15

P1
AFC CONT
=>

J4
To RF
Driver

Trigger Sync
MACH SYNC Pulse Clean-up TRIG SYNC
Circuit (See
PCB Schematic
Diagram)

15

3
4

From
Auxiliary
Power
Dist. PCB

B13: Logic Interface PCB


Rev. AF

U31:6
c

TP7 I

3
5

BMOFF
SYNC

tytaA

U15

1
6 12
U
13

10

P1
GDLY CONT
32
=>

U7

P1
13

13

P1

9
=>

=>

14

ri

To Gun
Driver

5
PLSITB (L)

U19:13 6

U16

12

W2

13 U14:D

U7:A

tAlD

-->

U7 is a Cuad
Low-Impedance
Line Driver

U13:6 9
CAL+ from Output
Interface PCB

3
DLY'D HVON (from Dwg. #ED02016)
RFTRIG

U5

U1
3

U3:A

RF TRIG EN _

J5

TP24

,=

45

C-RF TRIG

35

1 20 5

6 11

10 10

16 23 To RF
Driver
24

43
35
33
31

J2

KLYTRIG

KLY TRIG EN 10
=>

17 --

MCHSYNC

U20:B
Selector

5
7

U4:D

21

8 15

TP13
To Modulator

U2
6

U3:6

C-KLY TRIG
3
=>

2
ZA1D
2

U5:A

16 SCOPE SYNC

22

2 13

12 16

4 180 Hz 5 U18:A 3
+2

ISYNC

2 360 Hz

U5:6

0
:>13 W11
=>
A

U10
2 MACH SYNC* 38
<1=

31
U37B

Oscilloscope
Connector on
Monitor Panel

J45

13

EN LOW PRF

CGTRIG

BEAM ON DLY

U3:C

360/180 6

21

To Gun
Driver
(See Dwg.
ED02036)

U27

27

29

TP25

CGTRIG DISABLE
=
J9
12
CGTRIG
11
-->
10 U14:C
U3:D
CG TRIG EN 13
=>
=>
0
ws B 4

BEAM ON DLY (from


Dwg. #ED02016) 1_1(36 mSec)

HVON_GDLY
1 I (230 mSec)

II

HIGH ENERGY C3 CLINAC TRIGGER PULSE


GENERATION & ROUTING SYSTEM DIAGRAM

*Notes: GANT RTSW is only used with Software Version 2.


MACH SYNC is only used with Software Versions 2 and 3.
See Sheet 1 for DID #1 PCB, Timer I/F PCB P/N 890720, Logic I/F PCB Rev. AF.
See Drawing No. ED02016 for Digital Dosimetry and Hardware Beam Control.

56

AFC TRIG

W18 A

4
3

19

RF TRIG EN

AFC Sampleand-Hold Circuit


(See PCB
Schematic
Diagram)

J2 P1

DOSE RATE SERVO GDLY

1
2
4 U35A
5

W28

F-F

CGTRIG DISABLE

CRDIO PCB

W20

PR
04

BEAM ON 1 from Control CPU via CRDIO PCB


(See Dwg. No. ED02016)

U20:A
1? Selector 12

4 PROH c
DBDSVEN

29

XD R2
=>
XDP2
=>
XDRS
=t>

31

) indicate internal programmed connections.

J2

8
=>

GDLY CONTEN
37

XDP1

33

=>
U21A
CLR

39

XD R1

35

500 pSec
U8:A 61

W9 A

43

11

"CLK

B 5
U4:6

U5:

DOSRST
45

13 U7:D

TP4

41

CGTRIG
=>
360/180

U6:C

12

GPRF
=>
RFTRIG
=>
KLYTRIG

11

TP12

50

SYNC

13

I
5-

.,CRADS2

U1

3 DOS2
=>

19

DOS2

37

13

GANT RTSW"

PROH
r>
CRADS1

41

CRADS1

U7:C

=>

DOS RST

50

12
U14:B

B14: AFC Control PCB

Dose Rate
Servo Latch

-->

21

PLSITPB

10,

23

SPARE

PLSITPB

25

CM IN

19

J1

27

MSYNC

21

(From PortalVision)-1 4

47

PLSITB50

G5

CMIN

27

2 2 XDR1

30 S4
5
G4
29 55

DOS1
=>
TIME
=>
DOSRV

47
01

B4: Timer Interface PCB P/N 1104685

W29

J1

<1=

Varian Cardrack Backplane

FOR TRAINING PURPOSES ONLY


Drawn:

Bill Kirkness

08/03

ED02015

Revised:

Bill Kirkness

01/06

Sheet 2 of 2

Rev.

57
STD Bus

Console Backplane
(Ribbon
Cables)

CRTIMER PCB

S1 U2

01 3 DOS1
0
2 2 XDR1

S2

01-4.

S2
9 G2
S3
6
G3
30
35 G4
29 S5
05

3 40 XDP1

36 G3
30 S4
35
G4
S5
G5

J1
47

38 PROH

CA (HMU1)
37

27

2
3

,66

4CRADS1

41

MCI-ISYNC
`4=
CRADS2

39

=>

37
29

.S1 U3
al.,

S2
39
02
S3
36 G3
30 S4
35 04
29 S5
G5

-; Si U1
G1
S2
.39
G2
S3
03
54
G4
,
29 S5
05

3 DOS2
2 2 XDR2
0
3 40 XDP2
=>
38 XDRS
37
66 (1-IMU2)

17

15

3 401

13
11

4 3

5 3

DOS RST

,=>

Dashed lines (

31

) indicate internal programmed connections.

37
29

<:=

3
4
5
9 U14
11
12

9
3

2
3
4
5
9 I U15

1
45
43

XDR2
0
XDP2

35
33

XDRS

2-2
=>
2-3
=>
2-5
2-6
=>
2-7

3
5

13

WD STROBE
0
BMOFFLRST
0
HW DOS OVR

15

WD ENABLE

7
11

11

10
PR

CLR

3 CLK

U9
PR

11
12
13

11
12

=>

J2

P1
CMU2
4

CMU1 1

13

DO

CLR
U22

CLK

PR

22

From Secondary
(Transverse) Ion
Chamber
C & D Plates
(See Dwg.
ED02035)

Keyboard PCB
Wi

J4

J2

MU1
=>

BEAM OFF

31

MU1 Beeper
(See PCB
Schematic
Diagram)

24
R1

BKUP RST 12
13 U32

13

=>

Monitor Panel

0
13
CLR

<1=
01

0 U32 8

9
10
12 U20
13

U28

R2
2

Modulator

+ 4V

Auxiliary P. D. PCB
U12

Watchdog
Timer

nY'
DS1-4

J24
27

DS1-3

BMOFFLRST
WD

13

P29 Backup Counter


RESET
0
LCD Display
MU1
=>

J15
BKUP CTR
RESET

\/
DS1-2 A;;
127

2
4 U20
5

61

3 U28

KHV1
=>
4 KHV2

41

W3

J1

20

20

11

(Auxiliary
Contacts)
0 0

KHV1 Fail-Safe 1 & 2


=>
Circuits (See
KHV2 System Diagram
No. 872586)

=>

43

KHV+

6 WD

4D

A2'7
/127
Kj DS2-1

75 mSec
(150 mSec
with Software
Version 2)

*Notes: Timer Interface PCB P/N 890720 is only compatible with C3 Clinacs.
See Sheet 2 for CRDIO PCB, Timer Interface PCB P/N 1104685.
See Dwg. No. ED02015 for Trigger Pulse Generation and Routing.

IOND

P1
27

Dedicated Keyboard

SYS RST
(from Comm CPU <=
via SCI PCB)

(7i

BEAM ON 1
0
BEAM ON 2

WD ENABLE

IONC

BKUP RST
=>
BMOFFLRST
,=>

11

22

J3 , From Primary
2 (Radial) Ion
Chamber
A & B Plates
(See Dwg.
ED02035)

49

9 MU1
0

U16
+100
2,16 CLR

10

WD STROBE
=>

Dose Rate
Integrator (See
PCB Schematic
Diagram)

KYB BOFF

U13
CLK PR

13 U12

IONB

27

55

J26

CLR CLK
13

DO

15

2 I-IW DS FLT
(from Input
Interface #1)

U23

EXT BOFF (from PortalVision)

5
7

11

CMU1

IONA

B16: MU2 Integrator PCB

U22

31

BEAM ON 1
BEAM ON 2
0
BKUP RST

2 DQ

KYB BOFF

11

W28

J4

F-E

Dose Rate
Integrator (See
PCB Schematic
Diagram)

HW DS OVR

12
2-0
0
2-1

P1

HV OFF
Latch

W6

=>

13

DIO #1 PCB
U20
Port 2
8-Bit
Latch

P1
J2

RV OFF

A
0

15

XDR1
=>
XDP1

29

U10

U9
11
CLK PR

NW-DS-BOFF 6

17

MCHSYNC

33

2 DO CLR

9
4D 36ILo
mSec

W20

0 28

HV ON
Latch
U8

U31

39

360/180

35

11

41

'KLYTRIG

0
CGTRIG

43

Beam-on
Delay

50

RFTRIG

45

12 CMU2

J2

KHV+

DOS2
=>
CRADS2
,(7=
'SYNC
=>
GPRF

U18

'PROH
0
CRADS1

P1

DS2-3

DOS RST

50

19

PLSITPB

PLSITPB
4

21

SPARE

CMIN

10 CMU1
DLYD_HVON (to Dwg. #ED02015)

23

CM IN

19

J1
47

25

msyniC.

21

B15: MU1 Integrator PCB


U18

27

PLSITB50

23

rs

DOSRV

25
4

B4: Timer Interface PCB P/N 890720

W29
'4'DOS1
=>
TIME

Varian Cardrack Backplane

HIGH ENERGY C3 CLINAC DIGITAL DOSIMETRY &


HARDWARE BEAM CONTROL SYSTEM DIAGRAM
Rev. A: Approved and released. B.K. 08/03
Rev. B: Revised for clarity. B.K. 01/04
Rev. C: Added Pro-Log DIO PCB. B.K. 09/04
Rev. D: Added references to Dwg. ED02035. B.K. 03/05
Rev. E: Updated. B.K. 01/06

FOR TRAINING PURPOSES ONLY


Drawn:

Bill Kirkness

08/03

ED02016

Revised:

Bill Kirkness

01/06

Sheet 1 of 2

Rev.

57

58
STD Bus

Console Backplane
(Ribbon
Cables)

CRTIMER PCB

47
,S1 U4
3 DOS1
01
ol.
S2
G2

S3
G3

03

30
35

04

G4
9 55
G5

L,si U2
01
GI...
S2
02
9
G2

2 XDR1
40 XDP1

36

S3
G3

03

30 S4
5
G4
29 S5

38 PROH
37
(HMU1)

27
25
4

23

21
19

G5

CMIN

<1=
4
.1=
4

PLSITP
-B

50
41

CRADS1
4
MCHSYNC
.1=

..S1 U3
9

G5

CRADS2
<1=

37

01 3 DOS2
>

Si
G1

2 XDR2

S2
39
02

G2

S3
36
03
30 54
5
G4
29 S5

=>

39

38 XDRS

On (HMU2)
37

29

01

17

15

U1

S3
G3

40 XDP2

<1=

13
11

- S4
35
04

221
04 . .

S5
G5

DOSRST

1
<7=

45

=5,

43

=>

35
33

Dashed lines (

) indicate internal p ogrammed connections.

31

DOS1
,
TIME
=>
DOSRV

U34

47

o.^*

27

23

MSYNC

21

I>

CMI

l>

CLR

U9:B

- 9 11

CLK

PR

1:7)

CMU1

29

CLK

B16: MU2 Integrator PCB


P1

PR

5
50

HW-DS-BOFF 6(.17A3

41

A
> I

39

DOS2

CMU2

10
PR

=KIM

Iii
IIr

15

RFTRIG
=>
KLYT RIG

13

CGTRIG
=>
360/180

9
3

MCHSYNC
<1_
XDR1
XDP1

45

4
5

43

XDR2

35

XDP2

W1

J4

CMU1 1

CLR
U22A

CLK

U17:A B
9 MU1

+100
2,16 CLR

12

BEAM OFF

oo

+24V ON
-

5
SYS RST
(from Comm CPU
via SCI PCB)

PR

24

-1
Key Switch

12
R1

BKUP RST 12
13

11
12 U13:C
13

J2
KYB BOFF
<1=
MU1 Beeper
(See PCB
Schematic
Diagram)

13

U19:D

Monitor Panel

u28:A
13
CLR

U21:B
CLK PR

DQ

33

,XDRS

Keyboard PCB
J26

13

112

Dedicated Keyboard

CLK
LK

DQ

22

49

EXT BOFF (from PortalVision)

13
913

U11

IOND

From Secondary
(Transverse) Ion
Chamber
C & D Plates
(See Dwg.
ED02035)

55

U22:6

-6

IONC

HW DS OVR
KYB BOFF

9
17

12 HW DS FLT
(from Input
U32:D 13
Interface #1)

11 11

=>

29

SYNC
=>
GPRF

U6:E

W6

37

CRADS2

4 10

Dose Rate
Integrator (See
PCB Schematic
Diagram)

P1

KHV+

DOS RST
.1=
PROH
=>
CRADS1

P11 aL From Primary


2 (Radial) Ion
27
Chamber
IONS
A & B Plates
22
(See Dwg.
ED02035)
IONA

U9:A

BEAM ON DLY (to Dwg. #ED02015)

HV OFF

Dose Rate
Integrator (See
PCB Schematic
Diagram)

J2 P1

36 mSec

PLSITPB

W20

CLR

86

10

31

Q1

U23:A

J15

(W1)

P291 Backup
RESET
=>
MU1

BKUP CTR
RESET

BKUP RST

DS2:A

75 mSec

Counter

4
LCD Display
3

12

CRDIO PCB
U2
PLCC

W28
OUT32
=>
OUT33
=.
OUT34
=5.
OUT35

3
5
7

OUT37
=>
0UT38

13

0UT39

15

11

BEAM ON 1
=>
BEAM ON 2
BKUP
RST
>
WD STROBE
BMOFFLRST
HW DOS OVR
=>
WD ENABLE
,=>

J2

U12

11

U31:C
BEAM ON 1
=>
BMOFFLRST

3
5
7

WD STROBE
=>

Watchdog
Timer

11

9
10
12 U29:B
13

15

WD ENABLE

- U37:A

6 WD
=>
7

Modulator
40------

J24
5
4

DS1:6 ikyvv
77
DS1:C

K2

W3

J1

20

20

KHV+
KHV1
=>

41

KHV2
43
=>

+5V
W15
O
A B C
DS2:B /1)'

27
KHV1

+2,4V

Auxiliary P. D. PCB

K1

13

75 mSec
(150 mSec
with Software
Version 2)
*Notes: Timer Interface PCB 1104685 is also compatible with Cl and C2 Clinacs.
Gray dashed lines (- - -) for signals BM EN 1 and BM EN 2 indicate
C1/C2 Clinac connections. See Dwg. #872586 for C3 Clinacs.
See Sheet 1 for DIO #1 PCB, Timer I/F PCB P/N 890720.
- -

BEAM ON 2

DS1:D
+5V A B Co

BMOFFLRST

11

58

J2

28

HV OFF
Latch

P1

DS2-C /1;t;
p

U813

U36:A

19

=>
SPARE

U24
42 CMU1
(t1
DLYD_HVON (to Dwg. #ED02015)
2 CMU2

Beam on
Delay

25

'PLSITB50

B15: MU1 Integrator PCB

164: Timer Interface PCB P/N 1104685

W29

J1

Varian Cardrack Backplane

11

(Auxiliary
Contacts)
0

Fail-Safe 1 & 2
Circuits (See
System Diagram
No. 872586)

42
6
5

<1=

HIGH ENERGY C3 CLINAC DIGITAL DOSIMETRY &


HARDWARE BEAM CONTROL SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:

Bill Kirkness

08/03

ED02016

Revised:

Bill Kirkness

01/06

Sheet 2 of 2

Rev.

59

LOCAL PENDANT
CONNECTOR
J1

J22
(Quick-Disconnect)

KLYFIL1

N.C. 1

LIFTAMP

K12-4 (4E2)

EQUIPGND

EQUIP (1G10)

LIFTSHLD

J4-3 (4D2)

LOCPNRX+ 4 S5A-6 (3132)

EMOFF6

J36-33 (468)

GMOTSHLD

J43-3 (4F2)

LOCPNRX-- 5 S5A-9 (362)

EMOFFO

CR25 (4C2)

GMOTAMP

K9-7 (4F3)

CABLE HARNESS W26b


TO COUCH J27
J2
EQUIPGND

EQUIP (1D2)

6
7

J36-36 (4F10)

GMOTAMP+

K9-9 (4F3)

100V

R48,49 (3G6)

FILPWR2

J36-37 (2F10)

100VRET

U16,Q9 (3F4,3)

REGCOM

J23-13 (4G10)

SHUNTRES

09 (3F3)

FANPWRA

10

J16-1 (4E7)

70V0A

10

J25-6 (4E10)

FANPWRC

11

J16-3 (4E7)

70V013

11

J25-7 (4E10)

PVGANTEN

N.C.

12

70VOC

12

J25-8 (4E10)

LGGANTEN

U6-35 (2F9)

BATT+

13

RT3 (462)

PVCOLLOK

J23-4 (4C7)

J25-4,5 (1F11)

LGCOLLOK

U6-43 (2F9)

LGSTAT1

J30-23 (4C7)

CABLE W133
TO LASERGUARD CONTROL PCB J1
J8
J23-2 (4C7)

LIFTBRK+

Q3 (2D1)

K11-4 (4D4)

PROTBRK+

02 (2D3)

027R

14

LATBRK+

07 (2C3)

KEY

15

LATCLU+

06 (2C3)

LGSTAT2

J30-24 (4C7)

J30-25 (4C7)

LONGCLU+

05 (2C3)

LGCTRL1

5VISOL

R63 (4D7)

LGCTRL2

J30-26 (4C7)

+24V

J33-25,29,49 (1E11)

N.C.

10

N.C.

(See Sheet 2 for Rear View)

N.C.

10

J14

KEY
FILPWR1

PLONBRK+

Back-Connected Stand Mother PCB, Front View

J21

LIFTAMP+ - 1 K12-6 (4E2)

J36-19 (4A11)

N.C. 1

J15

J36-18 (4A11)
2

N.C.

Note: J7 is not used.

CABLE HARNESS W2
TO CATCHALL PANEL J1
J5

KLYFIL2

LOCPNDM 2 S5A-3 (3B2)

J1

CABLE W18
TO AUX POWER 01ST J6
J3

CABLE HARNESS W26c


TO COUCH J27
J4

LIFTLMUP

11

U7-13 (369)

LIFT+

LIFTLMDN

12

U7-9 (369)

LIFT-- 2 K12-7 (4E2)

K12-9 (4E2)

CABLE HARNESS W1
TO CATCHALL PANEL Al, A2
J6

EQUIP

11

EQUIP (4C7)

DCCOM

12

DCCOM (4C7)

N.C.

13

N.C.

14

GMOTC 1- U21-8 (307)


AGND -2- J33-27,28 (1011)

EMOFF4

13

J36-32 (468)

LFEXRGIL

14

J30-50 (4E10)

027R

15

J25-4,5 (1F11)

PLIFTC

J43-2 (4F2)

N.C.

15

027R

16

J25-4,5 (1F11)

AGND

J33-27,28 (1011)

N.C.

16

KEY

17

SDLIFT

U5-11 (4G2)

N.C.

17

LAMP24

18

W2 (1G8)

SDGANT

U5-10 (4G2)

N.C.

18

PLAT+

19

J10-8 (4E10)

GNTTACH+

TP7 (4G9)

N.C.

19

PLAT

20

J10-7 (4D10)

GNTTACH

10

TP5 (4G9)

N.C.

20

PLONG+

21

J10-6 (4D10)

AGND

11

J33-27,28 (1011)

N.C.

21

PLONG

22

J10-5 (4010)

AGND

12

J33-27,28 (1011)

N.C.

22

PROT+

23

J10-4 (4E10)

LFTTACH+

13

TP14 (4C9)

N.C.

23

LFTTACH

14

TP13 (4C9)

N.C.

24

AGND

15

J33-27,28 (1011)

N.C.

25

PROT

24

J10-3 (4E10)

EMOFF2

25

J9-3 (4E10)

LIFTSHLD 3 J5-3 (405)

GMOTI -3- J4-3 (4D2)


LIFT! -4- J43-3 (4F2)

HIGH ENERGY C3 CLINACS


STAND MOTHER PCB CONNECTORS

J17

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 10/05

Revised:

Bill Kirkness

10/05

ED02042
Sheet 1 of 4

Rev.

A
59

60

CABLE W64
TO AUX ELECTRONICS 5A20
J9
BATT+

000 3
J4

UOU
000
000
000
000
J43

D000
0000
D000
J41

D0000
00000
D0000

DOO
000
DOO

J5

J9

D0000
00000I
D0000

DOO
E 000
DOO
J18

J25

CABLE HARNESS W4 CATCH-ALL PANEL


TO A3, L1 (BEAMSTOPPER CONTROLLER)
J11

CABLE HARNESS W3
TO CATCH-ALL PANEL PS1:TB1, TB2
J13

013-2 (4C4)

BMSTPWR1 1 K16-8 (2F5)

EQUIPGND
1 EQUIP (1C2)

EMOFF1

J30-18,34 (4E10)

BMSTPWR2 2 K16-7 (2F5)

EMOFF2

J2-25 (4E9)

RETBMSTP 3 F4 (1D4)

EMBATT+

K15-6 (4E4)

EXTBMSTP 4 F5 (1C4)

KEY 2
_
SPARE 3
_
CONTPWR1SW 4 S4A-1 (1F10)

KEY

CONTPWR1

F8 (1F10)

CONTPWR2

CONTPWR2 (4G9)

BMSTPRA1 5 J41-8 (4E8)


ACCOM 6 ACCOM (1C3)
KEY 7

LGND 5 L (169)

CONTPWRB

J25-11 (4E10)

EQUIPGND 8 EQUIP (1D1)

LGND 8 L(1B9)

CONTPWRA

J25-10 (4E10)

EQUIPGND 9 EQUIP (1D1)

12VPS 9 12VPS (1C8)

DOG
000
DOO

J23

D0000
00000
D0000

J13

J12

CABLE W68
TO AUX ELECTRONICS J31
J10

J33

ACCOM

ACCOM (4E6)

SW5V

EQUIP

EQUIP (1D1)

LGND

PROT

J2-24 (4E9)

+24V

J2-23 (4E9)

DCCOM

J2-22 (4D9)

+12V

PROT+

J6

CABLE W67
TO AUX ELECTRONICS J29
J12

PLONG

PLONG+

J2-21 (4D9)

12V

PLAT

J2-20 (4D9)

LGND
12 VON
L005V

PLAT+

J2-19 (4E9)

MLCPWR2

CONTPWRB (4E6)

MLCPWR2

10

CONTPWRB (4E6)

ACCOM

11

ACCOM (4E6)

K13-10 (2F4)
L (1E1)
+24V (1G2)
DCCOM (1C1)

J16

J30

J10
J8
J205

J40

J37-11 (4F8)

TDRVBCD8

J37-12 (4F8)

COUCHEN1

U9-12 (3D2)

CMOTEN1

U9-18 (3E2)

VKSOL+

J36-7 (4A8)

VKSOL

10

J36-8 (4A8)

ILFLOW3

11

J36-6 (4A8)

COUCH_DYNBRK

12

U5-14 (3C6)

COLL_DYNBRK

13

U5-15 (3C6)

PNDSPEN1

14

K13-11,12 (2F4)

COLS WOK

15

U15-16 (2A4)

0003

II

000
000
000
000
Li

EQUIP

12

EQUIP (4E6)

RNGFNPWR

13

F2 (1D4)

FLDLTPWR

14

F1 (1E4)

ACCOM

15

ACCOM (1D3)

PSAS WOK

16

U15-13 (2E2)

RLMPCRLY

17

RN15-2 (2E10)

LATMOTEN (RES)

18

N.C.

LONGMOTEN (RES)

19

N.C.

COLMOTEN (RES)

20

N.C.

GANTPSNR

21

J33-31, J43-9 (4G10)

LIFTPSNR

22

J39-2 (408)

LATPSNR

23

J39-4 (4D8)

+12V (1G1)

LONGPSNR

24

J39-21 (4D8)

12V(1B1)

PROTPSNR

25

J39-23 (4C8)

L(1E1)

LATTACH +

26

W3-1 (4C9)

12VON (162)

LATTACH

27

J39-24 (4C8)

L005V (1G1)

24V_ON

28

N.C.

J39
J37

J37-9 (4F8)
J37-10 (4F8)

AUX-12V- 12 J12-14 (4E8)

D000
100001
D000

DS13 (165)

LGND 11 L(1B9)

(See Sheet 1 for Front View)

DS9 (105)

ACCOM 7 ACCOM(1C1)

AUX+12V 10 J12-13(4E8)

Back-Connected Stand Mother PCB, Rear View

TDRVMOTC 1

TDRVAIRC 2

TDRVBCD1 3

TDRVBCD2 4

TDRVBCD4 5

L005V 6 L005V (1C9)

J11

CABLE W65
TO AUX ELECTRONICS J27
J14
(Fron )

LGND

10

L(1E1)

HW_RESET

29

RN15-4 (2E10)

LOC12V

11

LOC12V (1G1)

RESETLMP

30

K14-9 (2G2)

KEY

12

AUX-F12V

13

AUX-12V
EQUIPGND

LONGTACH +

31

J39-19 (4C8)

J13-10 (4F10)

LONGTACH

32

J39-37 (4C8)

14

J13-12 (4F10)

GDISPTX+

33

J30-37 (4D10)

15

EQUIP (1G10)

GDISPTX-

34

J30-38 (4D10)

J3
J2

J36

HIGH ENERGY C3 CLINACS


STAND MOTHER PCB CONNECTORS

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 10/05

60

Revised:

Bill Kirkness

10/05

ED02042
Sheet 2 of 4

Rev.

61
EXTERNAL DOSIMETER
(FOR CDOS INTERLOCK)
J15
(Fron )
ILCDOS
12VON

J30-41 (4D10)

12VON (162)

N.C.
N.C.
N.C.

CABLE W9
TO CONSOLE J20
J30

N.C.

1
2

K15-A (4E4)

N.C.

3
4

N.C. 26

N.C. 27

N.C. 28

N.C. 29

LONGBRKC

N.C.

CABLE W62
TO EMERGENCY PENDANT
J21
LIFTEMER

N.C.

CABLE W9
TO CONSOLE J20
J30

Note: J19,20, 24, 26-29, 31, 32 are not used.

CABLE W10
TO CONSOLE J23
J33

CABLE W10
TO CONSOLE J23
J33

RN14-4 (2C10)

DCCOM

26

DCCOM (1D7)

RN14-3 (2C10)

AGND

27

A(1D10)

LATBRKC

RN14-8 (2C10)

AGND

28

A(1D10)

LATCLUC

RN14-5 (2C10)

+24V

29

+24V (1E10)

LONGCLUC

EMPLONBK

K11-1 (4D4)

N.C.

EMBATT+

K11-16 (4D4)
K15-6 (4E4)

N.C.

N.C.

30

PROTBRKC

RN15-5 (2E10)

DCCOM

30

DCCOM (1D7)

DCCOM

DCCOM (1C2)

N.C.

N.C.

31

FLDLTC

DS1 (1E5)

GANTPSNR

31

J43-9 (4G8)

KEY

1ARX+PN1

J39-13 (468)

N.C.

32

RNGFNDRC

DS2 (1D5)

PROTPOSN

32

J39-22 (4C8)

LOGIC GND

L (1E2)

1ARXPN1

J39-14 (468)

WTRTEMP

33

J36-26 (4A8)

BAKPNTRC

DS3 (1D5)

PSAPRO

33

J39-6 (4C8)

EQUIP GND

EQUIP (1D2)

16 RX+LSP

J39-28 (458)

EMOFF1

34

J9-2 (4E9)

BMSTEXTC

DS6 (105)

COLLMOTEN

34

RN14-1 (1D10)

1BRXLSP

10

J39-29 (468)

RSPNLDM

35

J39-30 (4138)

BMSTRETC

10

DS4 (105)

N.C.

35

J39-31 (4138)

GANTC

11

U20-2 (3D10)

N.C.

36

12

4
5
6

CABLE W25
TO STAND FANS
J16

N.C.

COLL27 (TEST)

010-3 (3D3)

2ARX+RSP

11

J39-11 (4D8)

LSPNLDM

36

FANPWRA 1 J3-10 (4E7)

DCCOM (SHLD)

10

DCCOM (1C1)

2ARXRSP

12

J39-12 (4D8)

GDISPTX+

37

J14-33 (4D8)

LIFTC

U29-10 (3A9)

+15V

37

+15V (1D10)

CMOTEN1 (TEST)

11

U9-16 (3E2)

2BRX+PN2

13

S5-5 (362)

GDISPTX

38

J14-34 (4D8)

G_PRO+

13

J43-6 (4G8)

15V

38

15V (1C10)

N.C.

12

2BRXPN2

14

S5-8 (262)

STEP2SEN

39

N.C. (LO-E)

G_PRO-

14

J43-7 (4G8)

GANTPOSN

39

J43-8 (4G8)

PEND1DM

15

J39-15 (468)

LOWVVTLVL

40

J36-24 (4A8)

+12V

15

+12V (1C9)

LIFTPOSN

40

J39-1 (4G8)

PEND2DM

16

S5-2 (362)

ILCDOS

41

J15-1 (4D8)

WTRTEMP+

17

J36-25 (4A8)

100 VON

42

U10-18 (2G6)

EMOFF1

18

J9-2 (4E9)

MODARFDR

43

EQUIPGND

19

EQUIP (1G10)

KHV+

44

KEY

20

N.C.

PN/DSPEN

45

ILPEND

21

W4-2 (469)

ILDSARM

46

EQUIPGND 2 EQUIP (4E7)


FANPWRC- 3 J3-11 (4E7)

TO AIR COMPRESSOR
(OPTIONAL)
J17
(Front)

CABLE W112 TO X414 TO W503


TO PORTALVISION X503
J23
5VISOL
PVGANTEN

1
2

R63 (4D7)

5VISOL

R63 (4D7)

PVCOLLOK

J8-3 (4D7)

EQUIPGND 2 EQUIP (1D2)


COMPPWR- 3 J36-16 (1F1)

CABLE W66
AUX ELECTRONICS J28
J18
+27V (N.C.) 1- J25-2,3 (1F11)
027R (N.C.) -2- J25-4,5 (1F11)

COLLCONTACT1

K14-4 (2G2)

COLLCONTACT2

K14-8 (2G2)

N.C.

N.C.

CONTPWR1

GNTMOTEN

18

RN14-7 (2C10)

J36-10 (4A8)

ADDSPARE

19

N.C.

U15-8 (2611)

ADDREF

20

J23-19 (4A8)

PSBMMOEN

21

41

J39-2 (4G8)

42

J39-20 (4G8)

GMOTI

43

R77 (3G8)

LIFT!

44

R78 (3F8)

N.C.

+12V

45

+12V (1C9)

RN14-2 (2D10)

LGND

46

L (169)

22

IL FLOW

47

J36-5 (4A8)

N.C.

22

12VON

47

12VON (11310)

ILGAS

48

J39-4 (4D8)

KEY

23

12V

48

12V (11310)

N.C.

24

!LAIR

49

J36-2 (4A8)

EQUIPGND

24

EQUIP (1G10)

N.C.

25

LFEXRGIL

50

J2-14 (4E8)

+24V

25

+24V (1E10)

+24V

49

+24V (1E10)

DCCOM

50

DCCOM (1D7)

CABLE W75
TO STAND TRANSFORMER ASSY
J25

10

J36-15 (1F1)

EQUIPGND 1 EQUIP (1010)

11

ACCOM (1C2)

+27V

EQUIP (1C2)

+27V

VR1 (1G9)

+27V -4- J25-2,3 (1F11)

N.C.

13

027R

027R (1F9)

027R -5- J25-4,5 (1F11)

N.C.

14

027R

027R (1F9)

N.C.

15

70V0A

J5-10 (4E8)

VR1 (1G9)

COUCH27

011-3 (3C3)

N.C.

16

70VOB

J5-11 (4E8)

027R

J25-4,5 (1F11)

N.C.

17

70VOC

J5-12 (4E8)

027R

J25-4,5 (1F11)

EQUIPGND I 1 I EQUIP (1D2)

J36-28 (4A8)

LATPOSN
LONG POSN

23

12

EQUIPMENT GROUND
(Quick-Disconnect)
J22
(Front)

J39-5 (4C8)

N.C.

ACCOM

COLL27 -6- 010-3 (3D3)

L (169)

N.C.

EQUIPGND

KEY -3-

16
17

J8-1 (4C6)

ACCOM 1 ACCOM (1C2)

N.C.

LGND
PSAPRO+

N.C.

18

KEY

ILDSARM

19

CONTPWRA

10

J9-9 (4E8)

N.C.

20

CONTPWRA ^ 11

J9-9 (4E8)

N.C.

21

ACCOM

12

J41-2,9 (4F8)

N.C.

22

COUCH27

13

011-3 (3C4)

N.C.

23

SPARE

14

N.C.

24

EQUIPGND

15

HIGH ENERGY C3 CLINACS


STAND MOTHER PCB CONNECTORS

FOR TRAINING PURPOSES ONLY


Drawn:

EQUIP (1G10)
Rev. A: Approved and released: B.K. 10/05

Revised:

Bill Kirkness

10/05

ED02042
Sheet 3 of 4

Rev.

A
61

62
CABLE HARNESS W27
(SEE STAND WIRING DIAGRAM)
J36

CABLE HARNESS W45


TO TEE DRIVE (IF PRESENT)
J37

-12V ON 1- -12VON (162)

TDRVMOT

F6 (164)

ILGAS -2- J30-48 (4A10)

TDRVAIR

F7 (164)

-12V ON -3- -12VON (162)

N.C.

!LAIR -4-J30-49 (41310)

CABLE HARNESS W26a


TO COUCH J39
J39
LI FTPOSN - 1 J33-40 (4D10)

LIFTPSNR 2 J14-22 (4D10)

LATPOSN 3 J33-41 (4D10)

SPECIAL TEST JACK


J40
SO 1- S3-1 (2610)

GMOTAMP- 2 K9-7 (4F3)


GMOTSHLD 3 J5-4 (4F5)

KEY 4

ACCOM

ACCOM (1133)

LATPSNR

J14-23 (4D10)

S3 -4-- S3-6 (21310)

EQUIPGND

EQUIP (1C2)

PSAPRO+

J33-17 (4C10)

S4 -5- S2-3 (2A9)

ILFLOW3

J14-11 (4A10)

COUCHEN1 (TEST)

U9-12 (3D2)

PSAPRO-

J33-33 (4C10)

S5

S2-1 (2A9)

VKSOL+

J14-9 (4A10)

KEY

SW12V

K13-9,10 (2F4)

PWR_CHK

U2-36 (269)

VKSOL-

J14-10 (4A10)

LGND

L (1E2)

LGND

L (1E2)

100V_RST

51 (1A9)

AGND

A (1D2)

TDRVBCD1-

J13-3 (4F10)

-12VON

-12VON (162)

EXTRA_CLSN

RN2-11 (1F10)

KHV+

10

J30-44 (1A10)

TDRVBCD2-

10

J13-4(4F10)

LGND

10

L (1E2)

I/0 STATE OUT

10

U2-26 (1F8)

+24V

11

+24V (1G2)

TDRVBCD4-

11

J13-35 (4F10)

2ARX+RSP

11

J30-11 (4D10)

PSAS WOK

11

U15-13(1E2)

GANLMCW

12

RN2-9 (2E10)

TDRVBCD8-

12

J13-6 (4F10)

2ARX-RSP

12

J30-12 (4D10)

N.C.

12

GANLMCCW

13

RN2-8 (2E10)

lARX+PN1

13

J30-7 (41310)

COLLSWOK

13

EQUIPGND

14

EQUIP (1C2)

1ARX-PN1

14

J30-8 (41310)

N.C.

14

CONTPWR1

15

CONTPWR1 (1F1)

COMPPWR

16

J17-3 (1F1)

EQUIPGND

17

EQUIP (1C2)

KLYFIL1

18

J3-1 (4A11)

U15-16 (1A3)

PEND1DM

15

J30-15 (4138)

PEND2DM

16

S5-2 (3[32)

N.C.

17

EQUIPGND

18

EQUIP (1C2)

CABLE W59
TO GANTRY PATCH PANEL J5
J41

19

J3-2 (4A11)

LONGTACH+

19

J14-31 (4C10)

CONTPWRB 1 J25-11 (4E10)

+24V

20

+24V (1G2)

LONGPOSN

20

J33-42 (4D10)

ACCOM 2 J25-12 (4F10)

DCCOM

21

DCCOM (1C2)

KEY

22

LONGPSNR

21

J14-24 (4D10)

BKPNTPWR 3 F3 (1D4)

PROTPOSN

22

J33-32 (4D10)

BMSTPRDM 4 K16-9 (2G5)

J14-25 (4D10)

+24V

23

+24V (1G2)

PROTPSNR

23

LOW WTLVL

24

J30-40 (4A10)

AGND

24

A (1D2)

EQUIPGND

EQUIP (1C2)

WTRTEMP+

25

J30-17 (4A10)

ILPEND

25

W4-1 (4139)

DCCOM

DCCOM (1C2)

WTRTEMP-

26

J30-33 (4A10)

2BRX+P2

26

S5-5 (362)

BMSTPRA1

J11-5 (4E10)

AGND

27

A (1D2)

2BRX-P2

27

S5-8 (362)

ACCOM

J25-12 (4F10)

MODARFDR

28

J30-43 (4A10)

1BRX+LSP

28

J30-9 (4610)

N.C.

10

DCCOM

29

DCCOM (1C2)

1BRX-LSP

29

J30-10 (4610)

N.C.

11

EQUIPGND

30

EQUIP (1C2)

RSPNLDM

30

J30-35 (41310)

N.C.

12

5VISOL

31

R64 (4D7)

LSPNLDM

31

J30-36 (462)

EMOFF4

32

J2-13 (4611)

LGND

32

L (1E2)

EMOFF6

33

J3-4 (41311)

LGND

33

L (1E2)

KEY

34

LFTTACH+

35

U5-14 (368)

N.C.

34
35

U5-14 (368)

GFILPWR1

36

J3-7 (4F10)

LFTTACH-

36

J6-13 (4C10)

GFILPWR2

37

J3-8 (4F10)

ROTTACH-

37

J6-14 (4C10)

DC12V 1 VR1 (1E9)


N.C. 2
AGND 3 A(1D2)
GANTPOSN 4 J43-8 (4G8)

AGND

A (1D2)

N.C. 5

GPRO+

J33-13 (4G10)

N.C. 6

GPRO-

J33-14 (4G10)

GANTPOSN

J33-39 (4G10)

GANTPSNR

J33-31 (4G10)

AGND

10

A (1D2)

GNTTACH+

11

J6-9 (4G10)

GNTTACH-

12

J6-10 (4G10)

N.C.

13

N.C.

14

EQUIPGND

15

DCCOM 7

KEY

DCCOM(1C2)

N.C. 8 J33-39(4G10)
24V 9 +24V (1G2)
GANTMOTEN 10 J33-18(2C11)
KEY 11
GANT_I/L 7 12 RN2-12 (2F9)

DCCOM

EQUIP (1D2)

GANT_I/L

KLYFIL2

COUCH_DYNBRK

CABLE W60
TO MOVING FLOOR CONTROL BOX J202
J205

1 K9-9 (4F3)

Si -2-S3-4 (21310)

J30-47 (4A10)

Note: J34,35, 38, 42 are not used.

GMOTAMP+

S2 -3- S3-3 (21310)

ILFLOW

CABLE W78
TO GANTRY ROTATION DRIVE J1
J43

CABLE W125
MOTION DISABLE PANEL Si ,S2
(SILHOUETTE ONLY)

HIGH ENERGY 03 CLINACS


STAND MOTHER PCB CONNECTORS

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 10/05

62

Revised:

Bill Kirkness

10/05

ED02042
Sheet 4 of 4

Rev.

63

Collimator

ModulatorCabinet

Console
DIO #1 (or
CRD101 PC

B3: Output Interface PCB 883830

J1 (or J5'.

W25

+24V

(PCB 100012755 uses different drivers.


Refer to Schematic Diagram.)

(Ribbon
Cables)

J24

29

V,V3

11

11

3 (1770 No1--'6 .1H->-1


12
--1
- LASER CONT

10

10

P19 J19
4

+24V
=>

RM LT CONT
=I>

U29
6

RT1

29
31

U20

J8

31

J3 U1 U10
17 3
i0,.9 3
=").

Field Light

Auxiliary Power Distribution PCB

Console Backplane

STD Bus

1 1

22

5'00 9

Pi

FT

11

ROOM LIGHTS
12

El

Rangefinder

=".>

P20 J20

Customer Terminal Strip (TB2)

El

22

64

2
3-3

Note: For external relay power,


remove jumper and connect
external power source to TB2-2.

To customer room light and laser control relays.


(See Databook Customer Connection Diagram)

Gantry

Stand

*In 1996, the


D10#0 and
D10#1 PCB's
were replaced
by the CRDIO
PCB.

Auxiliary
Electronics
Backplane

Stand Mother PCB


(Back-connected)

Collimator
Patch Panel
ACCOM1

CONTPWR1SW DC12
J10

W68

J31

J49

W14b

J13

J15

12 11 14 13

Ji

J1
4

4 4 4 4

3
J3 (or Jt
1

J23

U16
11_1_ A. La

W10

FLD LT CONT

YAV

4
U11

.z'gr>3

DS2
141

RNGFNDRCONT

13

J2

2
CR14

CR13

13

Collimator Distribution Panel


2

BK PTR CONT

II

DS3

Gantry
Patch Panel

3
2

F3

J41

W59

J5

Backpointer
Laser

HIGH ENERGY 03 CLINACS


LIGHTS & LASERS CONTROL SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Rev. E: Redrawn with CorelD raw. B.K. 02/03
Rev. F: Correction: DIO PCB's are in STD Bus, not Console
Backplane. B.K. 07/03
Rev. G: Updated for new Output I/F PCB. B.K. 01/06

Drawn:

Bill Kirkness

12/00

ED02005

Revised:

Bill Kirkness

01/06

Sheet 1 of 1

Rev.

63

64

Lrx1
H

tx x cc cc ce tx x tz =

a a a a e a -.... a a

E i ii E E Ec- E iE ii cc

a. a, a a. a a a. ar a

DOSE RATE

11111

PGt! A i71{3
A :P -P --7-1 r, fr- tc.AL I FA"./.711-AGNA1
11 .FNNF
UUNNOOR
OF NNUU
OCIMN GC NN
NNGGSS
VIC R TR TR T MI LC
IR 1212 RT
RGsT

NN

200

409

N
CL

X2

600

2
s

X1

0-

CD

IQ

LoX

B12

II
N aEc
' i`. P

cE

B13
'a: a _ E tir c7) a _

E: E

STAND MON A

, ,

E2

Jtl

STAND MON B

SPARE MON A

0..

CL 0. 0-

' Logic interface

Fault Signal Condition

B14

AVCR AFC Control

a_

. .

B15

Sym. Mon. &


Dose Rate Int. (Rad)
Sym. Mon. &
Dose Rate Int. (Trans)

E4
_
z

E5
>Lc) >
" ,.
,,
+

E6 (rare)

04z

DS 1
NO MODE

Spare

4
csi

E318

Symmetry / Excess Q/ Pulse I/L

(7)

0000
@

0000
C?'.1
-' . N
+
>' +
g0

B19

Beam Position Servo (Rad)

B20

Beam Position Servo (Trans)

0 2
Z 0
(..)
-I 0

(.9

B21

PFN Servo

re E

00

00

01

(SRS 6X )
(HDTSe 6e r e

'7

B17

EERRECT_o_
'2
-

,t

2E

E- E

9r

fr, a

re rAk,

..i

Ti'

urr

(1)3 7- ,2 Et! a! 6: CI! R

Ey
Lr-

/-- 1.@

e I

CO

I II I

2E

I'
.

la 2 A 2 '2 's' .- cci E)

000000

(.7

rEf

0 0

ammo* r--1 I*

TC71

SYNC KLY KLY FWD LD


LD TARG PFN REFL GUN HVPS CLIPPER RF DR AFC AFC
V
I
PWR PWR1 PWR2 I
V PWR
I
I
I
PWR
B
A

AFC

.g..

Zr

f....
m
--, ---

01 NI.

el

N e-

CI d' CI N t-

LLH
.i,

,:.

FI- 1-

FREQ CONT
MANUAL EXT

. ON
0. EXT
OFF

HIGH ENERGY C3 CLINACS


VARIAN CARDRACK LAYOUT

FOR TRAINING PURPOSES ONLY


Power Keysw

Backup MU Counter

Drawn:
Revised:

64

Gino den R dder

Rev.

12/10
Sheet 1 of 1

65
Accessory LEDs:

CARROUSEL, MODE & BMAG BOARD


P/N: 890470
SCHEM: 890471

DS1 EA Available
052 TC Available
0S3 AM Available
054 IM Available
054 HW Status
DS6 TG Status

DS1 0S2 DS3 DS4 DS5 DS6

X A7-P2

CI VOCCIO
g
DO CLIOODI

LED STATUS DISPLAX

1,10gClOg
RESET

PWM PCB LEDs


NED LEDS
LED1, LE62, LE03:
ON - FAULT in effect
FLASHING - FAULT self cleared
STROBE (LED1 only) -In TEST mode or PWR Supply
Fault Active at powerup.

LED 1

Oct

LED 1

ITS I

LED 2

OS7

LED 2

0S7

LED 3

0S3

LED 3

053

Bun.
T.

054

Any.
T.

O54

CHI

CH7

Any
R.

OSS

Bun.
R.

1:10 (2g170g

CDI

CH I

056
CH2
1,57

LED1 ; AID Error


Thermal Flag
see STROBE above

Coll.
Rtn.

CH3

PSA.
Rtn.

CHit

X1

CCW
CW

Open

Y1

Close

CONTROL POWER

Open

Et]
(7E1

CH4
Close

PWM

PWM

Accessory
Controller

X Al

X A3

X A5

rIT'S

sill
cE:1

ko

Iris

lII

SOL VI

Witr<SOL II

mo -SWAG

Si DOES NOT
DE-ENERGIZE ALL
OF THE LOW VOLTAGE
POWER SUPPLIES
STILL PRESENT: +27VDC
+ 15VDC, +12VDC, +24VDC

S1

To adjust KSOL Current interlock:


1. Verify that the current level on the front of the Klystron PS matches the nameplate on
the Klystron (typically 35A)
2, Using SUM in mV scale
a. Measure the voltage bet-Wean THT1 and TPi
3. Adjust poi Wi (itCOU) for 011da

Trim; - If enabled, two LEDs should be ON


Carrousel Motor;

ON

KSOL Interlock Setup


To adjust KSOL Voltage Interlock:
1. \terrify Mat the current level on the front of the Klystron PS matches the nameplate
on the Klystron (typically 35A).
a. If not, adjust by using the Current pot on the front of the power supply.
2. Walt at least 10 to 15 minutes until system temperature stabilizes
3. Using DOM In mV scale
a. Maestri:a the yoitage between
and TP5
4. Adlust pot RS ouslai.y3 tor 0Vdc.

NMI

CCW

TP12C

GREEN LErK
Bunchers, Position, Angles;
- Two LEDs should be ON for each coil

NOTE:

cE]

LED2 ; Power Supply Fault


LED3 ; (XAi, XA2, XA3, XA4) Slot Revision Code Error
(XA2, XA3, XA4) Energy on Trim Code Error
(XA1) PSA SWOK or COLSWOK error

Select desired display using OPTION switch (63)


0: LED DISPLAY = error coda;
1: LED DISPLAY = CONFIGURATION STUFF
2: LED DISPLAY = CARR POSITION BYTE (Ill board)
3: LED DISPLAY = TARGET FEEDBACK BYTE OF board)
4: LED DISPLAY = SWITCHES and STUFF
5:LED DISPLAY = EPROM CONFIG A 68HC11F1 CONFIG REGISTER
6: LED DISPLAY = pwm, command motor drive
7: LED DISPLAY = INTERLOCKS gO 00/5000
8: LED DISPLAY = Solenoid control BOON
9: LED DISPLAY 0 TDRIVE BYTE
A: LED DISPLAY = MOST SIGNIFICANT BYTE OF CARR POSITION
0:6 LEAST SIGNIFICANT bits from AID
C: ENGINEERING DATA
0c TYPE FOGA It122)
E: mob of EPROM CHECKSUM
F: ish of EPROM CHECKSUM

O FF

KSOL Interlock

- Both LEDs normally OFF


- Both LEDs ON when motor is enabled with a zero
velocity command

Current (1). change of + 1%


Voltage (V). chnage of r.,5%

TEST: adjust KSOL P.S. CURRENT 2ot 0.5A Up & Down. Check KSOL UL

IRMO Interlock Setup

- One LED gets brighter and other gets


dimmer as the velocity increases

BCD I Mode i
7

Other Motors;

0
2
1
3
4
5
6
7
8
9*

-Both LEDs normally OFF


-Both LEDs ON dim when that "group is enabled
-One LED ON when velocity command is given,

51 RESET

1 SESET

dim at slow speed, bright at full speed


4

LED 1

LED 1

O51

LED 2

LED 2

052

LED 3

LED 3

053

Pos.
T.

CHI

Pos.
R.

O56
CH2
DS,

PSA.
Lat.

Right
aft

054

Trim.

lose

I
_
Ito Mode
Low X
45. 65, 85
NIX 105, 155, 185, 205
El
4e, 6e
Note
Et
E3
9e, 12a
E4
12e, 15e, 16e
05
:13e,16e. 12e, 20e
El
j lie, 20e, 22e
SOS '
65

CBI

Programming pot Interlock poi for current


(TP4 TP6)
ITP8 - TP9)
NA
N/A
R22
R76
R23
077
021
075
620
074
ilrl
673
018
072
Rl7
071
616
R70
215
020
to
energy2, 0
change mode

MOVING FLOOR

To set the Current Interlock:


1. Using DVM in mV scale.
a. Adiust the appropriate energy current interlock pot (Pee laMe above) for a null
between 06 and TP13

CHI

055

Car.
Mot.

24

0S6

To set the Voltage Interlock:


1. Select 12e
2. Allow BMAG to warm up far 18 minutes
3. Using [WM to mlf scale,
a. Adlust R9 (1181AGV)ror a nun betwean(qand

CH)
1157

PSA.
Lng.

['RV
TARG
FOIL
E-SW
5501.
SNAG

In
C111
Out
Open

pen

Y2

Energy

X2

BMAG Interlock
Current (I)= change of 1%
Voltage (V). change of 5%

Nouns; ON
triteness orr

SNAG Shunt Monitoring al -a;13

HIGH ENERGY C3 CLINACS


03 AUXILIARY ELECTRONICS

Close

PWM

PWM

X A2

X A4

EMAG IL
& VEO
Controller

Carrousel
MODE,
& BMAG

X A6

X A7-P1

T An% URPOSES NLY


Drawn:
Revised:

Gino den Ridder

12/10

Rev.
Sheet 1 of 2

A
65

66

Select desired display using OPTION switch (S3)

0.

LED STATUS DISPLAY.


3:
LED DISPLAY = TARGET FEEDBACK BYTE:(I/F BOARD1

LED DISPLAY = error code:


00: no errors
1: EPROM failure: Bad EPROM.
2: RAM failure: Replace the 68HC11.
3: Voltage at input of the A/D is too high. (2500C only)
4: Voltage at input of the A/D is too low. (2500C only)
5: ILLEGAL OPCODE TRAP.
6: External RAM failure (U13)
8: Carrousel not calibrated.
9: Configuration mismatch between Backplane and I/F board.
OA: Configuration not supported by installed EPROM.
OB: Watchdog timer timed out
10: Bad MODE switch.
21: Configuration Frequency is being checked.
25: Backelane not configured.
26: The frequency of Config1 is too high (above 125Khz)
27: The frequency on Config1 is too low.
28: The frequency on Config2 is too high.
29: The frequency on Config2 is too low.
2A: Config1 and Config2 are not in agreement.
2B: The TYPE FPGA (U22), didn't return 1,2, or 3 for address "0"
2C: The TYPE FPGA (U22) has an illegal config. for an old board.
2D: The TYPE FPGA (U22) does not agree with itself (old pal confiict).
2E: TYPE FPGA (U22) should retum 2 for address "0" but didn't
2F: TYPE FPGA (U22) should return "3? but didn't
4x: An unexpected processor interrupt occurred. (Noise)
55: There is something wrong with the Gate Array (U25)
6x: CARR POSN switch error (-/S16 OK)
7x: CARR POSN switch error (-/S16 BAD) 10 port only

bit 7: ready: actually PEND DISP EN line: 0 means not ready.


bit 6: en sw out: 0 means out.
bit 5: en sw in: 0 means in.
bit 4: TGT POSN XRAY 0 = in X-RAY position
bit 3: tgt pos. elec: 0 = tgt in electron position.
bit 2: tgt pos. hole: 0 = tgt in hole position.(2500C only)
bit 1: tgt pos. HI x: 0 = tgt in HI x position.
bit 0: t9t pas. LO 5: 0 = tgt in LO x position.
4:

bit 7: TDRIVE MOT SSR 0 = activated


bit 6: TDRIVE AIR SSR 0 = activated
bit 5: 6X0 = activated
bit 4: ion chamber in beam: 1 means in beam
bit 3,2: mode switch:(S2):
11 = RUN
10 = MANUAL
01 = CALIBRATE
00 = illegal
bit 1: ENTER (push button S4): 0 = pushed (visible only in CAL)
bit 0: MODE COMMAND: 1 = mode command true
LED DISPLAY= EPROM CONFIG & 68HC11 Fl CONFIG REGISTER

5:

LEFT DIGIT: EPROM CONFIGURATION


lx: 2500C, SN7+
2x: 2100C, SN200+ WITH 6-PORT CARROUSEL,
3x: 10-PORTCARROUSELS
4x: 2100C 10 Port Carrousel
RIGHT DIGIT: 68CH11 Fl CONFIG; SHOULD BE xF

95: Carrousel failure


90: pin didn't retract

LED DISPLAY = pwm command motor drive


Motor drive level: 2's compliment number
7F = full positive value
00 = ZERO voltage
80 = full negative value
LED DISPLAY = INTERLOCKS: 0= ON/GOOD

7:

bit 7: I/F interlocks agree with CPU's


bit 6: P-I/L TDRV (1 =OK)
bit 5: 0
bit 4: C-I/L T-Drive
bit 3: C-I/L Energy Switch
bit 2: C-I/L Chamber
bit 1: C-I/L Foil
bit 0: C-I/L Target

91:pin didn't seat


92: intermittent pin problem
93: carrousel didn't seem to move
94: final position out of tolerance
95: final position way out of tolerance
96: POWER SUPPLY FAILURE +/-15V or +/-12V.
97: the carrousel ran away (2100C 6-port only)
98: The pot, its wires, or the A/D is broken
99: Noise problems
9A: MODE BCD lines changed after Ready occurred
9B: The carrousel needs to run STARTUP
9E: A/D value jumped: Chain may have jumped
9F: Failure to reach position, cause unknown.

bit 7: FIELD LIGHT


bit 6: Energy Switch Solenoid
bit 5: Air Injection Solenoid (2500C)
bit 4: Ion Chamber Solenoid- (2500C, NOT USED)
bit 3: Carrousel Pin Solenoid
bit 2: Target 24x Solenoid- (2500C)
Target 65 Solenoid- (2100C, 2300C)
bit1: Carrousel Motor Relay
bit 0: Target Elec Solenoid

C5: Test mode. The test mode jumper has been installed.
CF: Test mode jumper inplace, but board appears to be in a machine
FE: Testing External RAM (only during power up self test)

' LED DISPLAY= CONFIGURATION STUFF

6 different displays occur with this switch setting


Each time the push button is pressed, the next display appears.
bit 7-5: information index
index
00: established subsystem configuration
60: backplane configuration from CONFIG1
80: backplane configuration from CONFIG2
AO: TYPE FPGA U22 configuration (lower half-old 114 PAL)
CO: TYPE FPGA U22 configuration (upper half-old U8 PAL)
bits 4-0: selected configuration information

2.

LED DISPLAY = CARR POSITION BYTE (I/F board)

bit 7: Power Supplies OK: 0 = OK


bit 6: ion chamber b: 1 means in beam (2500C)
carrousel pin: 1 means in place (10-port carrousels)
always 0: (6-port carrousels)
bit 5: field light request: 0 means on.
bit 4: carrousel pin: 0 means in (2500C)
1 means in (2100C, 6 port)
carr posn 16 (10 port)
bit 3: carr posn 8
bit 2: carr posn 4
bit 1: carr posn 2
bit 0: carr posn 1

66

D:

LED DISPLAY = TDRIVE BYTE

These two should be the compliment of each other;


bit 7-4: mode command bits 8,4,2,1
bit 3-0: tdrive position-

: MOST SIGNIFICANT BYTE OF CARR POSITION

bits 7-4: Sector number


Sector
2100C
2300C/D
Number Port Port
0
N/A
N/A
1
1
1
2
6
2
3
3
3
4
2
4
5
5
5
6
4
6
7
N/A
7
8
N/A
8
9
N/A
9
A
N/A
10
bits 3-0: 4 most significant bits from A/D

B'

8 LEAST SIGNIFICANT bits from A/D

CENTER = RUN
DOWN (left) = MANUAL
UP (right) = CALIBRATE

TYPE FPGA(U22)
Enter CALIBRATION MODE by moving MODE CONTROL SWITCH (S2) up and pressing ENTER (PUSH BUTTON, S4)
Select POSITION IN MANUAL MODE by setting OPTION (ROTARY) SWITCH (S3) to
desired location and pressing ENTER (S4).

bit 7: I/L Target (0=cleared)


bit 6: I/L Chamber (0=cleared)
bit 5: UL EN SW (0=cleared)
bit 4: 0
bit 3: I/L FOIL (0=cleared)
bit 2: CARR OK- (0=cleared)
bit 1: pin in 1 = IN PLACE (2100,2300)
0 = IN PLACE (2500)
bit 0: 0

E
F.

053
Si - NET ID

msb of EPROM CHECKSUM

CAL
52 - MODE
MAN

Isb of EPROM CHECKSUM

Except when the MODE SWITCH is in CALIBRATE, the display will


show the HEX SWITCH setting while the push button is depressed.
If the controller is in the calibration mode and HEX switch is on "F",
the display is as shown below

9 40

53 - OPTION
o -0

2100C and 2300C Calibration Sequence


Set MODE SWITCH to CALIBRATE and the HEX SWITCH to "F"
Press the ENTER (PUSH) BUTTON
The following sequence will be followed, and shown on the display:
00: Make sure pot is working.
1: Verify all switches work.
2: Looking for a valid cam set.
3: The Carrousel is moving to Port 1.
4: Waiting for the operator to position the Carrousel at a valid hole.
The ooerator must oress the ENTER latish button) to continue
5: Waiting for the locking pin to seat.
6: WAITING_EORTECH TO PRESS_ENTERIPUSH BUTTON).
7: Setup Move to next Port.
8: Carrousel moving to next Port.
9: Waiting for the pin to drop and settle.
OA: Wait before starting the averaging
OB: Averaging 16 samples.

0S4
DS5

S4 - ENTER

OC: Setup the rotation of the Carrousel around 359 degrees to


discover which switch caused the error.
OD: Rotating the Carrousel to discover broken switch.
10: Recording the Carrousel position in EPROM.
88: Successful completion of Calibration.
6x, 7x, and 95 errors may occur. See Switch 0: for an explanation.
If these occur, you must leave calibration, fix the problem and
start over.

MANUAL MODE 10 PORT CARROUSELS


OPTION
SWITCH CARROUSEL (CODE) ENSW
POSITION LOCATION
0
NC
BCD
1
Port: 1(11)
BCD
2
Port: 2(12)
BCD
3
Port: 3(03)
BCD
4
Port: 4(14)
BCD
5
Port: 5(05)
BCD
6
Port: 6(06)
BCD
7
Port: 7(0C)
BCD
8
Port: 8(18)
BCD
9
Port: 9(09)
BCD
A
Port:10(0A)
BCD
B
NC
IN
C
NC
OUT
D
NC
BCD
E
NC
BCD
F
NC
BCD

TARGET FL
BCD
BCD
BCD
BCD
BCD
BCD
BCD
BCD
BCD
BCD
BCD
BCD
BCD
LOX
HI X
ELECT

TOGGLE
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

NC means no change.
BCD means the device position agrees with the
TOGGLE means change Field Ught (ON/OFF) to (OFF/ON)

CE

LED STATUS DISPLAY

MSB LSB

(States 7 through B are repeated for each of the Ports)

LED DISPLAY = Solenoid control: 0 = ON

8:

MODE SWITCH SETTINGS

If ENTER not pressed, TYPE FPGA (U22) rev level displayed.


Pressing ENTER displays engineering data.

LED DISPLAY = SWITCHES and STUFF

x: encoding of bad switch(s)


6 port / 10 port
0= bad CARR POSN 16
/S16
8 = bad CARR POSN 8 S19 158
4 = bad CARR POSN 4 S18 1S4
2 = bad CARR POSN 2 S17 /S2
1 = bad CARR POSN 1 S16 /S1

ENGINEERING DATA

bits 7-4 , 3 - 0
0 : 0000
1: 0001
2 : 0010
3 : 0011
4: 0100
5 : 0101
6: 0110
7: 0111
8: 1000
9: 1001
A: 1010
B: 1011
C: 1100
0: 1101
E: 1110
F : 1111
Example: 4F = 0100 1111
3C = 0011 1100

Select desired display using OPTION switch (S3)


0: LED DISPLAY = error code;
1: LED DISPLAY = CONFIGURATION STUFF
2: LED DISPLAY = CARR POSITION BYTE (I/F board)
3: LED DISPLAY = TARGET FEEDBACK BYTE (I/F board)
4: LED DISPLAY = SWITCHES and STUFF
5: LED DISPLAY = EPROM CONFIG & 68HC11F1 CONFIG REGISTER
6: LED DISPLAY = pwm, command motor drive
7: LED DISPLAY = INTERLOCKS 0 = ON/GOOD
8: LED DISPLAY = Solenoid control 0 = ON
9: LED DISPLAY = TDRIVE BYTE
A: LED DISPLAY = MOST SIGNIFICANT BYTE OF CARR POSITION
B: 8 LEAST SIGNIFICANT bits from A/D
C: ENGINEERING DATA
D: TYPE FPGA (U22)
E: msb of EPROM CHECKSUM
F: Isb of EPROM CHECKSUM

HIGH ENERGY C3 CLINACS


03 AUXILIARY ELECTRONICS

FOR TRAINING PURPOSES ONLY


Drawn:
Revised:

Gino den Ridder

Rev.

12/10
Sheet 2 of 2

67

Interlocks:

Note: Listed alphabetically. For ENSW, FOIL, TAR


Drawing No.
ED02100
ED02101
ED02102
ED02103
ED02104
ED02105
ED02106
ED02107
ED02108
ED02109
ED02110
ED02111
ED02112
ED02113
ED02114
ED02115
ED02116
ED02117
ED02118
ED02119
ED02120
ED02121

TDRV, see MODE MOTIONS Interlocks

Drawing Title
ACCESSORY CODES & ACC INTERLOCK SYSTEM DIAGRAM
AIR & GAS INTERLOCKS SYSTEM DIAGRAM
BMAG & KSOL INTERLOCKS SYSTEM DIAGRAM
CDOS INTERLOCK SYSTEM DIAGRAM
CMNR INTERLOCK SYSTEM DIAGRAM
DOOR INTERLOCK SYSTEM DIAGRAM
EXQ1, EXQ2, EXQT INTERLOCKS SYSTEM DIAGRAM
FLOW INTERLOCK SYSTEM DIAGRAM
GFEL INTERLOCK SYSTEM DIAGRAM
HVCB INTERLOCK SYS 1EM DIAGRAM
HVOC INTERLOCK SYSTEM DIAGRAM
ION1 & ION2 INTERLOCKS SYSTEM DIAGRAM
KEY INTERLOCK SYSTEM DIAGRAM
KFIL INTERLOCK SYSTEM DIAGRAM
LVPS INTERLOCK SYSTEM DIAGRAM
MOD INTERLOCK SYSTEM DIAGRAM
MODE MOTIONS INTERLOCKS SYSTEM DIAGRAM
PNDT INTERLOCK SYSTEM DIAGRAM
PUMP IN IERLOCK SYSTEM DIAGRAM
STPS INTERLOCK SYSTEM DIAGRAM
VAC1 & VAC2 INTERLOCKS SYSTEM DIAGRAM
VSWR INTERLOCK SYSTEM DIAGRAM

Where Used
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3
C3

Page(s)
68
69
70
71
72
73
74
75
76
77
78
80
81
82
83
84
86
87
88
89
90
91

67

68

Collimator

Gantry

Collimator
Distribution
Panel

Collimator
Patch
Panel
J8

IM TX
IM TX+

TC TX

J9

Console Backplane

SCI PCB
ACCTX
=>
ACCTX+

J34

20

20

IMTX

21

21

IMTX+
J35

c=>

=C>

J4
HW STATUS

6
25

J4

10 11 12 13 14 20 21 23

AMTX+
TCTX
.=>
TCTX+
EATXEATX+

-->
5 HWSTATUS

See PCB
Schematic
Diagram

WI

J25
28 ACCTX
_
27 ACCTX+

30a

28

31a

27

24c

14

14

25c

13

13

26c

12

12 ACC20

27c ==l> 11

11

28c

10

10

29c

30c

J20
Slot and
Latch Sw's

12 13 14 20 2

23

Interface
Mount

Pod Driver PCB

J22

U1

W6

J2

I M_TX+
IM_TX

J21

22c

14

.<==

See PCB
Schematic
Diagram

J1

Optical
Module
W12

Slot and
Latch Sw's

10

Accessory
Mount

Pod Driver PCB

AM_TX+

_2E112

J2

4
i
,
6

J1
1-16

11

J2
116

12 13

Electron Applicator

Pod Driver PCB


P2 J2

EA_TX+

4
6

1-

Tissue Compensator Mount I


TC_TX+
TC TX

J22
4

See PCB
Schematic
Diagram

J1
116

Pod Driver PCB


W14

J2
4

-r68

See PCB
Schematic
Diagram

Optical
Module

13

EA TX-

See PCB
Schematic
Diagram

ACC8
ACC4
ACC2
ACC1
WEDGINST
ACCINST

23

CRDIO
PCB

B2: Input I/F #1 PCB


Opto-couplers
& TTL Buffers

P1

ACC CODE 80
>
ACC CODE 40

36
35

ACC CODE 20
=>
ACC CODE 10

34
33

ACC CODE 8

32

ACC CODE 4

31

ACC CODE 2

30

ACC CODE 1

29

WEDGE INSTL
>
APPL INSTL
=>

37
38

Serial
Code

J2 (W22)

J2
,

31

31

29

29

27

27

25

25

23

23

21

21

19

19

17

17

Parallel
Code

Switch
Status

Mount, Tissue Compensator and Electron Applicator FFDA (Final Field Defining Aperture). It converts these codes to 8-bit codes
compatible with the older Type 2 accessories and returns them to the console on 8 parallel hardware lines ACC1,2,4,8,10,20,40,80.
In Clinacs having the Custom Coding option these lines are not used; instead, the Accessory Controller sends the 13-bit codes
directly to the SCI (Serial Communications Interface) piggyback PCB on the Comm Computer in the STD Bus, allowing the user to
view all the accessory status and error information on the screen and in event logs.

J32 Wi 0

P50

J40

ACC1 0

24

23

J2

10

AM_TX

W9t;

ACC40

24

Notes: The Accessory Controller PCB receives 13-bit (12 data bits, 1 parity bit) serial data codes from the Interface Mount, Applicator

U1

J33

ACC80

J1

10

P/J30 14

14

(W30)

116

WE

J31

23c =>

8
7

31c
10

STD Bus
j3

AMTX-

EA TX+

J19

W1.4a

=>

TC TX+
EA_TX

J14

Console Electronics Chassis

Auxiliary Electronics Backplane

J8

AM TX-

Auxiliary Electronics Chassis


A5: Accessory
Controller PCB

-->
=>

AM TX+

Wind-up
Ribbon
Cables

Console

Stand

See PCB
Schematic
Diagram

J1

Optical
Module
W18

Microswitches on the Interface Mount and Accessory Mount sense when an accessory is fully installed and when the accessory
latch is closed. The POD Driver PCB's monitor these switches and transmit their status to the Accessory Controller along with the
serial codes. The microswitch codes are also monitored by PAL's, along with other hardware parameters. When all parameters are
OK, the PAL's send the signal HW STATUS to the accessory controller, as well as the signals WEDGE INSTL (wedge installed and
latched) and APPL INSTL (electron applicator installed and latched). HW STATUS also changes the interface mount LED's from
red to green.
The ACC interlock is detected by the Control Computer software when there is a mismatch between the accessory code returned
to the console and the code for the accessory specified for the treatment, or if the WEDGE INSTL or APPL INSTL signals are not
correct for the installed accessory.

J2
116

HIGH ENERGY 03 CLINACS


ACCESSORY CODES &ACC INTERLOCK SYSTEM DIAGRAM

Optical
Module

FOR TRAINING PURPOSES ONLY

J2

W15116

Drawn:
Rev. A: Approved and released: B.K. 09/05

Revised:

Bill Kirkness

09/05

ED02100
Sheet 1 of 1

Rev.

69

Stand
A19: Air System Assembly
N.O.
Si

High Pressure

P1 J1

N.C.

!LAIR

oN.O.

Console

S2

-12V ON

Low Pressure
N.C.

Console Electronics Chassis

Stand Mother PCB


J36

W27

16
4- 15

B2: Input I/F #2 PCB

0 CONTPWR1

0 -12V ON*
J20

J30

ILAIR

I---- 49
<1=,

48

ILGAS
20

STD Bus

Console Backplane

*See 12V ON System


Diagram ED02002

=>

49

ILAIR

40

48

I LGAS

39

IL AIR

Latching
Circuits
(See PCB
Schematic
Diagram)

=>
IL GAS
=>

CRDIO
PCB

J1

21
19

(W23)

J3

21
19

0 +24V

2
J17

Optional
Air
Compressor

\/ACCOM

DCCOM

Al2: Gas System Assembly


oN High Pressure
ThN C

TB1

DCCOM
+24V

(Solenoid

II GAS
12

12V ON

S2

1 N.O.
(),

HIGH ENERGY C3 CLINACS


AIR & GAS INTERLOCKS SYSTEM DIAGRAM

Low Pressure
N.C.

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 09/05

Revised:

Bill Kirkness

09/05

ED02101

Rev.

Sheet 1 of 1

A
69

70

Stand

Console

Auxiliary Electronics Chassis

Console Electronics Chassis

Auxiliary Electronics Backplane


XA7: Carrousel, Mode & BMAG PCB
See System Diagram
E000029 for Bend Magnet
Control & Monitaing Circuits

Console Backplane
4 U5:6 14

STD Bus

B2: Input I/F #2 PCB

CRDIO
PCB

..
N'A

13
\/
0
12V ON*
See PCB Schematic
Diagram for KSOL Voltage &
Current Monitoling Circuits

P1
6a
8b

ILBMAG

J47
_
35

ILKSOL
=>

36

IN?

J27
_
ILBMAG
35
_
ILKSOL
36

P
47

IL BMAG

43

IL KSOL

Latching
Circuits
(See PCB
Schematic
Diagram)

J2
Fl 17

J1
27

(W24)

(W23)

J4
17

J3
27

8 U5:D 10
-79
\/
0
12V ON*
*See 12V ON System
Diagram ED02002

HIGH ENERGY C3 CLINACS


BMAG & KSOL INTERLOCKS SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 09/05

70

Revised:

Bill Kirkness

09/05

ED02102
Sheet 1 of 1

Rev.

71

Console

Stand

Console Electronics Chassis


Stand Mother PCB

STD Bus

Console Backplane
B1: Input hF #1 PCB

CRDIO
PCB

Latching
Circuit
(See PCB
Schematic
Diagram)
J15
Jumpered
if not used.

J20

J30
L D

c-

W9

W4*

P1

P1

41 --n)--49 IL CDOS

(W21)

J1

=>

*Remove jumper W4 for


PortalVision Systems if
auto-beam-off after image
collection is desired.

12V ON*
*See 12V ON System
Diagram ED02002

HIGH ENERGY 03 CLINACS


CDOS INTERLOCK SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 09/05

Revised:

Bill Kirkness

09/05

ED02103
Sheet 1 of 1

Rev.

A
71

72

Modulator Cabinet

Console

Primary Power Distribution Chassis

Console Electronics Chassis

Al: Auxiliary Power Distribution PCB

Console Backplane

STD Bus

B2: Input I/F #2 PCB


Install jumper
if not used.

Customer Terminal Strip (TB2)

11

-12V ON*

J8

ILCMNR

17

W3

J24
17

P1

ILCMNR

45

IL CMNR

CRDIO
PCB

Latching
Circuit
(See PCB
Schematic
Diagram)
29

(W23)

"See 12V ON System


Diagram ED02002

HIGH ENERGY C3 CLINACS


CMNR INTERLOCK SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 09/05

72

Revised:

Bill Kirkness

09/05

ED02104
Sheet 1 of 1

Rev.

73

Modulator Cabinet

Console

Primary Power Distribution Chassis

Console Electronics Chassis

Al: Auxiliary Power Distribution PCB

Console Backplane

STD Bus

B2: Input I/F #2 PCB


Customer Terminal Strip (TB2)

100
0
12V ON*

J8
ILDOOR
=>

14

W3

J24

ILDOOR
14

P1

-4- IL DOOR

Latching
Circuit
(See PCB
Schematic
Diagram)

CRDIO
PCB

J2

43-7-

(W24)

J4
3

*See 12V ON System


Diagram ED02002

Treatment
Room
Door Sw.

HIGH ENERGY C3 CLINACS


DOOR INTERLOCK SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 09/05

Revised:

Bill Kirkness

09/05

ED02105
Sheet 1 of 1

Rev.

A
73

74

Console
Cardrack Backplane
Part of

Radial Ion Chamber W109

P1/J1

Signal Plates (Harness)(Stand)

Console Backplane

B15: MU1 Integrator PCB

%Iv23
,

Charge-to-voltage
Converters U9, U10
P1
27 IONA

J3

22

B18: Symmetry & Excess Q/Pulse PCB


P1

CR6
A OR B
--> PI CR5

IONB

Summing
Amp

Dose Rate
Amp

U7

U8

P1

23

25

A'- B
24
i=>

01

=>
7Servo Amp Jk - 1
- Differential
s.;\A.B_
Sample3
Amp
=> and-Hold
2K

Transverse Ion Chamber


Signal Plates

U5

RESET
4-

Level
Detector
, (Latching)
R
A4

Radial
Absolute
Value Amp

Level
Detector
(Latching)

A1, A2

A3

Q2,Q4

J3
=1>

0+24V ON
91
J1
Relay 1
30 CR DOS RESET 18
U2,U8
Driver
<1=
025

03,05

(W27)

31

B1: Input I/F #1 PCB


P1

C OR D

M CR5
Summing
Amp

Dose Rate
Amp

U7

U8
Servo
Amp

31

J7

Q6

U1,U6

Differential
Amp
=>

J3

See +24V ON
System Diagram
ED02003

W20

17

U5

22

21 F

M CR6

-1

J1

J1

EXQ1
Output
Circuit

B16: MU2 Integrator PCB


Charge-to-voltage
Converters U9, U10
P1
IONC
27
=1>
IOND
2
=1>

CRDIO PCB

B3: Output I/F PCB

P1
A+ B
,=> Summing
Amp

STD Bus

25
10

C+D
=>

C-D
13
2K

C+D
Summing
Amp

Level
Detector
(Latching)

07

A8

Transverse
Absolute
Value Amp

Level
Detector
(Latching)

A5, A6

A7

48
012

19
EXQ2
Output
Circuit

48

49

49

50

50

ILEXQT
ILEXQ1

52
50

ILEXQ2 5

54

IL EXQT
-->
IL EXQ1
=>
IL EXQ2

I-1W DS FLT
4-

Interfacing
Circuits (See
PCB Schematic
Diagram)

W21)
13

13

11

11

U1

U1,U6

=>

B4: Timer I/F PCB


B19: Radial Beam Position Servo PCB

444

EXQ1: Excess Q (charge): Level DetectorA4 will trip if


the "A OR B" signal exceeds +7.5V or if the "A + B"
signal exceeds -8V.

Charge-to-voltage
Converters U1, U2
P1
IONE

27
IONF

P1

Excess asymmetry: Level Detector A5 will trip if


the sum of the "A- B" and "E - F" signals exceeds
0.9V (representing 1.8% beam symmetry).
EXQ2: Level Detectors A8 and A7 detect excess Q and
Level Detector A7 detects excess asymmetry as
described above for EXQ1.

i=c> Differential
Servo
E-F
Amp => Amp =>

,=

2K

Summing
Junction

A- B (from B15)

P1
17

(A- B) + (E - F)
=>

16

B20:Transverse Beam Position Servo PCB


Charge-to-voltage
Converters U1, U2
27
2

IONG
-->
IONH
=>

Differential
Servo
0- H
Amp => Amp =>
2K

=>

P1
Summing
Junction--).

C - D (from B15)
(C - D) + (G - H)

17
16

Hardware
Beam-Off
Circuits (See
PCB Schematic
Diagram)

EXQT: During CAL of the CAL/CHECK cycle, all four level


detectors described above should be tripped.
EXQT will verify that this has happened.
If CAL/CHECK is successful, the Control Computer
resets all four level detectors.
Reset: In the Clinical Mode, should an EXQ (or other
dosimetry) interlock occur, when the physicist
enters the dosimetry reset password, all four level
detectors are reset by the CR DOS RESET
(cardrack dosimetry reset) command issued by
the Control Computer via the Output Interface
PCB. In the Service Mode, dosimetry interlocks
are reset by choosing the "Dose Interlock Clear"
option on the "Interlocks, Triggers & Lights" menu.

P1
-

_FT

HW DS FLT

-->

HIGH ENERGY C3 CLINACS


EXQ1, EXQ2 & EXQT INTERLOCKS SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 09/05

74

Bill Kirkness

09/05

ED02106
Sheet 1 of 1

Rev.

75

Gantry
A21: Bend
Magnet
Assembly

TB1
16

0----(5
S4

Stand
Flow
TB3
Switches ,

Auxiliary
Electronics
Backplane

Stand
Mother
PCB
W27

ILFLOW

5gpm

STD Bus

Console Backplane
J30

J36

0-15

Console Electronics Chassis

47

J20

W2

47

ILFLOW
=>

0
2

CRDIO
PCB

B2: Input I/F #2 PCB

18

W33
Si

Auxiliary
Electronics
Chassis

Gantry
Patch
Panel

Over-temperature
Switches
S2

Console

Stand

S3

=(>

15

J13
36

J42

J2
ILFLOW3

28

W32

ILFLOW3
3gpm

33

P1
31

A24: Flow Switches

W56
-

J2

(W24)

J4

=>

Pulse Tank

J14
25

IL FLOW
=>

Latching
Circuit
(See PCB
Schematic
Diagram)

ILFLOW2

J7

J7

13

Oil Level Sw
J27
11
Si

S2

S3

W65
=>

J14
11 I ILFLOW3

S4

5gpm lgpm 2gpm lgpm


BMag Solenoid Slit
Target

A14: Beamstopper Assembly

W95 W98

J9
ILFLOW1
12VISOL
Si

If Beamstopper option is not present,


Jumper plug W98 must be installed.

12V ON*
*See 12V ON
System Diagram
ED02002

HIGH ENERGY 03 CLINACS


FLOW INTERLOCK SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 09/05

Revised:

Bill Kirkness

09/05

ED02107
Sheet 1 of 1

Rev.

A
75

76

Gantry

Stand

Gun Driver

Auxiliary
Electronics
Chassis

Gantry
Patch
Panel

Gun Driver Backplane


A4: Gun Controller PCB
04

Console
Console Electronics Chassis

Auxiliary
Electronics
Backplane

U6

Console Backplane

STD Bus

B2: Input I/F #2 PCB

CRDIO
PCB

Latching
Circuit

FPGA

26 CLR I/L 9

P1

Tri-State 11 I/L CLR


Line Driver

GUN I/

J2

J17

W30E

J2

ILGUN
31
=C>

W32

J42
31

J47

ILGUN

10

W2

J27
10

ILGUN

P1

34

IL GFIL

(See PCB
Schematic
Diagram)

J2

(W24)

J4

=>

4 U9:6 6
3G.4

0
12V ON*
*See 12V ON System
Diagram ED02002

HIGH ENERGY C3 CLINACS


GFIL INTERLOCK SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 09/05

76

Revised:

Bill Kirkness

09/05

ED02108

Rev.

Sheet 1 of 1

77

Modulator Cabinet
Thyratron Chassis
(Auxiliary Contacts)
601
...67

P/J2
4
==>

0 0

Crowbar
Relay

Console

Primary Power Distribution


Chassis

CRDIO
PCB

ILCROBAR

26101

(Auxiliary Contacts)

STD Bus

B2: Input I/F #2 PCB

J3

CB1

21

Console Backplane

Auxiliary Power
Distribution PCB

HVPS

4
0 0
6
5
0 ; 0

Console Electronics Chassis

W58

12V ON"0

P/J2

J14

4
1

W3

*See 12V ON System


Diagram ED02002

IL HVCB

J24

13

ILHVCB
=>

P1
42

IL HVCB

Latching
Circuit
(See PCB
Schematic
Diagram)

J1
25

(W23)
=;:>

J8
13

HIGH ENERGY 03 CLINACS


HVCB INTERLOCK SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 09/05

Revised:

Bill Kirkness

09/05

ED02109

Rev.

Sheet 1 of 1

A
77

78

Modulator Cabinet
High
Voltage
Power
Supply

Console

Main Thyratron Chassis

Auxiliary Power
Distribution Chassis

Console Electronics Chassis


CRADC
PCB

B6: Meter I/F PCB


B2: Trigger Pulse Amplifier PCB
J2

P1
HVIMTR

20

W48

STD Bus

Console Backplane

HV
=>
R11
10

P1

R3
470

P1

J3

J8

J3

HVPSI+

\AT

C2
;
-0.1pF

=>

45

W3

HVPS I MTR

45

=>

Interfacing
Circuit
(See PCB
Schematic
Diagram)

J1
47

(W33)
==>

J2
25

45

(W20)

19

(W2)

CRDIO
PCB

B2: Input I/F #2 PCB

J5

J1

P1

HVOCIL

36

=>

IL HVOC

Latching
Circuit
(See PCB
Schematic
Diagram)

J2
13

(W24)

J4
13

(W19

Cardrack Backplane
B12: Fault Signal Conditioning PCB
P1
J1
21 ILHVOC
24
1
J5

HVPSI+ 20

HVPS FLT
Buffer
Amplifier

Delay
Circuit

U1B

R21/C9

J2
20

1V = 1AAvg.
Analog
Comparator
U3

Attenuator
27

1V = 4A Pk.

HVPS I MTR
R26/R31

HIGH ENERGY C3 CLINACS


HVOC INTERLOCK SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY

Non-EMC Clinacs
(See Sheet 2 for EMC Clinacs)
78

Drawn:
Rev. A: Approved and released: B.K. 09/05

Revised:

Bill Kirkness

09/05

ED02110
Sheet 1 of 2

Rev.

79

Modulator Cabinet
High
Voltage
Power
Supply

Thyratron Chassis

Auxiliary Power
Distribution
PCB

Thyratron Backplane

Console

A2: Fault Conditioning PCB


P1
6b.c

Differential
Amplifier

Delay
Circuit
=>

4
W48

R13
470
J8

R35/C16

Ul:D

Buffer
Amplifier

Attenuator

Analog
Comparator

U8:A

R33/R34

Console Electronics Chassis


STD Bus

Console Backplane

CRADC
PCB

B6: Meter I/F PCB


Differential
Amplifier

HV
R1
10

U8:6

Analog
1V= lAAvg Comparator
=>

18b,c

1V = 4A Pk

=>
U8:C

Ul:B
P1
HVPSIMTR+
=f>

NAND Gate
UlOD

Al

Y1

A2

Y2

A3

Y3

A4

Y4

A5

Y5

A6

Y6

A7

Y7

A8

Y8

Tri-State
Line Driver

J3

J8
HVPSIMTR+

24c

W3
3

J24
P1
HVPSIMTR+ 45
==>

DS2
(HVOC AVG,*

HVPS I MTR
=>

J1
47

(W33)

W7*
A B0 C0
ILHVOC
=>

20c

19

ILHVOC

1-7 6
L

26

P1
36

IL HVOC
=>

Latching
Circuit
(See PCB
Schematic
Diagram)

J2
25

CRDIO
PCB

B2: Input I/F #2 PCB

DS3
(HVOC PEAK)t0

.=>

Interfacing
Circuit
(See PCB
Schematic
Diagram)

J2
3

(W24)

J4

4 U12:B 6

U2
3

0
12V ON"
*See 12V ON System
Diagram ED02002

*Connect jumper W7 as shown for EMC systems.


When this backplane is used in non-EMC systems,
where the HVOC interlock is detected in the
cardrack, connect W5 from B to C.

HIGH ENERGY 03 CLINACS


HVOC INTERLOCK SYSTEM DIAGRAM

EMC Clinacs
(See Sheet 1 for Non-EMC Clinacs)

FOR TRAINING PURPOSES ONLY


Drawn:
Revised:

Bill Kirkness

09/05

ED02110
Sheet 2 of 2

Rev.

A
79

80

VacIon Power Supply


Al: VacIon Control PCB
J10
IONCHR
IONCHT

Gantry
Patch
Panel

*See -12V ON System


Diagram ED02009
Voltage Comparators
R66
vvv----1m
RN2:F
5
DS11
,\AA,

U4:A
v1 __._5sO_____4_
___,R
\,
.
ioK
4.99K
L
R67
RN2:6
__
-12V (:)Nn",
im
10K
RN2:G
7

--vvv---*--

=>

6 U1:C 11

=>

:
5

1K

12
J7
IL ION1

J11

J45

=t>

CRDIO PCB

B1: Input I/F #1 PCB

J32

IL ION2

2E I

DS12

W74

STD Bus

Console Backplane

Auxiliary
Electronics
Backplane

-12V ON"
0

8 U1:D 9

Console

Auxiliary
Electronics
Chassis

W11

41

42

J22
- ILION1

P1
45

ILION2 47

IL ION1

Latching
Circuits (See
PCB Schematic
Diagram)

(W21)

J1

IL ION2
=C>

R56

U4:B

10

_....3S,

HW DS FLT

U1

J10
IONCHT+

Low Voltage
Power Supply

+12V
*

1J6

J6
6

=> IONCHR-'-

00---15
Chassis Interlock Switch Si

B4: Timer I/F PCB

IONCHT-
>

-12V

c=>

IONCHR-

P1
HW DS FLT
=>

Hardware
Beam-Off
Circuits (See
PCB Schematic
Diagram)

<:
4

A2: Vaclon HV PCB RI-4

PS4
1

OUT+

2
R27
470K

too pF

RT5
,
-----NK.----,"- IN-

OUT-

C12

C13

0.1 pF

.01 pF

>
=>

IONCHR+

RT6

IONCHT-

RT7

IN+

250 rnA

IONCHR
=I>
IONCHR
IONCHT
<=

OUT+

.1

OUT-

GROUND

R28
470k
IN-

, ),

T500PS
=t>

P55

_*-250 mA
C14
100 pF

R500PS
=>

1K

250 mA

J11
IONCHT+

J9

R20

C15
0.1 pF

C1BL
.01 pF

R500 SENSE

See System Diagram 02035 for


path of Ion Chamber signals.

T500 SENSE

;
1K

24V/500V DC/DC converters


R23
v\n,
R24
10M
100:1 voltage dividers
R25
R26
iooK
iooK

G=

HIGH ENERGY C3 CLINACS


ION1 & I0N2 INTERLOCKS SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released. B.K. 03/05

80

Bill Kirkness

03/05

ED02111

Rev.

Sheet 1 of 1

81

Console
Console Electronics Chassis
STD Bus

Console Backplane

CRDIO
PCB

B3: Output I/F PCB


P1

12VON

09
51 12V ON" 130/
J1
6

J13

(W4)

P1

12V
=t>

22

(W25)

J5

=>

49

*See 12V ON System


Diagram ED02002

Dedicated Keyboard

B2: Input I/F #2 PCB

Keyboard PCB
S7

Latching

Jf

4
12V ON

4A9
-->

BEAM ENABLE
Key Switch

U10

Keyboard
Buffer

U2

Keyboard
Microprocessor

U11:A
U13:A

RS-232 Driver
& Receiver

RXD
1

TXD

Circuit
(See PCB
Schematic
Diagram)

J26

12VON

P1

<1=

I L_KEY
4D,

Yvi

ILKEY

IL KEY

=t>

46

IL KEY

J1

(W23)

1
37

J3
31

COM 1 RXD

COM1TXD

(W11)

JO

Note: Upon request from the Console Computer,

the Keyboard Microprocessor transmits the


status of Beam Enable switch S7.

Console Computer
COM 1
COM1RXD
COM1TXD

Low Voltage Power Supply Assembly


Power Distribution PCB
J9
12V

PSI
TB2

J7

F9
CrLO

12V

HIGH ENERGY C-SERIES CLINACS


KEY INTERLOCK SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 09/05

Revised:

Bill Kirkness

09/05

ED02112

Rev.

Sheet 1 of 1

A
81

82

Modulator Cabinet

Stand

Klystron
VKS8252

z )1

Primary Power Distribution Chassis


Stand Mother PCB
(Back-connected)

5A7: Klystron Oil Tank

Al: Auxiliary Power Distribution PCB


J6

W1,8

J36

J3

===>

TB1
REG

OA
C

0 0
6Th
CB9

208V A
208V_C

J14

J11

70-7-64 2Q8VPWRA

-6>p 208VPWRQ__ 13
=C:> &I

11

J17
T3
236V
(Constant
Voltage)

Cable
890082
(Harness)

Klystron Filament
Boost Assembly

B2: Input /F #2 PCB

R6: 7.50, 25W


G=3
-12V ON"
0

*See 12V ON System


Diagram ED02002

J8
16

W3

ILKFIL

1 pF

STD Bus

Console Backplane

Console Electronics Chassis

"2
.

Console

zLoi_romi
T7

Reg
Control
Relay

C2
1 pF

18

=I>

Primary 30
AC Power
208V
50/60-Hz
or
380-440V
50/60 Hz

J7

19

Pulse
Transformer
Primary
(See Dwg,
ED00056)

J24
16

P1
ILKFIL
=I>

33

IL KFIL

Latching
Circuit
(See PCB
Schematic
Diagram)

CRDIO
PCB

J2

(W24)

KFIL Relay
(6V AC coil)
Note: The Klystron Filament Boost
Assembly is mounted on a
bracket above the Primary
Power Distribution Chassis.

HIGH ENERGY C3 CLINACS


KFIL INTERLOCK SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Rev. A: Approved and released: B.K. 10/05
Rev. B: Added Stand, Klystron: B.K. 01/06

82

Drawn:

Bill Kirkness

10/05

ED02113

Revised:

Bill Kirkness

10/05

Sheet 1 of 1

Rev.

83

Console
Console Electronics Chassis
Console Backplane
12V ON*
0

*See 12V ON System


Diagram ED02009

64: Timer I/F PCB


P1

HW DS FLT

55

=1>

Low Voltage Power Supply Assembly

Hardware
Beam-Off
Circuits (See
PCB Schematic
Diagram)

STD Bus

Power Distribution PCB

PS2

61: Input I/F #1 PCB


J7

+15V
-->
+15V
=>
15V
15V
TB2
=>
20_
+12V
==
4_ 12V
=>
+5V
El

+5V

P1
54

+15V

PSI

15V
+12V
=1>

12
15

CRDIO
PCB

12V
=>
+5V

F8

0,10
F7

CL_PO
Fl 0

0J-0
F9
a.P0
Fll

0J-0

J9

+15V
15V
+12V
=>
12V

(W4)

HW DS FLT
<=,

U1

48

J13
+15V
=>
15V
=5,
+12V
=>
+5V

5
7
3

Opto-couplers
& Latching
Circuit (See
PCB Schematic
Diagram)

J1
31

J3

(W23)

31

-->

+5V
+5V

HIGH ENERGY 03 CLINACS


LVPS INTERLOCK SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released. B.K. 09/05

Revised:

Bill Kirkness

09/05

ED02114

Rev.

Sheet 1 of 1

A
83

84

Console
Console Electronics Chassis
Console Backplane
Monitor Panel

CLIPPER

Modulator Cabinet

L3 & L4: 70 H in parallel

nn
1

i=>

Al: Auxiliary Power


Distribution PCB

PFN Chassis
CR14 S3HVM7.5
,
(4 in series) RV3i

=>

nnn

1111

"ITT
C4C9 0.046pF 30 kV (6)

RV2

F-1

End Clipper Circuit


.10V nominal fault
....signal, 0.1 Volt/Amp

.11

STD Bus
J8

J16
CLIPIMONI+

i=>

J34

47

J24

W3

CRDIO
PCB

B2: Input I/F #2 PCB


J5

Latching
Circuit
(See PCB
Schematic
Diagram)

17

11

P1

T4 (Toroid)
IN 829154

MODIL

(W2)

35

IL MOD
i=t>

J2
11

(W24)

J4

(W19

Cardrack Backplane
B12: Fault Signal Conditioning PCB
P1

J1
ILMOD

J5
17

CLIPI+

MOD FLT

10

12

Delay
Circuit

Pulse
Stretcher

Analog
Comparator

R33/R36/C13

CR7/C14

U4

HIGH ENERGY 03 CLINACS


MOD INTERLOCK SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY

Non-EMC Clinacs
(See Sheet 2 for EMC Clinacs)
84

Rev. A: Approved and released: B.K. 09/05


Rev. B: Updated. B.K. 01/06

Drawn:

Bill Kirkness

09/05

ED02115

Revised:

Bill Kirkness

01/06

Sheet 1 of 2

Rev.

85

Modulator Cabinet
PFN
Thyratron Chassis
ChassIs
Thyratron Backplane

Auxiliary P wer
DstrIbL1tiin PC

(See Sheet 1)

Cons le
C nsole Elect nics Chassis

A2: Fault Con itionjng PC


Optical
Isolator

OneShot

U13

U6A

Low-Pass
Filter

Analog
Comparator

Clock
Up/Down
Counter

Consc4e Backpiana
Monitor Panel

U3/U5
J14
==>

P1
1 2c

OneShot

AND Gate
UlOD

R65
47.50

R64/C34

=I>

Up/Down
Control

U6A

CLIPPER

Ull

Preset

J3

CLIPIMON+

J8

J3
11]

=>

CLIPIMON+

E7

W3

J24
CLIPI+
=t>

47

J34

OneShot

P=Q

=>
BCD
Jumpers

Digital
Comparator

STD Eus
U7B

W5-W12

=t>

52: Irtput UF #2 PCB

CRDIO
PCB

U4

5*
A

<=
Al
A2
A3
A4
AS
A6
A7
A8

Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8

IMOD 19c

<1=

18

ILMOD

25

00
B C

P1
35

IL MOD

Latching
Circuit
(See PCB
Schematic
Diagram)

J2
11

24)

J4
11

1 U12A 7
DS1
(MOD)
DS2
\/

Tri-State
Line Driver
U2

0
-12V ON"
*See -12V ON System
Diagram ED02002

*Connect jumper W5 as shown for EMC systems.


When this backplane is used in non-EMC systems,
where the MOD interlock is detected in the
cardrack, connect W5 from B to C.

HIGH ENERGY C3 CLINACS


MOD INTERLOCK SYSTEM DIAGRAM

C Cnacs
(Se ShrJet 1 for Nin=EMC

es)

FOR TRANI G PURPOSES ONLY


Drawn:
Bill Kirkness
09/05
ED02115
Revised:

Bill Kirkness

01/06

Rev.

Sheet 2 of 2

85

86

Stand
Auxiliary Electronics Chassis
Auxiliary Electronics Backplane
A7: Carrousel, Mode & BMAG PCB
From FPGA U22 Monitoring BCD
Energy Codes and Energy Switch
Position Code

From Microprocessor U9 (via FPGA


U25) Monitoring BCD Energy Codes
and Energy Switch Position Code

From FPGA U22 Monitoring BCD


Energy Codes, Locking Pin and
Carrousel Position Code

5 U6:C 11

Console

12V ON

Console Electronics Chassis

4 U6:B 14

STD Bus

Console Backplane

CRDIO
PCB

B2: Input I/F #2 PCB


From Microprocessor U9 (via FPGA
U25) Monitoring BCD Energy Codes
and Energy Switch Position Code

13

0
12V ON

1
3a
6b

From FPGA U2 Monitoring BCD


Energy Codes and Target Position
Code

From Microprocessor U9 (via FPGA


U25) Monitoring BCD Energy Codes
and Target Position Code

7b
U6:A 15

16

From Microprocessor U9 Monitoring


BCD Energy Codes and TeeDrive
Position Code

ILFOIL
ILTARG
=>
ILTDRV

R3
0?

J27
35

30
32

=>

r=4>

36

31

31

21

21

ILENSW
51 ILENSW
=>
ILFOIL
IL FOIL
50
=>
ILTARG
48 IL TARG
=>
ILTDRV
ILTDRV
9
=>

(VV23)

Jc

25

25

23

23

19

19

21

21

0
12V ON

From FPGA U25 Monitoring BCD


Energy Codes, and TeeDrive
Position Code

6c

W2

J47
ILENSW

Latching
Circuits
(See PCB
Schematic
Diagram)

12V ON

5 U5:C

12V ON

HIGH ENERGY 03 CLINACS


MODE MOTION INTERLOCKS SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY

Notes:
1. See 12V ON System Diagram ED02002.
2. R3 removed for Shunt Tee Clinacs.

Drawn:
Rev. A: Approved and released: B.K. 09/05

86

Revised:

Bill Kirkness

09/05

ED0211 6
Sheet 1 of 1

Rev.

87

Exact Couch or Exact Upgrade from ETR


Pendant
Holder
Switches
Left
Right
Side
Side

Stand
Stand Mother PCB

Couch
Patch
Panel

W3
12V ON"
0

1 2 3

W4

TB5 0
P/J18

J14

J30

17

Toe
Plug
P/J28
17

J39

W26
(Harness)

ILPEND
-->

_LI

Console

J30 _
21
_

Console Electronics Chassis

Jumper configuration for


Tachometer Feedback from
Longitudinal and Lateral Motors

"See 12V ON System


Diagram ED02002

J20

Stand Mother PCB

Couch
Patch
Panel

W3
7

P1
ILPEND

IL PNDT

Latching
Circuit
(See PCB
Schematic
Diagram)

J2
29

>

(W24)
=>

J4
29

Signal path for C3


Clinac with ETR Couch

0
1 20'%
3

12V ON*
0

21

CRDIO
PCB

B2: Input I/F #2 PCB

B vv2
o
A

W9

Pendant
Holder
Switches
Left
Right
Side
Side

I
.

12V ON

Stand

ETR Couch

STD Bus

Console Backplane

Signal path for C3


Clinac with Exact Couch

W4

TB5
P/J18

J14

J30

25

"See 12V ON System


Diagram ED02002

Toe
Plug
P/J28
25

Note: Install jumper W2 for the overhead


pendant option.
Software-detected PNDT interlock
will still occur when couch table
brakes are unlocked.

J39

W26
(Harness)

25

Jumper configuration for no


Tachometer Feedback from
Longitudinal and Lateral Motors

HIGH ENERGY C3 CLINACS


PNDT INTERLOCK SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 10/05

Revised:

Bill Kirkness

10/05

ED02117
Sheet 1 of 1

Rev.

A
87

88

Modulator Cabinet

Stand

Console
Console Electronics Chassis

Primary Power Distribution Chassis


Al: Auxiliary Power
Distribution PCB
TB1

Solenoid &
Bend Magnet
Power
Supplies

Ti L1
0 ! 0
T2 .--L2
0 0
T3 -- L3
0:0

=
<=,
,,,

''.7---"

0 : 0
4 ."--'.---s 3
0 : 0
6 *---" 5
0
0
CB3

OA
P1
OB

WTRNAC

00

Relay
Driver
(See PCB
Schematic
Diagram)

J1

(W25)

<:,
=>

12_,-- 8
U , 0
38
WTR/VAC

\/
ACCOM2

14013

33

J24
WTRNAC

B2: Input I/F #2 PCB

DCCOM
15

A6: Pump &


Heat Assembly

CRDIO
PCB

B3: Output I/F PCB

STAND
POWER
W1 6

STD Bus

Console Backplane

P1
ILPUMP

15

15

ILPUMP

32

IL PUMP
=>

Latching
Circuit
(See PCB
Schematic
Diagram)

32

(W24)

0-12V ONWater
Over-temp.*
52

Low Water
Level*
S1

TB2

CONTPWRB
0

*See -12V ON System


Diagram ED02002

4
11'
( Float )

W19
-

P1/J1
.:F=

TB1
Water
Pump
Motor

3
2

*In the 2004 Compact Stand,


water level and over-temp are
sensed by the Watlow Controller.

96 95
2 6-.7-.0 1
0 0
411
Ti
L1
Ti
L1
-,
,---0'.X_O--------0
: 0
.( ,
T2
L2
T2--- L2
--<------Cr!,.,0------0
,
: 0
T3
.
L3
T3 t-- L3
4
0: 0
-7=
--01-0"-

PUMP

-->

0
Overload
Protector

<=,
<=,

Pump
Relay

\/
ACCOM2

TB1

2 0'..--7-'
1
: 0

OA

4 '..---' 3
0: 0
..----.
6
5
0
0
CB2

OB

OA
<,==
OB
4
OC

Oc
<=

Primary 30
AC Power
208V
50/60-Hz
Or
380-440V
50/60 Hz

During normal operation, K6, the Pump Relay, is held by CONTPWRB via the Water Over-temp and Level
switches in the stand, and the Pump Motor Thermal Overload Protector K28 auxiliary contacts. K5, the
Stand Power Relay, is also held by the same signal via contacts of K10, the WATERNAC relay, which is
energized to bring the Clinac state from STANDBY to ON.
Three abnormal conditions can cause K6 and K5 to drop out:
Low water level in the reservoir causing Si to open.
Water temperature exceeding 48C, causing S2 to open.
Excess pump motor current, causing the contacts of K28 to open.
When K6 drops out, its auxiliary contacts open, removing the -12V ON signal from the ILPUMP line. When
K5 drops out all power is removed from the Solenoid and Bend Magnet Power Supplies.
When the Control Computer sees that the ILPUMP line is high, if the beam is on, it beams off, writes a 0 to
WTR/VAC to place the Clinac in STANDBY, and sets the Latched status, of the PUMP interlock to 1. When
the Console Computer detects this, it asserts the PUMP interlock and generates an event log.
If the PUMP interlock is sensed when the Clinac is already in STANDBY, the PUMP interlock Latched status
bit remains 0, and the Console computer does not generate an event log.

HIGH ENERGY C3 CLINACS


PUMP INTERLOCK SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released B.K. 10/05

88

Revised:

Bill Kirkness

10/05

ED02118
Sheet 1 of 1

Rev.

89

Console

Stand

Console Electronics Chassis

Auxiliary Electronics Chassis


Auxiliary Electronics Backplane
XA2: PWM PCB

XA1: PWM PCB

XA3: PWM PCB

STD Bus

Console Backplane

XA4: PWM PCB

CRDIO
PCB

B2: Input I/F #2 PCB


4 U2:B 6

NA
P1

4 U2:6 6

4 U2:B 6

NA
P1

P1

P1

4 U2:6 6

NA

NA
5

P1

10b 10c

10c

J35
ILSTPS 21

W1

P1

J25
21

ILSTPS

41

IL STPS

Latching
Circuit
(See PCB
Schematic
Diagram)

J1
23

(W23)

J3
2

XA1-4: PWM PCB (Detail)


+20VA"
U2A

NA
+5VA"
U3:A

NA

15

U3:C
FPGA
Note: FPGA U3C also monitors all other operational parameters and asserts FAULT should
any error occur. The error code displayed on DS1-3 identifies the problem:

16

5VA*
U3:D

DS1: On Continuously
AID error or Thermal
Flag TF from H-Bridge

10

NA

NA

Strobe 125 Hz
Test Mode, or PS FLT
not clear at power-up

Slot XA2-4
Energy or Trim Code
Parity Error

All Slots
Slot Revision Code error
or RESET in effect

DS2: On Continuously
Power Supply Fault PS_FLT

+27V
L.13:C

Flashing 5 Hz
TF occu red and
has cleared

11

1c

DS3: Slot XA1


COLSWOK or PSWOK error

12

+5V
U3:6

14
PS_FLT13
13

HIGH ENERGY 03 CLINACS


STPS INTERLOCK SYSTEM DIAGRAM

"from voltage regulator chips on this PCB.

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 09/05

Revised:

Bill Kirkness

09/05

ED02119
Sheet 1 of 1

Rev.

A
89

90

Gantry
Patch
Panel

VacIon Power Supply Chassis


0-500V DC to Ion Chambers"

Motor Power
Supply Assy.

Stand Mother
PCB

Modulator Cabinet
Primary Power
Distribution Chassis

*See Ion Chamber Signals


System Diagram ED02035

12V DC
+12V DC

500V & LV
Power
Supplies

CONTPWRB

>20 mA
Monitor

K5

10-Sec
Delay

JE,

J10

W7u

CONTPWRB

J5

J41

W59

CONTPWRB
4

J25

J3

W75

J2
CONTPWRB

W17

J12
0 CONTPWRB
See High Energy
Clinac AC Power
Distribution
System Diagram
ED02033

Latch

(Drops out K5 if current >20mA more than 10 seconds)

Power-On
Reset
<4KV
Monitor

Guide
20L Pump

Main PS
-5 KV

=>

>1.2 mA
Monitor

===.

VAC1
OR
Gate

90-Sec
Delay

=>

,=>

>350 pA
Monitor

(Drops out K6 if VAC1 lasts more than 90 seconds)

<2.4KV
Monitor

+12V DC
=>

U1:A 15

=>

4
4

Klystron
2L Pump

PS 2
+3 KV

Auxiliary
Electronics
Chassis

>8 pA
Monitor

16

=>

\/
12V ON*

j7

=>

W74 J 1
, 2
I

12V DC

J1

W13

ILVAC1

VAC2
OR
Gate

J45

=>

ILVAC2

I LVAC2

STD Bus

B2: Input I/F #2 PCB

J32
ILVAC1

=>
/

==b.

Console Backplane

Auxiliary
Electronics
Backplane

NA

=>

Console

43
44

W11

Latching
Circuits (See
PCB Schematic
Diagram)

J22
43
44

I LVACi rP1 ILVAC1


ILVAC2

38

IL VAC2

CRDIO PCB
J2

(W24)

J4

J1
17

(W23)

_13
17

4 U1:6 14

=>

<2.4KV
Monitor

=>

13

\/ 0

12V ON*
Gun
8L Pump

PS 1
+3 KV

>40 pA
Monitor

*See 12V ON System


Diagram ED02002

HIGH ENERGY C3 CLINACS


VAC1 & VAC2 INTERLOCKS SYSTEM DIAGRAM

Note: Vaclon Power Supply Chassis physical location may


be in Gantry or Stand, depending on Clinac Model.

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 09/05

90

Revised:

Bill Kirkness

09/05

ED02120
Sheet 1 of 1

Rev.

91

Console
Console Electronics Chassis
Console Backplane

STD Bus

J57

W12

B2: Input I/F #2 PCB

Note:W12 is a harness of twelve


RG-58 BNC Cables.

J5

(W2)

J1

Latching
Circuit
(See PCB
Schematic
Diagram)

P1

I LVSWR

37

CRDIO
PCB

IL VSWR

J2
15

(W24)
=>

J4
15

(W19)

Cardrack Backplane
B12: Fault Signal Conditioning PCB
J1

P1

ILVSWR

15

REFLPWR

19

VS WR IN

J5
31

Noise
Filter

Clipper

15V

Analog
Comparator

CR11/CR12

U6

=>
R42/C15

HIGH ENERGY 03 CLINACS


VSWR INTERLOCK SYSTEM DIAGRAM

FOR TRAINING PURPOSES ONLY


Drawn:
Rev. A: Approved and released: B.K. 09/05

Revised:

Bill Kirkness

09/05

ED02121

Rev.

Sheet 1 of 1

A
91

This Side Intentionally Left Blank