MCQ 8.

128
Small-signal mid-band voltage gain v o / v i is
(B) 38.46
(A) 8
(C) 6 . 62
MCQ 8.129
PAGE 465
(D) 1
What is the required value of C E for the circuit to have a lower cut off
frequency of 10 Hz
(A) 0.15 mF
(B) 1.59 mF
(C) 5 F
(D) 10 F
Common Data Questions Q.130 131*
For the circuit shown in figure
SOL 8.2
Option (D) is correct.
Let v > 0.7 V and diode is forward biased. Applying Kirchoffs voltage law
10 i # 1k v = 0
10 : v 0 . 7 D ( 1000 ) v = 0
500
10 ( v 0.7) # 2 v = 0
v = 11 . 4 = 3.8 V > 0 . 7
3
i = v 0 . 7 = 3 . 8 0 . 7 = 6.2 mA
Condition for the race around
It occurs when the output of the circuit ( Y 1 , Y 2 ) oscillates between 0 and 1
checking it from the options.
1. Option (A): When CLK = 0
Output of the NAND gate will be A 1 = B 1 = 0 = 1 . Due to these input to
the next NAND gate, Y 2 = Y 1 : 1 = Y 1 and Y 1 = Y 2 : 1 = Y 2 .
If Y 1 = 0 ,
Y 2 = Y 1 = 1 and it will remain the same and doesnt oscillate.
If Y 2 = 0 ,
Y 1 = Y 2 = 1 and it will also remain the same for the clock
period. So, it wont oscillate for CLK = 0 .
So, here race around doesnt occur for the condition CLK = 0 .
2. Option (C): When CLK = 1 , A = B = 1
A 1 = B 1 = 0 and so Y 1 = Y 2 = 1
And it will remain same for the clock period. So race around doesnt occur
for the condition.
3. Option (D): When CLK = 1 , A = B = 0
So,
A 1 = B 1 = 1
And again as described for Option (B)