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Circuit design for Combinatorial Logic

- Sum of Products (SOP) terms


- Formulation of Boolean expression from the Truth table
- Real life problem: create the Truth table and solve problem

CIRCUIT DESIGN FOR COMBINATIONAL LOGIC


Aim: we need to able to design a circuit to perform a given
logic function.
If we already have a logic expression for a circuit then a design
can be implemented by connecting up gates in the same order as
in the logic expression.
e.g. XOR gate is described by the expression: Z A.B A.B
Design then is:

CIRCUIT DESIGN FOR COMBINATIONAL LOGIC


If a Boolean expression is given it is easy to implement the
circuit.

Most of the cases we need to generate a Boolean expression


from a given Truth table.

In some cases a statement of the problem is supplied.

We simplify a given expression using Boolean algebra.

To design a circuit we need a standard systematic method.


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Canonical Forms
These are the formal methods which give you the techniques to
construct a logic expression from any truth table.
Two types of Canonical Forms:
1st Canonical Form = Sum of Products (SOP)

Sum of Products (1st Canonical Form)


How to form a Logic expression from a Truth table by SOP method:
1. Look for each entry in the truth table with an output =1
2. Create an AND operation of the inputs using either:
- the normal variable if its value is 1
- or the inverse if the value is zero.
3. The AND-ed groups are then OR-ed to give the output/final expression.
Follow the next example
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In general we can obtain an expression describing the logic


function from the Truth table (SOP method) ; e.g.

1. Consider the lines where the


output is 1
2. Write expressions for each
of these lines using AND
function
3. Z is then all these
expressions connected
together using OR function

Z = ABC + ABC + ABC + ABC

Z = BC(A + A) + AC(B + B) + AB(C + C)


Z = BC + AC + AB
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A truth table for a circuit to add numbers (a Full Adder)

A
0
0
0
0
1
1
1
1

B
0
0
1
1
0
0
1
1

Cin
0
1
0
1
0
1
0
1

SUM
0
1
1
0
1
0
0
1

Cout
0
0
0
1
0
1
1
1

SUM = ABCin + ABCin + ABCin + ABCin


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Other Examples:

SOP:-

Other Examples:
A

Steps for DESIGNING a logic system


1. DEFINE the problem
2. WRITE the truth table
3. WRITE the Boolean (OR LOGIC) equations
4. SIMPLIFY equations to minimise the number of gates
5. DRAW a logic diagram
6. IMPLEMENT the logic diagram using the electronic circuits

Need to MINIMISE the expression using Boolean Algebra Laws

EXAMPLE:
We have a car with 3 main control systems. We want a warning lamp to
light if any of the following conditions occur:
1. ALL SYSTEMS are down
2. Systems A, B DOWN but C is OK
3. Systems A, C DOWN but B is OK
4. System A DOWN but B, C are OK

1. DEFINE THE PROBLEM


Note: There are two possible states for each system.
Assign:
SYSTEM: DOWN = 0, OK = 1
LIGHT: OFF = 0, ON = 1
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2. TRUTH TABLE

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Minimal Canonical Forms: Minimisation using


KARNAUGH MAPS
We have seen that minimisation using Boolean Algebra is a bit
CUMBERSOME.
Doing this simplification algebraically can be very difficult and time-consuming.
We can represent any logical expression on a diagram called a KARNAUGH
map.
This map provides a SYSTEMATIC method of simplifying a Boolean function
to produce the simplest SUM OF PRODUCTS expression.
KARNAUGH MAP FORMAT:
For N variables we have 2N combinations, each combination is contained in a
KARNAUGH CELL.

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How to generate a Karnaugh Map (K-Map)?


A

1.Draw a Grid with A running horizontally and B vertically

B 0
1
2. In the horizontal direction, let 0 represent and let 1 represent A.
Similarly in the vertical direction, let 0 represent B and let 1 represent B.
3. Put a 1 in the grid in each position where the corresponding term is in
the Canonical form:

Therefore the grid is:

1
1

B 0
1

These cells with 1s are called 1-cells


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Then put zeros in the rest to finish off the K-Map

A
B 0

0
0

1
1

4. To perform the minimization, we draw loops around any vertical or


horizontal group of 1s. e.g.,

A
B 0

0
0

1
1

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5. These groups of 1s represent terms that have both the variable


and its inverse.
e.g. the vertical loop represents

A.B A .B A . B B A
So that group of terms can be simplified to A
6. Repeat step 5 with all the loops to get: Z = A + B

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Complete simplification Process Using K- Map


Construct the K-map and place 1s in those squares
corresponding to the 1s in the truth table. Place 0s in the
other squares.
Examine the map for adjacent 1s and loop 1s which are
not adjacent to any other 1s. These are called isolated
1s.
Next look for those 1s which are adjacent to only one
other 1. Loop any pair containing such a 1.
Loop any octet even if some of the 1s have already been
looped.
Loop any quad that contains one or more 1s which have
not already been looped.
Loop any pairs necessary to include any 1s that have not
yet been looped, making sure to use the minimum
number of loops.
For the OR sum of all the terms generated by each loop.
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Example 2. K-Maps with 3 variables

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Example 3. Try another example with 3 variables

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Example 4.
Karnaugh Map (K-Map)
AB
C

0
1

00
0
0

01
0
1

11
1
1

10
0
1

Truth Table
Z = AB + BC + AC
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Example 5.
SUM:

in

0
1

1
0

0
1

1
0

No minimisation

Cout:

in

0
1

1
1

0
1

Cout = AB + BCin + ACin


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Example 6.

Karnaugh Map (K-Map)

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Example 7.

0
0

(1)

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