CpE 112

8086/8088 Memory Interface

8088 8bit-bus
Given 1- 27256 (EPROM 64x8) and 4-32Kx8 (SRAM 32x8)
Chose memory map as follow:

MEMORY MAP

64K ROM

SEL8

FFFFF
F0000

ADDRESS BUS
A0-A4

A0-A15

SEL3/
SEL2/
A0-A15

A0-14
CS/

SEL8/

D0-D7 RD/

D0-D7

SEL1/
SEL0/

CS/
RD/ OE/

32Kx8
RAMs

27256
EPROM

M/IO' GO TO DECODER CIRCUITS

20000

32K RAM
32K RAM

SEL3
SEL2

32K RAM
32K RAM

SEL1
SEL0

DATA BUS

18000
RD/

CONTROL BUS

RD/ WR/

MEMORY
ADDRESS
00000-07FFF
08000-0FFFF
10000-17FFF
18000-1FFFF
F0000-FFFFF

10000
08000
00000

A19 A18 A17 A16

A15 A14 A13 A12

A11 A10 A9 A8

A7 A6 A5 A4

A3 A2 A1 A0

0000
0000
0001
0001
1111

0XXX
1XXX
0XXX
1XXX
XXXX

XXXX
XXXX
XXXX
XXXX
XXXX

XXXX
XXXX
XXXX
XXXX
XXXX

XXXX
XXXX
XXXX
XXXX
XXXX

IMPLEMENTATION OF SEL0/-SEL1/ USING 3-TO-8 DECODER

M/IO'
A19
A18
A17
A16
A15

6 G1 Y7
4 G2A Y6
5 G2B Y5
138 Y4
3
Y3
2 C
B
Y2
1 A
Y1
Y0

7
9
10
11
12
13
14
15

SEL3/
SEL2/
SEL1/
SEL0/

DECODER

SEL0/
SEL1/
SEL2/
SEL3/
SEL8/

IMPLEMENTATION OF SEL8/ USING

NAND GATE

A19
A18
A17
A16
M/IO'

SEL8/

Klinkhachorn:Cpe 112:1/12/2000

CpE 112
8086/8088 Memory Interface
8086 16 bit-bus
Given 2- 27128 (EPROM 32x8) and 4-32Kx8 (SRAM 32x8)
Chose memory map as follow:

MEMORY MAP
32KX16 ROM

RAM
SEL8
MODULE
2-32KX8

(64K BYTES)

FFFFF
F0000
ADDRESS BUS

A1-A15

A1-A15

2-32Kx8 ROM
Module 0
2-32Kx8 ROM
Module 1
2-32Kx8 ROM
Module

A0-A14

A0-A14
CS/

CS/

D0-D7 RD/
Low
Bytes

D0-D7

SEL0_HIGH/
SEL0_LOW/
SEL1_HIGH/
SEL1_LOW/
SEL8_HIGH/
SEL8_LOW/

D0-D7 RD/
High
Bytes

D8-D15

DATA BUS

20000
RD/

SEL1

32KX16 RAM
(64K BYTES)

SEL0

32KX16 RAM
(64K BYTES)

RD/

WR/

CONTROL BUS

**Note:-For 16 bit bus (8086), starts the address connection from

address bus - A1 (A0 and BHE/ will be used to select Low (even) and High
(ODD) Bytes in the decoder circuits.

10000

00000

A19 A18 A17 A16

A15 A14 A13 A12

A11 A10 A9 A8

A7 A6 A5 A4

A3 A2 A1 A0

0000
0001
1111

XXXX
XXXX
XXXX

XXXX
XXXX
XXXX

XXXX
XXXX
XXXX

XXXXXXXXXX

IMPLEMENTATION OF SEL0_LOW/,SEL0_HIGH/,
SEL1_LOW,SEL1_HIGH/ USING 3-TO-8 DECODER
M/IO'
A19

A18
A17
A16

6
G1 Y7
4
G2A Y6
5 G2B
Y5
138 Y4
3
C
Y3
2
Y2
1 B
A
Y1
Y0

7
9
10
11
12
13
14
15

SEL1_HIGH/
SEL1_LOW/
SEL0_HIGH/
SEL0_LOW/

MEMORY
ADDRESS
00000-0FFFF
10000-1FFFF
F0000-FFFFF

DECODER

SEL0/
SEL1/
SEL8/

IMPLEMENTATION OF SEL8_LOW,
SEL8_HIGH USING NAND AND ORs
GATES
M/IO'
A19
A18
A17
A16

SEL8_HIGH/
SEL8_LOW/

BHE/
A0

BHE/
A0

Klinkhachorn:Cpe 112:1/12/2000