DMA (Direct Memory Access) a part of System on Chips.

DMA channels (Earlier) ISA (Industry Standard Architecture) for IBM compatible computers
Accelerated Graphics Port(AGP) and Peripheral Component Interconnect(PCI) expansion cards,
which are a lot faster.
DMA- Each channel requires two lines to function. One line is for DMA controller, which asks for
clearance from the CPU. Other line CPU recognizes that DMA is able to send data over lines
without disruption from CPU.

Computers system resource tools are used for communication b/w H/W and S/W. 4 types of
system resources are: I/O addresses, memory addresses, Interrupt request numbers, DMA
channels.
Function: DMA channels are used to communicate data b/w peripheral device and system
memory. It basically enables data transfer without exposing CPU to work overload.

With DMA, CPU can process other tasks while data is being transferred, transfer of data being
initiated first by the CPU. During transfer of data b/w DMA channel and o/p device, CPU performs
other tasks.
As data transfer is complete, CPU receives interrupt request from DMA controller. A device
applying DMA technology uses only a single channel. To avoid a conflict, sometimes the BIOS
must assign a different channel to a device. A conflict can happen when more than one device
tries to use the same channel.

Understanding Cache: Memory bandwidth is the rate at which data can be read from or stored
into a semiconductor memory by a processor. It is usually expressed in unit of bytes/second.
It is a good way of understanding how well our application uses cache memory. Todays
processors are built under the assumption that small amt. of cache (fast memory) is used more
often than a large amount of DRAM (slow memory).

In computer science, locality of reference, also known as principle of locality, is a term for
phenomenon in which same values, or related storage locations are frequently accessed
depending on memory access pattern.

Principle of locality:
-Program access relatively small portion of address space at any instant of time.

Two types of locality:

-Temporal locality. if item is referenced, it will tend to be referenced soon.
-Spatial locality. if item is referenced, items whose addresses are close by tend to be referenced
soon.

ProcessorCacheLower memory(DRAM)

A Write Buffer(FIFO) is needed between the Cache and Memory.

-Processor writes data into cache and write buffer.
-Memory controller writes contents of the buffer to memory.

How cache works? (It works on principle of locality)

-Temporal locality: If an item is referenced, it will tend to be referenced soon. Keeps more
recently accessed data items closer to the processor.
-Spatial locality: If an item is referenced, items whose addresses are close by tend to be
referenced soon. Move blocks consists of contiguous blocks to cache.

PCI: (Peripheral Component Interconnect): It is a local computer bus for attaching hardware
devices in a computer.
Bus mastering: It is a feature supported by many bus architectures that enables a device
connected to the bus to initiate transactions, referred to as First Party DMA. Some type of
buses allows only one device to initiate transactions.

Devices connected to PCI bus appear to bus master to be connected directly to its own bus.

GPIO- General Purpose Input Output.

UART (Universal Asynchronous Receiver/Transmitter): It is a protocol for serial transfer of
information, like: to convert voltage levels that are compatible with TTL. Serial communication is
process of sending data one bit at a time, sequentially, over a communication channel or
computer bus. It is the UART which takes bytes of data and transmits individual bits in sequential
fashion. In asynchronous transmission, data is transmitted without sender having to send a clock
signal to the receiver. Sender and receiver agree on timing parameters in advance and special
bits are added to each word to synchronize sending and receiving units.

ARM: Acorn/Advanced RISC Machine. It is a family of RISC: Reduced Instruction Set Computing
architecture for computer processors. Processors with RISC architecture typically require fewer
transistors than those with CISC architecture which reduces cost, power consumption and heat
dissipation Desirable for light, portable, battery-powered devices.