Q.1 Ans.

1- 6 lines description of the project?

Ans. Design 4-bit Decimal counter that counts from 0 to 9 then rolls off to 0. The project has been designed
using a 4-bit synchronous decade counter which will count from 0000 to 1001, in all counting 10 clock cycles.
The flip flops used to design this synchronous decade counter are 4 D flip flops, the outputs of which will give
the desired count from 0000 to 1001. The moore machine is used for the synchronous decade counter
implementation.

2- Name of the simulation package used with Version?

3- Outline the steps taken to design your decade count down counter”
Ans. Reset
S9
A- State Diagram: S0
/1001
Ans. /0000 eset
S8 S1
/1000 /0001

0001

S7
S2
/0111
/0010

S3
S6 /0011
/0110

S4
S5 /0100
/0101

B- State Table:

Present State Next State D Inputs as Next States

Q3 Q2 Q1 Q0 Q3+ Q2+ Q1+ Q0+ D3 D2 D1 D0

0 0 0 0 0 0 0 1 0 0 0 1

0 0 0 1 0 0 1 0 0 0 1 0

0 0 1 0 0 0 1 1 0 0 1 1
0 0 1 1 0 1 0 0 0 1 0 0

0 1 0 0 0 1 0 1 0 1 0 1

0 1 0 1 0 1 1 0 0 1 1 0

0 1 1 0 0 1 1 1 0 1 1 1

0 1 1 1 1 0 0 0 1 0 0 0

1 0 0 0 1 0 0 1 1 0 0 1

1 0 0 1 0 0 0 0 0 0 0 0

C- Excitation Tables:
As we are using the D Flip flop for the implementation hence the excitation table used for the D Flip flop is as
follows:
Q Q+ D

0 0 0

0 1 0

1 0 1

1 1 1

The excitation tables using D Flip flop for the counter is as shown follows:
D Inputs as Next States

D3 D2 D1 D0

0 0 0 1

0 0 1 0

0 0 1 1

0 1 0 0

0 1 0 1

0 1 1 0

0 1 1 1

1 0 0 0

1 0 0 1

0 0 0 0
D- Next state Table:
Next State

Q3 + Q2+ Q1+ Q0+

0 0 0 1

0 0 1 0

0 0 1 1

0 1 0 0

0 1 0 1

0 1 1 0

0 1 1 1

1 0 0 0

1 0 0 1

0 0 0 0

E- K-Maps minimization for all Flip-Flops inputs?

K- Maps for D3, D2, D1 and D0 are as follows:

For D3:

D3 Q1'.Q0' Q1'.Q0 Q1.Q0 Q1.Q0'

Q3'.Q2' 0 0 0 0

Q3'.Q2 0 0 1 0

Q3.Q2 X X X X

Q3.Q2' 1 0 X X

D3 = Q3.Q0' + Q2.Q1.Q0

For D2:

D3 Q1'.Q0' Q1'.Q0 Q1.Q0 Q1.Q0'

Q3'.Q2' 0 0 1 0

Q3'.Q2 1 1 0 1

Q3.Q2 X X X X
Q3.Q2' 0 0 X X

D2 = Q1'.Q2 + Q2'.Q1.Q0

For D1:

D3 Q1'.Q0' Q1'.Q0 Q1.Q0 Q1.Q0'

Q3'.Q2' 0 1 0 1

Q3'.Q2 0 1 0 1

Q3.Q2 X X X X

Q3.Q2' 0 0 X X

D1 = Q3'.Q1'.Q0 + Q1.Q0'

For D0:

D3 Q1'.Q0' Q1'.Q0 Q1.Q0 Q1.Q0'

Q3'.Q2' 1 0 0 1

Q3'.Q2 1 0 0 1

Q3.Q2 1 0 0 1

Q3.Q2' 1 0 0 1

D0 = Q0'

F- Circuit Diagram for the decade counter?

4- List of all components used with quantity?

Component Description Quantity

5- Partial Drawings for all sections (one by one with names mentioned). (Cut from LogiSim then paste as image).
A- Clock Section

B- Four Counters Section

C- Input Section (Switches, etc.)

D- Output Section

E- Comparator Section

F- Any Control section

6- 10 lines on description of how it works?

7- Snapshots of:

A- Loading initial content for every counter?

B- The 4 counters counting UP all together?

C- How data is loaded and lock opens (LED)?

8- Components count weights?

Fill next table?

Number of Total components

Number of connection lines used

Q.2. Replicate the one-digit counter to 4 digits (16-bit).

4-bit 4-bit 4-bit 4-bit

Decimal Decimal Decimal Decimal
counter counter counter counter

Clock

Reset
Q.3. Introduce X as input to the counter that when X=1 the counter counts up and when X=0 the counter stops
but holds its state (the number stopped shouldn’t go ). Also introduce Y output signal, when the counter
rolls off from 9 to 0 the Y=1 then Y=0 when the counter counts other counts.

Ans. A. State Diagram:

S1 Reset
/0001 S0 /0000
/0000 eset
S1 0001 S1
/0001
0001 /0001

0001 0001

S1
S2
/0001
/0010
0001
0001

S3
S1 /0011
/0001
0001
0001

S4
S1 /0100
/0001
0001
0001
B. State Table:

Present State Next State

Q3 Q2 Q1 Q0 For X = 0 For X = 1

0 0 0 0 0 0 0 0

0 0 0 1 0 0 0 0

0 0 1 0

0 0 1 1

0 1 0 0

0 1 0 1

0 1 1 0

0 1 1 1

1 0 0 0

1 0 0 1