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Design Considerations For An LLC Resonant Converter PDF
Design Considerations For An LLC Resonant Converter PDF
Hangseok Choi
Power Conversion Team
www.fairchildsemi.com
1. Introduction
Growing demand for higher power
density and low profile in power
High frequency
converter has forced to increase operation
switching frequency
However, Switching Loss has been
an obstacle to high frequency
operation
2
1. Introduction
3
1. Introduction
Q1 resonant network
Ip
Vin n:1
Vd +
Lr Ro
Q2 VO
Lm -
Ids2 Cr
The resonant inductor (Lr) and resonant capacitor (Cr) are in series
The resonant capacitor is in series with the load
9 The resonant tank and the load act as a voltage dividerÆ DC gain is always
lower than 1 (maximum gain happens at the resonant frequency)
9 The impedance of resonant tank can be changed by varying the frequency
of driving voltage (Vd)
4
1. Introduction
Advantages
9 Reduced switching loss and EMI through ZVS Æ Improved
efficiency
9 Reduced magnetic components size by high frequency operation
Drawbacks
9 Can optimize performance at one operating point, but not with wide
range of input voltage and load variations
9 Can not regulate the output at no load condition
9 Pulsating rectifier current (capacitor output): limitation for high
output current application
5
1. Introduction
Q1 resonant network
Ip
Vin n:1
Vd +
Llkp Ro
Q2 VO
Cr
-
Ids2
The resonant inductor (Lr) and resonant capacitor (Cr) are in series
The resonant capacitor is in parallel with the load
9 The impedance of resonant tank can be changed by varying the
frequency of driving voltage (Vd)
6
1. Introduction
Advantages
9 No problem in output regulation at no load condition
9 Continuous rectifier current (inductor output): suitable for high
output current application
Drawbacks
9 The primary side current is almost independent of load condition:
significant current may circulate through the resonant network,
even at the no load condition
9 Circulating current increases as input voltage increases: limitation
for wide range of input voltage
7
1. Introduction
8
1. Introduction
9
1. Introduction
Q1 Integrated transformer
Q1
Vin Io Ip Io
n:1 ID Vin n:1 ID
Vd + Vd +
Ro Ro
Lr Llkp Llks
Q2 VO Q2 VO
Lm Im
- Lm -
Ids2 Cr Ids2 Cr
10
2. Operation principle and Fundamental Approximation
Im
Square wave generator
Ids2
Q1 resonant network Rectifier network
Ip Io
Vin n:1 ID
Vd +
ID
Llkp Llks Ro
Q2 Im VO Vin
Vd
Lm - (Vds2)
Ids2 Cr
Vgs1
Vgs2
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2. Operation principle and Fundamental Approximation
The resonant network filters the higher harmonic currents. Thus, essentially
only sinusoidal current is allowed to flow through the resonant network even
though a square wave voltage (Vd) is applied to the resonant network.
Fundamental approximation: assumes that only the fundamental component of
the square-wave voltage input to the resonant network contributes to the power
transfer to the output.
The square wave voltage can be replaced by its fundamental component
Isec Ip Isec
Ip
Vd Vd Resonant
Resonant
netw ork netw ork
12
2. Operation principle and Fundamental Approximation
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2. Operation principle and Fundamental Approximation
ωo ωp
8n 2
Rac = Ro
π2
n2Llks 8n 2
Rac = Ro
π2
Cr Llkp 1 1
ωo = , ωp =
VdF Rac VROF Lr Cr L p Cr
Lm
Lp = Lm + Llkp , Lr = Llkp + Lm //(n 2 Llks )
14
2. Operation principle and Fundamental Approximation
Cr Llkp Llks
Assuming Llkp=n2Llks
Vd +
Vin
+
+
VO ω2 k
( 2)
Lm VRI 2n ⋅ VO ωp k +1
M= =
- Ro Vin ω ω2 (k + 1) 2 ω2
- j ( ) ⋅ (1 − 2 ) ⋅ Q + (1 − 2 )
n:1
- ωo ωo 2k + 1 ωp
Lr = Llkp + Lm //(n Llks )
2
= Llkp + Lm // Llkp Lr / Cr Lm
Lp
Q= k=
L p = Llkp + Lm 1: Rac Llkp
L p − Lr
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2. Operation principle and Fundamental Approximation
1.6 Q = 0.8
Q = 0.6
k +1 Lp Q = 0.4
= =
1.4
M @ω =ωo
Lp − Lr
G ain
Q = 0.2
k
1.2
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2. Operation principle and Fundamental Approximation
2.4
2.2
2.0
k=1.5
Peak Gain
1.8
k=1.75
k=2
1.6
k=2.5
1.4 k=3
k=4
k=5
1.2
k=7
k=9
1
0.2 0.4 0.6 0.8 1 1.2 1.4
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3. Design procedure
Design example
- Input voltage: 380Vdc (output of PFC stage)
- Output: 24V/5A (120W)
- Holdup time requirement: 17ms
- DC link capacitor of PFC output: 100uF
PFC DC/DC
Q1 ID
Ip
VDL Np:Ns
Vd VO
Llkp Llks + Ro
CDL Q2 Im
Lm -
Ids2 Cr
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3. Design procedure
2 PinTHU
Vin min = VO. PFC 2 −
CDL
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3. Design procedure
1.14
Mmin for Vinmax
k +1
M= = 1.14
k
fs
fo
20
3. Design procedure
Np Vin max
n= = ⋅ M min
N s 2 (Vo + VF )
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3. Design procedure
k = 7 , M max = 1.36
peak gain = 1.36 × 110% = 1.5
22
3. Design procedure
23
3. Design procedure
Np=52T Ns1=Ns2=6T
Bifilar
24
3. Design procedure
25
4. Conclusion
26
Appendix - FSFR-series
Variable frequency control with 50% duty cycle for half-bridge resonant
converter topology
High efficiency through zero voltage switching (ZVS)
Internal Super-FETs with Fast Recovery Type Body Diode (trr=120ns)
Fixed dead time (350ns)
Up to 300kHz operating frequency
Pulse skipping for Frequency limit (programmable) at light load condition
Simple remote ON/OFF control
Various Protection functions: Over Voltage Protection (OVP), Over Current
Protection (OCP), Abnormal Over Current Protection (AOCP), Internal Thermal
Shutdown (TSD)
27
Appendix - FSFR-series demo board
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Appendix - FSFR-series demo board
29