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Logical channels
Layer 2
Medium Access Control
Transport channels
Code According to Fixed codes Fixed codes Fixed codes Shared Shared
Usage maximum bit per cell. per cell. per cell. between between
rate. users. users.
Fast Power Yes No No Yes Yes Yes
Control
Soft Yes No No No No No
Handover
Suited for: Medium or Small data Small data Small or Medium or Medium or
large data amounts. amounts. medium data large data large data
amount. amounts. amounts. amounts.
Higher Layer
Physical Layer
Decoding &
TFCI Coding & Multiplexing TFCI
Demultiplexing
Overview
Configuration
Radio frame
A radio frame is a processing unit which consists of 15 slots.
The length of a radio frame corresponds to 38400 chips.
Time slot
A time slot is a unit which consists of fields containing bits.
The length of a slot corresponds to 2560 chips.
Spreading Modulation: QPSK.
Data Modulation: BPSK.
Spreading
Two-level spreading processes
Overview
Spreading (cont.)
Channelization operation
OVSF codes.
Transform every data symbol into a number of chips.
Increase the bandwidth of the signal.
The number of chips per data symbol is called the Spreading Factor.
Data symbols on I- and Q-branches are independently multiplied
with an OVSF code.
Scrambling operation
Long or short Gold codes.
Applied to the spread signals.
Randomize the codes
Spread signal is further multiplied by complex-valued scrambling
Uplink Physical Channels
Data
DPDCH Ndata bits
Pilot Bits.
Support channel estimation for coherent detection.
Frame Synchronization Word (FSW) can be sued to
confirm frame synchronizaton.
Transmit Power Control (TPC) command.
Inner loop power control commands.
Feedback Information (FBI).
Support of close loop transmit diversity.
Site Selection Diversity Transmission (SSDT)
Transport-Format Combination Indicator (TFCI) –
optional
TFCI informs the receiver about the instantaneous
transport format combination of the transport channels.
Pilot Bit Patterns with Npilot=3,4,5,6
Npilot = 3 Npilot = 4 Npilot = 5 Npilot = 6
Bit # 0 1 2 0 1 2 3 0 1 2 3 4 0 1 2 3 4 5
Slot #0 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 0
1 0 0 1 1 0 0 1 0 0 1 1 0 1 0 0 1 1 0
2 0 1 1 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1
3 0 0 1 1 0 0 1 0 0 1 0 0 1 0 0 1 0 0
4 1 0 1 1 1 0 1 1 0 1 0 1 1 1 0 1 0 1
5 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 0
6 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 0 0
7 1 0 1 1 1 0 1 1 0 1 0 0 1 1 0 1 0 0
8 0 1 1 1 0 1 1 0 1 1 1 0 1 0 1 1 1 0
9 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
10 0 1 1 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1
11 1 0 1 1 1 0 1 1 0 1 1 1 1 1 0 1 1 1
12 1 0 1 1 1 0 1 1 0 1 0 0 1 1 0 1 0 0
13 0 0 1 1 0 0 1 0 0 1 1 1 1 0 0 1 1 1
14 0 0 1 1 0 0 1 0 0 1 1 1 1 0 0 1 1 1
Shadowed column is defined as FSW (Frame Synchronization Word).
Pilot Bit Patterns with Npilot=7,8
Npilot = 7 Npilot = 8
Bit # 0 1 2 3 4 5 6 0 1 2 3 4 5 6 7
Slot #0 1 1 1 1 1 0 1 1 1 1 1 1 1 1 0
1 1 0 0 1 1 0 1 1 0 1 0 1 1 1 0
2 1 0 1 1 0 1 1 1 0 1 1 1 0 1 1
3 1 0 0 1 0 0 1 1 0 1 0 1 0 1 0
4 1 1 0 1 0 1 1 1 1 1 0 1 0 1 1
5 1 1 1 1 1 0 1 1 1 1 1 1 1 1 0
6 1 1 1 1 0 0 1 1 1 1 1 1 0 1 0
7 1 1 0 1 0 0 1 1 1 1 0 1 0 1 0
8 1 0 1 1 1 0 1 1 0 1 1 1 1 1 0
9 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
10 1 0 1 1 0 1 1 1 0 1 1 1 0 1 1
11 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1
12 1 1 0 1 0 0 1 1 1 1 0 1 0 1 0
13 1 0 0 1 1 1 1 1 0 1 0 1 1 1 1
14 1 0 0 1 1 1 1 1 0 1 0 1 1 1 1
Shadowed column is defined as FSW (Frame Synchronization Word).
FBI Bits
The FBI bits are used to support techniques requiring
feedback from the UE to the UTRAN Access Point,
including closed loop mode transmit diversity and site
selection diversity transmission (SSDT).
S field D field
NFBI
The S field is used for SSDT signalling, while the D field is
used for closed loop mode transmit diversity signalling.
The S field consists of 0, 1, or 2 bits. The D field consists of
0 or 1 bit. Simultaneous use of SSDT power control and
closed loop mode transmit diversity requires that the S field
consists of 1 bit.
TFCI Bits
1 11 1
0 00 0
Spreading of UL DPCH
c d ,1 βd
DPDCH1
c d ,3 βd
Σ
DPDCH3 I
c d ,5 βd
DPDCH5
S lo n g , n o r S s h o r t , n
I+ jQ
c d ,2 βd
DPDCH2
c d ,4 βd
DPDCH4
Σ
c d ,6 βd Q
DPDCH6
j
cc βc
DPCCH Only one UL DPCCH.
Up to six parallel DPDCHs.
Spreading of UL DPCH
i
Clong,n (i) = clong,1,n (i)1 + j(−1) clong,2,n (2 )
i
2
Short scrambling code allocation
The n-th UL short scrambling code
Sdpch,n(i) = Cshort,n(i), i = 0, 1, …, 38399
i mod256
Cshort,n (i ) = cshort,1,n (i mod256)1 + j(−1)i cshort,2,n 2
2
Physical Random Access Channel (PRACH)
5120 chips
4096 chips
10 ms (one radio frame)
Data
Data Ndatabits
Tslot = 2560 chips, 10*2k bits (k=0,1,2,3.)
Pilot TFCI
Control Npilotbits NTFCIbits
Tslot = 2560 chips, 10 bits
cd βd
Sr-msg,n
PRACH message I
data part I+jQ
PRACH message Q
control part
cc βc j
PRACH Message Part Scrambling Code
4096 chips
0 or 8 slots N*10 msec
Data
Data Ndata bits
cd βd
Sc-msg,n
PCPCH message I
data part
I+jQ
PCPCH message Q
control part
cc βc j
PCPCH Message Part OVSF Code
Allocation
Control part is always spread by cc = Cch,256,0
Data part is spread by cd = Cch,SF,k with SF = 4 to 256
and k = SF/4.
A UE is allowed to increase SF during the message
transmission on a frame by frame basis.
PCPCH Message Part Scrambling
Code Allocation
The set of scrambling codes are
10 ms long
Cell-specific
one-to-one correspondence to the signature sequences and
the access sub-channel used by the access preamble part.
Both long or short scrambling codes can be used.
There are 64 uplink scrambling codes defined per cell and
32768 different PCPCH scrambling codes defined in the
system.
PCPCH Message Part Scrambling
Code Allocation
The n:th PCPCH message part scrambling code, denoted Sc-
msg,n, where n =8192,8193, …,40959 is based on the
scrambling sequence and is defined as:
Long scrambling codes : Sr-msg,n(i) = Clong,n(i ), i = 0, 1, …, 38399
Short scrambling codes : Sr-msg,n(i) = Cshort,n(i), i = 0, 1, …, 38399
The 32768 PCPCH scrambling codes are divided into 512
groups with 64 codes in each group.
There is a one-to-one correspondence between the group of
PCPCH preamble scrambling codes in a cell and the primary
scrambling code used in the downlink of the cell.
Uplink Modulation
Re{S} Pulse-
Complex-valued Split shaping
chip sequence S real &
from spreading imag.
Im{S} Pulse-
operations parts
shaping
-sin(ωt)
Uplink Modulation
Downlink DPCH
CCPCH, PICH AICH, CPICH
Idle On-line
MS MS
SCH
Power-on
MS
Downlink Transmit Diversity
P-CCPCH – ˇ –
SCH ˇ – –
S-CCPCH – ˇ –
DPCH – ˇ ˇ
PICH – ˇ –
PDSCH – ˇ ˇ
AICH – ˇ –
CSICH – ˇ –
AP-AICH - ˇ -
CD/CA-ICH - ˇ -
DL-DPCCH for CPCH - ˇ ˇ
Space Time Block Coding Based Transmit
Antenna Diversity (STTD)
The STTD encoding is optional in UTRAN. STTD
support is mandatory at the UE.
STTD encoding is applied on blocks of 4 consecutive
channel bits.
b0 b1 b2 b3 A ntenna 1
b0 b1 b2 b3
-b 2 b 3 b 0 -b 1 A ntenna 2
C hannel b its
Prim ary
SC H ac p ac p ac p
256 chips
2560 chips
O ne 10 m s SC H radio fram e
(Tx OFF)
(Tx OFF)
acp (Tx OFF)
Antenna 2
(Tx OFF)
(Tx OFF)
acsi,1 (Tx OFF)
Closed Loop Mode Transmit Diversity
CPICH1 Ant1
w1
Spread/scramble
∑
DPCCH
DPCH Ant2
DPDCH
∑
w2 CPICH2
w1 w2
Parameters
Each frame= 15 slots = 10 ms
Each slot= 2560 chips
Each slot= one power-control period.
SF = 512/2k (e.g., SF=512, 256, ...,4)
Two basic types
With TFCI (for several simultaneous services)
Without TFCI (fixed-rate services)
It is the UTRAN that determines if a TFCI should be
transmitted and it is mandatory for all UEs to support
the use of TFCI in the downlink.
DL DPCH Compressed Mode
Symbol 0 0 1 0 1 2 3 0 1 2 3 4 5 6 7
#
Slot #0 11 11 11 11 11 11 10 11 11 11 10 11 11 11 10
1 00 11 00 11 00 11 10 11 00 11 10 11 11 11 00
2 01 11 01 11 01 11 01 11 01 11 01 11 10 11 00
3 00 11 00 11 00 11 00 11 00 11 00 11 01 11 10
4 10 11 10 11 10 11 01 11 10 11 01 11 11 11 11
5 11 11 11 11 11 11 10 11 11 11 10 11 01 11 01
6 11 11 11 11 11 11 00 11 11 11 00 11 10 11 11
7 10 11 10 11 10 11 00 11 10 11 00 11 10 11 00
8 01 11 01 11 01 11 10 11 01 11 10 11 00 11 11
9 11 11 11 11 11 11 11 11 11 11 11 11 00 11 11
10 01 11 01 11 01 11 01 11 01 11 01 11 11 11 10
11 10 11 10 11 10 11 11 11 10 11 11 11 00 11 10
12 10 11 10 11 10 11 00 11 10 11 00 11 01 11 01
13 00 11 00 11 00 11 11 11 00 11 11 11 00 11 00
14 00 11 00 11 00 11 11 11 00 11 11 11 10 11 01
DL DPCH TPC & TFCI
TPC
TPC Bit Pattern Transmitter Power
Control Command
NTPC = 2 NTPC = 4 NTPC = 8
11 1111 11111111 1
00 0000 00000000 0
TFCI
TFCI value in each radio frame corresponds to a
certain combination of bit rates of the DCHs
currently in use.
DL DPCH Multi-Code Transmission
DPDCH DPDCH
Condition:
Multicode
Transmission transmission is
Power Physical Channel 2 mapped onto several
parallel downlink
DPCHs using the same
•••
spreading factor.
Transmission
Power Physical Channel L Layer 1 control
information is
transmitted only on
One Slot (2560 chips) the first DL DPCH.
Common Pilot Channel (CPICH)
Frame Structure:
1 radio frame: Tf = 10 ms
Common Pilot Channel
Antenna 1 A A A A A A A A A A A A A A A A A A A A A A A A
Antenna 2 -A -A A A -A -A A A -A A -A -A A A -A -A A A -A -A A A -A -A
Frame#i Frame#i+1
Frame Boundary
P-CCPCH ˇ – –
SCH ˇ – –
S-CCPCH ˇ – –
DPCH ˇ ˇ ˇ
PICH ˇ – –
PDSCH* ˇ ˇ ˇ
AICH ˇ – –
CSICH ˇ – –
Note *: the same phase reference as with the associated DPCH shall be used.
Primary Common Control Physical Channel
(P-CCPCH)
Fixed rate: 30 kbps, SF=256.
Used to carry the BCH transport channel.
No TPC commands, no TFCI and no pilot bits.
Frame structure:
256 chips
Data
(Tx OFF)
N data1 =18 bits
1 radio frame: T f = 10 ms
Secondary Common Control Physical
Channel (S-CCPCH)
S-CCPCH is used to carry the FACH and PCH.
Two types of S-CCPCHs: those that include TFCI and those
that do not include TFCI.
It is the UTRAN that determines if a TFCI should be
transmitted, hence making it mandatory for all UEs to support
the use of TFCI.
TFCI Data Pilot
NTFCI bits Ndata1 bits Npilot bits
Tslot = 2560 chips, 20*2k bits (k=0..6)
1 radio frame: Tf = 10 ms
Secondary CCPCH Fields
Slot Channel Bit Channel Symbol SF Bits/ Bits/ Ndata1 Npilot NTFCI
Format #i Rate (kbps) Rate (ksps) Frame Slot
0 30 15 256 300 20 20 0 0
1 30 15 256 300 20 12 8 0
2 30 15 256 300 20 18 0 2
3 30 15 256 300 20 10 8 2
4 60 30 128 600 40 40 0 0
5 60 30 128 600 40 32 8 0
6 60 30 128 600 40 38 0 2
7 60 30 128 600 40 30 8 2
8 120 60 64 1200 80 72 0 8
9 120 60 64 1200 80 64 8 8
10 240 120 32 2400 160 152 0 8
11 240 120 32 2400 160 144 8 8
12 480 240 16 4800 320 312 0 8
13 480 240 16 4800 320 296 16 8
14 960 480 8 9600 640 632 0 8
15 960 480 8 9600 640 616 16 8
16 1920 960 4 19200 1280 1272 0 8
17 1920 960 4 19200 1280 1256 16 8
S-CCPCH Pilot Symbol Patterns
Npilot = 8 Npilot = 16
Symbol # 0 1 2 3 0 1 2 3 4 5 6 7
Slot #0 11 11 11 10 11 11 11 10 11 11 11 10
1 11 00 11 10 11 00 11 10 11 11 11 00
2 11 01 11 01 11 01 11 01 11 10 11 00
3 11 00 11 00 11 00 11 00 11 01 11 10
4 11 10 11 01 11 10 11 01 11 11 11 11
5 11 11 11 10 11 11 11 10 11 01 11 01
6 11 11 11 00 11 11 11 00 11 10 11 11
7 11 10 11 00 11 10 11 00 11 10 11 00
8 11 01 11 10 11 01 11 10 11 00 11 11
9 11 11 11 11 11 11 11 11 11 00 11 11
10 11 01 11 01 11 01 11 01 11 11 11 10
11 11 10 11 11 11 10 11 11 11 00 11 10
12 11 10 11 00 11 10 11 00 11 01 11 01
13 11 00 11 11 11 00 11 11 11 00 11 00
14 11 00 11 11 11 00 11 11 11 10 11 01
Characteristics of S-CCPCH
The FACH and PCH can be mapped to the same or to
separate Secondary CCPCHs.
If FACH and PCH are mapped to the same S-CCPCH,
they can be mapped to the same frame.
The main difference between a CCPCH and a downlink
dedicated physical channel is that a CCPCH is not inner-
loop power controlled.
The main difference between the P-CCPCH and S-
CCPCH is that the transport channel mapped to the P-
CCPCH can only have a fixed predefined transport
format combination, while the S-CCPCH support
multiple transport format combinations using TFCI.
Synchronisation Channel (SCH)
The SCH is a downlink signal used for cell search.
The SCH consists of: the Primary and Secondary SCH.
The 10 ms radio frames of the Primary and Secondary SCH
are divided into 15 slots, each of length 2560 chips.
Slot #0 Slot #1 Slot #14
Primary
SCH acp acp acp
256 chips
2560 chips
Data
Ndata1 bits
Tslot = 2560 chips, 20*2k bits (k=0..6)
1 radio frame: Tf = 10 ms
Physical Downlink Shared Channel (PDSCH)
AS #14 AS #0 AS #1 AS #i AS #14 AS #0
20 ms
Acquisition Indicator Channel (AICH)
AS #14 AS #0 AS #1 AS #i AS #14 AS #0
20 ms
CPCH Access Preamble Acquisition
Indicator Channel (AP-AICH)
AS #14 AS #0 AS #1 AS #i AS #14 AS #0
20 ms
CPCH Collision Detection/Channel Assignment
Indicator Channel (CD/CA-ICH)
CD/CA-ICH and AP-AICH may use the same or
different channelisation codes.
The CD/CA-ICH has a part of duration of 4096chips
where the CDI/CAI is transmitted, followed by a part
of duration 1024chips with no transmission that is not
formally part of the CD/CA-ICH.
The spreading factor (SF) used for channelisation of
the CD/CA-ICH is 256.
Paging Indicator Channel (PICH)
Np
q = PI + ((18 × (SFN + SFN / 8 + SFN / 64 + SFN / 512)) mod144)× mod Np
144
Paging Indicator Channel (PICH)
The PI calculated by higher layers is associated with the value
of the paging indicator Pq.
If a paging indicator in a certain frame is set to "1“, it is an
indication that UEs associated with this paging indicator and
PI should read the corresponding frame of the associated S-
CCPCH.
The PI bitmap in the PCH data frames over Iub contains
indication values for all higher layer PI values possible. Each
bit in the bitmap indicates if the paging indicator associated
with that particular PI shall be set to 0 or 1. Hence, the
calculation in the formula above is to be performed in Node B
to make the association between PI and Pq.
Paging Indicator Channel (PICH)
AS #14 AS #0 AS #1 AS #i AS #14 AS #0
20 ms
Secondary
SCH
Any CPICH
P-CCPCH Radio frame with (SFN modulo 2) = 0 Radio frame with (SFN modulo 2) = 1
τPICH
10 ms 10 ms
Timing Relationship between Physical
Channels
The P-CCPCH, on which the cell SFN is transmitted,
is used as timing reference for all the physical
channels, directly for downlink and indirectly for
uplink.
Transmission timing for uplink physical channels is
given by the received timing of downlink physical
channels.
SCH (primary and secondary), CPICH (primary and
secondary), P-CCPCH, and PDSCH have identical
frame timings.
Timing Relationship between Physical
Channels
The S-CCPCH timing may be different for different S-
CCPCHs, but the offset from the P-CCPCH frame timing
is a multiple of 256 chips, i.e. τS-CCPCH,k = Tk × 256 chip,
Tk ∈ {0, 1, …, 149}.
The PICH timing is τPICH = 7680 chips prior to its
corresponding S-CCPCH frame timing, i.e. the timing of
the S-CCPCH carrying the PCH transport channel with the
corresponding paging information.
AICH access slots #0 starts the same time as P-CCPCH
frames with (SFN modulo 2) = 0.
The DPCH timing may be different for different DPCHs,
but the offset from the P-CCPCH frame timing is a
multiple of 256 chips, i.e. τDPCH,n = Tn × 256 chip,
Tn ∈ {0, 1, …, 149}.
PICH/S-CCPCH Timing Relation
τPICH
PRACH/AICH Timing Relation
The downlink AICH is divided into downlink access slots,
each access slot is of length 5120 chips.
The uplink PRACH is divided into uplink access slots, each
access slot is of length 5120 chips.
Uplink access slot number n is transmitted from the UE τp-a
chips prior to the reception of downlink access slot number n,
n = 0, 1, …, 14.
One access slot
Acq.
Ind.
AICH access
slots RX at UE
τp-a
Pre- Pre-
amble amble Message part
PRACH access
slots TX at UE
τp-p τp-m
PRACH/AICH Timing Relation
DPCH frame
TDPCH TPDSCH
DPCCH/DPDCH Timing Relations
Uplink
In uplink the DPCCH and all the DPDCHs transmitted from one UE
have the same frame timing.
Downlink
In downlink, the DPCCH and all the DPDCHs carrying CCTrCHs of
dedicated type to one UE have the same frame timing.
Note: support of multiple CCTrChs of dedicated type is not part of the
current release.
Uplink/downlink timing at UE
At the UE, the uplink DPCCH/DPDCH frame transmission takes place
approximately T0 chips after the reception of the first detected path (in
time) of the corresponding downlink DPCCH/DPDCH frame.
T0 is a constant defined to be 1024 chips.
Spreading without SCH
The non-spread physical channel consists of a sequence of
real-valued symbols.
For all channels except AICH, the symbols can take the
three values +1, -1, and 0, where 0 indicates DTX.
For AICH, the symbol values depend on the exact
combination of acquisition indicators to be transmitted.
I
Sdl,n
Any downlink
S
S
physical channel
except SCH
→ Cch,SF,m
I+jQ
P Q
j
Spreading with SCH
Different downlink
Physical channels
G1
G2 Σ
P-SCH
Σ
GP
S-SCH
GS
Downlink Modulation
cos(ωt)
Re{T} Pulse-
Complex-valued Split shaping
chip sequence T real &
from summing imag.
parts Im{T} Pulse-
operations
shaping
-sin(ωt)
Multiplexing and Channel Coding
( 3G TS 25.212 )
Table of Contents
Overview of MCC
Transport channel related terminologies
UL-MCC
DL-MCC
Some examples
Overview of MCC
MCC – multiplexing and channel coding
Encoding data stream from MAC and higher layers to offer
transport services over the radio transmission link
Map transport block data into physical channel data
Operations performed in MCC
CRC attachment
Channel coding
Interleaving
Radio frame equalization/segmentation
Rate matching
Transport channel multiplexing
Mapping to physical channels
Overview of MCC
Transport block
Transport block Transport block
Transport block Transport block Transport block TrCH1
Transport Channel Related
Terminologies
Transport format
Format of definition for the delivery of transport block set during a
TTI (transmission time interval)
Format contains
Dynamic part
Transport block size
Transport block set size
Static part
Transmission time interval
Error protection
Channel coding type (1/2,1/3convolutional, turbo,no cc)
Rate matching parameter
CRC size (8bit, 12bit, 16bit, 24bit, no CRC)
Ex:
{320bits, 640bits}, { 10ms, ½ convolutional code, rate matching
parameter = 1, 8bits CRC }
Transport Channel Related
Terminologies
Transport format set
The set of transport formats associated to a transport
channel
Transport block set size and transport block size can be
different in a transport format set
All other parameters are fixed in a transport format set
Ex:
{ 40bits, 40bits } , { 80bits, 80bits }, { 160bits, 160bits }
{ 10ms, ½ convolutional code, rate matching parameter =
1, 8bits CRC }
Transport Channel Related
Terminologies
Transport format combination
L1 multiplexes several transport channels into one
physical channel
Transport format is a combination of currently valid
transport formats of different transport channel
Examples:
DCH1: {20bits, 20bits}, {10ms, ½ convolutional code,
rm=2}
DCH2: {320bits, 1280bits}, {10ms, turbo code, rm = 3}
DCH3: {320bits, 320bits}, {40ms, ½ convolutional code,
rm = 1}
Transport Channel Related
Terminologies
Transport format combination set
A set of transport format combination
Ex:
Combination 1
DCH1{20bits, 20bits}, DCH2{320bits, 1280bits} DCH3{320bits,320bits}
Combination 2
DCH1{40bits, 40bits}, DCH2{320bits, 1280bits} DCH3{320bits,320bits}
Combination 3
DCH1{160bits, 160bits}, DCH2{320bits, 320bits} DCH3{320bits,320bits}
Static part
DCH1: {10ms, ½ convolutional code, rm=2}
DCH2: {10ms, turbo code, rm = 3}
DCH3: {40ms, ½ convolutional code, rm = 1}
Transport Channel Related
Terminologies
AMR TFCS example
Transport format
NTRCHa=81 NTRCHb=103 NTRCHc=60 NTRCHd=148 combination 1
Transport format
NTRCHa=39 NTRCHb=0 NTRCHc=0 NTRCHd=148 combination 2
Transport format
NTRCHa=0 NTRCHb=0 NTRCHc=0 NTRCHd=148 combination 3
1 radio frame: Tf = 10 ms
UL-MCC
CRC attachment
TrBk concatenation / code block segmentation
Channel coding
Radio frame equalization
1st interleaving
Radio frame segmentation
Rate matching
TrCH multiplexing
Physical channel segmentation
2nd interleaving
Physical channel mapping
UL-MCC
CRC-attachment
For error detection
gCRC24(D) = D24 + D23 + D6 + D5 + D + 1
gCRC16(D) = D16 + D12 + D5 + 1
gCRC12(D) = D12 + D11 + D3 + D2 + D + 1
gCRC8(D) = D8 + D7 + D4 + D3 + D + 1
TrBk
TrBk
UL-MCC
TrBk concatenation
TrBk CRC
TrBk CRC TrBk CRC
TrBk CRC
Channel coding
For error correction
Turbo-code
Higher error correction capability, long decoding latency
Rate = 1/3
Convolutional code
Lower error correction capability, short decoding latency
Rate = 1/2 or 1/3
UL-MCC
Concatenation
1236
Of encoded blocks
Radio frame size
1236 4
equalization
Assume TTI=8, 1236/8 = 154.5,
So we add 4 to let it can be divided by 8
UL-MCC
1st interleaving:
Input bits 0 2 1 3
i
∑ RM m × N m , j × N data , j
m =1
Z =
i, j I
∑ RM m N m, j
×
m =1
∆N i , j = Z i , j − Z i −1, j − N i , j for all i = 1, ... , I
Rate matching
Example
Assume 3 TrCH
N0 = 30, RM = 10
N1 = 100, RM = 12
N2 = 20, RM = 13
If Ndata = 180
Z1 = floor(300*180/1760) = 30 : Δ= 0
Z2 = floor((300+1200)*180/1760) = 153 : ΔN1 = 23
Z3 = floor((300+1200+260)*180/1760) = 180 : ΔN2 = 7
If Ndata = 130
Z1 = floor(300*130/1760) = 22 : ΔN0 = -8
Z2 = floor((300+1200)*130/1760) = 110 : ΔN1 = -12
Z3 = floor((300+1200+260)*130/1760) = 130 : ΔN2 = -10
Rate matching
How could we decide which bits should be
punctured/repeated?
Determine of eini, eplus, eminus
e = eini
m=1
do while m < Xi (input bit length before RM)
e = e – eminus -- update error
if e <= 0 then -- check if bit m be punctured/ repeated
Repeat or puncture xm
e = e + eplus -- update error
end if
m=m+1 -- next bit
end do
Rate Matching
+5 +5 +5 +5
Variable e: 3 1 -1 4 2 0 5 3 1 -1 4 2 0 5 3
Input bits: 0 1 0 0 1 0 0 1 1 0
Output bits: 0 X 0 X 1 0 X 1 X 0
RM
0100100110 001010
UL-MCC
TrCH multiplexing
Serially multiplex different transport channels into a
coded composite transport channel (CCTrCH)
Physical Channel Segmentation
If more than one physical channel (spreading code) is
used, physical channel segmentation is used.
2nd interleaving
Intra-frame interleaving
Similar with 1st interleaving, but with C2 = 30
Physical channel mapping
Map CCTrCH to one or multiple physical channels
UL-MCC
TTI=2 TTI=2 TTI=4
Rate matching TrCH1 TrCH1 TrCH2 TrCH2 TrCH3 TrCH3 TrCH3 TrCH3
PhCH
Physical channel mapping
PhCH
c2
DL-MCC
1. CRC attachment
2. TrBk concatenation / code block segmentation
3. Channel coding
4. Rate matching
5. 1st insertion of DTX indication
6. 1st interleaving
7. Radio frame segmentation
8. TrCH multiplexing
9. 2nd insertion of DTX indication
10. Physical channel segmentation
11. 2nd interleaving
12. Physical channel mapping
Rate Matching
RM in UL case RM in DL case
Rate Matching
2 solutions in DL-RM
Fixed position
Use the maximum Ni in TFS i for all i as the data size before RM
Calculate for ΔNi as in UL case
Flexible position
Find maximum RMi*Ni,j for all combination j
Calculate for ΔNi
Rate Matching
TFCS example
Combination 1: DCH1{20bits, 20bits}, DCH2{320bits, 1280bits}
DCH3{320bits,320bits}
Combination 2: DCH1{40bits, 40bits}, DCH2{320bits, 1280bits}
DCH3{320bits,320bits}
Combination 3: DCH1{160bits, 160bits}, DCH2{320bits, 320bits}
DCH3{320bits,320bits}
Assume RM1 = RM2 = RM3 = 100 (same importance)
Fixed position
Choose N1=160, N2=1280, N3=320 to calculate for ΔNi
Flexible position
Choose N1=40, N2=1280, N3=320 to calculate for ΔNi (combination 2)
Rate Matching
Normal mode
For frames not overlapping with transmission gap
Compressed mode
Frames overlapping with transmission gap
Frame structure of type A
Slot # (Nfirst - 1) transmission gap Slot # (Nlast + 1)
T TF T TF
Data1 P CI Data2 PL PL Data1 P CI Data2 PL
C C
T TF T T TF
Data1 P CI Data2 PL P PL Data1 P CI Data2 PL
C C C
Rate Matching
PhCH size
Physical Channel Mapping
UL DCH example
UL 12.2 kbps data
UL 64/128/144 kbps packet data
UL 384 kbps packet data
TrCH multiplexing
12.2 kbps data + 3.4 kbps data
64 kbps data + 3.4 kbps data
DL DCH example
DL 12.2 kbps data
DL 64/128/144 kbps packet data
TrCH multiplexing
12.2 kbps data + 3.4 kbps data
UL 12.2 kbps data
Transport block TrCh#a TrCh#b TrCh#c
NTrCHa NTrCHb NTrCHc
CRC attachment*
CRC
Tail bit attachment* NTrCHa 12 NTrCHb NTrCHc
To TrCh Multiplexing
* CRC and tail bits for TrCH#a is attached even if NTrCha=0 bits since CRC parity bit attachment for 0 bit transport
block is applied.
UL 64/128/144 kbps data
Transport block
336
CRC attachment
CRC
336 16
352* B
Turbo coding R=1/3
1056* B
Tail bit attachment
Tail
st 1056* B 12*B/9
1 interleaving
#1 #2
(1056* B +12*B/9)/2+NRM1 (1056* B +12*B/9)/2+NRM2
To TrCh Multiplexing
UL 384 kbps data
Transport block
336
CRC attachment
CRC
336 16
B TrBks
TrBk concatenation (B=0, 1, 2, 4, 8, 12, 24)
176* B 176* B
Turbo coding R=1/3
528* B 528* B
Tail bit attachment
Tail Tail
st 528* B 12*B/24 528* B 12*B/24
1 interleaving
#1 #2
(1056* B +24*B/24)/2+NRM1 (1056* B +24*B/24)/2+NRM2
To TrCh Multiplexing
12.2 kbps + 3.4 kbps data
#1a #2a #1b #2b #1c #2c #1a #2a #1b #2b #1c #2c #1 #2 #3 #4
TrCH
multiplexing
#1a #1b #1c #1 #2a #2b #2c #2 #1a #1b #1c #3 #2a #2b #2c #4
2nd interleaving
#1 #2 #3 #4 #1 #2 #3 #4
TrCH
multiplexing
#1 #1 #2 #2 #3 #3 #4 #4
2nd interleaving
Physical channel
mapping
CRC
Tail bit attachment* NTrCHa 12 NTrCHb NTrCHc
To TrCh Multiplexing
* CRC and tail bits for TrCH#a is attached even if NTrCha=0 bits since CRC parity bit attachment for 0 bit transport
block is applied.
DL 64/128/144 kbps data
Transport block
336
CRC attachment
CRC
336 16
TrBk B TrBks
concatenation (B=0, 1, 2, 4, 8, 9)
352* B
Turbo coding R=1/3
1056*B
Tail bit attachment
Tail
Rate matching 1056*B 12*B/9
1056* B+12*B/9+NRM
1st interleaving
To TrCh Multiplexing
12.2 kbps + 3.4 kbps data
#1a #2a #1b #2b #1c #2c #1a #2a #1b #2b #1c #2c #1 #2 #3 #4
TrCH
multiplexing
#1a #1b #1c #1 #2a #2b #2c #2 #1a #1b #1c #3 #2a #2b #2c #4
2nd interleaving