Computer hardware computer organization, design and architecture

Architectural component specs (e.g. Processor speed, memory capacity) Instruction sets, addressing
Organization Control signals
design ECL (emitter-coupled logic) circuit family
microprocessor is a clock-driven semiconductor device with tens or hundreds of thousands of transistors,
resistors, capacitors, switches and other digital circuit elements that are miniaturized on a single silicon ship,
LSIC or VLSIC, Pentium, AMD , a PowerPC, a Sun-SPARC
µ-processor ALU, Register array, & Control unit

ALU (Arithmetic/Logic Unit): arithmetic operations

Register Array: B,C,D,E,H,L and Accumulator
Control Unit
It controls the Flow of data between the µ-processor and memory & peripherals.
µ-PROCESSOR also consists :
address bus sends an address to memory.
data bus send data to memory or receive data from memory.

RD (read) and WR (write)

clock line clock pulse sequence the processor
reset line that resets the program counter to and restarts execution
system bus is a communication Path between the Microprocessor & peripherals
I/O devices are also known as peripherals. i.e., keyboard, switches
Two types of data transfer exists between I/O ports & the I/O devices: serial and parallel
Serial Port: a slower port connection where only a bit is transmitted
Parallel Port: byte or word is transferred concurrently

Machine lan inst binary code 1&0

Assembly lang sybbolic name to repreent operation registers and memory locations
Slightly hiher level lang
Readability inst better machine lang
1to1corresp with machine lang inst
Assemblers translate assembly to machine code
Compilers translate high-level programs to machine code directly, Indirectly via an assembler

Instruction field opcode operation and operand source/destination

Why ass lang accessibility system hardware ,space and time efficiency to write compilers
Assembler edit assem convert souce code to object link ecce prog tasm,nasm,gnu
Cpu register, set alu, control
Cisc 100to250 inst ,addres mode 5to20 modes, length instformat, inst manipulate operand in memory
Risc relatively few inst & addres mode,memory access load&store, fixed length,fixed cycle inst in register
Thread program counter,register set ,stack space
Task peer threads code section,data section,operating system resources

RAX accumulator +,-,*,/ - a 64-bit register (RAX), a 32-bit register ( (EAX), a 16-bit register (AX),
or 8-bit registers (AH and AL). ,RBX base index, as RBX, EBX, BX, BH, BL.,RCX count, as RCX, ECX, CX, CH,
or CL.,RDX data, as RDX, EDX, DX, DH, or DL.,RBP base pointer, as RBP, EBP, or BP.,
RDI destination index string instru as RDI, EDI, or DI.,RSI source string data index used as RSI, ESI, or SI.
,R8-r15 pen4core 2 if 64bit enabled

RIP instruction pointer RSP stack pointer RFLAGS conditioncontrol

C (carry) ,P (parity) count logic 0 odd 1 even, A (auxilry) carry half carry ,Z (zero),S (sign) artimetic sign result,
T (trap) trapping chip,I (interrupt) intr intp pin,D (direction) ++,-- di& si,O (over flow) signed num +or-
,IOPL pm inI/O devices,NT (nested task) pm,RF (resume)debugging,VM (virtual mode) flag bit vmo in pm,
AC, (alignment check) flag bit activates if a word,VIF I flag ,VIP (virtual) VMI to IP,ID (identification) CPUID instruction.
Segment Registers CS (code) ,DS (data) ,ES (extra) destination data ,SS (stack) area of memory,
FS and GS supplemental segment registers

Intel 4004 4-bit (CPU) 1971. 2300 transistors, 640 bytes of addrmemory and a 740 KHZ clock speed.
4001 ROM 4002 RAM i/o 4003
Intel 8080 (home computer) 8-bit cpu 1974 2 MHz and with common instructions 4,5,7,10 or 11 cycles
6000 transistors, 64KB addrmemory 2 MHZ clock rate.
Intel 8085 (binary-compatible) 8-bit data bus and 16-bit address bus 1977.
8-bit registers named A, B, C, D, E, H, and L 64KB of RAM and 8MHZ of clock rate.
Intel 8086 (runs faster).16-bit data bus and register size with 29,000 transistors and 20 bit address bus

Intel 8088 16-bit registers and an 8-bit data bus and can address up to 1 million bytes of internal memory
Intel 80286 address up to 16 million bytes
Intel 80386 32-bit registers and a 32-bit data bus and can address up to 4 billion bytes of memory.
275,000 transistors
Intel 80486 built-in math 32-bit registers and a 32-bit data bus.
Pentium 5 stagepipeline pentii 12 stagepipeline 32-bit registers, a 64-bit data bus decode and execute
Pentium 4 nov20 2000 64-bit x86-64 set & clocked from 1.3 GHz to 2 GHz .