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Memory Organization Concepts

Basic units of a computer


Processor-- center for manipulation and control
Memory – storage for instructions and data for
currently executing programs
I/O system – controller which communicate with
“ external” devices: secondary memory,
display devices, networks
Data-path & control – collection of parallel wires,
transmits data, instructions, or control signal
Von Neumann Architecture system

CPU

INPUT  
ALU
  Memory
OUTPUT Control
Unit
The advance of
Processor(microprocessors- Intel)
1977: 8080 – the first general purpose microprocessor, 8 bit data path, used in first personal
computer
1978: 8086 – much more powerful with 16 bit, 1mb addressable, instruction cache, prefetch
few instructions
1980: 8087 – the floating point coprocessor is added
1982: 80286 – 24 Mbyte addressable memory space, plus instructions
1985: 80386 – 32 bit, new addressing modes and support for multitasking
1989 -- 1995:
80486 – 25, 33, MHz, 1.2 M transistors, 5 stage pipeline, sophisticated powerful cache and instruction
pipelining, built in math co-processor
Pentium – 60, 66 MHz, 3.1 M transistor, branch predictor, pipelined floating point, multiple instructions
executed in parallel, first superscalar IA-32.
PentiumPro -- Increased superscalar, register renaming, branch prediction, data flow analysis, and
speculative execution
1885 – 1997: Pentium II – 233, 166, 300 MHz, 7.5 M transistors, first compaction of p6
micro- architecture, MMX technology, graphics video and audio processing
1889: Pentium III – additional floating point instructions for 3D graphics
2000: Pentium IV – Further floating point and multimedia enhancements
1993 – 2000: Itanium /Itanium 2 – 733 MHz, 25 M transistor, 0,18 micron, 3 levels of cache,
superscalar degree 6, first implementation of 64-bit Itanium architecture.
Class Discussion
Intel Processors – 2010 to present
Other processors vary depending on manufacturer
Evolution of Memory
1970: RAM /DRAM, 4.77 MHz
1987: FPM – fast page mode DRAM, 20 MHz
1995, EDO – extended Data Output, which increases the read
cycle between memory and CPU, 20, MHz
1997- 1998: SDRAM – Synchronous DRAM, which
synchronizes itself with the CPU bus and runs at higher clock
speeds, PC66 at 66 MHz, PC100 at 100 MHz
1999: RDRAM – Rambus DRAM, which DRAM with a very
high bandwidth, 800 MHz
1999-2000: SDRAM PC133 at 133 MHz, DDR at 266 MHz
2001: EDRAM – Enhanced DRAM, which is dynamic or
power-refreshed RAM, also know as cached DRAM
Class Discussion
Memory – 2010 to present
https://www.crucial.com/articles/about-memory/difference-among-ddr2-
ddr3-ddr4-and-ddr5-memory

motherboards are built to support only one type of memory. So, you can't mix and
match SDRAM, DDR, DDR2, DDR3, DDR4, or DDR5 memory on the same
motherboard, as they won't function. They may not even fit in the same sockets.
ORGANIZATION OF MEMORY
Memory – Random Access Memory (RAM) is where temporary data is stored.

On a windows environment computer, the memory can be accessed via debug
(a simulation program used to check the contents of our memory.

Memory values are in Hexadecimal

Each Memory address is worth 8 bits

A complete Memory value regarded as REGISTERS are worth 16 bits

Memory values are tagged with memory addresses known as the CS: IP or
code segment: instruction pointer
ORGANIZATION OF MEMORY
Storing Words in Memory Address Value
1003 90
Big Endian
1002 AB
Little Endian 1001 12
1000 CD

address Big Endian R8 Big Endian R16 Little Endian Little Endian
R8 R16
1001
1000
1002
What's a Register
A CPU contains very fast memory called registers. For
example, a MIPS ISA stores 32 32-bit registers.
Think of a register as a black box that contains an
array.
CPU Registers
CPU registers are very special memory locations
constructed from flips-flops. They are not part of main
memory; the CPU implements them on- chip. All
arithmetic and locations operations occur in the CPU
registers.
Registers contain 16 bits in size, and in hexadecimal
format
Registers default value is set to 0000H
CPU Register Types
General Purpose Registers
Segment Registers
Index Registers
Pointer Registers
General Purpose Registers
AX - the accumulator register
BX - the base address register
CX - the count register
DX - the data register

The AX register (Accumulator) – is where the most arithmetic and logical


computations take place. Although most arithmetic and logical operations are
done in other register, it is often more efficient to use the AX.
The BX registers (Base) – it is commonly used to hold indirect addresses.
(Character String Manipulation)
The CX registers (Count) – as its name implies, counts things. Used to count
off the number of iterations in a loop or specify the number of characters in a
string.
The DX register (Data) – has two special purposes: it holds the overflow from
certain arithmetic operations, and it holds l/O addresses when accessing data.
Segment Registers
CS-code segment: points at the segment containing the
currently executing machine and instructions.
DS-Data Segment: generally points at global variables
for the program.
ES-Extra Segment: an extra segment register.
SS-Stack Segment: points at the segment containing
the 8086 stack. The stack is where the 8086 store’s
important machine state information, subroutine return
addresses, procedure parameters , and local variables
Index and Pointer Registers
The SI and DI register (Source Index and
Destination Index) these register are pointers (much
like the BX register) to indirectly access memory.
The BP register (Base Pointer) – similar to the BX
register. Generally used to access parameter and local
variables in a procedure.
The SP (Stack Pointer) – has a very special purpose – it
maintains the program stacks. The register is not for
arithmetic computations. The proper operations of most
programs defends upon the careful use if this register.
IP – Instruction Pointer: contains the address of the
currently executing instruction
Understanding Registers

AL stands for “AX’s L.B.


AH stands for “ AX’s H.B.”
 The name of the other 8 bit register mean the same thing with
respect to BX, CX and DX.
 AX, BX, CX, DX are 8 bit registers that is accessing its higher
and lower nibble is easy for it is divided into 4 bits it each.
Reading the Memory Map
Reading the Memory Map
Memory Map in Debug
MOST USED INSTRUCTION FOR
REGISTER HANDLING
Mnemonic Meaning Format Operation
MOV Move MOV D,S (D)←(S)
Addressing Modes
Address space is the maximum amount of memory that
a processor can address. Some processors use a multi-
level addressing scheme, with main memory divided into
segments or pages and some or all instructions mapping
into the current segment(s) or page(s).
Addressing Modes:
 REGISTER ADDRESSING
 REGISTER INDIRECT ADDRESSING
 IMMEDIATE ADDRESSING
 INDEX ADDRESSING
 BASE ADDRESING
 BASE INDEX ADDRESSING
REGISTER ADDRESSING
REGISTER INDIRECT ADDRESSING
IMMEDIATE ADDRESSING
INDEX ADDRESSING
BASE ADDRESING
BASE INDEX ADDRESSING

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