Karim Mohamed Yossef

17 first area masr buildings, Sheraton, Cairo

+20-111-544-9740
s-karim.yossef@zewailcity.edu.eg
karimyossef1001@gmail.com
linkedin.com/in/karim-yossef-082800166/

EDUCATION
Bachelor of Science, Nanotechnology Engineering
Period : Sep. 2013- June 2018
Concentration : Nano-VLSI
University of Science and Technology , Zewail City
GPA 3.45/4,Cum Laude honors anticipated.

SKILLS
Programming Scripting HDL
C/C++ MATLAB Verilog
VB TCL System Verilog
Mathematica Verilog A

CAD and Simulation Tools

✓ Cadence: Virtuoso , SOC encounter.
✓ Synopsis: Sentaurus, Design Compiler.
✓ Mentor Graphics: ICstation, ModelSim, Questa.
✓ CST studio
✓ Xilinix ISE
✓ Altera Quartus
✓ COMSOL
✓ Lumerical

Research Experience

❖ Hands-on experience in the clean room facility at Zewail City: Class 100-1000, training for 45
hours on (PECVD Machine-DRIE Machine- Sputtering Machine-Stylus Profiler-Ellipsometer –
Mask Aligner) and accessed all the clean room areas (Wet, Dry and lithography).
❖ Working on a research paper with title ” Self-Powered Piezo-electric module”, in reviewing
process.

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Related Courses with selected Projects
❖ Graduation Project
low-power high-efficiency a self-powered piezo-electric module is proposed that manages its energy
input from a piezoelectric transducer and controlling it to give a fixed DC level to any application.
COMSOL simulation has been used in this project to simulate the transducer model and produce results
that can be used to provide voltage for the entire system. Based on this model, Verilog-A is used to
produce a block with the same results so it can be used with the other blocks in Cadence virtuoso
environment. To extract maximum power from these harvesters, MPPT block is very essential to track
the maximum power operation voltage, AC-DC block does this function to limit the current that is
derived from the transducer. DC-DC converter manages the voltage that derived from the AC-DC
converter to match this voltage with the load need. Every block was designed at the transistor level
using UMC 130nm CMOS technology and a layout for the whole system has been produced. The project
received fund from National Telecom Regulatory Authority (NTRA).
✓ Project Instructor: Dr Hassan Mostafa
E-mail: hmostafa@uwaterloo.ca
✓ Under supervision : Si-Ware Systems
❖ Advanced Digital IC Design
A full custom design, optimization and layout of a 32-bit adder and programmable FSM with SRAM
using Cadence virtuoso and Mentor graphics ICstation tools.
❖ Analog IC Design
Full custom design optimization and layout of differential to single ended Op-Amp using tsmc 130
nm technology node using Cadence tools. Layout , DRC , LVS , PEX and back annotation.
❖ Advanced RF IC Design
Design of RF Low noise amplifier with two topologies using 130 UMC process.
❖ Waveguides and Microwave Engineering
Simulation and Design of several Microwave structures (Waveguides , filters) on CST studio and

Ansoft.
❖ Numerical Analysis and Computaional Methods
Numerical analysis and solution with animations for Schrodinger’s equation in several space
dimensions using MATLAB.
❖ Physical Design and EDA Algorithms
✓ Simulating some algorithms of physical design and electronic design automation using C++.
✓ Implementation of KL algorithm for partitioning.
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 ✓ Parsing of a netlist then finding the maximum delay paths.

❖ ASIC and FPGA Flows

Complete ASIC design (from Verilog simulation to PnR) of a network on chip topology on 130 nm
UMC technology using synopsis DC and Cadence SoC E, tested also on Xilinix Spartan 6 FPGA.
❖ Microfluidics
Design and Fabrication of Low Cost Digital Microfluidics (DMF) platform for biological applications
exploiting image processing and real time control techniques.
❖ Advanced Mems Design & Micro/Nano Fabrication Techniques
MEMS and electronics simulations on COMSOL Multiphysics in addition to some fabricated
prototypes in the clean room.

Personal and Communication Skills

✓ Always passionate to acquire new skills and learn new techniques.
✓ Leadership skills as being usually chosen as the team leader in academic group projects.
✓ Ability to work under stress and time management.
✓ Technical writing.
✓ Excellent communication skills.

Academic Achievements
✓ Full paid Scholarship at Zewail city of science and technology.
✓ Attended Info-day for TEMPUS project “Excellence in Nanoscience Education For the MENA
Region (XNEM)”.
✓ Ranked second on my high school at the end of the senior year.

Language
✓ Arabic (Native) .
✓ English (IELTS Certified, Band Score 7) .

REFERENCES
• Dr. Yehea Ismail
Director of Center of nano-devices at Cairo University.
Email: y.ismail@aucegypt.edu
• Dr. Hassan Mostafa
Director of Opto Nano Electronics (ONE) Lab at American University in Cairo (AUC).
Email: hmostafa@uwaterloo.ca