Course Title: Analog CMOS IC Design L T P/ SW/F TOTAL

Course Code: ECE411 S W CREDIT

Credit Units: 4 UNITS
Level: UG 0
3 0 2 4

Course Objectives:
In the VLSI design course, the student was initiated in the world of circuit design from a digital perspective. In this course, transistor modeling is emphasized
from a purely analog point of view. Some of the world’s highest paid jobs in Electronics based industry are in Analog Circuit Design. This course will serve as
an introduction to what Analog Design is like. Since CMOS is the technology being used most of the time, only CMOS technology is being included here. A
serious learner is recommended to study BJT based circuits as well.

Prerequisites:
Basic Electronic Engineering, Applied Physics – II, Digital Integrated Circuit Design.

Course Contents / Syllabus: Weightage

Module I: MOSFET Basics 20%
 MOSFET channel length modulation,
 small signal model, transconductance,
 T model, biasing a MOSFET at DC,
 four resistor biasing,
 modeling body effect, body transconductance, short channel effects, Coupling and Bypass capacitors,
 AC equivalent circuit
Module II: Single Stage Amplifiers, Differential Amplifier and Current Mirrors 25%
 Common source, common gate, source follower: input resistance, output resistance and voltage gain,
 high frequency model, MOSFET Unity Gain
 High and Low Frequency response of CS Amplifier, Active loads, CS source with resistive load, diode connected load, current source load,
 MOSFET current source, Open circuit Time constants, Miller theorem, Cascode amplifier, Results for CS, CD, CB configurations taking r0 into
account
 Current mirror, Cascode Current mirror, Active Current Mirrors: Large and small signal Analysis
 
Differential Pair: Common mode and Differential input voltage, Large signal Operation and Small signal Operation, effect of r 0, CMRR, effect of
RD mismatch and gm mismatch, Input Offset Voltage of MOS pair,
 Frequency response of resistively loaded and actively loaded MOS Differential pair
Module III: Operational Amplifiers 25%
 Ideal Op Amp,
 Compensation of Op Amp,
 One stage Op Amp, Two stage CMOS Op Amp,
 Folded Cascode Op Amp: voltage gain,
 Frequency response and slew rate,
 Noise in Op Amps,
 Power Supply Rejection Ratio
Module IV: Noise, Stability and Frequency Compensation 20%
 Statistical Characteristics of Noise,
 Types of Noise, Noise in single stage amplifiers, Noise in Differential pair
 Feedback review, Loop Gain, Transfer Function of feedback amplifier, effect of feedback on Amplifier poles,
 Miller Compensation and Pole Splitting, multipole system,
 frequency compensation,
 compensation of two stage op amp
Module V: Latest trends in the Industry 10%
 Challenges in Analog Design
 Layout Issues
 Tools and IC Advances

Student Learning Outcomes:

 Identify and describe operation of MOS devices.
 Analyze where and how analog components are used.
 Analysis of amplifier circuits using small - signal equivalent circuits to determine various parameters.
 Construct basic analog building block and OP-AMP application based circuits.
Pedagogy for Course Delivery:
The course would be covered under theory and laboratory. In addition to assigning project–based learning, early exposure to hands-on design to enhance the
motivation among the students. It incorporates designing of problems, analysis of solutions submitted by the students groups and how learning objectives were
achieved. Continuous evaluation of the students would be covered under quiz, viva etc.

List of Laboratory Experiment:

1. Plot the I-V characteristics of Id vs. Vds for varying Vgs.
2. Repeat experiment 1 including body effect.
3. Design and simulate single stage (CS, CG) amplifiers.
4. Design and simulate source follower amplifier.
5. Design and simulate current mirror.
6. Design and simulate Differential amplifier.
 7. Design and simulate the single stage cascode amplifier.
8. Design and simulate single stage folded-cascode op amp.
9. Design and plot the frequency response of a single-ended Two-stage op amp.
10. Design and simulate the high speed/high frequency op amp for the given specifications.

Assessment/ Examination Scheme:

Theory L/T (%) Lab/Practical (%) Total

75% 25% 100%

Theory Assessment (L&T):

Continuous Assessment/Internal Assessment
End Term
Components (Drop Mid-Term S/V/Q HA Attendance(A) Examination
down) Exam(CT)

Weightage (%) 10% 8% 7% 5% 70%

CT: Class Test, HA: Home Assignment, S/V/Q: Seminar/Viva/Quiz, EE: End Semester Examination; A: Attendance

Lab Assessment (P):

Continuous Assessment/Internal Assessment End Term
Examination
Components A PR LR V
(Drop down)
Weightage (%) 5% 15% 10% 10% 60%

A: Attendance, PR- Performance, LR – Lab Record, V – Viva. EE- External Exam,

Text:

 Sedra and Smith: Microelectronic Circuits

 Razavi, Design of Analog CMOS Integrated Circuits
 Gray, Hurst, Lewis and Meyer: Analysis and design of Analog ICs
 Allen and Holberg: CMOS Analog Design