BASIC COMPUTER ORGANISATION AND DESIGN

CPU –Central processing unit

A unit or component that is used for data process and converting it into meaningful
information.
CPU is known as the brain of the computer.
Representation of CPU-:

R1

ALU R2

R3

R4

I
1.CONTROL UNIT
❖ The control unit is like that part of human brain that control all the operation perform by each
part of body.
❖ Controlling is achieved through wires that can be hot(on) or cold(off).
Functions of control unit-:
1. The control unit is the component of CPU that directs the operation of the processors.
2. Control unit is interact with ALU and main memory.
3. It tells the computer memory, ALU, input and output devices . How to respond to programs
instructions.
4.It directs the operation of other units by providing timing and control signals.
5.It directs the flow of computer between CPU and main memory.
6.It also interact with ALU, which type of operation should be perform on data .
WORKING OF CONTROL UNIT
Step:2 Decode the insruction into command step:3 Execute command

ALU

Step:1 Fetch instruction the memory Step:4 Store instruction

in memory

1. Fetch instruction from the memory.

2. Decode the instruction into command.
3. Execute the command.
4. Store the instruction in the memory.
DESIGN OF CONTROL UNIT
Control unit is designed by two methods-:
1. Hardwired control unit
2. Micro-programmed control unit
HARDWIRED CONTROL UNIT
❖ It is implemented with the help of physical components which is hardwired(gates , flip-flops ,decoders)in
the hardware.
❖ The input to control unit at the instruction registers , flags , timing control signals).
❖ The designed is modified or changed, all the combinational circuits should be modified which is very
difficult task.
The sequence of the operations is carried out by this machine is determined by this machine is determined
by wiring of the logic elements so it is known as “hardwired”.
Advantages
❖ Hardwired control unit is fast because control signals are generated by combinational circuits.
❖ The delay in generation of control signals depend up on the number of gates.
Disadvantages
❖ More is the control signals required by CPU , more complex will be the design of control unit.
❖ Modifications in control signals are very difficult.
❖ It is difficult to correct mistake in original design or adding new feature in existing design of control units.
Hardwired control unit consist of a:-
❖ Instruction register
❖ Number of control logic gates
❖ Two decoders
❖ 4- bit sequence counter
Architecture of hardwired control unit
15 14 12 11 0 Other outputs

1 Address

3*8
DECODER
D7 D6 D5 D4 D3 D2 D1 D0
Control
CONTROL
LOGIC inputs
I GATES

T15 T14 T13 T12 T11 T10 T9 T8 T7 T6 T5 T4 T3 T2 T1 T0

4*16
DECODER

Increment(INR)

4 BIT Clear(CLR)

SEQUENCE COUNTER Clock

1) An instruction read from memory is placed in the instruction registers (IR).
2) The instruction registers is divided into three parts: 1 bit , operation code and address part.
3) First 12 bits(0-11) to specify an address , next 3 bits the operation code(OP ) code field of the instruction
and last left most bit specify the addressing mode . I = 0 for direct addressing mode
I =0 for indirect addressing mode.
4) First 12 bits are applied to the control logic gates .
5) The operation code bits (12-14) are decoded with 3*8 decoder.
6) The eight outputs (D0-D7) from a decoder goes to the control logic gates to perform specific operation.
7) last bit 15 is transferred to a 1 flip flop designated by symbol I.
8) The 4 bit sequence counter SC can count in binary from 0 through 15.
9) The counter output is decoded into 16 timing pulses T0 through T15.
10) The sequence counter can be incremented by INR input or clear by CLR input synchronously.
HARDWARE CONTROL UNIT-EXAMPLE
………Generation of timing signals for T0 to T4
Consider the case wherw SC is incremented to provide timing signals T0,T1,T2,T3and T4 in sequence.
………..condition ……………
…………….
- At the time T4 , SC is cleared to 0[zero]if decoder output D3 is active.This is expressed symbolically by the
statement:
D3 T4:SC<-0
TIMING SIGNALS
- Generated by 4-bit sequence counter and 4*16 decoder.
- The SC can be incremented or cleared.
- Example : T0,T1,T2,T3,T4,T0,T1,…………………
Assume : At the time T4,SC is cleared to 0 if decoder output D3 is active.
D3 T4:SC<-0
T0 T1 T2 T3 T4 T0

T0

T1

T2

T3

T4

D3

CLR

SC
MICRO – PROGRAMMED CONTROL UNIT
❖ A micro programmed control unit is implemented by using programming approach.A sequence of micro
operations are carried out by executing a program consisting of micro operations.
❖ Micro program , consisting of micro instructions is stored in the control memory of the control unit.
❖ Execution of a micro operations is responsible for generation of a set of control signals.
❖ A micro instructions consist of :- - On or more micro operations to be executed
- Address of next micro instruction to be executed

✓ Micro operations -: The operation performed on the data stored inside the register are called micro
operations.
✓ Micro programs -: Micro programming is concept for generating control signals using programs . These
are called micro programs.
✓ Micro instructions -: The instructions that make micro programs are called micro instructions.
✓ Micro code -: Micro program is a group of micro instructions . The micro programs can also be termed as
micro code.
Advantages
❖ The design of micro program control unit is less complex because micro program are implemented using
software routines.
❖ The micro program control unit is more flexible because design modifications , correction and
enhancement is easily possible.
Disadvantages
❖ The micro program control unit slower than hardwired control unit.
❖ The micro program control unit is expensive than hardwired control unit.

Architecture of micro program control unit

External Next Control Control

Control
Inputs address address data
memory
generator register register
next address information
❖ The address of micro instructions that is to be executed stored in control address register (CAR).
❖ Micro instructions corresponding to the address stored in CAR is fetched from control memory and is
stored in the control data register (CDR).
❖ The micron instructions contains control word to execute.
❖ After the execution of all micro operations of micro instructions the address of next micro instructions is
located.
DIFFERENCE BETWEEN Hardwired and Micro program
BASIS HARDWIRED MICRO PROGRAMME

Control signal generated by Hardware Software

Structure Complex Simple

Cost High Low

Speed Fast Slow

Update Difficult to modified Easy to modified

Decoding Complex decoding Easily decoding

Used in RISC CISC

INSTRUCTIONS AND INSTRUCTIONS CODES
INSTRUCTIONS
❖ A group of bits tell the computer to perform a specific operations (a sequence of micro operations).
❖ The instructions of program , along with any needed data are stored in memory.
❖ The CPU reads the next instruction from memory.
❖ It is placed in an instruction register(IR).
INSTRUCTION FORMAT
A computer instruction is often divided into two parts-:
• An opcode(operation code) that specifies for that instructions.
• An address that specifies the registers and locations in memory to use for that operation.

1 opcode address
15 14 12 11 0

First 12 bits(0-11) to specify an address , next 3 bits the operation code(OP ) code field of the instruction
and last left most bit specify the addressing mode . I = 0 for direct addressing mode
I =0 for indirect addressing mode
INSTRUCTION CODE
❖ MEMORY-REFRENCE INSTRUCTIONS
A memory-reference instructions uses 12 bits to specify an address and 1 bit to specify the addressing
mode I .I is equal to zero for direct address and to 1 for indirect address.
❖ REGISTER-REFERENCE INSTRUCTIONS
A register reference instructions specifies an operation on or a test of the AC registers. An operand
from the memory is not needed therefore the other 12 bits are used to specify the operation to be
executed.
❖ INPUT-OUTPUT INSTRUCTIONS
An input-output instructions does not need a reference to memory and is recognized by operational
code 11 with a 1 in the left most bit of the instructions the remaining 12 bits are used to specify the type of
input output operation performed.
Memory-reference instructions
15 14 12 11 0 (OP-code = 000~110)
1 opcode address

Register-reference instructions
15 12 11 0 (OP-code = 111,I=0)
0111 Register operation

Input-output instructions
15 12 11 0 (OP-code = 111,I=1)
1111 I/O Operation
INSTRUCTIONS CYCLE
START
1. FETCH -:
- To copy the next instructions into the instruction no
register in the CPU.
2. DECODE -:
- Decode the instructions. yes
3. EXECUTE -:
- Execute the instructions Fetch

Decode

Execute

Stop
 SC 0 START

T0
AR PC

IR M[AR],PC PC+1 T1

T2

DECODE Op code in IR(12-14),

AR IR(0-11), I IR(15)
(Register or I/O)=1 =0 (Memory reference)=>opcode=111

D7
(I/O)=1 =0(register) (indirect)=1 =0(direct)
I I
T3 T3
Execute Execute register
T3 T3
input-output reference
instruction instruction AC M[AR] NOTHING
SC 0 SC 0 T4

Execute memory reference

instruction
SC 0
REGISTERS , TYPES OF REGISTERS AND REGISTER TRANSFER
REGISTERS
A registers is one of a small set of data holding places that are part of a computer processor. A registers may
hold-
❖ A computer instructions
❖ A storage address
❖ Or any kind of data (such as a bit sequence or individual characters)
❖ Rarely more than 64 registers in number
❖ Small in size
❖ Typically a registers is less than 64 bits in size.
REGISTERS LOCATION

REGISTERS

CONTROL UNIT
ALU
TYPES OF REGISTERS
1. MEMORY ADDRESS REGISTER
- Holds the memory address of data or instructions.
- Used to access data and instructions from memory during the execution phase of an instruction.
- It contains the copy of designated memory locations specified by the memory address register.
2. MEMORY DATA REGISTERS
- It contain the data to be stored in the computer storage.
- It acts like a buffer and holds anything that is copied from the memory ready for the processor to use.
- MDR holds the information before it goes to the decoder.
3. INDEX REGISTER
- It is used to modifying operand and addresses during the run of a program.
4. PROGRAM COUNTER
- Part of instruction sequencer in some computers.
- It is a 16 bit special function register in 8085 microprocessor.
- It holds the address of the memory location of the next instructions when the current instruction is
executed by the microprocessor.
5. ACCUMULATOR REGISTER
- It is used for storing the results those are produced by the system.
- When the CPU will generate some results after the processing then all the results will be stored into the
AC register.
6. MEMORY BUFFER REGISTER
- It holds the contents of data or instruction read from or written in memory.
7. DATA REGISTER
- A register used in microcomputer to temporarily store data being transmitted to or from a peripheral
devices.
REGISTER TRANSFER
Register - group of flip flops.
- capable of storing one bit of information.
Register transfer - Copying the contents of one register to another is a register transfer.
- A register transfer is indicated as R2<-R1.
(In this case, the contents of R2 is copied in register R1).
R1 – source register.
R2 – destination register.
A simultaneous transfer of all bits from the source register R1 to the destination register R2 during one clock
pulse.

Basic symbols for register transfer Symbols Description Examples

Capital letters & numerals Denotes a register M[AR],R2
Parentheses () Denotes a part of registers R2(0-7)
Arrow <- Denotes a transfer of register R2<-R1
Colon : Denotes a termination of function P:
Comma , Separate two micro operation AB,BA
Register transfer – control function
❖ Conditional transfer occurs only under a control condition.
❖ Representation of conditional transfer P:R2<-R1
❖ A binary condition of a (P equals to 0 or)determines when the transfer occurs
❖ The contents of R1 is transferred into R2 only if P is 1
Hardware implementation of a control transfer
Block

diagram R2
Control circuit
p Load clock

R1

Timing diagram t t+1

load

transfer occurs here synchronised with the clock

MEMORY AND ITS FUNCTION
COMPUTER MEMORY
Computer memory is any physical device capable of storing information temporarily or permanently.
MEMORY UNIT
❖ Electronic components that store instructions , data and results.
❖ Consist of one or more chips on motherboard or other circuit board.
❖ Each byte stored in unique location called an address, similar to seats in a concert hall.
MEMORY CAPACITY
UNIT DESCRIPTION APPROXIMATE SIZE
1 bit 1 binary digit
1 nibble 4 bits
1 byte 8 bits 1 character
1 kilobyte 1,024 bytes =1/2 page , double spaced
1 megabyte 1,048,576 bytes =500,000 pages
1 gigabyte 1,073,741,824 bytes =5 million pages
1 terabyte 1 trillion bytes =5 billion pages
CLASSIFICATION OF MEMORY

MEMORY

INTERNAL MAIN MEMORY SECONDARY

PROCESSOR
MEMORY
MEMORY

1.Internal processor memory

❖ A small high speed memory inside the processor.
❖ Temporary storage of data and instructions.
❖ Example : registers, built in cache.
2.Main memory
❖ Main memories also called primary memory.
❖ Main memory store program and data which are currently needed by CPU . Example RAM/ROM.
❖ Main memory is accessible directly by the processing unit.
❖ It is volatile memory.
❖ It is more expensive.
❖ This is faster , therefore expensive.

MAIN
MEMORY

RAM ROM
a.)RAM
✓ RAM – Random Access memory.
✓ A temporarily storage that can be read from or written into by the users.
✓ Random access memory loses its contents whenever powered is switched off.
✓ It is a volatile memory.
✓ Every location can be accessed independently.
✓ Data can be changed.
✓ Data storage is of temporarily in nature.

DYNAMIC RAM

RAM

STATIC RAM
Dynamic RAM
✓ DRAM stands for dynamic RAM.
✓ Relatively slower and low cost memory.
✓ Used for main memory.
✓ Contents are constantly refreshed 1000times per second.
✓ Access time 60-70 nano seconds.
Static RAM
✓ SRAM stands for static RAM.
✓ Characterised by high speed and high cost.
✓ Use six transistors to store data.
✓ Can accept one command and transfer one word of data per clock cycle.
Difference between DRAM and SRAM
DRAM
It is dynamic random access memory.
The information stored in DRAM has to
be refreshed after every few million
seconds, otherwise . It is read.
DRAM has higher storage capacity and is
cheaper than SRAM.
SRAM
It is static random access memory
The information stored in SRAM need to
be refreshed but it remains stable as long
as power supply is provided.
SRAM is costlier but has higher speed
than DRAM.
b.)ROM
✓ Read Only Memory retain the data even when the power is turned off.
✓ It is non-volatile memory.
✓ Data can’t be changed.
✓ Data storage is of permanent nature . That’s why is known as field stores , dead stores or permanent
stores.
Types of ROM
i. PROM- The information is stored by programmers after manufacturing . It also can’t be altered or
erased later on.
ii. EPROM- It is similar to PROM , but its information can be erased later on by ultra violet light and it can
be programmed.
iii. EEPROM- Electrically erasable programmable ROM. Its is similar to EPROM , but its information can be
erased by using on high voltage current.
iv. EAPROM- As compared to EPROM and EAPROM , the information stored in EAPROM can be altered
later.
3.Secondary memory
❖ Secondary memory is also called auxiliary memory.
❖ Much larger in capacity but lower than the main memory(primary memory).
❖ Secondary memory is an additional memory that is located outside the computer.
❖ Secondary memory is less expensive.
❖ Program or information which are not currently used by CPU resides in secondary memory. Example:
hard disk, floppy disk.
❖ It is non-volatile memory.
❖ Permanent storage of data and instructions.
CACHE MEMORY
CACHE MEMORY
❖ System performance suffers when processor waits for data from show memory device.
❖ Cache memory is introduced between the CPU and the main memory.

MAIN
CPU MEMOR
Y

❖ Cache is high speed memory for holding recently accessed data in main memory.
❖ The amount of cache memory has a tremendous impact on the computer’s speed.
OPERATION OF CACHE MEMORY

MAIN CACHE
MEMORY CPU
MEMORY
❖ Cache fetches data from next to current addresses in main memory.
❖ CPU checks to see whether the next instruction it requires is in cache.
❖ If , it is fetched from the cache-a very fast position.
❖ If not the CPU has to fetch next instruction from main memory – a much slower process.

ADDRESSING MODES
1.)Direct addressing mode
- In this mode , effective of operand is present in instruction itself.
……single memory reference to access data.
…………..no additional calculations to find the effective address of the operand.
OP memory
address
code
instruction
operand
2.)indirect addressing mode
- In this mode, the address field of instruction gives the address where the effective address is stored
in memory . This slows down the execution, as this includes multiple memory lookups to find the operand.

OP code

instruction
Pointer to
operand

operand
BUS AND TYPES OF BUS
BUS STRUCTURE
❖ The CPU must be able to communicate with all devices.
❖ The devices are connected together by a communication channel called a bus.
❖ A bus is composed of set of communication lines or wires.
❖ Communication pathway connecting multiple devices.
❖ It is shared transmission medium.
❖ Multiple devices connect to the bus and any signal transmitted by any 1 device is received by all
devices connected to the bus.
❖ Only a signal transmission is possible at a time.
❖ A bus has multiple paths in it, each is called a line.
10101
1 Multiple lines transmit their signals parallely

0 10101

1
SYSTEM BUS
❖ It is the bus that connect the three major components of the systems (CPU, I/O, MEMORY).
control lines

data lines
SYSTEM
address lines

CPU MEMORY

CONTROL BUS

ADDRESS BUS

DATA BUS
1.)Control bus
❖ The numbers of wires depends of control commands a computer needs.
❖ These lines are used to transfer control signals from one component to another.
❖ The control information is used for directing the activities of all units.
❖ It specifies the type of operation that is used to be performed.
❖ It also transmits the control signals like(acknowledgement signals).
❖ When a CPU gives command to the memory for writing data, than the memory send an
acknowledgement signal to the CPU after successful writing of data.
2.)Address bus
❖ The numbers of wires depends on the address space of memory.
❖ It is a part of system bus. It is used to carry address signal read and write data in the memory.
❖ An address bus is unidirectional. RAM address bus
❖ An address bus carries address information . It is a set of wires. Similar to the data bus but it only
connects CPU and memory.
❖ Whenever the processor needs data from the memory , it places the address of data on the address
bus.
❖ The address is carried to the memory where the data from the requested address is fetched and
placed on the data bus. The data bus carries to CPU.
❖ An address is unique ID of each component to the system bus.
❖ It is called address of the component.
3.)Data bus
❖ The most common bus is the data bus. A data bus carries data.
❖ It is an electrical path that connects the CPU, memory, INPUT/OUTPUT devices and secondary storage
devices.
❖ The bus contain parallel group of lines.
❖ Data bus is used to transfer the data from one component to another.
❖ There are 32 or 64 parallel lines of data bus.
❖ Data bus is bidirectional.
DIFFERENCE BETWEEN ADRESS BUS , DATA BUS AND CONTROL BUS

S.no ADDRESS BUS DATA BUS CONTROL BUS

1. A computer bus that A computer bus The control bus
is used to specify a that is used to carries control
physical address in transmit data information from
the memory. among the control unit to
components. the other units.
2. Uni -direction. Bi-directional. Uni-directional or
bi-directional.
3. Helps to transfer Help to send and Help to control the
memory addresses of receive data. functioning of
data and I/O. control and other
units.
4. With determines the With determines
amount of memory a the data
system can address. transferring rate.