UNIT-3

PROCESSOR ORGANIZATION
Processor Organization: Register Transfers, Execution of Instructions, Multiple Bus
Organization
CPU control unit design: hardwired and micro-programmed design approaches, Case study –
design of a simple hypothetical CPU.
Memory system design: semiconductor memory technologies, memory organization
REGISTER TRANSFER
•The memory address register is designated by MAR.
•Program Counter PC holds the next instruction's address.
•Instruction Register IR holds the instruction being executed.
•R1 (Processor Register).
•We can also indicate individual bits by placing them in parenthesis. For
instance, PC (8-15), R2 (5), etc.
•Data Transfer from one register to another register is represented in
symbolic form by means of replacement operator. For instance, the
following statement denotes a transfer of the data of register R1 into
register R2.
 MULTIPLE BUS ORGANIZATION:

• We use the simple single bus architecture to illustrate the basic ideas.
• The resulting control sequences in single bus architecture is quite long because only one data item
can be transferred over the bus in your clock cycle.
• To reduce the number of steps needed most commercial process provide multiple internal parts that
enable several transfers to take place in parallel.
 To transfer data from BUS B to BUS
C. Here is a option that B=R. directly
B data transfer to R data next bus C.

•
If u want to transfer data from MDR to
IR u can use B=R then through bus c
data transfer to IR.

Register files have 2 o/p ports to

access 2 registers at a time and one
more i/p port for allowing to load
data to register.
•
 DESIGN OF CONTROL UNIT

• To execute an instruction, the control unit of the CPU must generate the required control signal in the
proper sequence.
• As for example, during the fetch phase, CPU has to generate PC out signal along with other required
signal in the first clock pulse.
• In the second clock pulse CPU has to generate PCin signal along with other required signals.
• So, during fetch phase, the proper sequence for generating the signal to retrieve from and store to PC
is PCout and PCin.
• To generate the control signal in proper sequence, a wide variety of techniques exist. Most of these
techniques, however, fall into one of the two categories,

1. Hardwired Control
2. Microprogrammed Control.
 HARDWIRED CONTROL
• In this hardwired control techniques, the control signals are generated by means of hardwired circuit. The
main objective of control unit is to generate the control signal in proper sequence.
• Hence, the required control signals are uniquely determined by the following information:
● Contents of the control counter.
● Contents of the instruction register.
● Contents of the condition code and other status flags.
 Based on gates, flipflops, decoders it is constructed.
 Hardwired architecture preferred RISC (Reduced Instruction
set Computer)  it uses simple instructions.
 ADVANTAGES:
1. Very fast compared to micro programmed unit bcoz of using combinational circuit.
2. High performance
 DIS ADVANTAGES:
1. Getting Control signals from CPU are complex.
2. Modifying control signals are difficult.
3. Correcting mistakes & adding new features are difficult.
 Instructions are
fetching from memory
Instruction register
15 14 – 12 11 - 0

Direct=0 OPCODE Address

Indirect=1

Step decoders provides signal line for each step/timeslot

In the control sequence.
The o/p of the instruction decoder consists of a separate line
for each machine instruction. If INS1=1 means remaining all are 0.

Control signals are like YIN,

PCOUT,ADD,END ETC.
 OP CODE HAVE 12,13,14 BITS SO
THESE 3 CONNECTED TO
DECODER SO 3 INPUTS & D0 –
D7 OUPUTS

3 * 8 DECODER

IT SENDS TIME
4 * 16 DECODER SIGNALS TO THE
CONTROL UNIT
INCREMENT
RESET
•
 A COMPLETE PROCESSOR

•
 MICROPROGRAMMED CONTROL

• In hardwired control, we saw how all the control signals required inside the CPU can be generated
using a state counter and a PLA circuit.
• There is an alternative approach by which the control signals required inside the CPU can be
generated . This alternative approach is known as microprogrammed control unit.
• A microprogram consists of a sequence of instructions in a microprogramming language. These are
instructions that specify microoperations
• A microprogrammed control unit is a relatively simple logic circuit that is capable of
(1) sequencing through microinstructions and
(2) generating control signals to execute each microinstruction. X+Y
100

200 X
RISC CISC INSTRUCTION
INSTRUCTION EX: ADD 300 Y
EX: ADD R1,R2,R3 M[100],M[200],M[300]
 DIFFERENCE BETWEEN RISC AND CISC:
RISC
• It stands for Reduced Instruction Set Computer .
• It is a microprocessor architecture that uses small instruction set of uniform length.
• These simple instructions are executed in one clock cycle.
• These chips are relatively simple to design.
• They are inexpensive.
• The disadvantage is that the computer has to repeatedly perform simple operations in
order to execute a large program that has a large number of processing operations.
• Examples of RISC chips include SPARC, POWER PC.
• It has less number of instructions.
• It has fixed-length encodings for instructions.
• Simple addressing formats are supported.
• It doesn’t support arrays.
• It doesn’t use condition codes.
• Registers are used for procedure arguments and return addresses.
CISC
• It stands for Complex Instruction Set Computer .
• This offers hundreds of instructions of different sizes to the users.
• This architecture has a set of special purpose circuits which help execute the
instructions at a high speed.
• The instructions interact with memory using complex addressing modes.
• These processors reduce the size of the program.
• Consequently, they take less number of memory cycles to execute the programs.
• The overall speed of execution is high.
• Examples of CISC include Intel architecture, AMD.
• It has variable-length encodings of instructions.
• It supports array.
• It has a large number of instructions.
• Arithmetic and logical operations can be applied to memory and register operands.
• Condition codes are used.
• The stack is used for procedure arguments and return addresses.
MICRO PROGRAMMED CONTROL
 MICRO INSTRUCTION

EX: here we have some instructions like ADD R1,M[100],M[200] , IN THESE

1. FETCHING
2. 2.DECODE
3. 3. …etc… so here for fetch we have 64 bits memory space but we used only 3 control signal bits like C1,C2,C3
SO in these 64 bit space we used only 3 means 1 1 1 remaining all 0 0 0…..
•

It increments the address

It refers the MPC address for read operation

Control word
 MICRO INSTRUCTIONS:

•
•

BIT ORING: The most efficient way to bypass micro instructions changing the bit 0 direct to bit 1 indirect by using
OR operation is called bitoring.
 Difference between Hardwired Control and Microprogrammed Control
•

Hardwired Control Microprogrammed Control

Technology is circuit based. Technology is software based.
Microinstructions generate signals to control the
It is implemented through flip-flops, gates, decoders etc.
execution of instructions.

Fixed instruction format. Variable instruction format (16-64 bits per instruction).

Instructions are register based. Instructions are not register based.

ROM is not used. ROM is used.
It is used in RISC(Reduced instruction set computer). It is used in CISC(Complex instruction set computer).
Faster decoding. Slower decoding.
Difficult to modify. Easily modified.
Chip area is less. Chip area is large.
•
 SEMICONDUCTOR MEMORY

• Semiconductor memory is used in any electronics assembly that uses computer processing technology.
• To meet the growing needs for semiconductor memory, there are many types and technologies that are used.
• As the demand grows new memory technologies are being introduced and the existing types and technologies
are being further developed.
• A variety of different memory technologies are available - each one suited to different applications.
• Names such as : ROM, RAM, EPROM, EEPROM, FLASH MEMORY, DRAM, SRAM, SDRAM, as well as
F-RAM and MRAM are available, and new types are being developed to enable improved performance.
• Terms like DDR3, DDR4, DDR5 and many more are seen and these refer to different types of SDRAM
semiconductor memory.
 SEMICONDUCTOR MEMORY: MAIN TYPES

• There are two main types or categories that can be used for semiconductor technology. These memory types or
categories differentiate the memory to the way in which it operates:

• RAM - Random Access Memory: As the names suggest, the RAM or random access memory is a form of
semiconductor memory technology that is used for reading and writing data in any order. Data is stored and read many
times to and from this type of memory.

• Many types of RAM including SDRAM with its DDR3, DDR4, and soon DDR5 variants are used in huge quantities.

• ROM - Read Only Memory: A ROM is a form of semiconductor memory technology used where the data is written
once and then cannot be changed. Hence the data is stored permanently, even when the power is removed.

• Although it is often possible to change the data, this again requires special hardware to erase the data and for new data to be
written in.
 SEMICONDUCTOR MEMORY TECHNOLOGIES:

• SRAM or Static Random Access Memory :

• is a form of semiconductor memory widely used in electronics, microprocessor and general computing applications.

• There are two key features to SRAM :

• The data is held statically

• SRAM memory is a form of random access memory

• Dynamic RAM, or DRAM:
• is a form of random access memory, RAM which is used in many processor systems to provide the working
memory.
• DRAM is widely used in digital electronics where low-cost and high capacity memory is required.
• As the name DRAM, or dynamic random access memory, implies, this form of memory technology is a type of
random access memory.
• It stores each bit of data on a small capacitor within the memory cell. The capacitor can be either charged or
discharged and this provides the two states, "1" or "0" for the cell.
 ROM

• PROM: Programmable Read Only Memory.

• It is a semiconductor memory which can only have data written to it once - the data written to it is permanent.
These memories are bought in a blank format and they are programmed using a special PROM programmer.

• EPROM: Erasable Programmable Read Only Memory

• These semiconductor devices can be programmed and then erased at a later time. This is normally achieved by
exposing the semiconductor device itself to ultraviolet light.

• EEPROM: Electrically Erasable Programmable Read Only Memory or E2PROM

• It is a type of non-volatile memory used to store relatively small amounts of data that can allow individual
bytes to be erased & reprogrammed/ programmed electrically.
 FLASH MEMORY

• Flash memory is a non-volatile form of electronic data storage and as a result it is used in many areas where
short and medium term data storage is needed.

• Flash memory was first introduced in the 1980s and since then it has been used in many applications and
products: USB memory sticks, Compact Flash cards, SD memory cards, computer non-volatile memory, solid
state hard drives and more.
 MEMORY ORGANIZATION

• A memory unit is the collection of storage units or devices

together. The memory unit stores the binary information in the
form of bits. Generally, memory/storage is classified into 2
categories:

• Volatile Memory: This loses its data, when power is switched

off.

• Non-Volatile Memory: This is a permanent storage and does

not lose any data when power is switched off.

• The memory hierarchy system consists of all storage devices

contained in a computer system from the slow Auxiliary

Memory to fast Main Memory and to smaller Cache

memory.
 MEMORY ORGANIZATION

• Auxiliary memory access time is generally 1000 times that of the main memory, hence it is at the bottom of the hierarchy.

• The main memory occupies the central position because it is equipped to communicate directly with the CPU and with
auxiliary memory devices through Input/output processor (I/O).

• The cache memory is used to store program data which is currently being executed in the CPU. Approximate access time
ratio between cache memory and main memory is about 1 to 7~10
Hit Ratio
The performance of cache memory is measured in terms of a quantity
called hit ratio. When the CPU refers to memory and finds the word in
cache it is said to produce a hit. If the word is not found in cache, it is in
main memory then it counts as a miss.
The ratio of the number of hits to the total CPU references to memory is
called hit ratio.
Hit Ratio = Hit/(Hit + Miss)