The document discusses switch level modeling in Verilog. It describes different types of switches that can be modeled like nmos, pmos, CMOS switches. It provides examples of CMOS inverter and NOR gate modeling. It also provides exercises to design XOR, AND, OR gates and 1-bit full adder using nmos and pmos switches.
Original Description:
This ppt contains the switch modelling for nor gate
The document discusses switch level modeling in Verilog. It describes different types of switches that can be modeled like nmos, pmos, CMOS switches. It provides examples of CMOS inverter and NOR gate modeling. It also provides exercises to design XOR, AND, OR gates and 1-bit full adder using nmos and pmos switches.
The document discusses switch level modeling in Verilog. It describes different types of switches that can be modeled like nmos, pmos, CMOS switches. It provides examples of CMOS inverter and NOR gate modeling. It also provides exercises to design XOR, AND, OR gates and 1-bit full adder using nmos and pmos switches.
Switch modeling elements Bidirectional switches Conduct in both directions
tran, tranif0, tranif1
N Krishna Prakash, , Amrita School of Engineering
Power and ground supply1, supply0
N Krishna Prakash, , Amrita School of Engineering
CMOS inverter
N Krishna Prakash, , Amrita School of Engineering
N Krishna Prakash, , Amrita School of Engineering CMOS NOR gate
N Krishna Prakash, , Amrita School of Engineering
CMOS NOR gate
N Krishna Prakash, , Amrita School of Engineering
N Krishna Prakash, , Amrita School of Engineering Exercise 1. Draw the circuit diagram for an xor gate, using nmos and pmos switches. Write the Verilog description for the circuit. Apply stimulus and test the design. 2. Draw the circuit diagram for and and or gates, using nmos and pmos switches. Write the Verilog description for the circuits. Apply stimulus and test the design. 3. Design the 1-bit full-adder shown below using the xor, and, and or gates built in Exercise 1 and Exercise 2 above. Apply stimulus and test the design.