Professional Documents
Culture Documents
Fast Adder
Shankar Balachandran*
Associate Professor, CSE Department
Indian Institute of Technology Madras
8 7 6 5 4 3 2 1 0
27 -15 6 -8 7 3 -2 1 0
8 7 6 5 4 3 2 1 0
12 -9 -2 -1 10 1 -1 1 0
8 7 6 5 4 3 2 1 0
10 -10 8 0 9 2 -1 1 0
19 -8 7 1 9 2 -1 1 0
Reading Assignment :
Change the last stage input 0 to 5 and start from
Step 1. Check if you get
24 -3 12 6 14 7 4 6
To Learn
High speed Addition as a circuit
n-bit Carry Ripple Addition
B(n-1) A(n-1) B(2) A(2) B(1) A(1) B(0) A(0)
FA(n-1)
C(n-2) FA(2) C(0)
FA(1) FA(0)
0 0 0 Kill (k)
1 1 1 Generate (g)
CLA – Operation (*)
x(j+1)
(*) k p g
g k g g
1 0 1 0 1 1 0
1 0 1 1 1 0 1
Expected 1 0 1 1 0 0 1 1
Example
•Generate sums in parallel
1 0 1 0 1 1 0
1 0 1 1 1 0 1
Expected 1 0 1 1 0 0 1 1
Sum 0 0 0 1 0 1 1 Ignore carries for
now
Example
• Generate carries in parallel
1 0 1 0 1 1 0
1 0 1 1 1 0 1
Expected 1 0 1 1 0 0 1 1
Sum 0 0 0 1 0 1 1
Carry 1 0 1 0 1 0 0 Generate
carries in parallel
Example
•Add sum and carry now (ignoring any carries that
are generated in this process
1 0 1 0 1 1 0
1 0 1 1 1 0 1
Expected 1 0 1 1 0 0 1 1
Sum 0 0 0 1 0 1 1
Carry 1 0 1 0 1 0 0 Wrong in
this position
Add 1 0 1 0 0 0 1 1
Prefix Idea for Carry
g k g p g p p k
(Decimal example in first few slides is for 8 nodes, this example is for 7
bits )
7-Bit Carry Generation
Stable
Carry In
g k g p g p p k
g k g g g p k
g k g g g k k
g k g g g k k
Finally assign bits
Stable
Carry In
g k g p g p p k
g k g g g p k
g k g g g k k
g k g g g k k
1 0 1 1 1 0 0
Getting back to addition
•Add sum and carry now (ignoring any carries that
are generated in this process)
1 0 1 0 1 1 0
1 0 1 1 1 0 1
Expected 1 0 1 1 0 0 1 1
Sum 0 0 0 1 0 1 1
Carry 1 0 1 1 1 0 0 Ignore carries
now
Add 1 0 1 1 0 0 1 1
End of Week 9: Module 51
Thank You
Fast Adders 24