Professional Documents
Culture Documents
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Today’s Menu:
I/O Systems
Design
Performance: Throughput vs Latency
Basic Disk Drive Anatomy
Busses
Types of busses
Design Choices
Arbitration
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The Big Picture: Where are We Now?
Today’s Topic: I/O Systems
Network
Processor Processor
Input Input
Control Control
Memory Memory
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I/O System Design Issues
Performance
Expandability
Resilience in the face of failure
interrupts
Processor
Cache
Seconds
program performance
50.00
N = 55/32.5 = 1.7
40.00
1998 - 1999 30.00
CPU performance - factor of 2
20.00
program performance
10.00
N = 32.5 / 21.25 = 1.53
0.00
1999 - 2000 1996 1997 1998 1999 2000
Seconds
CPU performance - factor of 2 50.00
40.00
program performance
30.00
N = 75/62.5= 1.2
20.00
1998 - 1999 10.00
CPU performance -f actor of 2 0.00
1996 1997 1998 1999 2000
program performance
N = 62.5/56.5 = 1.11
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I/O Device Examples
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I/O System Performance
200
100
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What’s Inside A Disk Drive?
Spindle
Arm Platters
Actuator
Electronics
SCSI
Registers
Long term, nonvolatile storage
Cache
Memory
Large, inexpensive, and slow
Disk
Lowest level in the memory hierarchy
Platters
Tracks
Sectors
A Track
Platters
A Sector
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Disk Drive Performance (cont.)
Average access time =
(seek time) + (rotational latency) + (transfer) + (controller time)
Track and cylinder skew
cylinder switch time
delay to change from one cylinder to the next
may have to wait an extra rotation
solution - drives incorporate skew
offset sectors between cylinders to account for switch time
head switch time
change heads to go from one track to next on same cylinder
incur additional settling time
Prefetching
disks usually read an entire track at a time
assumes that request for the next sector will come soon
Caching
limited amount of caching across requests, but prefetching is preferred
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Example
Disk characteristics
512 byte sector, rotate at 5400 RPM, advertised seeks is 12 ms,
transfer rate is 4 MB/sec, controller overhead is 1 ms,
queue idle so no service time
Disk access time = ?
Access Time = Seek time + Rotational Latency + Transfer time
+ Controller Time + Queuing Delay
Access Time = 12 ms + 0.5 / 5400 RPM + 0.5 KB / 4 MB/s + 1 ms + 0 ms
= 12 ms + 0.5 / 90 RPS + 0.125 / 1024 s + 1 ms + 0 ms
= 12 ms + 5.5 ms + 0.1 ms + 1 ms + 0 ms
= 18.6 ms
Be very very careful about
the units on things. For example, at left,
rotations per minute transformed into
rotations per sec here so we can cancel
the “rotations” part and get out “seconds”
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ASIDE: Disk I/O Performance
Request Rate Service Rate
λ µ
Disk Disk
Controller
Queue
Processor
Disk Disk
Controller
Queue
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I/O Benchmarks for Magnetic Disks
Supercomputer application:
Large-scale scientific problems => large files
One large read and many small writes to snapshot computation
Data Rate: MB/second between memory and disk
Transaction processing:
Examples: Airline reservations systems and bank ATMs
Small changes to large shared software
I/O Rate: No. disk accesses / second given upper limit for latency
File system:
Measurements of UNIX file systems in an engineering environment:
80% of accesses are to files less than 10 KB
90% of all file accesses are to data with sequential addresses on disk
67% of the accesses are reads, 27% writes, 6% read-write
I/O Rate & Latency: No. disk accesses /second and response time
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Magnetic Storage Is Cheaper Than Paper
System Bus
1600 MB/s Memory
Processor
PCI
133 MB/s
Disk
Disks are pretty far away... SCSI 10 MB/s
40 MB/s
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System-Level View - Latency
System Bus
Memory
40 ns
Processor
1 ns
PCI
Disk
And slow too... SCSI 7 ms
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Busses
CPU
Mem
CPU-memory busses
CPU-Memory Bus
Fast
Proprietary
Closed and controlled Cache Bus Adapter
Support only memory transactions Main Memory
CPU
IO busses
Standardized (SCSI, PCI) I/O Bus
More diversity
More length
IO controller IO controller
Bus Bridges/Adapter
Cross from one bus to another
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Bus Design Decisions
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Bus Clocking: Synchronous
Synchronous
Sample the control signals at edge of clock
Clock
R/~W
Write Req
2
Pros:
No clock
Slow and fast components on the same bus
Con:
Inefficient: two round trips
Like somebody who always repeats what was said to them
Mixture of IO speeds
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Structure, Width, and Transfer Length
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Split Transactions
Clock
Addr Addr
Addr
Data Data
Data
6 cycles
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Bus Mastering
3
Example:
1. CPU makes memory request
2. Page Fault in VM requires disk access to load page
3. Mover data from disk to memory
Challenge: Arbitration
If two or more masters want the bus at the same time, who gets it?
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Arbitration Goals
Functionality
Prevent bus conflicts (two bussed simultaneous drivers)
Performance
Need to make decisions quickly
Priority
Some masters are more desperate than others
Example: DRAM refresh
Fairness
Every equal priority master should get equal service
No “starvation”: Every requestor should eventually get bus
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Arbitration Options
Bus Request
Bus Grant
Bus Release
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Centralized and Distributed Arbitration
Centralized: Arbiter
Require roundtrip
communication
Distributed:
Self-selection
Faster
Require duplicated state Arb Arb Arb Arb
Device 1 Device2 Device3 Device4
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Summary:
I/O performance…
… is limited by weakest link in chain between OS and device
Disk I/O Benchmarks
I/O rate vs. Data rate vs. latency
Three Components of Disk Access Time:
Seek Time: advertised to be 5 to 15 ms. May be lower in real life.
Rotational Latency: 4 ms at 7200 RPM and 6 ms at 5400 RPM
Transfer Time: 10 to 40 MB per second
Busses
Synchronous vs. Asynchronous
Serial and Parallel
Bus Mastering and Arbitration
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