A NOVEL SLEW-RATE ENHANCEMENT TECHNIQUE FOR ONE-
STAGE OPERATIONAL AMPLIFIERS
Jaime Ramirez-Angulo
Klispch School of Electrical and Computer Engineering
Box 30001,/Dept. 3-0, Las Cruces, NM 88003-0001
Abstract. An efficient technique to improve the slew rate
of one stage op-amps is introduced and verified. It
operates by enhancing the output current by almost an
order of magnitude without increasing the supply current
under static or small signal conditions. The technique is
only requires the addition of two transistors to a
conventional one-stage operational amplifier.
I. INTRODUCTION
Slew-rate is one of the most fundamental limitations
for large signal operation of analog systems [l].In
class A amplifiers, i.e. one-stage and two-stage
operational amplifiers, slew-rate (SR) is determined
by the bias current, Ibias, according to the well
known relation SR=Ibias/C,, [l] (where C,, is the
compensation capacitance). Increasing the slew-rate in
class A amplifiers is achieved at the expense of
augmenting Ibias, which as a consequence increases
the static power dissipation. If both, the supply
voltage requirements (which are determined by the
overdrive voltages VDS,,=VGSVTH) and the gain-
bandwidth product, GB, are to be maintained
constant, then, given that larger transistor sizes are
required for larger quiescent currents, this causes the
high frequency (parasitic) poles' to be decreased and
the phase margin of the op-amp to be degraded. To
minimize this problem, class AB differential-input
stages can be used in one-stage op-amps [4]-[6] while
class AB output stages are used in two-stage (Miller)
op-amps [3]. These allow for maximum output
currents, Iomax, which can be much larger than the
differential-pair bias current. One-stage op-amps are
appropriate for applications where rail-rail input
swing is required [7]. The main problem of one-stage
op-amps, that use class AB differential-input stages,
is that this type of circuitry is relatively complex so
that it requires increased Silicon area, and/or
BiCMOS technology, and/or increased voltage supply
requirements. In this paper, we introduce a very
simple slew-rate and bandwidth enhancement
technique for one-stage op-amps that does not
increase (siguficantly) the static power consumption.
0-7803-3636-4/97 $10.00 0 1997 IEEE
11. SLEW-RATE ENHANCEMENT TECHNIQUE
Fig. l a shows a conventional one-stage operational
amplifier that consists of a differential-input stage and
a three-mirror current differencing network (unity-
gain mirrors are assumed) with slew-rate given by
SR=Ibias /Camp.Fig. lb shows a modified version of
this op-amp denoted onwards as a slew-rate
enhanced op-amp. In order to improve slew rate
matched transistors MR and MRP are added on the
input side of the P-mirror transistors. These
transistors are biased (with VR) in order to operate in
the triode region. They act as non-linear resistors that
generate a small drain-source voltage, VsdQ, when
the drain current has the quiescent value IdQ=Ibias/2
and a large Vsd voltage when the drain current takes
its maxi" value Idmax=Ibias. This is illustrated in
Fig. IC. which shows a plot of id vs. Vsd for a
constant value VSG=VDD-VR (this plot is one of the
constant VSG curves for the output transistor
characteristic). It can be seen that, as the current
changes from Ibias/2 to the maximum value Ibias, the
source-drain voltage changes from a relatively small
value, VsdQ, to a value Vsdmax, which is much
larger than VdsQ. The output current of the
operational amplifier, (Iout=io-io') is determined by
the source-gate voltage of the P-output mirror
transistors. The source-gate voltage for these
transistors equals the sum of the source-gate voltage
of the input mirror transistor plus that of the source-
drain voltage of triode mode transistor MR (or MRP).
Because of this, when the current in the input mirror
transistor takes the maximum value Ibias (i.e., when
an abrupt change in the input differential voltage
takes place), the output current becomes much greater
than Ibias and thus charges or discharges the
compensation (or load) capacitor much faster than in
a conventional OTA. The main advantage of this
technique is that it is very simple since it requires
only two additional transistors and it also allows
flexibility in programming (with VR) the slew-rate of
the operational amplifier without changing its input
range or without increasing the supply requirements.
7
 111. SIMULATION RESULTS
Fig. 2 shows SPICE simulations which enables us to
compare the transient response of the conventional
operational amplifier and that of the slew-rate
enhanced operational amplifier of Fig. lb. Equal
device sizes and bias currents are used for the
simulations of both circuits. For the simulations, the
Operational amplifiers are connected as voltage
followers (input signal applied to the positive input
and the output is connected to the negative input)
and a 4V, square pulse waveform was applied at
their input. It can be seen, from Fig. 2, that the rise
and fall times of the conventional operational
amplifier are much larger than those of the slew-rate
enhanced operational amplifier. Fig. 2b shows the
transient load (or compensation) capacitor currents. It
can be observed that in the slew-rate enhanced
operational amplifier the peak transient current is
almost five times larger than that of the conventional
operational amplifier. Rise and fall times of the slew-
rate enhanced operational amplifier are 3OnS and
40nS respectively while the conventional operational
amplifier has rise and fall times of 120nS and 130nS
respectively. Fig. 3 compares the DC
transconductance characteristic Iout vs. Vin (input
signal applied to positive input terminal, negative
input and output terminals grounded) of the
conventional operational amplifier and the slew-rate
enhanced operational amplifier. The effect of
transistors MR,MRP when they change from triode to
saturated mode can easily be noticed. They cause an
abrupt change in 1out.which leads to a maximum
output current which is almost a factor six larger for
the slew-rate enhanced operational amplifier than for
the conventional operational amplifier. SPICE
simulations of the frequency response are shown in
Fig. 4.It can be seen that the bandwidth of the slew-
rate enhanced version is improved almost by a factor
two (from 5.6MHz for the conventional operational
amplifier to 10MHz for the slew-rate enhanced
version). Equivalent input noise voltage spectral-
density is decreased from 30nV/dHz for the
conventional operational amplifier to 22 nV/dHz for
the slew-rate enhanced version. These improvements
are achieved at the expense of increasing slightly the
static power consumption (from 1.8mW for the
conventional operational amplifier to 2.3mW for the
slew-rateenhanced operational amplifier). Simulations
were performed using 2p.m CMOS P-well MOSIS
technology parameters and load capacitor values:
Ccomp=4pF. The following transistor sizes (in pn),
bias-currents, and bias-voltages were used for the
8
simulations: N-differential pair transistors W/L=6/2,
N-mirror transistors W/L=10/2, P-Mirror transistors
and P-cascode transistors W/L=15/2, resistor
simulating transistors (MR,MRP) W/L=25/2,
Ibias=60pA and VR=3.8V. A breadboard prototype,
using transistor arrays (with W/L=2000/2) fabricated
trough MOSIS allowed the experimental verification
of the proposed technique at slew-rate values scaled
down by approximately a factor 100 (due to
breadboard parasitics). A "buffered' test chip version
with the transistor sizes indicated above but scaled up
by a factor 100 has been fabricated and the
experimental results are in good agreement with
simulation results.
IV. CONCLUSION
A new and simple technique to enhance slew-rate in
one-stage operational amplifiers was introduced and
verified by means of SPICE simulations. It was also
verified experimentallyusing a breadboard prototype.
The technique requires only two additional transistors
and also allows improvement of bandwidth and noise
characteristics. This improvement requires just slight
increase of the static power dissipation of the op-amp
but the voltage supply requirements remain the same.
The circuit presented here can be easily modified to
implement circuits with rail-rail common-mode input
signal swing.
REFERENCES
P.R. Gray and R.G. Meyer,"Analysisand Design of
Analog Integrated Circuits," John Wiley & Sons,
Third Edition, New York 1993
R. Gregorian and G.C. Temes,"Analog MOS
Integrated Circuits for Signal Processing," John
Wiley and Sons, New York, 1986, chapter four.
J. Ram'rez-Angulo, "High slew-rate, low-voltage
Bicmos . and Bipolar operational amplifier
architectures with rail to rail common-mode input
voltage swing,"Proceedings of the 1994 Int. Symp. on
Circts. and Syst., May 39 June 2, 1995
Seevinck, E. and Waseenar, R.F."Aversatile CMOS
linear transconductor/square law function circuit,"
,IEEE J. Solid-State Circts, vol. SC-22, No.3, pp. 366-
377, 1987.
J. Ram'rez-Angulo, "Low Voltage, High Slew Rate
Bipolar and BiCMOS op-amp architectures with
rail to rail common mode input and output swing
capabilities," 1994 IEEE Inf. Symp. on Circts. and
Syst., pp. 743-746, London, England, May 30- June
2, 1994
 i i

Fig. 1 (a) Conventional cascode OTA (b) Slew-rate enhanced OTA (c) Output characteristics of MR,MRP

~QOUA

’ OuA

slev-rate. en anced op-amp

Fig. 2 Comparison of transient response of op-amps in voltage follower mode: (a) Load capacitor currents
(b) Output and input waveforms

9
 400uA
. .
... ..

..

200uA . . . . . . . . . . . . . . . .
. .

OuA . ...- . . . . . . . . . . . . . . . . . . . . . .
___.

-200uA . - ._ . . . . . . . . . .

-400uA
-3.OV . -2.ov -1 .ov 0.0v 1.ov 2.0v 3.0V
0 i(rout) 0 i(routp)
vio

Fig. 3 Comparison of DC transconductance characteristics of conventional and slew-rate enhanced oy-amps.

Frequency

Fig. 4 Frequency response of op-amps in voltage follower configuration

10