A Simple Slew Rate Enhancement Technique with

Improved Linearity and Preserved Small Signal

Performance
Bin Huang*† and Degang Chen*
Email: bhuang@iastate.edu djchen@iastate.edu
*Department of Electrical and Computer Engineering, Iowa State University, Ames, IA, USA
†
Mobility Group, Maxim Integrated Products Inc, San Jose, CA, USA

Abstract—A simple yet very effective slew rate enhancement The paper is organized as follows. In Section II, the
(SRE) method is proposed. The proposed SRE feedback is off for concept and operating principles of tail current enhancement
small signal operation to preserve an amplifier’s small signal schemes are reviewed. Then, the proposed SRE method is
performance, and is activated to enhance slew rate (SR) and introduced and described. In Section III, a design example of
linearity only when an amplifier is slewing. Compared with a single-stage single-ended operational transconductance
conventional OTA, the OTA with the proposed SRE scheme amplifier (OTA) with the proposed SRE method is analyzed in
shows SRE by a factor of 23.2, THD improvement of 6dB and terms of its small and large signal behavior. Section IV
preserved small signal performance with only 1.2% area and 2% presents the simulation results and comparisons among three
power consumption overhead. Compared with the adaptive
designed OTAs. Finally, some conclusions are drawn in
biasing method, the proposed scheme shows 300% SR
improvement, 18dB THD improvement but with power and area
Section V.
consumption decreased by 11.1% and 25% respectively II. CONCEPTS OF SLEW RATE ENHANCEMENT
Keywords—slew rate enhancement A. Adapative biasing
I. INTRODUCTION Fig. 1 shows an OTA with the adaptive biasing scheme in
[3]. All current mirrors’ size ratios are 1 except the current
Op amps are fundamental analog building blocks for many mirrors formed by M18, M17 and M19, M20, whose size ratios
analog and mixed signal systems such as data converters, are A. When a positive differential signal is applied, I2
switched-capacitor circuits and filters. Class A op amps have becomes larger than I1, where I1 and I2 respectively denotes the
poor large-signal behavior because of their fixed tail currents. drain current of M1 and M2. The absolute current difference
In order to achieve high slew rate but with low static power, between I1 and I2 is sensed by current subtraction circuits
class AB output stages and tail current enhancement techniques formed by M16-M22 and is feedback to tail current of the
are commonly used to generate large dynamic current. In the OTA. Assuming both M1 and M2 work in the weak inversion
literature, many different SRE methods [1-6] have been region, I I A|I I | I and I I exp /
proposed but all suffer from various drawbacks. For example, can be obtained by writing the KCL equations at the common
some SRE methods [1] [2] are incompatible with low supply source node of the input pair (M1 and M2) X. Thus, I2 and I1
voltage, some [3-5] degrade amplifier linearity, some [6] are can be found as (1) and (2), where is the thermal voltage.
sensitive to input common mode range (ICMR), yet others [4]
The output current of the OTA is the current difference
require complex circuits with large power and area overhead.
between I2 and I1, given as (3).
In this paper, we introduce and discuss a power and area VDD
efficient SRE method based upon excessive transient detection.
The proposed SRE method offers several advantages compared
M8 M3 M4 M5
with the previously reported SRE methods [1-6]. First, the SRE M11 M12 M13 M14
method has a predefined turn on voltage for the SRE circuit.
For small signal operation, the sensed voltage is smaller than I1 I2
the turn on voltage and hence the SRE circuit stays off. Thus, it Vin-
M1 M2
Vin+
Vout
has no impact on amplifiers’ small signal performance and X
linearity. Second, the SRE scheme is simple yet very effective
for current boost with little power and area consumption. The
current boost resulted from this SRE scheme is nonlinear,
making an entire amplifier more linear than those linear SRE 1:A
IP
A:1
Vb
methods [3-5]. Third, the proposed SRE method is robust to M7 M15 M16 M18 M19 M21 M22 M6
ICMR of op amps as it detects transient signals in the internal M17 VSS M9 M20
nodes rather than the input of an amplifier.
Fig. 1: OTA with adaptive biasing circuit from [3]

978-1-4799-4132-2/14/$31.00 ©2014 IEEE 270

 / represents the overdrive voltage of M18. The expression of
I 1 VDS18 is calculated and given by (7). To ensure that M19 works
1 1 /
in the cutoff region in the quiescent operation, VDS18 should be
I 2 less than the threshold voltage of M19.
1 1 /
Upon application of a differential signal, , to the input of
1 / an amplifier, the sensed complementary signals, VA and VC,
I I I 3 change in the opposite directions and can respectively be
1 1 /
expressed as VB+∆V and VB-∆V, where ∆V increases as
For large signal operation, , and output peak increases. When |∆V| , both M15 and M16 stay on.
current is obtained as (4). Equation (4) implies the peak current When |∆V| , M16 or M15 turns off and only M15 or
Ipk is large when A=1. But the peak current cannot be infinite M16 contributes drain current. According to the square law
since when the drain current of the input pair becomes large, model, the total current in M15 and M16 is found as (8), which
the input pair will leave the weak inversion region and shows that monotonically increases as |∆V| increases.
equations (3) and (4) are no longer valid. For small signal
operation, (3) is applicable and the transconductance of the VDD VDD
input pair, gm, is calculated as / as approximately 1:n (n>2) M19
Vb1 Itail_dy
given by (5). As we can see, when A is not equal to zero, gm M0
will vary as input differential signal changes, which degrades It M17 M18
the linearity of the OTA compared with the conventional OTA M7 M8 Itail_dy
where A=0. The reason of the loss in linearity is that the
adaptive circuit does not distinguish between small signal and
Vin- Vin+
large signal operation. Instead, the adaptive biasing circuit is M1 M2 Vctrl
Vout
always on as long as a differential signal is applied. VB
VA
M5 M14
LCMFB
, 0 1
| 1 4 A R1 R2 C VA VC
, 1
M15 M16
2 / M3
B
M4 M6 VSS
1 1 1 1 2 1 VSS
Core amplifier Proposed SRE circuit
/ Fig. 2: Designed one-stage OTA with the proposed SRE method
5
2 2 /
1 1
B. Proposed Slew Rate Enhancement Scheme 2 6
2 2
In order to avoid the aforementioned linearity degradation,
we propose a simple SRE scheme shown in Fig. 2. The drain of 1 1 2/ 7
M19 is connected to the common source node of the core
∆ |∆ |
amplifier’s input pair and M19 can dynamically adjust the
amplifier’s tail current. M19 is normally off for quiescent or 1 8
∆ |∆ |
small signal operation to preserve the amplifier’s small signal 2
operation and linearity. Only when the amplifier is about to When |∆V| becomes as large as ∆Von, M18 starts to work in
slew, M19 will be turned on heavily to provide large dynamic the saturation region and M15 or M16 starts to work at the
tail current so as to effectively boost the amplifier’s SR and intersection of the triode region and saturation region. Then,
improve its large signal linearity. any further increase in |∆V| will quickly make at least one of
M15 and M16 work in the triode or cutoff region while M18
In the proposed SRE circuit shown in Fig. 2, VA and VC are stays in the saturation region. As a result, Vctrl approaches to
connected to the amplifier’s internal nodes and used for Vss and M19 is turned on to provide dynamic current to the
detecting the onset of slewing. VA and VC have the same amplifier. Therefore, the boundary between the disabling and
common mode voltage VB but opposite differential voltage. enabling of M19 can be approximately marked by that M15,
The transistors M14, M15 and M16 have the same size, M16 and M18 are all working in the saturation region at the
whereas M18 and M17 have a size ratio of n. In this work, n>2 same time. At this boundary, the relationship between the drain
is chosen so as to make sure that in quiescent operation M15 current of M18 and that of M15 and M16 can be expressed as
and M16 work in the saturation region and M18 works in the (9) by writing KCL equation at the drain of M18. Based on (9),
triode region. The purpose of having M18 work in the triode ∆Von is calculated as (10). When n=4, the turn on voltage is
region is to turn off the SRE circuit and keep an amplifier’s DC equal to . If n is less than 4, the first equation in (10)
operating point untouched. The drain source voltage across applies otherwise the second applies. For large signal
M18, VDS18, can be calculated as (6), because the drain current operation, |∆V| is very large, making M15 or M16 work in the
in M18, equal to the total drain current in M15 and M16, is deep triode region and Vctrl approximate Vss. Thus, M19 is
twice of the drain current in M14 or M17. In (6), β18 and β17 are turned on heavily and a large transient tail current is provided
respectively / and / ; Vod18 to the amplifier to effectively boost its SR.

271

∆ ∆
2 margin and stability of the OTA as shown in (13). Fortunately,
1 9
∆ ∆
2 2
∆ 1 ∆ 1
2 10
∆ √ 1 ∆
In short, the proposed SRE method has a predefined turn on
voltage, ∆Von, and has zero impact on an amplifier’s DC
operating point or small signal performance or linearity.
Meanwhile, it can provide a very large dynamic current to
effectively enhance an amplifier’s SR while the amplifier is
slewing, hence improving an amplifier’s large signal linearity.
III. OTA WITH THE SRE TECHNIQUE
A. Small Signal Analysis
Fig. 2 shows the designed one-stage single-ended OTA
with the proposed SRE method. The OTA has a class AB
output stage and the input stage of the OTA has a local
common mode feedback (LCMFB) formed by R1,2, M3 and
M4. Upon application of small-signal input, a differential
signal vid, the small-signal variations at nodes A and C are
complementary and make node B virtual ground. Thus, the
effects of Cgs3 and Cgs4 on nodes A and C are eliminated and
the corresponding high frequency pole PA given by (11) tends
to increase, where RA=R1,2//rds3,4//rds1,2 and CA is the total
parasitic capacitor at node A. The gain bandwidth product
(GBW) of the OTA is obtained as (12) as M3~M6 have the
same size, where gm1, gm5,6 are transconductance of M1, M5,6
and CL is the capacitive load of the OTA. The phase margin
(PM) of the OTA is approximately given by (13). In order to
ensure that PA imposes little phase degradation on the OTA,
R1,2 should be small. In this work, the value of R1,2 is designed
in the neighborhood of 1/gm3,4, where gm3,4 is small-signal
transconductance of M3 and M4.
1 frequency (UGF) of 7.33MHz and phase margin (PM) of 88°
11
2 under the same capacitive load of 20pF. Small signal step
,
12
2 conventional OTA while the adaptive OTA does not. This
,
90 tan 13
B. Large Signal Analysis
When a differential signal is applied to the input of the
OTA, a current difference Id=I1-I2 is created between M1 and
M2. But the current flows in M3 and M4 are approximately
a large R1,2 in the LCMFB is helpful for SRE but reduces phase
the workings of the proposed SRE method does not require
large resistors to achieve large SRE and hence the method is
compatible for stability requirement.
1
,
,
,
14
2 2 2 2
, 2 / ,
1 , | | 15
2 / ,
2 2
g , ,
, 16
4 , 4α 4α
As for the SRE circuit in Fig. 2, the size ratio between M17
and M18 is n=2.125. To guarantee this ratio after fabrication,
some sophisticated layout techniques or simple trimming
circuits may need to be implemented. After plugging n into
(11), the turn on voltage of the SRE circuit becomes 0.25Vod14.
Assuming R1,2 is α/gm3,4 and Vod14 is equal to βVod3, the
obtained turn on differential current Id,on is given by (16),
where Itail,Q is the quiescent drain current in M0. Equation (16)
implies that as long as β/4α is less than 1, the SRE circuit will
be turned on when the amplifier starts slewing. In this design,
β=1 and α=0.67. After the OTA completes slewing and goes
into the small signal settling process, Id becomes less than Id,on
and thus turning off the SRE circuit.
IV. SIMULATON RESULTS
To show the effectiveness of the proposed SRE method,
three one-stage single-ended OTAs are designed in the IBM
130nm process. The first OTA (conventional) and the second
(proposed) share the same core amplifier as shown in Fig. 2;
but the conventional OTA does not have any SRE circuit
whereas the proposed OTA has the proposed SRE circuit. The
third OTA (adaptive) has an adaptive SRE circuit [3]. The
three designed OTAs have almost the same unity gain
responses of the three OTAs are shown in Fig. 3. The proposed
OTA preserves the small signal step responses of the
reflects that unlike the adaptive method which influences the
small signal operation of the OTA, the proposed SRE scheme
has no such impact.
Small signal settling
0.56
Proposed
0.55 Adaptive
Conventional
Output voltage (V)

fixed and equal to half of the tail current because VB keeps 0.54
unchanged. Thus, the current flow in R1,2 is Id/2 while VA and
VC correspondingly becomes VB+R1Id/2 and VB-R1Id/2. The 0.53

currents in M5 and M6 in the output stage are obtained as (14). 0.52

Since M7 and M8 have the same size, the current flow in CL is
equal to the current difference between I5 and I6 as given by 0.51
(15), in which is proportional to the square root of I1+I2.
This means that a boosted transient tail current always 0.5
0 50 100 150 200
enhances the OTA’s SR no matter whether the transient current Time (ns)
in M1 and M2 are differential or common mode current. Also, Fig. 3: Small signal transient response of the three op amps

272
 corresponding transient tail currents are displayed in Fig. 4(b).
As we can see from Fig. 4(a), the proposed SRE method
improves the average of the conventional OTA’s positive and
negative SR by a factor of 23.2 with power and area overhead
being only 2% and 1.2% of those of the conventional OTA. In
the meantime, compared with the adaptive OTA, the SR of the
proposed OTA is improved by more than 300% but with power
and area consumption decreased by 11.1% and 25%
respectively. Fig. 4(b) shows that the peak transient tail
currents of the proposed OTA are 1158uA in negative slewing
and 871.6uA in positive slewing, which are respectively about
4.4 and 2.4 times of the adaptive OTA and 14.5 and 13.4 times
of the conventional OTA. The linearity of the three OTAs is
(a) simulated with a 1MHz, 0.6V peak-to-peak voltage sine wave.
The total harmonic distortion (THD) of the proposed OTA is
respectively improved by 18dB and 6dB compared with the
adaptive and conventional OTAs. The performance of the three
designed OTAs is summarized and compared in Table 1.
V. CONCLUSION
A simple yet very effective SRE method has been
introduced. Compared with the conventional OTA, the
proposed OTA preserves small signal performance and
improves SR by a factor of 23.2 and THD by 6dB, but the
power and area overhead is only 2% and 1.2% of those of the
conventional OTA. Compared with the adaptive OTA, the SR
and THD of the proposed OTA are respectively improved by 3
(b) times and by 18dB. Due to the little power consumption, small
Fig. 4: Large signal step response of three OTAs (a) transient output voltage area overhead, design simplicity and high effectiveness of the
(b) transient tail current proposed SRE method, the method is suitable for applications
which requires low static power dissipation but with
TABLE I. PERFORMANCE SUMMARY OF THE THREE DESIGNED OTAS considerable capacitive driving capability.
Parameter Conventional Adaptive Proposed
REFERENCES
Load Capacitor (pF) 20 20 20
[1] R. Castello, and P.R Gray, “A high-performance micropower
DC Gain (dB) 24.9 24.86 24.9 switched-capacitor filter”, IEEE J. Solid-State Circuits, vol.20, no.6,
UGF(MHz) 7.33 7.58 7.33 pp.1122-1132, Dec. 1985
PM (deg) 88.7 89 88.7 [2] B.W. Lee, and B.J Sheu, “A high slew-rate CMOS amplifier for analog
signal processing”, IEEE J. Solid-State Circuits, vol.25, no.3, pp.885-
SR+/SR - (V/µs) 8/5.6 61.8/34.8 138/178.4 889, June 1990
THD (dBc) @ Vpp=0.6V, -56.7 -44.7 -62.7 [3] M. Degranuwe, J. Rijmenants, E. A. Vittoz, and D. Man “Adaptive
fin=1MHz biasing CMOS amplifiers”, IEEE J. Solid-State Circuits, vol.17, no.3,
pp.522-528, June 1982
Estimated Area (µm2) 8,214 11,065 8,310
[4] R. Harjani, R. Heineke, and F. Wang “An integrated low voltage class
Current consumption (µA) 252.9 290.2 258 AB CMOS OTA”, IEEE J. Solid-State Circuits, vol.34, no.2, pp.134-
Supply Voltage (V) 1.5 1.5 1.5 142, Feb 1999
[5] A.J. Lopez-Martin, S. Baswa, J. Ramirez-Angulo, and R.G. Carvajal,
Technology IBM 0.13µm CMOS
“Low-Voltage Super class AB CMOS OTA cells with very high slew
rate and power efficiency”, IEEE J. Solid-State Circuits, vol.40, no.5,
pp.1068-1077, May 2005
Upon application of 0.8V voltage step to the input of the [6] R. Klinke, B.J. Hosticka, and H. Pfleiderer, “A very-high-slew-rate
OTA in unity gain buffer configuration, the transient responses CMOS operational amplifier”, IEEE J. Solid-State Circuits, vol.24, no.3,
of the three OTAs are shown in Fig. 4(a) and their pp.744-746, Jun 1989

273