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LAB no. 6.
MULTIPLEXERS
Multiplexers are combinational logic circuits that switch the data
from oneof its input to a unique output. The input is selected through an
address word.
1. 2 to 1 multiplexer
The circuit allows switching the data from the input I0 (A=0) or I1
(A=1) toward the output Y. The circuit symbol and its truth table are
presented in figure 1.
I0 I1
A I1 I0 Y
0 X 0 0
2:1 0 X 1 1 Y=I0
A 1 0 X 0
Y=I1
Y 1 1 X 1
Figure 1
I1 I0 00 01 11 10
A
0 0 0 1 1
1 0 1 1 0
Y = A ⋅ I 0 + A ⋅ I1 .
From this equation, the multiplexer will look like in figure 2:
I1 I0
Figure 2
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Digital Circuits Laboratory Multiplexers
LAB no. 6.
2. 4:1 multiplexer with enable input
For addressing 4 inputs, 2 address lines are necessary. Their
selection is similar with the one in the address decoder. The circuit has an
additional input for enabling its operation.
The circuit symbol and its truth table are presented in figure 3.
I0 I1 I0 I1 E A1 A0 I0 I1 I2 I3 Y
A0 0 0 0 1 X X X 1
E Y=I0
A1 4:1 0 0 0 0 X X X 0
0 0 1 X 1 X X 1
Y=I1
0 0 1 X 0 X X 0
Y
0 1 0 X X 1 X 1
Y=I2
0 1 0 X X 0 X 0
0 1 1 X X X 1 1 Y=I3
0 1 1 X X X 0 0
1 X X X X X X 0
Figura 3
Y = E ⋅ A1 ⋅ A0 ⋅ I 0 ⋅ ( I 2 ⋅ I 3 + I 3 ⋅ I 2 + I 3 ⋅ I 2 + I 3 ⋅ I 2 ) +
+ E ⋅ A1 ⋅ A0 ⋅ I1 ⋅ ( I 3 + I 3 ) + E ⋅ A1 ⋅ A0 ⋅ I 2 + E ⋅ A1 ⋅ A0 ⋅ I 3 =
= E ⋅ ( A1 ⋅ A0 ⋅ I 0 + A1 ⋅ A0 ⋅ I1 + A1 ⋅ A0 ⋅ I 2 + A1 ⋅ A0 ⋅ I 3 )
The synthesis needs : - 1 OR gate with 4 inputs
- 4 AND gates with 4 inputs
- 3 inverters
32
Digital Circuits Laboratory Multiplexers
LAB no. 6.
I 3 I2 I1 I0
A0
Y
A1
Figure 4
+1
A4⋅2⋅3
B4C ⋅0 + 1
A4⋅2⋅3
B4C+1
A4⋅2⋅3
B4C+1
A4⋅2⋅3
B4C ⋅0
I4 I5 I6 I7
33
Digital Circuits Laboratory Multiplexers
LAB no. 6.
The function implementation can be done like below:
1
0
I0 I1 I2 I3 I4 I5 I6 I7
A A0 E
B A1
8:1
C A2 Y
Figure 5
4. Lab works
Complete the following sheet according to the indications.
34
Digital Circuits Laboratory Multiplexers
LAB no. 6.
LAB SHEET
1. Make the 2 :1 multiplexer schematic in MaxPlus II (figure 2). Simulate it and draw the
output waveform on the grid below. Compare the resulted data with the truth table.
A
I0
I1
Y
2. Make the 4:1 multiplexer in MaxPlusII (figure 4). Simulate and draw the output
waveform E = 0 . Find the delay time and mark the logic values on the waveforms.
Compare the results with the truth table.
E
A0
A1
I0
I1
I2
I3
Y
E
A0
A1
I0
I1
I2
I3
Y
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