PRACTICAL QUESTION OF DIGITAL TECHNIQUES

Q.1 Draw The Circuit Diagram Of Logic Gates And Verify The Truth Table.

ANS= Types of Logic Gates

The different types of logic gates and symbols with truth tables are discussed
below.

AND GATE

OR GATE

NOT GATE
NAND GATE

NOR GATE

EXCLUSIVE- OR GATE

Q.2 REALIZATION OF AND, OR, NOT AND EX-OR LOGIC GATES USING NAND AND NOR
GATE.

ANS= In Boolean Algebra, the NAND and NOR gates are called universal gates because

any digital circuit can be implemented by using any one of these two i.e. any logic gate
can be created using NAND or NOR gates only.
Every logic gate has a representation symbol. The below image shows a graphical
representation of all logic gates. 
 Graphical representation of logic gates.

1. Implementation of AND Gate using Universal gates.

a) Using NAND Gates

The AND gate can be implemented by using two NAND gates in the below
fashion:
b) Using NOR Gates
Implementation of AND gate using only NOR gates as shown below:

2. Implementation of OR Gate using Universal gates .

a) Using NAND Gates

The OR gate can be implemented using the NAND gate as below:

b) Using NOR Gates

Implementation of OR gate using two NOR gates as shown in the picture below:

3. Implementation of NOT Gate using Universal gates.

a) Using NAND Gates

b) Using NOR Gates

4. Implementation of XOR Gate using Universal gates.

a) Using NAND Gates

b) Using NOR Gates

5. Implementation of XNOR Gate using Universal gates.

a) Using NAND Gate

b) Using NOR Gate

6. Implementation of NOR Gate using NAND Gates

7. Implementation of NAND Gate using NOR Gates

Q.3 IMPLEMENT SIMPLE BOOLEAN EQUATION USING GATES AND VERIFY

OUTPUT.

ANS= Converting Boolean Expression to Logic Circuit

The simplest way to convert a Boolean expression into a logical circuit is to follow the reverse
approach in which we start from the output of the Boolean expression and reach towards the
input.

Example1: Realize the Boolean Expression BC + A + (A + C) using AOI logic.

Solution:

To realize this using the AOI logic gates, we will use the reverse approach.

Step 1:

Our expression BC + A + (A+C) is the summation of three terms BC, A and, (A+C), thus a 3-

input OR Gate must have been used to obtain the expression as given :0
Step 2:

Now, BC and (A + C) both are inverted in nature, so they must have been inverted using a NOT
Gate earlier. BC must have been obtained by inverting the input BC and (A + C) must have
been obtained by inverting the input (A + C) both using the NOT Gate.

Step 3:

Moving further, in the reverse direction we see, BC must have been an output of 2-input AND
Gate with inputs as B and C. Likewise, (A + C) must have been obtained as the output of 2-
input OR gate with A and C as the inputs.

So, Final Logic Diagram for above given Boolean expression can be drawn as,

Converting Logic Diagrams into Boolean Expressions

The easiest way to obtain the Boolean Expression from any logic circuit is to follow the forward
propagation approach. In this, we start from the input side and move ahead until the output is
reached. While moving from the input side to the output side, we continue evaluating the output
of intermediate logic gates.

Q.4 IMPLEMENT AND VERIFY TRUTH TABLE OF HALF AND FULL ADDER.

ANS= Half Adder

So, coming to the scenario of half adder, it adds two binary digits where the input bits are
termed as augend and addend and the result will be two outputs one is the sum and the other is
carry To perform the sum operation, XOR is applied to both the inputs, and AND gate is
applied to both inputs to produce carry.

HA Functional Diagram

The 2-bit half adder truth table is as below:

Half Adder Truth Table

0+0 = 0
0+1 = 1
1+0 = 1
1+1 = 10

Sum= A XOR B
Carry = A AND B

HA Logical Diagram

And an equivalent expression in terms of the basic AND, OR, and NOT is:

SUM=A.B+A.B’
Full Adder
This adder is difficult to implement when compared to half-adder.

Full Adder Functional Diagram

The difference between a half-adder and a full-adder is that the full-adder has three inputs and
two outputs, whereas half adder has only two inputs and two outputs. The first two inputs are A
and B and the third input is an input carry as C-IN. When a full-adder logic is designed, you
string eight of them together to create a byte-wide adder and cascade the carry bit from one
adder to the next.

FA Truth Table

The output carry is designated as C-OUT and the normal output is

represented as S which is ‘SUM’.

Q.5 STUDY AND VERIFY TRUTH TABLE OF 4:1 MULTIPLEXER.

ANS= 4x1 Multiplexer
4x1 Multiplexer has four data inputs I 3, I2, I1 & I0, two selection lines s1 & s0 and one output Y.
The block diagram of 4x1 Multiplexer is shown in the following figure.

One of these 4 inputs will be connected to the output based on the combination of inputs present
at these two selection lines. Truth table of 4x1 Multiplexer is shown below.

Selection Lines Output

S1 S0 Y
 0 0 I0

0 1 I1

1 0 I2

1 1 I3

From Truth table, we can directly write the Boolean function for output, Y as

Y=S1′S0′I0+S1′S0I1+S1S0′I2+S1S0I3Y=S1′S0′I0+S1′S0I1+S1S0′I2+S1S0I3

Q.6 STUDY AND VERIFY TRUTH TABLE OF 1:4 DE-

MULTIPLEXER.
ANS= 1x4 De-Multiplexer
1x4 De-Multiplexer has one input I, two selection lines, s 1 & s0 and four outputs Y3, Y2, Y1 &Y0. The block
diagram of 1x4 De-Multiplexer is shown in the following figure.

The single input ‘I’ will be connected to one of the four outputs, Y 3 to Y0 based on the
values of selection lines s1 & s0. The Truth table of 1x4 De-Multiplexer is shown below.

Selection Inputs Outputs

S1 S0 Y3 Y2 Y1 Y0

0 0 0 0 0 I

0 1 0 0 I 0

1 0 0 I 0 0

1 1 I 0 0 0
From the above Truth table, we can directly write the Boolean functions for each output
as
Y3=s1s0IY3=s1s0I
Y2=s1s0′IY2=s1s0′I
Y1=s1′s0IY1=s1′s0I
Y0=s1′s0′IY0=s1′s0′I

Q.7 DESIGN AND IMPLEMENT 2:4 DECODER.

ANS= DESIGNING OF 2 TO 4 LINE DECODER CIRCUIT
Similar to the multiplexer circuit, the decoder is not restricted to a particular address line, and
thus can have more than two outputs (with two, three, or four address lines). The decoder
circuit can decode a 2, 3, or 4-bit binary number, or can decode up to 4, 8, or 16 time-
multiplexed signals.

2-to-4-Decoder Circuit
As a decoder, this circuit takes an n-bit binary number and generates an output on one of the 2n output
lines. It is therefore usually described by the number of addressing i/p lines & the number of data o/p
lines. Typical decoder ICs might include two 2-4 line circuits, a 3-8 line circuit, or a  4-16 line
decoder circuit. One exclusion to the binary character of this circuit is the 4-10 line decoders, which is
proposed to alter a Binary Coded Decimal (BCD) input to a 0-9 range output.
If you employ this circuit as a decoder, you may want to insert data latches at the o/ps to keep every
signal while the others are being conveyed. But, this doesn’t relate when you are using this circuit as a
decoder, then you will want just a single active o/p to equal the input code.
2 to 4 Line Decoder Truth Table
In this type of decoders, decoders have two inputs namely A0, A1, and four outputs denoted by D0, D1,
D2, and D3. As you can see in the following truth table – for every input combination, one o/p line is
turned on.

2-to-4-Decoder Truth Table

Applications of Decoder
The applications of decoder involve in the making of various electronic projects.
 War- Field -Flying Robot with a Night Vision Flying Camera
 Robotic Vehicle with Metal Detector
 RF-based Home Automation System
 Speed Synchronization of Multiple Motors in Industries
 Automatic Wireless Health Monitoring System in Hospitals for Patients
 Secret Code Enabled Secure Communication using RF Tec.

Q.8 DESIGN AND IMPLEMENT 4:2 ENCODER.

ANS= An Encoder is a combinational circuit that performs the reverse operation of
Decoder.It has maximum of 2^n input lines and ‘n’ output lines, hence it encodes the
information from 2^n inputs into an n-bit code. It will produce a binary code
equivalent to the input, which is active High. Therefore, the encoder encodes 2^n
input lines with ‘n’ bits.

4 : 2 Encoder –
The 4 to 2 Encoder consists of four inputs Y3, Y2, Y1 & Y0 and two outputs A1 & A0.
At any time, only one of these 4 inputs can be ‘1’ in order to get the respective binary
code at the output. The figure below shows the logic symbol of 4 to 2 encoder :

The Truth table of 4 to 2 encoder is as follows :

Logical expression for A1 and A0 :

A1 = Y3 + Y2
A0 = Y3 + Y1
The above two Boolean functions A1 and A0 can be implemented using two
input OR gates :