CSNB3213

Digital Design and Microprocessor Systems

Chapter 1
Logic Gates and Boolean Algebra
Topic 1 : Boolean Logic & Logic Gates
 Boolean Logic
Binary logic consists of :
• logic variables
o designated by alphabet letters, e.g. A, B, C… x, y, z, etc.
o have ONLY 2 possible values: 1 or 0

• logic operators
o 3 basic logical operators representing 3 basic logical operations: AND, OR and NOT

The overall equation made up a Boolean Equation

 Logic Gates
• Logic gates are electronic circuits that operate on one or more binary input signals to produce a
binary output signal.

• Each logic gate represents a single processing unit that performs binary logic operations.
 Truth Table
• Truth table is a table of all possible combinations of the input binary variables.

• If there are n input variables, there are in total 2n possible combination.

• Truth tables show the relationship between the input binary values that the output binary result of
the operation.
 a
2¹
0
1

2³ A (22) = 4 B (21) = 2 c (20) = 1

2² a b 0 0 0
0 0 0 0 1
0 1 0 1 0
1 0 0 1 1
1 1 1 0 0
1 0 1
1 1 0
1 1 1
A (23) = 8 B (22) = 4 C (21) = 2 D (20) = 1
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
 Timing Diagram
• Timing diagram is a graphical representation that describe the relationship between input(s) and
output signals in a digital circuit system.

• In actual implementation, the input and output signals are electrical signals that can be categorized
into binary logic state of 1 or 0 based the defined range of voltages associated with each state.

• Input signal can either static (e.g. logic state 0 if grounded) or dynamic (e.g. if received input from
flip flops)
 AND Gates
• Truth Table
• Symbol dot (.) or none
A B Y
• Boolean Equation 0 0 0
o A . B = Y or AB = Y
0 1 0
• Output variable is 1 if all input variables is 1 1 0 0
1 1 1
• Logic Gate:
 AND Gates
• Truth Table
• Boolean Equation
o A . B. C = Y or ABC = Y A B C Y
0 0 0 0
• Logic Gate:
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1
 OR Gates
• Truth Table
• Symbol plus (+)
A B Y
• Boolean Equation 0 0 0
o A+B =Y
0 1 1
• Output variable is 1 if any input variables is 1 1 0 1
1 1 1
• Logic Gate:
 OR Gates
• Truth Table
• Boolean Equation
o A+B+C =Y A B C Y
0 0 0 0
• Logic Gate:
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1
 NOT Gates
• Truth Table
• Symbol prime(‘) or overbar ( ‾ )
A Y
• Boolean Equation 1 0
o = Y or A‘ = Y
0 1
• Output variable is always opposite of input variable

• Logic Gate:
 NAND Gates
• Truth Table
• A combination of AND operation followed by NOT
A B AB AB’
• Boolean Equation 0 0 0 1
o = Y or = Y (A.B)’ = Y AB’ = Y
0 1 0 1
• Logic Gate: 1 0 0 1
1 1 1 0
 NOR Gates
• Truth Table
• A combination of OR operation followed by NOT
A B A+B Y
• Boolean Equation 0 0 0 1
o =Y
0 1 1 0
• Logic Gate: 1 0 1 0
1 1 1 0
 XOR Gates
• Truth Table
• Exclusive OR (XOR)
A B A’ B’ AB’ A’B Y Y’
• Symbol 
0 0 1 1 0 0 0 1

• Boolean Equation 0 1 1 0 0 1 1 0
o AB’ + A’B = Y 1 0 0 1 1 0 1 0
o AB=Y
1 1 0 0 0 0 0 1

• Logic Gate:
 XNOR Gates
• Truth Table
• Exclusive NOR (XNOR)
A B Y
• Symbol (A  B)’ 0 0 1
0 1 0
• Boolean Equation
o AB + A’B’ = Y 1 0 0
o (A  B)’ = Y 1 1 1

• Logic Gate:
 NAND and NOR gates
• Digital circuits are more frequently constructed with NAND or NOR gates rather than with AND or
OR gates.

• The main reason behind this is that NAND and NOR gates are easier to fabricate with electronic
components.
 NAND and NOR gates
• Exclusive OR gates are often used for error detection and correction purposes.

• This is done by using XOR gates in building the parity generator and checker digital logic circuits.
Topic 2 : Boolean Algebra
 Boolean Algebra
• Boolean Algebra is used to simplify the design of digital logic circuits.

Simpler design
Complicated Boolean Algebra with less digital
design with logic circuits

many digital
logic circuits Both performs similar function
but the latter is cheaper

• The design simplification are based on:

 Postulates of Boolean Algebra
 Basic Property of Boolean Algebra
 Basic Theorems of Boolean Algebra
 Boolean Algebra
• A two valued Boolean Algebra is defined on a set (B) of two elements:

B = {0,1}

• A two valued Boolean Algebra reflects the basis for digital logic circuit (i.e. whereby digital signals
being the IO to the digital logic circuit can only be either 0 or 1).

• A two valued Boolean Algebra satisfies:

 Postulates of Boolean Algebra
 Basic Property of Boolean Algebra
 Basic Theorems of Boolean Algebra
 Example
F(a,b,c) = ab + ac

a b c ab ac F
0 0 0 0 0 0
0 0 1 0 0 0
0 1 0 0 0 0
0 1 1 0 0 0
1 0 0 0 0 0
1 0 1 0 1 1
1 1 0 1 0 1
1 1 1 1 1 1
 Boolean Algebra
• Postulate 1: Closure
The Boolean system is closed with respect to binary operator + and . since for every
possible combination of Boolean values from set {1, 0} , it produces a Boolean result from
set {1, 0}.
 Boolean Algebra
• Postulate 2: Identity Element
The element 0 is an identity element with respect to + operator:

a+ 0=a a 0
0 0 0
1 0 1

The element 1 is an identity element with respect to . operator:

a 1
a.1=a
0 1 0
1 1 1
 Boolean Algebra
• Postulate 3: Commutative
Commutativity of the + operation

a+ b=b+a

Commutativity of the . operation

a. b=b.a
 Boolean Algebra
• Postulate 4: Associative
Associativity of the + operation

a + (b + c) = (a + b) + c

Associativity of the . operation

a . (b . c) = (a . b) . c
 Boolean Algebra
• Postulate 5: Distributive
Distributivity of the + operation

a + (b . c) = (a + b) . (a + c)

Distributivity of the . operation

a . (b + c) = (a . b) + (a . c)
 Boolean Algebra
• Postulate 6: Complement
For every a in K set, there exists a unique element called a’ (complement of a) such that

a a'
a + a’ = 1
0 1 1
1 0 1

a a'
and 0 1 0
1 0 0

a . a’ = 0
 Boolean Algebra
• Duality

 If an expression is valid in Boolean Algebra, the dual of the expression is also valid.

 The dual expression is done by:

 replacing all + operators with . and vice versa
 replacing all 1s with 0s and vice versa

Example : a + (b . c) = (a + b) . (a + c)
Thus thorough duality : a . (b + c) = (a . b) + (a . c)
 Boolean Algebra
• Theorem 1: Idempotency
The output value does not change by its input multiplication whereby:
x x
x+x=x
0 0 0
and based on duality property: 1 1 1

x.x=x x x
0 0 0
1 1 1
 Boolean Algebra
• Theorem 2: Null Element
The output value is not affected by the changes in the input value, whereby:
x 1
x+1=1 0 1 1
and based on duality property: 1 1 1

x.0=0 x 0
0 0 0
1 0 0
 Boolean Algebra
• Theorem 3: Involution
The double inverse output value of an input is equivalent to the input:

(x’’) = x

x x' x‘’
0 1 0
1 0 1
 Boolean Algebra
• Theorem 4: Redundancy a + (b . c) = (a + b) . (a + c)

Proving: a . (b + c) = (a . b) + (a . c)
a + (a’ . b)
= (a + a’).(a + b) (via Postulate 5: Distributive) a + a’ = 1
= (1)(a+b) (via Postulate 6: Complement)
= a+ b (via Postulate 2: Identity Element) a.1=a
a b a + (a’.b) a+b
0 0 0 + (1 . 0) = 0 0+0=0
0 1 0 + (1 . 1) = 1 0+1=1
1 0 1 + (0 . 0) = 1 1+0=1
1 1 1 + (0 . 1) = 1 1+1=1
 Boolean Algebra
• Theorem 5: DeMorgan’s Law
This theorem is based on DeMorgan’s Law, whereby:

= .
and based on duality property:

= +
 Boolean Algebra
• Theorem 6: Absorption
This theorem is the result of the application of several other theorems that neglects a
certain input variable, whereby:

𝒂+(𝒂 . 𝒃)= 𝒂 𝒂+(𝒂 . 𝒃)= 𝒂

and based on duality property:

𝒂 .( 𝒂+ 𝒃)= 𝒂
 Boolean Algebra
• Theorem 6: Absorption
a + (b . c) = (a + b) . (a + c)

Proving:
a + (a . b) =Y (via Postulate 5: Distributive)

= (a + a) . (a + b) (via Theorem 1: Idempotency)

= (a) . (a + b) (via Postulate 5: Distributive)
= aa + ab (via Theorem 1: Idempotency)
= a + ab
= a (1+ b) (via Theorem 2: Null Element)
= a(1) (via Postulate 2: Identity Element)
=a
a b a.b Y
0 0 0 0
0 1 0 0
1 0 0 1
1 1 1 1
Topic 3 : Boolean Function Simplification
 Logic Design Simplification
• As mentioned in the introduction, we can use Boolean Algebra to simplify the design of digital logic
circuit. This is made possible via basic postulates, property and theorems of Boolean Algebra itself.
• By simplifying the digital logic design, fewer gates ( and wiring) are used to achieve the same
realization, thus more cost effective.
• However, since Boolean Algebra can be simplified in several different ways, there is no standard
rule to guarantee the final answer.
 Logic Design Simplification
• Simplify the following Boolean function
a . (b + c) = (a . b) + (a . c)
F1 = x(x’ + y)
using basic postulates, property and theorems of Boolean Algebra.
x(x’ + y)
= (x . x’)+(x . y) (via Postulate 5: Distributive)
= (0) + (x . y) (via Postulate 6: Complement)
= x.y (via Postulate 2: Identity
Element)
x y F1 = x ( x’ + y) F2 = x . y
0 0 0 . (1 + 0) = 0 0. 0=0
0 1 0 . (1 + 1) = 0 0. 1=0
1 0 1 . (0 + 0) = 0 1. 0=0
1 1 1 . (0 + 1) = 1 1. 1=1
 Logic Design Simplification
• Circuit diagram

F1 = x . (x’ + y)

F2= x . y
 Logic Design Simplification
• Simplify the following Boolean function

F1 = x’y’z + x’yz + xy’

using basic postulates, property and theorems of Boolean Algebra.
x’y’z + x’yz + xy’
= x’z (y’ + y) + xy’
= x’z (1) + xy’
= x’z + xy’
 Logic Design Simplification
• Truth table
x y z F1 = x’y’z + x’yz + xy’ F2 = xy’ + x’z
0 0 0 1.1.0 + 1.0.0 + 0.1 = 0 0.1 + 1.0 = 0
0 0 1 1.1.1 + 1.0.1 + 0.1 = 1 0.1 + 1.1 = 1
0 1 0 1.0.0 + 1.1.0 + 0.0 = 0 0.0 + 1.0 = 0
0 1 1 1.0.1 + 1.1.1 + 0.0 = 1 0.0 + 1.1 = 1
1 0 0 0.1.0 + 0.0.0 + 1.1 = 1 1.1 + 0.0 = 1
1 0 1 0.1.1 + 0.0.1 + 1.1 = 1 1.1 + 0.1 = 1
1 1 0 0.0.0 + 0.1.0 + 1.0 = 0 1.0 + 0.0 = 0
1 1 1 0.0.1 + 0.1.1 + 1.0 = 0 1.0 + 0.1 = 0
 Logic Design Simplification
• Circuit diagram

F1 = x’y’z + x’yz + xy’

F2= (x’z) + (xy’)

 x.x = x
Example
• AC + A’C(B+C)

= AC + A’BC + A’CC

= AC + A’BC + A’C

= AC + A’C(B + 1)

= AC + A’C

= C(A + A’)

= C(1)

=C
(A+C) . (AD + AD’) + AC + C
= AAD + AAD’ + ACD + ACD’ + AC + C
= AD + AD’ + ACD + ACD’ + AC + C
= AD + AD’ + C(AD + AD’ + A + 1)
= AD + AD’ + C(1)
= AD + AD’ + C
= A(D + D’) + C
= A(1) + C
=A+C
Topic 4 : Boolean Algebra Representation
 Boolean Algebra Representation
• A Boolean Algebraic representation can appear in any of the following forms:

Sum of Product (SOP)

standard form
Product of Sum (POS)

Sum of Minterms
canonical form
Product of Maxterms

SOP: F(a,b,c,d) = abcdd’ + abcd + ab’cd

POS: F(a,b,c,d) = ??
 Standard Vs Canonical Form
• The major difference between standard and canonical form of Boolean Algebra expression is in terms
of the input binary variables between terms.

Criteria Standard Form Canonical Form

input binary variables Not necessarily consistent Must be consistent
between terms
Example F(a, b, c) = a + b’c F(a, b, c) = a’b’c + ab’c + ab’c’ + a’b’c
Y(a,b,c,d) = abc + abd+ acd Y(a,b,c,d) = abcd + a’bcd + abcd’ + ab’c’d
 Sum of Product
• Sum of Product (SOP) is a Boolean expression containing AND terms ( also known as ‘product term’)
whereby the AND terms may contain one or more input binary variables and are combined by OR
operations

• Example:
contain AND terms with one or more input binary variables

F(x, y, z) = xy’ + y’z’ + xyz

AND terms are combined through OR operations
 Product of Sum
• Product of Sum (POS) is a Boolean expression containing OR terms ( also known as ‘sum term’)
whereby the OR terms may contain one or more input binary variables and are combined by AND
operations

• Example:
contain OR terms with one or more input binary variables

F(x, y, z) = (x+y’ ) . (y’+z’ ) . (x+y+z)

OR terms are combined through AND operations
 Sum of Minterms
• Sum of Minterms is a Boolean expression containing AND terms ( also known as ‘minterms’)
whereby the minterms must contain similar input binary variables and are combined by OR
operations

• Example:
contain minterms with similar input binary variables

F(x, y, z) = xy’z’+ xy’z+ xyz

= 100 + 101 + 111
= M4 + M5 + M7
minterms are combined through OR operations

&
Must be consistent
 Sum of Minterms
• Each input binary variable in a minterm can be associated with a binary value, whereby:
• normal form = 1 (e.g. x = 1)
x y z minterm designation F1
• complement form = 0 (e.g. x’ = 0)
0 0 0 x’y’z’ m0 0
• Example: If given F1: 0 0 1 x’y’z m1 0
F1 = xy’z’+ xy’z+ xyz 0 1 0 x’yz’ m2 0
0 1 1 x’yz m3 0
• the equivalence
1 0 0 xy’z’ m4 1
F1 = m4 + m5 + m7 1 0 1 xy’z m5 1
= ∑ (m4, m5, m7)
1 1 0 xyz’ m6 0
• Thus, output is only associated with binary 1
1 1 1 xyz m7 1
 x y z minterm designation F1

0 0 0 x’y’z’ m0 0
normal form = 1 (e.g. x = 1)
0 0 1 x’y’z m1 0
Sum of Minterms Boolean expression for F1. 0 1 0 x’yz’ m2 1
• = M2 + M3 + M4 0 1 1 x’yz m3 1
1 0 0 xy’z’ m4 1
• = 010 + 011 + 100
1 0 1 xy’z m5 0
• = x’yz’ + x’yz + xy’z’
1 1 0 xyz’ m6 0
1 1 1 xyz m7 0
Product of Maxterm Boolean expression for F1
• = M0 . M1 . M5 . M6 . M7
• = 000 . 001 . 101 . 110 . 111
• = (x+y+z) . (x+y+z’) . (x’+y+z’) . (x’+y’+z) . (x’+y’+z’)
 Sum of Minterms
• Exercise

Given the following truth table: A B Y Designation

0 0 0 m0
0 1 1 m1
1 0 1 m2
1 1 1 m3

• Derive the Sum of Minterms Boolean expression for Y.

Y(A,B) = M1 + M2 + M3
= 01 + ? + ?
=?+?+?
• Derive the Product of Maxterm Boolean expression for Y
Y(A,B) = M0
=? =?
• Draw the circuit diagram.
 Sum of Minterms
• Answer
A B Y
Y= A’B + AB’ + AB 0 0 0
0 1 1
1 0 1
1 1 1
 Product of Maxtrems
• Product of Maxterms is a Boolean expression containing OR terms ( also known as maxterms)
whereby the maxterms must contain similar input binary variables and are combined by AND
operations

• Example:
contain maxterms with similar input binary variables

F2 = (x+y+z’) (x+y’+z’) (x’+y’+z)

maxterms are combined through AND operations
&
Must be consistent
 Product of Maxtrems
• Each input binary variable in a maxterm can be associated with a binary value, whereby:
• normal form = 0 (e.g. x = 0)
x y z maxterm designation F1
• complement form = 1 (e.g. x’ = 1)
0 0 0 x+y+z M0 1
• Example: If given F1: 0 0 1 x+y+z’ M1 0
F2 = (x+y+z’) (x+y’+z’) (x’+y’+z) 0 1 0 x+y’+z M2 1
0 1 1 x+y’+z’ M3 0
• the equivalence
1 0 0 x’+y+z M4 1
F2 = M1 . M3 . M6
1 0 1 x’+y+z’ M5 1
= ∏(M1, M3, M6)
1 1 0 x’+y’+z M6 0
1 1 1 x’+y’+z’ M7 1
• Thus, output is only associated with binary 0
 normal form = 0 (e.g. x = 0)

Product of Maxterm Boolean expression for F2

 M0 . M3 . M4 . M5 . M7
 000 . 011 . 100 . 101 . 111
 (x+y+z) . (x+y’+z’) . (x’+y+z) . (x’+y+z’) . (x’+y’+z’) .

Derive the Sum of Minterms Boolean expression for F2

 M? + M? + M? x y z maxterm designation F1

0 0 0 x+y+z M0 0
0 0 1 x+y+z’ M1 1
0 1 0 x+y’+z M2 1
0 1 1 x+y’+z’ M3 0
1 0 0 x’+y+z M4 0
1 0 1 x’+y+z’ M5 0
1 1 0 x’+y’+z M6 1
1 1 1 x’+y’+z’ M7 0
 Product of Maxtrems
• Exercise

Given the following truth table:

A B C Y
0 0 0 1
0 0 1 1 • Derive the Product of maxterm Boolean expression
0 1 0 1 for Y.
0 1 1 1 M? . M?
?.?.
1 0 0 0 (x+y+z) . (x+y+z)
1 0 1 1
1 1 0 1 • Draw the circuit diagram.
1 1 1 0 • Y=?
 Product of Maxtrems
• Answer A B C Y

Y= (A’+B+C) . (A’ + B’ + C’) 0 0 0 1

0 0 1 1
Circuit diagram: 0 1 0 1
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 0
Exercise
x y z F1

0 0 0 1 • Derive the Product of maxterm Boolean

0 0 1 0 expression for F1.
0 1 0 1 • Draw the circuit diagram.
0 1 1 0 • F1 = ?
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 1
 Sum of Minterms & Product of Maxterm Conversion
• An Algebraic Boolean expression in Sum of Minterms can be converted into its Product of Maxterms
(and vice versa)

Sum of Product of
Minterms Maxterms

• This can be proven through Theorems of Boolean Algebra!

 Sum of Minterms & Product of Maxterm Conversion
• Given the following truth table:

x y z Y
0 0 0 0
0 0 1 0
0 1 0 0 • Derive the Sum of Minterms Boolean expression for Y.
• Derive the Product of Maxterms Boolean expression for Y.
0 1 1 1
• Prove that both expressions are equal.
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
 Sum of Minterms & Product of Maxterm Conversion
• Answer:

x y z Y m M
0 0 0 0 m0 M0
Sum of Minterms
Y1 = m3 + m5 + m6 + m7 0 0 1 0 m1 M1
= x’yz + xy’z + xyz’ + xyz 0 1 0 0 m2 M2
0 1 1 1 m3 M3
1 0 0 0 m4 M4
Product of Maxterms
1 0 1 1 m5 M5
Y2 = M0.M1.M2.M4
= (x+y+z)(x+y+z’) (x+y’+z) (x’+y+z) 1 1 0 1 m6 M6
1 1 1 1 m7 M7
 Sum of Minterms & Product of Maxterm Conversion
• Answer: x y z Y m M
Proving: 0 0 0 0 m0 M0

Sum of Minterms = 0 0 1 0 m1 M1
0 1 0 0 m2 M2
Product of Maxterms
0 1 1 1 m3 M3
Y1 = m3 + m5 + m6 + m7
1 0 0 0 m4 M4
(Y1)’= m0+m1+m2+m4
1 0 1 1 m5 M5
Y1 = (Y1’)’= (m0+m1+m2+m4)’
1 1 0 1 m6 M6
Y1=M0.M1.M2.M4 = Y2
1 1 1 1 m7 M7

Y1’ = m0+m1+m2 +m4 = x’y’z’+x’y’z+x’yz’+xy’z’

Y1=(Y1’)’= (x’y’z’+x’y’z+x’yz’+xy’z’ )’ via Involution
Y1=(x’y’z’)’ . (x’y’z)’ . (x’yz’)’ . (xy’z’)’ via DeMorgan’s
Y1=(x’’+y’’+z’’).(x’’+y’’+z’).(x’’+y’+z’’).(x’+y’’+z’’) via DeMorgan’s
Y1=(x+y+z).(x+y+z’).(x+y’+z).(x’+y+z)=Y2 via Involution
 Conversion between Boolean Algebra Representations
• We can convert standard form of Boolean Algebraic expression into canonical form (and vice versa).
• For example:
• Convert Sum of Product into Sum of Minterms (and vice versa)
• Convert Product of Sum into Product of Maxterms (and vive versa)
 Conversion between Boolean Algebra Representations
• Convert the following Boolean Function
a+ 0=a
F(a, b, c) = a + b’c a.1=a
• to its canonical Sum of Minterms form.

a + b’c
a + a’ = 1
= a(1) + b’c via Identity Element
= a(b + b’) + (b’c) via Complement a . a’ = 0
= ab + ab’ + b’c via Distributive
= (ab + ab’)(1) + (b’c)(1) via Identity Element
= (ab + ab’)(c+c’) + b’c(a + a’) via Complement
= abc + abc’ + ab’c + ab’c’ + ab’c + a’b’c via Distributive
= abc + abc’ + ab’c + ab’c’ + a’b’c via Idempotency
 Conversion between Boolean Algebra Representations
• Convert the following Boolean Function

F(x, y, z) = xy +x’z
• to its canonical Product of Maxterms form.

(1st step – get the Sum of Minterms)

F(x, y, z)= xy + x’z
= xy(1) + x’z(1) via Identity Element
= xy(z+z’) + x’z(y+y’) via Complement
= xyz + xyz’+ x’yz +x’y’z via Distributive
= m7 + m6 + m3+ m1 Sum of Minterms
 Conversion between Boolean Algebra Representations
• Convert the following Boolean Function

F(x, y, z) = xy +x’z
to its canonical Product of Maxterms form.
(2nd step – convert Sum of Minterms into Product of Maxterms)
F(x,y,z)= m7+m6+m3+m1 Sum of Minterms
Thus F (x, y, z)’= m5+m4+m2+m0= xy’z + xy’z’+x’yz’+x’y’z’
F(x,y,z)={F (x, y, z)’}’
=(xy’z + xy’z’+x’yz’+x’y’z’)’ via Involution
=(xy’z)’ . (xy’z’)’.(x’yz’)’+(x’y’z’)’ via DeMorgan’s
=(x’+y’’+z’).(x’+y’’+z’’).(x’’+y’+z’’).(x’’+y’’+z’’) via DeMorgan’s
=(x’+y+z’).(x’+y+z).(x+y’+z).(x+y+z) via Involution
= M5 + M4+M2+M0 Product of Maxterms
Topic 5 : Karnaugh map (K-Map)
 Karnaugh Map (K-Map)
• In Topic 2, we have learned how to simplify the design of digital logic circuits by manipulating
Boolean Algebra. However, this method lacks of standardization.

• There is another alternative of design simplification which is through the use of Karnaugh Map or
K-Map.

• Karnaugh Map (or K-Map) is a 2D pictorial form of a truth table that describes the relationship
between input and output variables.

• K-map simplification can be carried out through:

• Sum of Product simplification
• Product of Sum simplification
 SOP - Karnaugh Map Simplification
• In Sum of Product - Karnaugh Map simplification, the K-Map is made up of cells representing all
possible combination of input variables in minterms format. Each cell is denoted as:
• 1 for minterm that corresponds to the Boolean equation
• 0 for minterm that does NOT correspond to the Boolean equation

• Simplification is done through grouping of all cell with value ‘1’

 Karnaugh Map (K-Map)

2 variable cells 3 variable cells 4 variable cells

Minimizing Steps:
1. Before start minimizing the equation using K-Map, convert Sum of Minterms
Sum of Product format
the equation from Sum of Product to Sum of Minterms or format

Product of Sum to Product of Maxterm format. Example:

X(a,b,c) = x’yz + x’yz’ +
X(x,y,z) = x’y + y’z + ‘xy’z'
xy’z + x’y’z + ‘xy’z'

2. Next, select the respective K-map based on the number of

variables present in the Boolean function.
3. If the Boolean function is given as sum of min terms form, then place the ones
at respective min term cells in the K-map.
 Karnaugh Map Simplification Tips
4. Check for the possibilities of grouping maximum number of adjacent ones. It should be
powers of two. Start from highest power of two and up to least power of two. Highest power is
equal to the number of variables considered in K-map and least power is zero.

5. Get the simplification term from the grouping.

• Always try to group cells in power of 2 (e.g. 20, 21, 22..etc).

• Group as many cells as possible. The larger the group, the fewer number of
input variables.

• Make sure that all minterms with value ‘1’ is covered!!!

• Sometimes, there may be more than 1 simplification result.

 Karnaugh Map (2 input variables)
• If we have 2 input variables:
Group all 1
• possible number of combinations = 22 = 4 Always try to group
• i.e. 4 possible minterms, thus a K-Map with 4 squares cells in power of 2 (e.g.
20, 21, 22..etc).
• E.g.
Largest group
F(x,y) = x’y + xy’ + xy
x y 0 1
Group 2: y
0 0 1
1 1 1
Group 1: x

Thus simplified F(x,y)= x + y

 Karnaugh Map (3 input variables)
• If we have 3 input variables:
• possible number of combinations = 23 = 8
• i.e. 8 possible minterms, thus a K-Map with 8 squares

• E.g.

F(x, y, z) = x’yz’ + x’yz + xy’z’ + xy’z yz

x 00 01 11 10 Group 2: x’y
0 0 0 1 1
1 1 1 0 0

Group 1: xy’

Thus simplified F(x, y, z)= xy’ + x’y

 Karnaugh Map (4 input variables)
• If we have 4 input variables:
• possible number of combinations = 24 = 16
• i.e. 16 possible minterms, thus a K-Map with 16 squares

• E.g.

F(a, b, c, d)= a’b’c’d + a’bc’d + abc’d + abcd Group 1: a’c’d

cd
ab 00 01 11 10
00 0 1 0 0
01 0 1 0 0
11 0 1 1 0 Group 2: abd
10 0 0 0 0
Thus simplified F(a, b, c, d)= a’c’d + abd
 Exercise 1
• Simplify the following equation using Karnaugh map:

F(x, y, z) = x’y’z’ + x’yz’ +xy’z’ + xy’z

yz
x 00 01 11 10
0
1
 Exercise 2
• Simplify the following equation using Karnaugh map:

F(x, y, z) = xy’z’ + xy’z + x’yz+ xy

yz
x 00 01 11 10
0
1
 Exercise 3
• Simplify the following equation using Karnaugh map:

F(a, b, c, d)= a’b’cd + a’b’cd’ + ab’c’d’ + ab’cd’

 Exercise 4
• Simplify the following equation using Karnaugh map:

F(a, b, c, d)= a’b’c’ + bc’d + ab’c’ + a’b’cd’ + ab’cd’

= a’b’c’(1) + bc’d(1) + ab’c’(1) + a’b’cd’ + ab’cd’
= a’b’c’(d+d’) + bc’d(a+a’) + ab’c’(d+d’) + a’b’cd’ + ab’cd’
= a’b’c’d + a’b’c’d’ + abc’d +a’ bc’d + ab’c’d + ab’c’d’ + a’b’cd’ + ab’cd’
0001 0000 1101 0101 1001 1000 0010 1010
cd cd
ab 11 10 00 01 ab 00 01 11 10
01 1 00 1 1 1
c’d + b’d’ 11 1 01 1
10 1 1 1 11 1
00 1 1 1 10 1 1 1
 Don’t Care Terms
• In some applications, the function is not specified for certain combinations of the variables – this
combination is known as a ‘don’t care’ term.

• A ‘don’t care’ term maybe assumed to be either 0 or 1.

• An X is used to indicate the ‘don’t care’ function.

• The X can be replaced by either 1 or 0, depending on which combination that gives the simplest
expression.
 Don’t Care Terms
By using K-map, simplify the following equation: xyz Designation
F(x, y, z)= ∑(5,6,7) 000 m0
= xy’z + xyz’ + xyz 101 110 111
001 m1
whereby the ‘don’t care’ terms:
010 m2
d(x, y, z)= ∑(3,4) yz
x 00 01 11 10 011 m3
= x’yz + xy’z ‘ 011 100
0 0 0 X 0 100 m4

1 X 1 1 1 101 m5
110 m6
yz Group 1 = x
x 00 01 11 10 111 m7

0 0 0 X 0 F(x, y, z)= xz + xy
F(x, y, z)= x
1 X 1 1 1
 Don’t Care Terms
By using K-map, simplify the following equation: abcd Designation abcd Designation
0000 m0 1000 m8
F(a, b, c, d)= ∑(1,3,7,11,15)
0001 m1 1001 m9
whereby the ‘don’t care’ terms:
0010 m2 1010 m10
d(a, b, c, d)= ∑(0,2,5) 0011 m3 1011 m11
0100 m4 1100 m12

cd 0101 m5 1101 m13

ab 00 01 11 10 0110 m6 1110 m14
00 X 1 1 X 0111 m7 1111 m15
01 0 X 1 0
11 0 0 1 0
10 0 0 1 0
 cd
ab 00 01 11 10
00 0 1 1 0
01 0 1 1 0
11 0 1 X 1
10 X 1 1 X
 Don’t Care Terms
Solution 1 :

cd
ab 00 01 11 10
00 X 1 1 X
01 0 X 1 0 F(a, b,c, d)= a’b’ + cd
11 0 0 1 0
10 0 0 1 0
 Don’t Care Terms
Solution 2 :

cd
ab 00 01 11 10
00 X 1 1 X
01 0 X 1 0
F(a, b,c, d)= a’d + cd
11 0 0 1 0
10 0 0 1 0
End of module

Questions??