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1250 Exam 3 Problem 3 Solution

F 17

EX:

a) Using the above logic circuit, fill in the truth table below for output X.

Inputs Output
A B C X
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

b) Using only inverters (i.e., NOT gates), AND gates, and OR gates, design a
circuit to implement the truth table shown below. Particularly efficient designs
(meaning those with the lowest numbers of gate inputs) may receive extra
points.

Inputs Output
D E F Y
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1
SOL'N: a) We could try all possible input patterns for the logic circuit, but it is easier
to work backwards and deteermine what input patterns can give a zero or a
one. In this case, with an AND gate at the end, the only way the output
can be a 1 is if both of its inputs are 1's. Then input C must be a 1 if the
final output is 1. Also, the output of the NOR gate is 1 only if both inputs
are 0's. Then input A must be 0 if the final output is 1. Finally, input B
must be a 1 in the final output is 1.

We put X = 1 in the truth table for input pattern 0 1 1. Every other input
pattern will give X = 0 at the output.

Inputs Output
A B C X
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 0

b) The most efficient answer seems to have 15 inputs and may be achieved
several ways. The standard approach is to simplify the Boolean equation
with AND's for the outputs that are 1's:

Y = DEF + DEF + DEF + DEF + DEF


Looking for terms where with an input that give the same result whether it
is a 1 or 0, we identify the following redundancies shown in color:
Y = DEF + DEF + DEF + DEF + DEF = DE + DEF + DEF + DEF
Y = DEF + DEF + DEF + DEF + DEF = DE + DF + DEF + DEF
Y = DEF + DEF + DEF + DEF + DEF = DE + DF + EF + DEF
Note that we start with all the terms each time we look for a redundancy.
Our final expression above may be described as two or more inputs low or
all inputs high:

Y = DE + DF + EF + DEF
A realization of this equation is shown below. This solution has 16 inputs.

An alternative solution is to find the input patterns with an output of 0 and


invert the final output.

Y = DEF + DEF + DEF


There is no simplification to be done. A realization is shown below. This
implementation also has 16 inputs.

An ad hoc solution, shown below, requires only 15 inputs. This solution


may be described as "the output is 0 if there is at most one 0 input (OR
gates) but not three 1's as inputs (AND gate)".
Despite repeated efforts by this author, 15 inputs was the minimum
number obtained in any solution.

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