Unit 3 Practice Sheet: Basic Logic Gates EET 1131

CRISTIAN PUENTES-T00060458 Reeder

1. Complete the following timing diagram for an inverter.

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2. Complete the following timing diagram for a two-input AND gate.

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3. Draw the schematic symbol, truth table, and Boolean expression for a 3-input AND gate.

Inputs Output
A B C X
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1
4. Complete the following timing diagram for a four-input AND gate.

5. Complete the following timing diagram for a two-input OR gate.

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6. Draw the schematic symbol, truth table, and Boolean expression for a 3-input OR gate.

Inputs Output
A B C X
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1
 EET 1131 Unit 3 Practice sheet - 2

7. Complete the following timing diagram for a four-input OR gate.

8. Complete the following timing diagram for a two-input NAND gate.

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9. Draw the schematic symbol, truth table, and Boolean expression for a 3-input NAND gate.

Inputs Output
A B C X
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
 EET 1131 Unit 3 Practice sheet - 2

10. Complete the following timing diagram for a three-input NAND gate.

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11. Complete the following timing diagram for a two-input NOR gate.

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12. Draw the schematic symbol, truth table, and Boolean expression for a 3-input NOR gate.

Inputs Output
A B C X
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 0