Computer Systems

Architecture
Nicola Gigante
Free University of Bozen-Bolzano
A.A. 2022/2023
Logical circuits
Digital logical circuits
Surprisingly, behind the sophisticated and complex behavior of modern
computers, lie three very simple components that can be described in
purely logical terms.

These components are the «logic gates», simple electronic circuits that
implement the elementary logic functions.
Logical levels
An electronic circuits works in terms of continuous an analog physical measures
• Voltage, current intensity, magnetic fields, etc.

By associating some of these values to 0 and 1 we turn to digital reasoning:

• 0V and +5V
• -5V and +5V
• +1V and -1V
• etc.

In our analysis of digital circuits we will abstract from their concrete electronic
implementation, focusing only on their logical behavior.
Logic gates
The «logic gates» are three kinds of simple logical circuits.

A A
A⋅B A+B
B A A
B

AND gate Porta OR NOT gate

The AND gate gives output 1 The OR gate gives ouput 1 The NOT gate negates its input.
(true) if and only if both its if and only if at least one
inputs are 1. of its inputs is 1.
Logic gates
The «logic gates» are three kinds of simple logical circuits.

A A
A⋅B A+B
B A A
B

AND gate OR gate NOT gate

A B A⋅B A B A+B A A
0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1
Logic gates
Logic gates are implemented with transistors, the fundamental
component of modern electronics.

This is an AND gate implemented

with BJT transistors.

We won’t delve into these details.

Example logical circuit
Truth table
A B C A⋅B C( A ⋅ B + C(
A 0 0 0 0 1 1
0 0 1 0 0 0
B 0 1 0 0 1 1
F = A ⋅ B + C( 0 1 1 0 0 0
1 0 0 0 1 1
C 1 0 1 0 0 0
1 1 0 1 1 1
1 1 1 1 0 1

Nota: in circuit drawings, signals travel from left to right

Boolean Algebra – short introduction
How do we reason about the behavior of logical circuits?

George Boole (1815 – 1864) is the father of mathematical logic.

In 1854 published «An Investigation of the Laws of Thought», where he

analyses for the first time the laws of logical thought algebraically.

The «Boolean algebra» is born.

Boolean Algebra – short introduction
With Boolean algebra we can represent algebraically the logical
operations between truth values.
• We represent the conjunction (AND) as a product, and the disjunction
(OR) as a sum
• We obtain an algebra similar (but not identical) to the arithmetic one:
• Sum and product are associative:
𝐴 𝐵𝐶 = 𝐴𝐵 𝐶 e 𝐴 + 𝐵 + 𝐶 = 𝐴 + 𝐵 + 𝐶
• The sum distribute over the product:
𝐴 𝐵 + 𝐶 = 𝐴𝐵 + 𝐴𝐶
• etc… (see later)
• We can verify these laws with truth tables.
From truth tables to circuits
Consider this truth table. A B C F
0 0 0 0
0 0 1 0
How do we get the logical circuit that 0 1 0 1
computes the output F in terms of the inputs 0 1 1 1
A, B, and C? 1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 0
From truth tables to circuits
Each input combinations that gives output 1 is A B C F

called a «minterm». 0 0 0 0
0 0 1 0
0 1 0 1
Starting from the minterms we can obtain the 0 1 1 1
corresponding Boolean expression, and then 1 0 0 0
the circuit. 1 0 1 1
1 1 0 0

#BC& + A
F=A #BC + AB
#C 1 1 1 0
From truth tables to circuits
#BC& + A
F=A #BC + AB
#C
A B C F
A B C 0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 0
Derived logic gates
We can obtain some «derived» logic gates by negating the output of
elementary gates.
A A
A⋅B A+B
B B

NAND gate NOR gate

A B A⋅B A B A+B
0 0 1 0 0 1
0 1 1 0 1 0
1 0 1 1 0 0
1 1 0 1 1 0
XOR gate
Another derived logic gate is the XOR gate, that is, «eXclusive OR».

The XOR gate gives output 1

if and only if at least one of
its input is 1, but not both.
XOR gate
Another derived logic gate is the XOR gate, that is, «eXclusive OR».

A B A XOR B
0 0 0
0 1 1
1 0 1
1 1 0
XOR gate
Another derived logic gate is the XOR gate, that is, «eXclusive OR».

The XOR gate is used for many applications:

• Comparator
• Adder
•…
XOR gate
Let’s build the circuit of a XOR gate by isolating the minterms in the
truth table.
A B A XOR B
A
0 0 0
B
0 1 1
) + AB
AB )
1 0 1
1 1 0
Boolean Algebra
Let’s delve into details of the laws of Boolean algebra.
Each of these laws can be verified by checking its truth table.
• Commutativity:
A+B=B+A
AB = BA
• Associativity:
A+B +C=A+ B+C
AB C = A(BC)
• Distributivity:
A B + C = AB + BC
A + BC = (A + B)(A + C)
Boolean Algebra
Let’s delve into details of the laws of Boolean algebra.
Each of these laws can be verified by checking its truth table.
• Operations between a variable and a constant:

AND OR NOT
0⋅𝑋 =0 0+𝑋 =𝑋 𝑋( = 𝑋
1⋅𝑋 =𝑋 1+𝑋 =1
𝑋⋅𝑋 =𝑋 𝑋+𝑋 =𝑋
𝑋 ⋅ 𝑋( = 0 𝑋 + 𝑋( = 1
Boolean algebra
Let’s delve into details of the laws of Boolean algebra.
Each of these laws can be verified by checking its truth table.
• De Morgan laws:
𝐴𝐵 = 𝐴̅ + 𝐵+
𝐴 + 𝐵 = 𝐴̅ ⋅ 𝐵+

De Morgan laws are particularly important when manipulating Boolean

expressions. Learn them well!
Boolean algebra
Let’s delve into details of the laws of Boolean algebra.
Each of these laws can be verified by checking its truth table.
• Other useful theorems (see the book for proofs):

𝑋+𝑋⋅𝑌 =𝑋
𝑋 + 𝑋+ ⋅ 𝑌 = 𝑋 + 𝑌
𝑋 𝑋+𝑌 =𝑋
𝑋 𝑋+ + 𝑌 = 𝑋 ⋅ 𝑌
𝑋 + 𝑌 𝑋 + 𝑌+ = 𝑋
Simplification of Boolean expressions
The laws of Boolean algebra are useful to simplify Boolean expressions
so to obtain equivalent, but cheaper, versions of their corresponding
logical circuits.
Examples:
𝑋& ⋅ 𝑌 ⋅ 𝑋 ⋅ 𝑍 = 𝑋& ⋅ 𝑌 + 𝑋 ⋅ 𝑍 = 𝑋& ⋅ 𝑌 + 𝑋 ⋅ 𝑍
𝐴̅ ⋅ 𝐵 ⋅ 𝐶 + 𝐴 ⋅ 𝐵 ⋅ 𝐶 = 𝐵 ⋅ 𝐶 ⋅ 𝐴̅ + 𝐴 = 𝐵 ⋅ 𝐶

𝐴 ⋅ 𝐵& ⋅ 𝐶 + 𝐴 ⋅ 𝐵 ⋅ 𝐶 ⋅ 𝐷
# = 𝐴 ⋅ 𝐶 ⋅ 𝐵& + 𝐵 ⋅ 𝐷# = 𝐴 ⋅ 𝐶 ⋅ 𝐵& + 𝐷
#
= 𝐴 ⋅ 𝐶 ⋅ 𝐵& + 𝐴 ⋅ 𝐶 ⋅ 𝐷
#
Example
Let us design a «multiplier», that is a logical circuit with four inputs
𝑋! , 𝑋" , 𝑌! , 𝑌" and four outputs 𝑍# , 𝑍$ , 𝑍! , 𝑍" that implements the
arithmetic function 𝑍 = 𝑋×𝑌.
1. Fill the truth table
2. Obtain the Boolean expression of each of the four outputs
3. Simplify the resulting expressions using Boolean algebra
4. Draw the circuit

See the book (Clements, section 2.5.1) per the solution.

Universal logic gates
The NAND and NOR gates are called «universal gates» because any
circuit can be built using only gates of one of these kinds.

𝐴 𝐴
𝐴̅ 𝐴̅

NOT gate built with a NOT gate built with a

NAND gate: NOR gate:

𝐴 ⋅ 𝐴 = 𝐴̅ 𝐴 + 𝐴 = 𝐴̅
Universal logic gates
The NAND and NOR gates are called «universal gates» because any
circuit can be built using only gates of one of these kinds.
𝐴

𝐵 𝐴⋅𝐵

AND gate built with two

NAND gates.

𝐴⋅𝐵 =𝐴⋅𝐵
Universal logic gates
The NAND and NOR gates are called «universal gates» because any
circuit can be built using only gates of one of these kinds.
𝐴

𝐴+𝐵

OR gate built with three

NAND gates:

𝐴 + 𝐵 = 𝐴 + 𝐵 = 𝐴̅ ⋅ 𝐵(
Karnaugh maps
Simplifying a Boolean expression using the laws of Boolean algebra can
be at times very complex.

The «Karnaugh maps» are a simple tool to minimize manually Boolean

expressions with up to 6 variables.

We will see how to apply this method with up to 4 variables.

Karnaugh maps
Suppose we want to minimize the expression:

𝐹 = 𝐴 ⋅ 𝐵 + 𝐴̅ ⋅ 𝐵 ⋅ 𝐶̅ ⋅ 𝐷 + 𝐴̅ ⋅ 𝐵 ⋅ 𝐶 ⋅ 𝐷 + 𝐴 ⋅ 𝐵& ⋅ 𝐶̅ ⋅ 𝐷
#

The first step is to fill the truth table.

Karnaugh maps A B C D F
0 0 0 0 0
𝐹 = 𝐴 ⋅ 𝐵 + 𝐴̅ ⋅ 𝐵 ⋅ 𝐶̅ ⋅ 𝐷 + 𝐴̅ ⋅ 𝐵 ⋅ 𝐶 ⋅ 𝐷 + 𝐴 ⋅ 𝐵( ⋅ 𝐶̅ ⋅ 𝐷
)
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 0
0 1 0 1 1
0 1 1 0 0
0 1 1 1 1
1 0 0 0 1
1 0 0 1 0
1 0 1 0 0
1 0 1 1 0
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1
 Karnaugh maps A B C D F
0 0 0 0 0
𝐹 = 𝐴 ⋅ 𝐵 + 𝐴̅ ⋅ 𝐵 ⋅ 𝐶̅ ⋅ 𝐷 + 𝐴̅ ⋅ 𝐵 ⋅ 𝐶 ⋅ 𝐷 + 𝐴 ⋅ 𝐵( ⋅ 𝐶̅ ⋅ 𝐷
)
0 0 0 1 0
0 0 1 0 0
The second step is to port all the minterms on the Karnaugh map.
0 0 1 1 0
0 1 0 0 0
0 1 0 1 1
AB 0 1 1 0 0
00 01 11 10
CD 0 1 1 1 1
00 1 1
1 0 0 0 1
01 1 1
1 0 0 1 0
11 1 1 1 0 1 0 0
10 1 1 0 1 1 0
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1
 Karnaugh maps
𝐹 = 𝐴 ⋅ 𝐵 + 𝐴̅ ⋅ 𝐵 ⋅ 𝐶̅ ⋅ 𝐷 + 𝐴̅ ⋅ 𝐵 ⋅ 𝐶 ⋅ 𝐷 + 𝐴 ⋅ 𝐵( ⋅ 𝐶̅ ⋅ 𝐷
)
AB 00 01 11 10
CD
The second step is to port all the minterms on the Karnaugh map.
00 1 1

The Karnaugh map is a table reporting the minterms of the Boolean 01 1 1

function, organized in a particular way: 11 1 1
• Each cell corresponds to a specific input combination indicated by
10 1
the head of its row and column
• Rows and columns are ordered in such a way that between two
adjacent rows or columns, only one bit changes.
• As in the example, the second column corresponds to values A=0
and B=1 while the third column corresponds to A=1 and B=1, so
only A changed.
 Karnaugh maps
𝐹 = 𝐴 ⋅ 𝐵 + 𝐴̅ ⋅ 𝐵 ⋅ 𝐶̅ ⋅ 𝐷 + 𝐴̅ ⋅ 𝐵 ⋅ 𝐶 ⋅ 𝐷 + 𝐴 ⋅ 𝐵( ⋅ 𝐶̅ ⋅ 𝐷
)
AB 00 01 11 10
CD
The third step is that of grouping minterms by forming maximal
00 1 1
groups of 1, 2, 4, or 8 adjacent minterms.
01 1 1
Each group corresponds to a term of the minimized expression. 11 1 1
10 1
𝐹 = 𝐵 ⋅ 𝐷 + 𝐴 ⋅ 𝐵 + 𝐴 ⋅ 𝐶̅ ⋅ 𝐷
)

Each term contains only the variables that do not change in the
groups’ cells, straight or negated depending on how they appear in
the raw/column head.

This works because in Boolean algebra we have, for example:

𝐴 ⋅ 𝐵 ⋅ 𝐶̅ ⋅ 𝐷
) + 𝐴 ⋅ 𝐵( ⋅ 𝐶̅ ⋅ 𝐷
) = 𝐴 ⋅ 𝐶̅ ⋅ 𝐷
)
 Karnaugh maps A B C D F
0 0 0 0 1
Note that in Karnaugh maps, the cells at the border are adjacent 0 0 0 1 0
with each other. For example: 0 0 1 0 1
0 0 1 1 0
AB 00 01 11 10 0 1 0 0 0
CD
00 1 1 0 1 0 1 0
0 1 1 0 0
01
0 1 1 1 0
11
1 0 0 0 1
10 1 1
1 0 0 1 0
1 0 1 0 1
1 0 1 1 0
𝐹 = 𝐵( ⋅ 𝐷
) 1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 0
Example
A circuit has four inputs 𝐴! , 𝐴" , 𝐴# , 𝐴$ representing a natural number 𝐴
encoded in binary, ranging from 0 to 15.

The circuit’s output is 1 if the number 𝐴 is different from 15 and is divisible

by 4, 5, 6, or 7.
• Fill the truth table
• Find the minimal Boolean expression using a Karnaugh map
• Draw the circuit
• Draw the same circuit using only NAND gates.

See the book for the solution (Clements, section 2.5.4)

Specific logical components
Specific logical components
Thanks to what we saw until now, we can design logical circuits with
specific functions particularly useful in the design of more complex
ciruits.
• Encoders and decoders
• Multiplexers and Demultiplexers
• Adders
Encoder
An 𝑛 bits encoder has 2% inputs and 𝑛 outputs. If a single input line is
active, it gives as output the corresponding binary number. If more
lines are active, the higher has priority.

Example: if the 𝐷# is active, the 𝑂! , 𝑂" lines will have value 11.
 Encoder implementation
𝐷! 𝐷" 𝐷# 𝐷$ 𝑂# 𝑂$
Let’s build a 2 bits encoder. 0 0 0 0 0 0
0 0 0 1 0 0
𝐷! 𝐷"
00 01 11 10 0 0 1 0 0 1
𝐷# 𝐷$
0 0 1 1 0 1
00 1 1 1
0 1 0 0 1 0
01 1 1 1 𝑂# = 𝐷" + 𝐷!
𝑂# 0 1 0 1 1 0
11 1 1 1 0 1 1 0 1 0
10 1 1 1 0 1 1 1 1 0
1 0 0 0 1 1
𝐷! 𝐷" 1 0 0 1 1 1
00 01 11 10
𝐷# 𝐷$ 1 0 1 0 1 1
00 1 1
1 0 1 1 1 1
01 1 1 1 1 0 0 1 1
𝑂$ 𝑂$ = D! + 𝐷" 𝐷#
11 1 1 1 1 1 0 1 1 1
1 1 1 0 1 1
10 1 1 1
1 1 1 1 1 1
 Encoder implementation
Let’s build a 2 bits encoder.
𝐷! 𝐷"
00 01 11 10
𝐷# 𝐷$
00 1 1 1 𝐷(
01 1 1 1 𝑂#
𝑂# 𝑂# = 𝐷" + 𝐷!
11 1 1 1 𝐷)
10 1 1 1
𝑂$
𝐷! 𝐷"
00 01 11 10 𝐷#
𝐷# 𝐷$
00 1 1
01 1 1
𝑂$ 𝑂$ = D! + 𝐷" 𝐷#
11 1 1 1
10 1 1 1
Decoder
A decoder inverts the work of an encoder.
An encoder with 𝑛 bits has 𝑛 inputs and 2% outputs, and interpreting
the inputs as the bits of a natural numbers, it activates the
corresponding output.

For example, if the inputs 𝐷! e 𝐷" are 11, the active output is 𝑂# .
Multiplexer
A multiplexer has the purpose of transport, alternatively, more data lines
over the same single line. It has 𝑛 «selection» inputs that tell which of the 2%
«data» inputs are reported to the output.
𝐷(
𝐷)
𝑂
𝐷#
𝐷$

𝑆# 𝑆$
For example, if the 𝑆# , 𝑆$ inputs have value 11, the output 𝑂 will repor the
data present at the 𝐷! input.
Multiplexer
To build a multiplexer we can use AND gates as «switches».
𝐷(

𝐷)

𝐷# 𝑂

𝐷$

𝑆# 𝑆$
Demultiplexer
A demultiplexer inverts the work of a multiplexer. A single input line is
reported to one of the 2% output lines depending on the value of the 𝑛
selection lines. 𝑂(
𝐷 𝑂)
𝑂#
𝑂$

𝑆# 𝑆$
For example, if the 𝑆! , 𝑆" lines hold 11, the line 𝐷 is reported to the 𝑂#
output.
Comparators
A comparator has as inputs two 𝑛 bits words and gives as output 1 if
the two words are equal. Example, 4 bits comparator:
𝐴$
𝐵$

𝐴#
𝐵#

𝐴)
𝐵)

𝐴(
𝐵(
Adder
Adders implement the arithmetic sum operation.

We already saw that a simple XOR gate can give us the result of the sum
between two bits. An additional AND gate can give us the carry as well.
A
S
B

The resulting circuit is called «half adder».

Full-adder
To obtain an added for more than 1 bit we need to cascade more
adders, propagating the carry between them. The basic block has to
account for the carry coming from the preceding stage.

𝐶*+# 𝑆* 𝐶*+# 𝑆*
𝐴* 𝐶* 𝐴* 𝐶*
𝐵* 𝐵*

We obtain a «full adder».

Multiple-bit adders
Cascading more full-adders we obtain an adder for multiple bits.

Example: 4 bits adder beween two words 𝐴! , 𝐴" , 𝐴# , 𝐴$ and 𝐵! , 𝐵" , 𝐵# , 𝐵$ .

𝑆$ 𝑆# 𝑆) 𝑆(

𝐶,*
𝐶-./

𝐴$ 𝐵$ 𝐴# 𝐵# 𝐴) 𝐵) 𝐴( 𝐵(
Arithmetic-Logic Unit
An ALU is the component that performs arithmetic and logic operations
inside a CPU. It typically includes:
• A full-adder to execute additions and subtractions
• Elementary logic gates for logical operations
• Other arithmetic circuits (es. a multiplier)
• A decoder to select the output of the right component depending on
the operation to be performed
Arithmetic-Logic Unit
Recap
We saw how to build complex logical circuits starting from the basic logic
gates.
• Elementary (OR,AND,NOT) and universal (NAND,NOR) logic gates
• Boolean algebra
• Karnaugh maps
• Encoders and decoders
• Multiplexers and demultiplexers
• Comparators
• Adders
• ALUs