Advanced Analog Integrated Circuits

Matching

Bernhard E. Boser
University of California, Berkeley
boser@eecs.berkeley.edu

Copyright © 2016 by Bernhard Boser

B. E. Boser EE240B – Matching 1

 Issue

• In SPICE, two transistors with equal dimensions and

terminal voltages (and temperature) carry the same
current
• In Si, the current are (slightly) mismatched
– Why?
– How much mismatch?
– Fix?
– Verification?

B. E. Boser EE240B – Matching 2

 Origins of Mismatch

• Wafer to wafer variations

• Process gradients
• Proximity effects } Layout

• Random variations

B. E. Boser EE240B – Matching 3

 Wafer to Wafer Variations

Parameter Slow Nominal Fast

VTH 0.5V 0.4V 0.3V
µCox (NMOS) 200 µA/V2 250 µA/V2 300 µA/V2
µCox (PMOS) 100 µA/V2 130 µA/V2 160 µA/V2
CMIM 1.2 fF/µm2 1 fF/µm2 0.8 fF/µm2
Rpoly 80 Ω/◻ 70 Ω/◻ 60 Ω/◻
Rnwell 1.3 kΩ/◻ 1 kΩ/◻ 0.7 kΩ/◻

B. E. Boser EE240B – Matching 4

 Advanced Analog Integrated Circuits

Random Variations

Bernhard E. Boser
University of California, Berkeley
boser@eecs.berkeley.edu

Copyright © 2016 by Bernhard Boser

B. E. Boser EE240B – Matching 5

 Random Variations

• As dimensions get smaller, statistical variations become

more significant
– Edge roughness
– Variations of doping concentration

• Statistically well described by Gaussian distribution with

zero mean and standard deviation
𝐴#
𝜎∆# =
𝑊𝐿
• Applies to devices (transistors, capacitors, …) in close
proximity

Ref: M. Pelgrom, “Matching properties of MOS transistors,” IEEE JSSC, 10/1989, pp. 1433-9.

B. E. Boser EE240B – Matching 6

 Parameters for typical 180nm CMOS

Parameter Value
Avt (MOS) 5 mV-µm
Aβ (MOS) 1 %-µm
AΔIs/Is (BJT) 2 %-µm
AΔβ/β (BJT) 4 %-µm
AΔC/C (MIM capacitor) 1 %-µm
AΔR/R (Poly resistor) 3 %-µm

B. E. Boser EE240B – Matching 7

 Avt for 180nm CMOS

Ref: M. Pelgrom et al, “A designer’s view on

mismatch,” Chapter 13 in Nyquist A/D
Converters, Sensors, and Robustness,
Springer 2012, pp. 245-67.

B. E. Boser EE240B – Matching 8

 Avt versus Gate Oxide Thickness

Ref: M. Pelgrom et al, “A designer’s view on

mismatch,” Chapter 13 in Nyquist A/D
Converters, Sensors, and Robustness,
Springer 2012, pp. 245-67.

B. E. Boser EE240B – Matching 9

 Advanced Analog Integrated Circuits

Yield

Bernhard E. Boser
University of California, Berkeley
boser@eecs.berkeley.edu

Copyright © 2016 by Bernhard Boser

B. E. Boser EE240B – Matching 10

 Random Mismatch - Example

What is the mismatch between two MIM capacitors with 𝑊 = 𝐿 = 20µm?

https://en.wikipedia.org/wiki/Standard_deviation

B. E. Boser EE240B – Matching 11

 Yield

• Fraction of devices that meet specification

Interval Yield Fraction Bad

1σ 68.3% 1/3
2σ 95.4% 1/22
3σ 99.7% 1/370
4σ 99.99% 1/16,000
5σ 99.999% 1/1,700,000
6σ 99.999 999 8% 1/507,000,000

B. E. Boser EE240B – Matching 12

 Advanced Analog Integrated Circuits

Mismatch in Mirrors and Differential Pairs

Bernhard E. Boser
University of California, Berkeley
boser@eecs.berkeley.edu

Copyright © 2016 by Bernhard Boser

B. E. Boser EE240B – Matching 13

 Mismatch in Current Mirror

Example:
𝑊 = 10µm, 𝐿 = 180nm, 𝑉 ∗ = 200mV, 𝐴345 = 5mV 7 µm, 𝐴8 = 1% 7 µm

B. E. Boser EE240B – Matching 14

 Differential Pair

B. E. Boser EE240B – Matching 15

 Verification

B. E. Boser EE240B – Matching 16

 Technology Trend

VTH spread for 90nm NMOS and PMOS:

Ø random variations comparable to
slow/fast spread
Ref: M. Pelgrom et al, “A designer’s view on mismatch,”
Chapter 13 in Nyquist A/D Converters, Sensors, and
Robustness, Springer 2012, pp. 245-67.

B. E. Boser EE240B – Matching 17