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8085 Microprocessor

What is 8085 microprocessors? It is a programmable electronics chip (IC). A single IC has computing
and decision-making capabilities similar to central processing unit of a computer. It is used in almost all types of
electronics devices like mobile phone, printers, washing machine, etc. and used in advanced application like radars,
satellites and flights.

Generally, the 8085 is an 8-bit microprocessor, and it was launched by Intel team in the year of 1976 with the help
of NMOS technology.

8085 Microprocessors -functional units->


 Accumulator
 Arithmetic and logical unit
 General purpose register
 Program counter
 Stack pointer
 Temporary register Special purpose register
 Flag register
 Instruction register and decoder
 Timing and control unit
 Interrupt control
 Serial input/output control
 Address buffer and address data buffer
 Address bus and data bus

Accumulator
It is one of the general-purpose registers of microprocessor also called as A register.
It is an 8-bit register used to perform arithmetic, logical, i/o and load/store operations. It is connected to internal
data bus & ALU.

General purpose register


Apart from accumulator 8085 consists of six special types of registers called general Purpose Registers
These general-purpose registers are used to hold data like any other registers.
The general-purpose registers in 8085 processors are B, C, D, E, H and L. Each register can hold 8-bit data.
Apart from the above function these registers can also be used to work in pairs to hold 16-bit data.
They can work in pairs such as B-C, D-E and H-L to store 16-bit data.

N OTES
THE H-L PAIR WORKS AS A MEMORY POINTER .

A MEMORY POINTER HOLDS THE ADDRESS OF A PARTICULAR MEMORY LOCATION .

THEY CAN STORE 16- BIT ADDRESS AS THEY WORK IN PAIR .

Special purpose register

i) Program counter:
Program counter is a special purpose register.

Consider that an instruction is being executed by processor. As soon as the ALU finished executing the instruction,
the processor looks for the next instruction to be executed.

So, there is a necessity for holding the address of the next instruction to be executed in order to save time. This is
taken care by the program counter.

A program counter stores the address of the next instruction to be executed.


Microprocessor increments the program whenever an instruction is being executed, so that the program counter

points

to the memory address of the next instruction that is going to be executed.


Program counter is a 16-bit register.

ii)Stack pointer:
Stack Pointer is a special purpose register.
Stack pointer is also a 16-bit register which is used as a memory pointer.

A stack is nothing but the portion of RAM (Random access memory).


Stack pointer maintains the address of the last byte that is entered into stack.
Each time when the data is loaded into stack, Stack pointer gets incremented.

Conversely it is decremented when data is retrieved from stack.

iii) increment /decrement register:


The 8-bit contents of a register or a memory location can be incremented or decremented by 1.

This 16-bit register is used to increment or decrement the content of program counter and stack pointer register
by 1.

increment or decrement can be performed on any register or a memory location.

Temporary register
It is an 8-bit register, which holds the temporary data of arithmetic and logical operations.

It is also called as operand register (8 bit), it provides operands to alu. ALU can store immediate result in temporary
register. It is not accessible by user.

Flag register
It is an 8-bit register having five 1-bit flip-flops, which holds either 0 or 1 depending upon the result stored in the
accumulator.
These are the set of 5 flip-flops −

 Sign (S)
 Zero (Z)
 Auxiliary Carry (AC)
 Parity (P)
 Carry (C)
Its bit position is shown in the following table –

Sign Flag (S) – After any operation if the MSB (B (7)) of the result is 1, it indicates the number is negative and
the sign flag becomes set, i.e. 1. If the MSB is 0, it indicates the number is positive and the sign flag becomes reset
i.e. 0.
from 00H to 7F, sign flag is 0
from 80H to FF, sign flag is 1
1- MSB is 1 (negative)
0- MSB is 0 (positive)
Example:
MVI A 30 (load 30H in register A)
MVI B 40 (load 40H in register B)
SUB B (A = A – B)
These set of instructions will set the sign flag to 1 as 30 – 40 is a negative number.

Zero Flag (Z) – After any arithmetical or logical operation if the result is 0 (00)H, the zero flag becomes set i.e.
1, otherwise it becomes reset i.e. 0.
00H zero flag is 1.
from 01H to FFH zero flag is 0
1- zero result
0- non-zero result
Example:
MVI A 10 (load 10H in register A)
SUB A (A = A – A)
These set of instructions will set the zero flag to 1 as 10H – 10H is 00H

Auxiliary Carry Flag (AC) – This flag is used in BCD number system (0-9). If after any arithmetic or logical
operation D (3) generates any carry and passes on to B (4) this flag becomes set i.e. 1, otherwise it becomes reset
i.e. 0. This is the only flag register which is not accessible by the programmer
1-carry out from bit 3 on addition or borrow into bit 3 on subtraction
0-otherwise
OR
If an operation performed in ALU generates the carry from lower nibble (D0 to D3) to upper nibble (D4 to D7) AC
flag is set, else it resets.

Example:
MOV A 2B (load 2BH in register A)
MOV B 39 (load 39H in register B)
ADD B (A = A + B)
These set of instructions will set the auxiliary carry flag to 1, as on adding 2B and 39, addition of lower order nibbles B and 9
will generate a carry.

Parity Flag (p) – If after any arithmetic or logical operation the result has even parity, an even number of 1 bit,
the parity register becomes set i.e. 1, otherwise it becomes reset i.e. 0.
1-accumulator has even number of 1 bit
0-accumulator has odd parity
Example:
MVI A 05 (load 05H in register A)
This instruction will set the parity flag to 1 as the BCD code of 05H is 00000101, which contains even number of
ones i.e. 2.

Carry Flag (CY) – Carry is generated when performing n bit operations and the result is more than n bits, then
this flag becomes set i.e. 1, otherwise it becomes reset i.e. 0.
During subtraction (A-B), if A>B it becomes reset and if (A<B) it becomes set.
Carry flag is also called borrow flag.
1-carry out from MSB bit on addition or borrow into MSB bit on subtraction
0-no carry out or borrow into MSB bit
Example:
MVI A 30 (load 30H in register A)
MVI B 40 (load 40H in register B)
SUB B (A = A – B)
These set of instructions will set the carry flag to 1 as 30 – 40
generates a carry/borrow.
MVI A 40 (load 40H in register A)
MVI B 30 (load 30H in register B)
SUB B (A = A – B)
These set of instructions will reset the sign flag to 0 as 40 –
30 does not generate any carry/borrow.

Arithmetic and logical unit

It is multi operational combinational logic circuit, same as IC 74181(ALU)


It performs arithmetic and logical operations like AND, OR, EX-OR, ADDITON, SUBTRACTION, INCREMENT,
DECREMENT, LEFTSHIFT, RIGHT SHIFT, CLEAR.

The Alu contains following blocks:


Adder: It performs arithmetic operations like addition, subtraction, increment, decrement, etc. The result of
operation is stored into accumulator.

Shifter: It performs logical operations like rotate left, rotate right, etc. The result of operation is again stored into
accumulator.

Status Register: Also known as flag register. It contains a no. of flags either to indicate conditions arising after last
ALU operation or to control certain operations.

Decoder and Instruction Register


As an order is obtained from memory after that it is located in the instruction register, and encoded & decoded
into different device cycles.

Timing and Control


The timing & control unit can be used to supply the signal to the 8085 microprocessors for achieving the particular
processes. The timing and control units are used to control the internal as well as external circuits. These are classified
into four types namely control units like RD’ ALE, READY, WR’, status units like S0, S1, and IO/M’, DM like HLDA, and
HOLD unit, RESET units like RST-IN and RST-OUT.

 Control Signals: READY, RD’, WR’, ALE


 Status Signals: S0, S1, IO/M’
 DMA Signals: HOLD, HLDA
 RESET Signals: RESET IN, RESET OUT
Control Signal
These signals are used to identify the nature of operation. There are 3 control signal and 3 status signals.
Three control signals are RD, WR & ALE.
 RD − This signal indicates that the selected IO or memory device is to be read and is ready for accepting data
available on the data bus.
 WR − This signal indicates that the data on the data bus is to be written into a selected memory or IO location.
 ALE − It is a positive going pulse generated when a new operation is started by the microprocessor. When
the pulse goes high, it indicates address. When the pulse goes down it indicates data.

Status signal
Three status signals are IO/M, S0 & S.
IO/M - This signal is used to differentiate between IO and memory operation, i.e. when it is high indicates IO
operation and when it is low then it indicates memory operation
S1 & S0 - THESE SIGNALS ARE USED TO IDENTIFY THE TYPE OF CURRENT OPERATION.
 When the S0, S1 are 01 then the operation will be HALT.
 the S0, S1 is 10 then the operation will be WRITE
 When the S0, S1 is 10 then the operation will be READ
 When the S0, S1 are 11 then the operation will be FETCH

DMA
Working principal of dma-
 DMA is a process of communication for data transfer between memory and input/output, controlled by an
external circuit called DMA controller, without involvement of CPU.

 8085 MP has two pins HOLD and HLDA which are used for DMA operation

 First, DMA controller sends a request by making


Bus Request (BR) control line high. When MP
receives high signal to HOLD pin, it first
completes the execution of current machine
cycle, it takes few clocks and sends HLDA signal
to the DMA controller.

 After receiving HLDA through Bus Grant (BG)


pin of DMA controller, the DMA controller takes
FIG: DMA operation
control over system bus and transfers data directly between memory and I/O without
involvement of CPU. During DMA operation, the processor is free to perform next job
which does not need system bus.
 At the end of data transfer, the DMA controller terminates the request by sending low signal to HOLD pin
and MP regains control of system bus by making HLDA low.

Now question is how many ways DMA can work? It may be mentioned here that DMA transfer the data of the
following types:
 Memory to I/O device
 I/O device to memory
 Memory to memory
 I/O device to I/O device

Dma controller
 Figure shows the block diagram of a typical DMA controller. The unit communicates with the MP via the
data bus and control lines.
 The registers in the DMA are selected by the MP through the address bus by enabling the DS (DMA select)
and RS (Register Select) inputs. The RD (read) and WR (write) inputs are bidirectional.
 When the bus grant (BG)
input is 0, the MP can
communicate with the
DMA registers through
the data bus to read
from or write to the DMA
registers. When BG=1,
the processor does not
have control over the
system buses and the
DMA can communicate
directly with the memory
by specifying an address
in the address bus and
activating the RD or WR
control.
 The DMA controller has
three registers: an address Fig: DMA controller
register, a word count register and a control register.

 The address register contains an address to specify the desired location in memory. The address bits go
through bus buffers into the address bus. The address register is incremented after each word that is
transferred to memory.
 The word count register holds the number of words to be transferred. The register is decremented by one
after each word transfer and internally tested for zero.
 The control register specifies the mode of transfer

Reset Signal
RESET IN--RESET IN pin is used to reset the program counter toward zero and rearranges interrupt enable as well
as HLDA flip-flops (FFs). The central processing unit is detained in RST condition till this pin is high. But the registers
as well as flags won’t get damaged apart from instruction register.

RST (RESET) OUT--RESET OUT pin specifies that the central processing unit has been rearranged with RST IN.

Interrupt control

HARDWARE SOFTWARE

1.DEFINATION: Some pins on the 8085 allow, peripheral 1.DEFINATION: In this type of interrupt, the
device to interrupt the main program for I/O operations. programmer has to add the instructions into the
When an interrupt occurs, the 8085 completes the program to execute the interrupt. These are special
instruction it is currently executing and transfers the instructions supported by the microprocessor. After
program control to a subroutine’ that services the execution of these instructions’ microprocessor
peripheral device. Upon completion of the service routine, completes the execution of the instruction it is
the CPU returns to the main program. These types of Types currently executing and transfers the program
of 8085 Interrupts, where CPU pins are used to receive control to the subroutine program. Upon
interrupt requests, are called hardware interrupt completion of the execution of the subroutine
program, program control returns to the main
program. This type of interrupt requests is called
software interrupts

2.TYPES: There are 5 interrupt pins in 8085 used as


hardware interrupts, i.e. TRAP, RST7.5, RST6.5, RST5.5, 2. TYPES: There are 8 software interrupts in 8085, i.e.
INTA. RST0, RST1, RST2, RST3, RST4, RST5, RST6, and
RST7.
N OTES

Vector interrupt − In this type of interrupt, the interrupt N OTES


address is known to the processor. Vector Address = Interrupt Number * 8
For Example:
Non-Vector interrupt − In this type of interrupt, the interrupt
address is not known to the processor so, the interrupt address RST2: vector address=2*8 = 16
needs to be sent externally by the device to perform interrupts
RST1: vector address=1*8 = 08
RST3: vector address=3*8 = 24
Maskable interrupt − In this type of interrupt, we can disable
the interrupt by writing some instructions into the program.

Non-Maskable interrupt − In this type of interrupt, we cannot


disable the interrupt by writing some instructions into the
program

Priority of Interrupts–When microprocessor receives multiple


interrupt requests simultaneously, it will execute the interrupt
service request (ISR) according to the priority of the interrupts3.

Interrupt Vector Address

RST0 0000H
RST1 0008H

RST2 0010H
RST3 0018H

RST4 0020H
RST5 0028H

RST6 0030H
RST7 0038H

In 8085 Instruction set, SIM stands for “Set Interrupt Mask”. It is 1-Byte instruction and it is a multi-purpose
instruction. The main uses of SIM instruction are –

 Masking/unmasking of RST7.5, RST6.5, and RST5.5

 Reset to 0 RST7.5 flip-flop

 Perform serial output of data

When SIM instruction is executed then the content of the Accumulator decides the action to be taken. So before
executing the SIM instruction, it is mandatory to initialize Accumulator with the required value. The meaning and
purpose of the various bits of the accumulator when SIM is executed has been depicted below –

 Bits 0 – 2 will set/reset the mask bits for RST 5.5, RST 6.5, and RST 7:5 of the interrupt mask register.
 Bit 3 enables the functioning of bits 0 – 2. It enables or disables the masking control.
 Bit .4 is used to reset RST 7.5 request; regardless of whether or not RST 7.5 is masked.
 Bit 5 is don’t care.
 Bit 6 enables the serial output if it is set.
 Bit 7 decides the data to be sent on the serial output pin of 8085.

In 8085 Instruction set, RIM stands for “Read Interrupt Mask”. It is a 1-Byte multi-purpose instruction. It is used for
the following purposes.

 To check whether RST7.5, RST6.5, and RST5.5 are masked or not;

 To check whether interrupts are enabled or not;

 To check whether RST7.5, RST6.5, or RST5.5 interrupts are pending or not;

 To perform serial input of data.

when the interrupt requests are of lower priority, 8085 stores the information about these interrupt requests. Such
interrupts are called pending interrupts. The status of pending interrupts can be monitored using RIM instruction.

 Bits 0-2 give the status of interrupt mask. Logic 1 indicates the interrupt is masked.
 Bit 3 gives the status of interrupt enable flag. If 1, interrupts are enabled.
 Bits 4-6 give the status of pending interrupts.
 Bit 7 gives the status of serial input data line.
** Note that they are not used for masking or unmasking. Masking or unmasking has to be done using the SIM
instruction.

Serial I/O Ports:


In situations like, data transmission over long distance and communication with cassette tapes or a CRT
terminal, it is necessary to transmit data bit by bit to reduce the cost of cabling. In serial communication
one bit is transferred at a time over a single line. The 8085’s serial I/O control provides two lines, SOD
and SID for serial communication.
Serial transmission in 8085 is implemented by the two signals,
 SID and SOD – SID is a data line for serial input where as SOD is a data line for serial output.

ADDRESS BUFFER AND ADDRESS-DATA BUFFER


The content stored in the stack pointer and program counter is loaded into the address buffer and address-data
buffer to communicate with the CPU. The memory and I/O chips are connected to these buses; the CPU can exchange
the desired data with the memory and I/O chips.
ADDRESS BUFFER
This is an 8-bit unidirectional buffer. It is used to drive external high order address bus (A15-A8). It is also
used to tri-state the high order address bus under certain conditions such as reset, hold, halt, and when
address lines are not in use.
ADDRESS/DATA BUFFER
This is an 8-bit bi-directional buffer. It is used to drive multiplexed address/data bus, i.e. low order address
bus (A7-A0) and data bus (D7-D0). The address and data buffers are used to drive external address and
data buses respectively. Due to these buffers the address and data buses can be tri-stated when they are
not in use
It is also used to tri-state the multiplexed address/data bus under certain conditions such as reset, hold,
halt and when the bus is not in use.

Data Bus: Data bus carries data in binary form between microprocessor and other external units such as memory. It is used to
transmit data i.e. information, results of arithmetic etc between memory and the microprocessor. Data bus is bidirectional in
nature. The data bus width of 8085 microprocessor is 8-bit i.e. 28 combination of binary digits and are typically identified as
D0 – D7. Thus size of the data bus determines what arithmetic can be done. If only 8-bit wide then largest number is 11111111
(255 in decimal). Therefore, larger numbers have to be broken down into chunks of 255. This slows microprocessor

Address Bus: The address bus carries addresses and is one way bus from microprocessor to the memory or other devices. 8085
microprocessor contain 16-bit address bus and are generally identified as A0 - A15. The higher order address lines (A8 – A15) are
unidirectional and the lower order lines (A0 – A7) are multiplexed (time-shared) with the eight data bits (D0 – D7) and hence, they are
bidirectional.

Addressing Modes in Instructions:

I. Immediate addressing II. Memory direct addressing III. Register direct addressing IV. Indirect addressing V. Implicit addressing

Immediate Addressing: In this mode, the operand given in the instruction - a byte or word – transfers to the destination register or
memory location. Ex: MVI A, 9AH  The operand is a part of the instruction.  The operand is stored in the register mentioned in the
instruction

Memory Direct Addressing: Memory direct addressing moves a byte or word between a memory location and register. The memory
location address is given in the instruction. Ex: LDA 850FH This instruction is used to load the content of memory address 850FH in the
accumulator.
Register Direct Addressing: Register direct addressing transfer a copy of a byte or word from source register to destination register. Ex:
MOV B, C It copies the content of register C to register B.

Indirect Addressing: Indirect addressing transfers a byte or word between a register and a memory location. Ex: MOV A, M Here the
data is in the memory location pointed to by the contents of HL pair. The data is moved to the accumulator.

Implicit Addressing In this addressing mode the data itself specifies the data to be operated upon. Ex: CMA The instruction
complements the content of the accumulator. No specific data or operand is mentioned in the instruction.

Instruction set

Microprocessor instructions can be classified based on the parameters such functionality, length.

Classification based on length:


One-byte instructions: Instruction having one byte in machine code. Examples are depicted in Table 2.

Two-byte instructions: Instruction having two bytes in machine code. Examples are depicted in Table 3.

Three-byte instructions: Instruction having three bytes in machine code. Examples are depicted in Table 4.

Classification based on functionality:

a) Data transfer operations: This group of instructions copies data from source to destination. The content of the
source is not altered.
LDA LDAX LXI PUSH POP MOV MVI
Example:

Opcode Operand Meaning Explanation

Rd, Sc This instruction copies the contents of


MOV Copy from the source (Sc) to the source register into the destination
M, Sc register without any alteration.
the destination (Dt)
Dt, M Example − MOV K, L

The 8-bit data is stored in the destination


Rd, data
MVI Move immediate 8-bit register or memory.
M, data
Example − MVI K, 55L

b) Arithmetic operations: Instructions of this group perform operations like addition, subtraction, increment &
decrement. One of the data used in arithmetic operation is stored in accumulator and the result is also stored in
accumulator
c) Logical operations: Logical operations include AND, OR, EXOR, NOT. The operations like AND, OR and EXOR
uses two operands, one is stored in accumulator and other can be any register or memory location. The result is stored in accumulator.
NOT operation requires single operand, which is stored in accumulator.

d) Branching operations: Instructions in this group can be used to transfer program sequence from one memory location to another
either conditionally or unconditionally.

e) Machine control operations: Instruction in this group control execution of other instructions and control operations like interrupt,
halt etc.

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