COLOUR TELEVISION

TRAINING MANUAL

I FILE NO. c-?/Ps60-uo /

Chassis Series ACI-A

ACI-B
ACI-C
CIRCUIT DESCRIPTION
BLOCK DIAGRAM OF /~S
TROUBLE SHOOTING

REFERENCE NO. T1520009

 i

Table of Contents

Part 1 Chassis Description

1. Chassis Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2. CPU. ...................................................................................... &-18
2.1 A. DKeyldentification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...6
2.2 Option Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...7.9
2.3 Power On/ Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..lO
2.4 Power Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..ll
2.5 Band Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..l2
2.6 Am . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..l3.l4
2-7 TV/AV switch Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..l5
2.8 Analogue Controls Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..l5.l6
2-9 System Switch Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..l7.l8
2-10 H/Vpulse input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..l9
3. IF/Video/Chroma/Deflection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-21
3-1 lFstage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..2O
3-2 Mdeo/Chroma stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..2l
3-3 Deflection Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..2l
4. System Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22-23
4-1 Sound Carrier Trap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...22
4.2 SIFFiltering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...23
5. Audio Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6. Vertical Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7. Horizontal Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8. Power Consumption Saving Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Part 2 Block Diagram of K%

1. LA7687 cl F/Video/Chroma/Deflection> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
2. LC89950 <1 H Delay line> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3. LA7642 <SECAM Decoder> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4. LA7837 cVertical Output> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5. LA4285, LA4287 cAudio Output> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Part 3 Trouble Shooting Chart

.

Common start point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

1. Dead . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33-35
2. No picture/No sound . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36-37
3. Uo picture-sound OK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
4. No sound-picture OK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
5. No colour . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ao
6. ncorrect colour phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Al
7. Uo vertical deflection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A2
8. Uo on-screen display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A3

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Training Manual AC 1 Chassis
 Part 1 Chassis Description

1. Chassis Summary
The following figure shows a basic block diagram of the AC1 chassis. This chassis is con-
structed by the following ICS;
LC864508, IC801, for the CPU (system control circuit) for AC I -A chassis
LC864512, IC801, for the CPU (system control circuit) for AC1 -B chassis
LC864516, IC801, for the CPU (system control circuit) for AC1 -C chassis
LA7687, IC201, for the IF, video, chroma de-modulation and deflection circuit
LC89950, IC271, for the 1H delay line circuit
LA7642, IC280, for the SECAM decoder circuit
LA7837, IC501, for the vertical deflection output circuit
LA4287, ICOO1, for the audio output circuit, for AC1 -B chassis
LA4285, ICOO1, for the audio output circuit, for AC1 -A and AC1 -C chassis
ST24C02AB, etc., IC802, for the control memory IC

...... ...... ..52n-m

1-
1
SASSEX
AUDIOIN
%..s:
=~=~~ I

L
ESTERNM AUDIOIN FOWR SUPWY
.
. CIRCUIT
—. t

All

—
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Training Manual AC 1Chassis
 i

2 CPU (System Control)

The following figure shows a block diagram of the CPU peripheral circuit.

—.— .—-— -—. — -—-— -—-— -- —-— -—-— ,

,,,,,

Ii I
L

,,,,,

2
C/3
c
o
“E
o

i–.–
TMl II
Oalm
C-JOIN
Zz$?t% -il.–.–.–.-.i

i—-—-—-—-—-—-—- l, f—-—-lr-—-— -
I
cum I:m u-’
N’

3
.2
c
ml

r%
xG
—

,-–; II

n
di - ii

J ii &
Ce

ii r%
a)

L._-—-—.—.—.—-—-_-—;
JI u
L.—.—. ii..—-—
. —-— .—. J

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Training Manual ACl Chassis
 The following table shows pin descriptions of the CPU for AC1-A, AC1-B and ACI-C,

Pin Description Pin Description

—
1 Inhibit output & Option switch 27 Red signal output for OSD
(AC1 -A) 28 Green signal output for OSD
Bass expander switch output & 29 Blue signal output for OSD
Option switch (AC I -B, AC1 -C) 30 Blanking signal output for OSD
2 12Cbus SDA line 31 Not used
3 12Cbus SCL line 32 Not used (AC1 -A, AC1 -B)
4 AV/SECAM switch output AV1/AV2 switch output (AC1 -C)
5 Option switch (Tuner type) 33 Not used (AC1 -A, AC1 -B)
6 Option switch (No. of positions) Ignore input (AC1 -C)
(AC1 -A) 34 Not used (AC1 -A)
Option switch (Blue back on/off) System switch output-VIF.M (AC1 -B,
(AC1-B) AC1 -C)
Option switch (No. of positions& AV 35 AFT defeat switch output
L
modes) (AC1 -C) 36 Band switch output 1-VHF Low
7 Power& option switch (RC status) 37 Band switch output 2-VHF High
8 Tuning voltage output 38 Band switch output 3-UHF
9 GND (Digital) 39 Volume control output
10 Oscillator input for CPU 40 TV/AV switch output(TV:Low)
11 Oscillator output for CPU 41 Power error detection input
12 +5 power supply (Digital) 42 Sync identification input(No sync: Hi)
13 AFT-S signal input 43 Colour killer input
14 Key scan input (DC) 2 44 RC signal input
15 Key scan input (DC) 1 45 SECAM killer input
16 Option switch (Colour system) 46 IF identification input
17 Reset pulse input 47 Not used (AC1 -A, AC1 -B)
18 Oscillator input for OSD AV1 Start function input(ACl -C)
19 Oscillator output for OSD 48 Option switch (No.of positions)
20 Charge pump output (AC1 -A)
L 21 +5 power supply (Analogue) Not used (AC1-B)
22 GND (Analogue) Option switch (No of positions & AV
23 Data-Analogue bus line modes) & AV2 Start function
24 Address-Analogue bus line input(AC1-C)
25 Vertical pulse input 49 SIF system output-DK & option SW.
26 Horizontal pulse input 50 SIF system output-1 & option SW.
51 SIF system output-BG & option SW.
52 SIF system output-M & option SW.

“-s-
training Manual ACIChassis
2-1 A-D Key Identification Circuit
4

The key identification circuit used in this chassis uses a switched resistive ladder network in
a A-D conversion circuit to generate and send a voltage to the CPU when a key is pressed.
The CPU uses this voltage to determine which key was pressed. This resistive circuit elimi-
nates the need for encoder/decoder devices, simplifying design and adding to the reliability
of the TV.
The table shows the voltages input to CPU pin 14 and 15, when a given key is pressed.

27k
+—
K1

K2
3- 5“ ~

& 27k

CPU
10k &3 10k
!W

5.6k & KJ 5.6k

3.9k 3.9k
~ K~
15
2.2k ~ K~3 2.2k
14 L
2.7k K7 2.7k
K~4
~:j
0.27k 0.27k

7+
—

lrwut voltaqe to pin 15 .----- vnltarie

--..-=- to
Intro It .- nin
. ... 14. .
Ke ●Range of voltage Function Ke * Range of voltage Function

1
K1 0.5V-1.1 V Position Up -tK8 0.5V-1.1 V -rvlAv
K2 l.l V- 1.7V Postion Up K9 I.lv- 1.7V TVIAV .
K3 1.7V - 2.3V Position Down KI O 1.7V - 2.3V SIF System
K4 2.3V - 3.OV Level Up K11 2.3V - 3.OV Colour System
K5 3.OU - 3.6V Level Down K12 3.OV - 3.6V Undefined
K6 3.6V - 4.2V Undefined K13 3.6V - 4.2V Preset
K7 more than 4.2V Undefined K14 more than 4.2V Function
OFF Less than 0.5V No Key pressed OFF Less than 0.5V No Key pressed

“ When the supply voltage is 5.OV.

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Training Manual AC 1 Chassis
 2-2 Option switches

This chassis uses the option function switches to determine several different specifications
of the TV set.
The CPU determines the specification of TV by detecting the voltage level on option switch-
es pins, pins, 1, 5, 6, 7, 16,49 to 52.
Following table shows the option functions and assigned pins of the CPU for each chassis.

Option functions &lcl-A AC1-B AC1-C

Inhibit pin 1 nla nla
Bass expander nla pin 1 pin 1
Type of tuner pin 5 pin 5 pin 5
No.s of positions pins 6,48 nfa nla
No.s of positions & AV modes nla nla pins 6, 48
RC status pin 7 nla nla
Blue back in TV mode nla pin 6 nla
Colour system pin 16 pin 16 pin16
SIF system pins 49-52 pins 49-52 pins 49-52

* n/a = not available

Inhibit function (AC1-A chassis)

CPU

10
IN.SW Specification
off w/o Inhibit function
1 on w/ Inhibit function
‘9

Buss expander function ( AC1-B and AC1-C chassis)

CPU
L

Rx
EX.SW Specification
off w/o Bass expander function
1 on w/ Bass expander function
‘9

Type of tuner
.

CPU

10
TU.SW Specification
off Normal tuner
5 on CATV channel or hyper tuner
L
‘Y

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Training Manual AC I Chassis
 i

Numbers of programme positions (AC1-A chassis)

CPU ,
95“

k“
10k
10k Posl Sw POS2 Sw Specification
POS2 Sw ‘ off off 60 programme positions
6 on off 30 programme positions
off on 100 programme positions
48 on on 100 programme positions
poa

Numbers of programme positions and AV modes (AC1-C chassis)

5“
CPU

$%A
10k
10k Posl Sw Specification
POS2 Sw off 60 programme positions
6 1 AV mode
on on 100 programme positions
48 1 AV mode
poa off off 100 programme positions
2 AV modes
on off 100 programme positions
2 AV modes

Remote control status (AC1-A chassis)

CPU

Rx
RC SW. Specification
off w/o remote control function
7 on w/ remote control function
‘9

Blue Back function in TV mode (AC1-B chassis)

CPU

BL.SW I Specification
off w/ Blue back function in TV mode
on w/o Blue back function in TV mode

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Training Manual AC1 Chassis
 Colour system

CPU Pin16 Rx Specification

5V
more 4.53V 0.15K Not used
Rx 3.9V-4.53V 1.8k Not used
3.28V-3.9V 3.9k Not used
2.66V-3.28V 6.8k China, Indonesia(ACl-B/C)
16 2.03V-2.66V 12k Multi-system(AC l-B/C)
1.41V-2.03V 18k 3 system
10k
0.78V-I .41V 33k VMT system
J-1 O.15V-O.78V 10Ok PAL system
less O.15V Open PAL system
● When the supply voltage is 5.OV.

SIF system

I J7
11.sw BG.SW I.sw DK.SW Specification
off off off off Multi-system
off off on off Px
off off on on Indonesia 1
on off off off 3 system (ACI -A)
on off on off East Europe
off on off off China 1
off on on off China 2
on on off off China 3 (ACI-A)
off in on on Indonesia 2
on on on on No system (AC1 -A)

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Training Manual AC I Chassis
 ii

2-3 Power/ stand-by circuit

O Power On/stand-by
The power on/stand-by signal is output from pin 7 of the CPU.
When the stand-by mode is selected the voltage of pin 7 changes from Hi(5V) to Low(OV)
to turn off Q682. Q682 turning off causes Q683 and Q684 to turn off. +24V supply for ver-
tical and horizontal output circuit, +7.8V supply for lF/Video/Chroma circuit and +12V for
tuner circuit are all cut off, resulting in the TV set going into the stand-by mode.
When the TV is switched back into the power on mode, Q683 and Q684 are turned on
and the relevant voltages are supplied back to each circuit.

, -.,-.,-.,-. . . . ..
● mmmmmmm. mmm mm. Q683
. .
. .
.
. .
. .
. .
. .
. .
. .
. .
. .

: supply :

.
:
.
..
.
..
. ...................................
.
..
..
.
..
.

R681
15k
7
AAA Q682

CPU 5v --------

Power On
t

““sEd’by-””-”’”o’ ~

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Traming Manual AC I Chassis
 ii

2-4 Protection circuit

L
This chassis employs two kinds of protection circuit, one controlled by software through the
CPU and the other by hardware.

Protection circuit (software)

The protection circuit is provided to disable the operation of the TV set in case of a circuit
malfunction.
When an abnormality occurs during TV reception it causes pin 41 of the CPU to go con-
tinually Low (less than 0.8V) for about one second. The CPU detects that this has
occurred and outputs the signal to cut off Q683 and Q684.

Protection circuit (hardware)

When a power failure is detected by diodes D643, D644 and D645, this protection circuit
operates causing the power oscillation to stop.
If one of the above diodes is turned on, the voltage of Q631 -emitter decreases, and it
turns on completely. Photo-coupler D615 is driven by this and generates a current which
drives Q612 on. As a result, the operation of the power oscillation circuit is stopped.
Under normal circumstances these parts, D615, Q631, D641, R635, R636, VR631 are
operating as the error detection and regulation circuit for +130V power supply.

D445 Heater

D201 ,
5V
D492
180V
I , -.,-.,-.! -. 0-.., =a
t ;
● mmmmmmmmmmmmmd
(2683 ! Vert.&Horiz. Jlllll18!o.slllllll.!lL
. . . ...............
i. . *@; & output
i
■
. .
. ................ - circuit
‘j FBT jL1
✎ .
■ . .. . . . . . :,,,,,...,,,,,,.,,..,,,,,..%
✎ . Q684 . “--’ --’--’=-’-J ,., -.,-.,-., -- i---
✎
✎
.
.
. ............... I
✎
✎
. - lF/Video/Chroma R
✎
✎ Power .
.
+-@ ~ I
. .- . .- a-.1--------
.-. m-. *-.,.1 .
✎
✎
✎
supply .
.
.m-.
✎ .
✎
✎
circuit .
. ( :
✎ .
✎ .
.
i
L ✎
✎
“m-, --}.-,.- ,.-,4
✎ .
✎ .
✎ .
✎ .
✎ . D655 ;
✎ .
✎ .
✎ .. [ 1/ I
✎
.. .. ...........
.. . .. . . . . . . . . . . . . . . ,,. ... as...,,,,
.
.. ..
+... mmmm. mmm. m
R635

VR631 .
CPU .
.
.
..
Protect 41
Rf=$ :$\ : Power
oscillation
circuit
■
..

h
ADfj41 E :

)
.
P................*. . . . . . . . . . . ..
130V
Regulator
circuit
R681 _ power
15k operation ~ failuer
iAA
Power 7

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Training Manual AC 1Chassis
 i

2-5 Band switching circuit

The band switching control signals are output from pins 36, 37 and 38 of the CPU and fed
to the base of Q1 03, Q104 and Q1 05, band switching transistors.
The one of these transistors then supplies the drive voltage(+l 2V) to the tuner according to
the output signal from the CPU as shown below table.

Antenna

Tuner
Cllo3 36 VL
VL ●
12k
I._

Q104 37 VH
VH ●
12k

Q105 38 UHF
u ● R898
12k

CPU

Band Switching Logic

output

Pin36 Pin 37 Pin 38 Q103 Q104 Q105 Selected Band

LH H on off off VHF-Low

HL H off on off VHF-High

HHL off off on UHF

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Tmining Manual AC1 Chassis
 2-6 AFT

This chassis employs two kinds of the AFT circuit, it’s called the Digital AFT and the Trace
AFT.
The digital AFT operates as the hardware AFT in the tuner circuit. Every channel selection,
the CPU reads out the tuning data from the memory and then changes tuning voltage output
from pin 8 to obtain the best tuned picture.
The trace AFT is to prevent the drifting of receiving condition caused by the temperature
etc. The CPU monitors the AFT S-curve signal input to pin 13 and maintains the correct
tuned picture by controlling the output tuning voltage.

. Digital An
(1) The CPU outputs tuning voltage(Start value) which is subtracted with the step as table-1
from the stored tuning voltage data in the memory and waits for 240ms.
II* When the AFT voltage is less than 1.5V, go to step (4).

III* Other than the above, go to step (2).

‘w (2) Increase the tuning voltage along with table-2a until the AFT voltage reaches less than
1.5V. Go to next step.
(3) Decrease the tuning voltage along with table-2b until the AFT voltage reaches more than
2.OV. Go to next step.
(4) The CPU judges that the sync. signal is existing or not by detecting the voltage on pin
46,
If the CPU detects a low voltage on pin 46, go to step (2).
If the CPU detects a high(5V) voltage on pin 46, complete the digital AFT operation and
go to the Trace AFT stage.

Trace Am
After completing the digital AFT operation, the CPU switches to the trace AFT mode.
(1) If the AFT v;ltage ii more than 3.OV and the IF ident. signal is detected, the CPU
increases the tuning voltage along with table-3.
(2) If the AFT voltage is less than 2.OV and the IF ident. signal is detected, the CPU
decreases the tuning voltage along with table-3.
‘L
(3) In the preset mode and fine tuning mode, this function does not operate.
Tablel Substructed steps Table-3 Tuning spesd of Trace AFT

~=

Table-2 Tuning apeed of digital AFT

(a) High spead (steps/10msec.)

(b) Mid spead (steps/10msec.)

‘“L

~
-13-
Training Manual AC I Chassis
Tuning

CPU IC201
Tuner lF&VIDEO

Q184
IF IDENT IN
TU ‘ 8 46 w 2 IF IDENT
TUNING OUT R858
150

R177
120k
7 AFT
R176 I
39k
J? %::
AFTIN 13 4
RI 75
82k
J? $:”

F l\

Input Signal 3.5V

AFT S-Curve 3.OV

Pin 13
of IC801 Input 2.OV
-,:!
!,, A

Pin 8
of IC801 Tuning Voltage

Pin 46 IF Ident.
of IC801 Signal Input

‘ Tuned point

Input Voltage Level of Pin 13 Judgement

LL(OV-1.5V) Tuning Voltage Down
L (1.5V-2.OV) Tuning Voltage Down
M (2. O-3.OV) Tuned Centre
H (3. OV-3.5V) Tuning Voltage Up
HH(3.5V-5V) Tuning Voltage Up

-14-
Training Manual AC 1 Chassis
 2-7 TV/AV switching circuit

The TV/AV switching signal output from pin 40 of the CPU is supplied to pin 4 of ICOO1,
audio output, and pin 1 of IC201 to select the internal or external source. The SECAM
switching signal output from pin 4 is sent to pin 1 of IC201. The output of each mode and
system is shown in the table below.

L
To SECAM IC
pin12 I
I
Icool
AUDIO OUTPUT

40 4 lNT./EXT. SW.
TVIAV
Q016
CPU R861
5.6k

IC201
lV/VIDEO

5V

AV/SECA;
-“4 R815
680
R803
5.6k

R804
15k
d?
RI 71
lk
“1
1 AVISECAM
SIF IN

TV I Av I
OUTPUT PAUNTSC SECAM PAUNTSC SECAM
pin 4 Hz L Hz H
Din 40 L L H H
● Hz= High impedance

2-8 Analogue control circuit

The colour saturation, brightness, contrast, tint, and sharpness for picture controls and
selection of crystal control are controlled via the analogue bus lines connected from pins 23
and 24 of the CPU to pins 18 and 19 of IC201, LA7687. The CPU outputs the data and
L address signals during a vertical retracing period, and the control address and data of crys-
tal are represented in 8 bits and data of picture controls are represented in 7 bits.
The timing charts and specifications of bus lines are described on next page.
The sound volume control is output from pin 39 as 7 bits PWM (Pulse Width Modulation)
signal. This signal is applied to the audio output IC as DC control voltage through the filter-
ing circuit
IC201
lF/VIDEO
CPU
DATA
23 19 Data
R219
220

ADDRESS
24 18 Address
R218
39
\ lk
I

Icool
AUDIO OUTPUT

‘L
VOLUME
Filtering * 5 VOL
circuit

-15-
Traming Manual AC I Chassis
 i

Output Value
(1)
., Address voltaae (8 bits= 255 steDs)
“. ,,

Control Item Specification of Reference output

LA7687 voltage of CPU
1

Crystal O- O.17V O.oiv (02/255)

Brightness 0.77V - 1.OIV 0.86V (44/255)
Contrast 1.68V -1 .93V 1.76V (90/255)
Colour 2.59V - 2.83V 2.67V (136/255)
Sharpness 3.50V - 3.74V 3.57V (182/255)
Tint 4.40V - 5.00V 4.51V (230/255)

(2) Data voltage

a) Crystal (8 bits= 255 steps)
Control Item Specification of Reference output
LA7687 voltage of CPU

PAL4.43 I O - 1.48V 0.04V (02/255)

PAL3.58 1.70V - 2.70V 2.20V (1 12/255)
NTSC3.58 2.90V - 3.90V 3.22V (1 64/255)
NTSC4.43 4.1 Ov - 5.00V 5.00V (255/255)

b) Picture control (7 bits=l 27 steps)

Control Item Reference output voltage of CPU
Minimum I Maxmum

Brightness 0.43V (11/127) 2.91V (74/1 27)

Contrast 2.48V (63/1 27) 4.96V (126/1 27)
Colour Ov (0/1 27) 4.96V (1 26/127)
Sharpness 0.95V (24/1 27) 3.43V (87/1 27)
Tint 1 .22V (31/127) 3.7V (94/1 27)

Output timing chart

1 Field

V-Sync
.-

5V
//
//

Address

—
I

Data

-16-
Training Manual AC] Chassis
 ii

2-9 System switch output

The outputs from pins 4,40and 340fthe CPUselect thecolour system and the outputs
from pins 49 to 52 the SIF system. These outputs drive the colour and SIF system switching
circuits. The operation of each switching circuit is shown in the table below.

Colour system switching output

Output pins
System Xtal/lD ~oltage(V) 4 40 34

PAL 0- 1.0 HzLL

TV SECAM 0- 1.0 LLL

NTSC4.43 4.0- 5.0 HzLL
NTSC 2.7- 3.6 HzLH
I I PAL ! 0- 1.0 ll-fz I-1*

II
I
AV

I
SECAM
NTSC4.43
NTSC I
0-
4.0 -5.0
2.7-
1.0

3.6 I
HH*
Hz
HzH*
H *

“ It dependson receivingTV system

HZ= High impedance
SIF system switching output

1. Multi system
SIF system Output pins Display

r
52 51 50 49
* S1
Auto HHH

5.5 MHZ LHLL S2

6.OMHZ LLHL S3

6.5MHz LLLH S4

4.5MHZ HLLL S5

“ The output level of pin 52 in the AUTO mode is determined by

the following condition

~
AUTO BAN 50 L
TV . AUTO B/W H
PAL 50 or 60 L
SECAM 500r60 L
NTSC4.43 50 or 60 L
NTSC 50 or 60 H
AV It maintains the condition of TV mode.

2. PX system

6.5 MHz LLLH S3

4.5 MHZ HLLL S4
‘ Same condition with Multi-system
3. Indonesia a system

SIF system Output pins Display

52 51 50 49
Auto * HLL S1
5.5 MHZ LHLL S2
4.5MHZ HLLL S3
“ Same condition with Multi-system

-17-
Training Manual AC 1Chassis
 i

L 3 system

SIF system Output pins Display

52 51 50 49
Auto LHH H S1

5.5MHZ LHLL S2

6.OMHZ LLHL S3

6.5 MHz LLL H S4

5. a) East Europe systam(ACl -A/B)

S1F system Output pins Display

52 51 50 49
Auto LHL H SI
5.5MHZ LHL L S2
6.5 MHz LLL H S3

b) East Europe system(AC1-C)

S1F system
I Output pins
I Display
52 51 50 49
Auto LHL H SI
16.5MHz ILLL HI.52 I
5.5 MHZ LHL L S3
I I I

6. No system

SIF system Output pins Display

52 51 50 49
---- LLLL No Display

7. China a svstem

S1F system Output pins Display

52 51 50 49
●
Auto LHH S1
6.5MHz LLLH S2
6.OMHZ LLHL S3
4.5MHZ HLLL S4
. Same conditionwithMultisystem
8. China b system

SIF system
I Output pins Display
52 51 50 49
●
Auto LLH S1
6.5 MHz LLLH S2
4.5MHZ I HLLL I S3 I
‘ Same condition with Multi system
9. China c system

SIF system Output pins Display

52 51 50 49
Auto LLHH SI
6.5 MHz LLLH S2
6.OMHZ I I H L w?
10. Indonesia b system

Colour system Pin 34

*
Auto
PAL L No Display
NTSC4.43 L
NTSC H

-18-
Trainitig Manual AC) Chassis
 2-10 Horiz./Vert. pulse input

The vertical and horizontal pulses from the deflection circuits are input to pins 25 and 26 in
order to synchronise the On Screen Display.
The vertical pulse is supplied from pin 20 of IC201 through the buffer and inverter circuit
(Q845 and Q837).
The horizontal pulse is supplied from pin 4 of the flyback transformer through the inverter
circuit Q836.
If one of these pulses is not supplied to the CPU, the on-screen display cannot be dis-
played.

T471
‘.-
Ul_bv 5VR883 JL--l’l FBT
/ Horiz. Hnriz
CPU 3.3k
? \
I
H-SYNC. 2f \

IC201
V-SYNC. 2! I lF/Video/Chroma
Vert.

u. u
20 V-DRIVE

Vert

I
V-Dfive pulse to V-OUTPUT IC

-19-
Training Manual AC 1Chassis
3. lF/Video/Chroma/Deflection

The following figure shows a block diagram of the lF/Video/Chroma/Deflection IC <LA7687>

peripheral circuit.

3-1 IF stage

The IF signal output from the tuner is amplified by the pre-amplifier Q1 01, then sent to the
SAW(Sutface Acoustic Wave) filter Xl 61. The output signal of the SAW filter Xl 61, is input
to pins 47 and 48. The IF signal thus input to the IC is then amplified by the IF amplifier, and
is detected by the video detector with the VCO(Voltage Controlled Oscillation) circuit con-
sisted of Xl 71 9,725 MHz oscillator and peripheral resistors, and it is output as a composite
video signal at pin 8.
This composite video signal passes through the 6. 0MHZ(l)/6.5MHz( D/K) and 4.5 MHz(M)
sound bandpass filtering circuit, and it is input into pin 1 of IC201. In the IC, this sound IF
signal passes through the SIF amplifier, FM detector and audio output circuit, and it is then
output from pin 51 as audio drive signal.

IC201 IC271
X161 lF/VIDEO/CHROMA/DEF. lH DELAYLINE

a
TUNER Q101
IF PREAMP. SAW
47 3f 113
48 37
3E 5ff
3~
X171
9.725MH
1--- 5
J#o CRT

SIF CARRIER(4.516.016 .5MHZ R-YIG-YIB-Y

1 33
............. ................. \\\

:.,.,
>

~i$:MHJ+
:5 A
8 -Y

:,,,,..,
,.,
,.,..,,.,,.,,.,,.,.
,..,,,,.,,.,.,,,.,.,,,.,.,r
32

Q261

J
~Tr%qE
~
!4.5/6.0/6.5fvll-tz!
x,,.,..,..,. ,.,,..,,,,,.,,,.
42
X242

VIDEO-OUT
+$7- I
10 41

EXT. VIDEO-IN .
14 25 ~ H-DRIVE
AUDIO-OUT
51 m
- ~ V-DRIVE
ANALOGUE BUS
20
\\ .
. 18
19 in

=-+=+-L ‘#
AUDIO
28

il
23

-20-
Training Manual ACI Chassis
 3-2 Video/Chroma stage

The composite video signal output from pin 8 of IC201, passes through the QI 84 and the
sound traps X181 (4.5 MHz), Xl 82(6. OMHZ) and Xl 83(6.5MHz) to reject the sound carrier
components, is then supplied to pin 10. The external video signal from the AV terminal is
supplied to pin 14.
The video signal input to pin 10 or 14 is separated into the luminance(Y) and chrominance
(C) signals in IC201. The chroma signal is divided into R-Y and B-Y colour difference sig-
nals, which are demodulated and output from pin 38(B-Y) and 39( R-Y). These signal pass
through the 1H delay line circuit(lC271 ), and are re-input to pins 36(B-Y) and 37( R-Y).
These R-Y/B-Y colour difference signals are supplied to the matrix circuit. The G-Y signal is
generated by this circuit.
The external RGB signals for the on-screen display or teletext display are input to pins
29(B), 30(G) and 31(R). In the IC, the internal R-Y, G-Y, B-Y signals and the external R, G,
B signals are mixed in the selection circuit driven by the blanking signal input to pin 28, and
finally output to pins 33, 34 and 35. The -Y(luminance) signal is output from pin 32.
The colour saturation, contrast, brightness, tint and sharpness controls can be controlled by
“k.
the CPU in 7 bits digital data through the analogue bus lines on pins 18 and 19.

3-3 Deflection stage

The horizontal oscillator circuit provides a 500kHz ceramic oscillator X361 connected to pin
23. The horizontal frequency is determined by dividing the frequency by a 1/32 down
counter. The horizontal drive pulse is sent from pin 25 and drives drive transistor Q431.
The flyback pulse applied to pin 26 is performed the phase-shift by integrating circuit con-
sisting of VR351 and C351, and used for the horizontal centring adjustment.
The vertical sync. is generated by counting down the horizontal oscillation. The vertical drive
pulse sent from pin 20 to pin 2 of IC501, vertical output IC<LA7837>.
This IC has the automatic selection circuit for vertical sync. signal cycle from 50Hz or 60 Hz.
It outputs the result to pin 21. If the IC selects 60 Hz, it outputs the High to the pin.

-21-
Training Manual AC I Chassis
Q. S@Ml switches (AC1-A and Acl-c chassis only)

4-1 Sound Carrier Trap Circuit

When the 4.5 MHz system is selected, the CPU outputs a “High” signal from pin 34. Q181 is
turned on and Q182 is turned off. As a result D182/Dl 84 are cut off and D181 is turned on.
The composite video signal from pin 8 of IC201 is supplied to the base of QI 83 via the
4.5 MHz trap circuit Xl 81 which removes the intercarrier sound content. From Q183 the
CVBS video signal is fed to pin 10 of IC201. When other systems are selected the compos-
ite video signal is fed through the 5.5 MHz/6 .OMHz trap Xl 82, or the 6.5 MHz trap Xl 83,
which remove the respective intercarrier sound contents. The remaining video is fed to pin
10 of IC201 via QI 83.
This switching is shown in the table below.

Video in
.—. —. —. —. —- —- —. —- —-—-—-—-—-—-
10 ~~ .\
;C181
C21O 115
1 , R193
lk ,120
r— L181
2.2k
I )

IC201
lF/Video/chrome
R196
220 i
1X184
5.5 MHZ /
:R195 ‘~
j

/’ -
Video out
—.—. ~’
R188
8

Q184

M
+ D182 D{84
R184
680
R185
680 J! Xl 82
5.516 .OMHZ
f Xl 83
1 5!
6.5 MHz

CPU R183
10k $

4
R182
27k
4 Q182
-
34
4.5 MHZ Sw
‘=I.XEE J

SIF System Pin 34 Q181 Q182 D181 D182

4.5 MHZ H On off On off
Other L off On off On

-22-
Training Manual AC I Chassis
 4-2 SIF Filtering Circuit

The video signal which also contains the SIF signal is output from pin 8 of IC201 and is sup-
plied to the base of the buffer transistor Q1 37.
The SIF signal output from Q137 is supplied to pin 1 of IC201 through the sound bandpass
filtering circuit. The relevant bandpass filters Xl 34 (4.5 MHz), Xl 33 (5.5 MHz), Xl 32
(6. OMHZ), X131 (6.5MHz) are selected according to the output signals from pins 49 to 52 of
the CPU. The SIF signal is then fed via the relevant bufferQ134 (4.5MHz), Q133 (5.5MHz),
Q132 (6. OMHZ), Q131 (6.5MHz) to the SIF input pin 1 of IC201 for de-modulation.

IC201
lfNideo Video + Sound Carrier Output h
/chroma 8
Q184
-f
SIF Filterina Circuit
Sound Carrier
SIF Input 1 4 1 Q136
Q134 X134
F
- 4.5 MHZ
II
() 11
11

T T J

J
52

q-r -/+
Q133 p J
CPU

J
II
( + X133 Q135
5 5MHZ

J
5C
Q132

II J

4+ X132
6.OMHZ
q?’ ‘

51
Q131
II
X131
6.5 MHz
“kT”

49

SIF Svstem Pin52 Pin51

T ITT
‘in 50 Pin49 Q134 Q133 Q132 Q131
Auto * H H H * On On On
5.5 MHZ L H L L Off On off off
6.OMHZ L L H L off off On Off
6.5 MHz LL L H off off Off On
4.5MHZ H L L L On Off off off
‘ It depends on receiving system,

-23-
Training Manuel AC] Chassis
5. Audio Output

The internal audio signal from pin 51 of IC201 is supplied to pin 1 of ICOO1, audio output -
LA4285, for AC1 -A and AC1 -C, LA4287 for AC1 -B. The external audio signal is supplied to pin
3 of ICOO1. Either of audio signals is selected by the Internal/External switching signal input
to pin 4.
The selected audio signal passes through the pre-amplifier circuit and the drive circuit into the
audio amplifier. The sound volume control is supplied from pin 39 of the CPU to pin 5 of ICOO1
through the digital-analogue converter circuit. The audio amplifier is the SEPP(Single Ended
Push Pull) type and the output from pin 9 drives the speaker directly.

IC201
lF/VIDEO/CHROMA

Q184 ...........................
,

8 : SOUND !
; FILTERING :
E CIRCUIT : 3
. ........... ............. (n
F w
z 2
SIF Carrier y 3
1-
1 ~ g
I HEADPHONE
I
b’ \I \( v
INT.AUDIO 4 5
51 > 1+
9 SPEAKER

> 3-0

Icool
EXT.AUDIO-IN J AUDIO OUTPUT

-24-
Training Manual AC1 Chassis
 i

6. Vertical Output

This chassis employs an LA7837 for the vertical output circuit. It incorporates a built-in ramp
generator circuit, constant vertical height function for 50/60Hz operation and pump-up cir-
cuit.
The vertical trigger pulse is driven by the negative polarity vertical sync pulse from the
IC201. The ramp generator circuit generates the vertical deflection sawtooth waveform. The
sawtooth waveform is generated by charging and discharging the current in C513 connect-
ed to pin 6. This ramp signal drives the vertical drive circuit. In the first half of scanning peri-
od, a deflecting current is sent from pin 12 and passes through the following path;
VCC(24V) + D512 + pin 13 + pin 12 + DY + C515 + R518.
An electric charge is then stored in C515. In the last half of scanning period, the current
path is; C515 -+ DY + pin 12 + pin ll(GND) + R518.
In this way, an increasing sawtooth waveform current flows directly to the DY to perform
electron beam deflection. During the first half of the blanking period, the vertical ramp signal
suddenly turns off. Since there is no longer any current flowing into the DY, the magnetic
field collapses causing an induced current to flow as flows;
DY+ pin 12+ pin 11 +R518-C515+DY.
Once the magnetic field in DY has dissipated, the current path becomes;
Vcc+pin 8+pin9+C517+ pin 13~pin 12+ DY+C515+R518
and when the prescribed current value is reached. the vertical drive pulse turns on. This
completes one cycle.
VR51 O is for controlling the amount of feedback applied to pin 4 for the vertical size adjust-
ment.

IC501
VERT. 0UTPUT<LA7837>

IC201
lF/VIDEO/DEF.
1234567891011 1213 D.Y

lrl
2( V.COIL

21 +~’3
VR51O
I jR518
V-SIZE
i ~5
.=------------ Curmnl W of firs! half uf scanning *rid
—-— Cumntff0w0fh5 thalf0f5cann*@d
t

-25-
Training Manual AC lChassis
7. Horizontal Output

The horizontal oscillator signal is output from pin 25 of IC201 and used for switching the -
drive transistor Q431. This switching signal is current amplified by the drive transformer
T431 and drives the output transistor Q432. When Q432 turns ON, an increasing current
flows directly to the DY through
C441/C442 + L441 /R441 + DY + Q432-C + Q432-E
and the deflection occurs during the last half of the scanning period. When Q432 turns OFF,
the magnetic field stored in the DY up to that point causes a resonant current to flow into
the capacitors C435 and charges them. The current stored in C435 then flows back to the
DY causing an opposite magnetic field to be stored in the DY. This field then collapses
increasing a current which switches the dumper diode in Q432 ON. The resonance state is
completed, and an increasing current then flows again directly to the DY through the
dumper diode.
By this means, the deflection in the first half of the scanning period is performed. When
Q432 turns ON at the end of the first half of the scanning period, the deflection during the
last half is begun, thus completing one cycle.

=12oovp-p

IC201
JL DY

!
: L‘
p .
.“,=
..
...
.....
.'
.L44.~
.
...
. ..".
‘:
lF/VIDEO/DEF. Q432r-—-—-—-—-— -—-—-—-—-—.,:””
................... .......... ... ..... .. .. .. ...................... :

I25 Mrl!iI L’.--?c-?c

I T431 ~.:. ] : ::
—, H COIL

~
‘-\
I H-DRIvE >

h
—
I [’ ........l............<..~

1 C441
I 1

C442
R441

J m
Q431 R435

b C437 ------------Current flow of first half

—-—
of scanning period
Current flow of Iaat half of scanning period

-26-
Training Manuaf AC1 Chassis
 8. Power Consumption Saving Circuit

This chassis employs the interval oscillation circuit on the power circuit for saving the con-
sumption of power supply circuit during the stand-by mode
The interval oscillation circuit consists of Q685, Q686, D685 and peripheral circuit. Q685
and Q686 drives the photo-coupler D615 and oscillation of power circuit according to volt-
age level on point (A) in the figure. During power-on mode, the voltage on point (A) is
almost OV and Q685 and Q686 maintain turning-off.
When the set switches into stand-by mode, the voltage on point (A) increases about 15V.
The voltage which is divided with R688 and R687 is applied to Q685-base and drives Q685
and Q686 turning-on. When Q686 turns on, the photo-diode/transistor in D61 5 is completely
turned on, then Q612 is turned on and Q613 is turned off. By this means, the oscillation of
. power circuit stops and the voltage of secondary power supply falls down. Also the voltage
of point (A) falls down from 15V gradually.
When the voltage on Q685-base is less than voltage of Q685-emitter, Q685 is turned off
and then Q686 is off, then D615 and Q612 are turned off. Finally Q613 starts the oscillation
and the voltages are supplied to the secondary circuit. By this means, the voltage on point
\ (A) rises up and drives Q685 on again. By repeating the above operation, the power con-
sumption in the stand-by mode can be saved.

I h

P
D615

-1
T611

Q684

R684
Q613 10k
Q612
To stand-by
drive circuit
R615

h
R689
22k
Q685
Oscillation stage Output stage
R688
10k R687
560k
Q686 D685
6.2V
, Zb
Power-on Stand-by
1 I.........- 15V
“>...... -_
, Voltage deviation
-—-—-—-
of point@
1
"""m""""""""""""""""""""."""."'....""."."""""...."l"""""""""""""""""""""""""""""""""""- Ov
la n

Operating period of power circuit

-27-
Training Manual AC 1Chassis
 ii

Part 2 Block Diagram of ICS

1. LA7687 <lF/Video/Chroma/Deflection>

Hh
AV-SWL5ECAM ~

4.5MHZ LA7687
l!!
5.5MHZ
i
1! -
.
ID OUT %
M-r
a-w-l<

3++<
3-ID “ ‘ I +%-l bWFIN
9.5MHZ
T Al, s-! l-l-l
A

.
An OUT ~
s
VIDEOOUT a

SOUN[
TRAP ~,%

> H tJ3,58MHz
5 “.. .. .
ACL
.+--i i-J
c
S-SW ()
3-II-J
c
S-CHROMA~ I
1
z if —
EXT-VIDEOO ,,

GND
—
Vcc 5V o--

ABL O
II
11~1 “1 I 1112-1
=
KILLER ~
I I 1 1 1

G
BUS 1 ()
HI-J
z
BUS20
4---IIJ
g
V-OUT O

50160HzO

..

,.—
u I
d

-28-
Tmining Manual AC1 Chassis
 i

2. Vertical Output <LA7837>

L THERMAL
PROTECTION

r“
VERT.
TRIGGER RAMP
GENERATOR
INPUT

i
I 1

,~
OUTPUT

ONE SHOT V-SIZE

MULTI CONTROL 4)
SWITCH
A
/ccl I VCC2 1 I \r
m

2 3 4 5 ( 7 8 9 10 11 12
m
%+ g 2
=3 m c 3
+C1. m~
>~ 0 I II
u @ ()
u
k J
s
(

c1
VCC2

3.1 H Delay Line <LC89950>

I Vss

14
B-Y
IN 5 4 BGP LC89950
OUT

+.1
CCD OUTPUT 3
CLAMP
254.5bii S&G, AMP
I
+ A A

Vdd I I 01 02 I
LEVEL
INCREASER
AUTO-BIAS
R-Y
IN
~%n CLAMP

BGP
CCD
254.5bit 4 ‘>L
OUTPUT
S&G, AMP
4
1

. .
1A
—
‘ OUT

c=
t 4 BGP
4MHZ
OUT 8 BGP 13 PIN
~
DETECTOR ~
CLOCK DRIVER
,
COMP ~
12

VCO IN PC OUT
/

-29-
Training Manual AC 1Chsssis
4. SECAM Decoder <LA7642>
Vcc VIDEO IN KIL OUT AV/SECAM 4.43 MHz IN SC IN 4.43MHz IN
o o 0 Q
~ ~ z ~
~
~
II1. o 1- — ~
0 z
1 (/2 m 1
*
2 0
J
S2’ ‘
>
+
c1
u)
~
< > G (n

14 13 12 11 9
16 15
+ T T +
PULSE
ACC SW3 + SYSTEM SN2
[,1 DET.
1 ‘“=
I I I I I

I t +
BELIJEQU BELIJEQU Swl LIM
ADJ FILTER
4
i
LA7642 PLL
KILLER Vco CLAMP
DET.

1
ID ID FIL
m--iKIL I

1 2 3[ 4 ‘5 6! 7]
, ,. 1 .. I LI . I

5. Audio Output <LA4285, LA4287>

LA4285
4---

-
p!cc 4 I GND
7
] NF
6
I
5 4 3 2
I GND
1
_ INT. AUDIO IN
Vcc
VOLUME ~ EXT.AUDIOIN
CONTROL
lNT./EXT.SW
SPL4KER
Di k
7)7

-30-
Training Manual AC I Chassis
MEMO:

-31-
Training Manual AC] Chassis
 Part 3 Trouble Shooting Chart

Common startpoint Chassis Series: AC1

I I
Dead
1
~
I 1
‘age’’-”

No picture/No sound * Page 36-37

No picture-sound OK * Page 38

I I I
No sound-picture OK
I
~
I I
‘age”

No colour > Page 40

Incorrect colour phase w Page 41

No vertical deflection * Page 42

No on-screen display * Page 43

-32-
Training Manual AC 1 Chassis
 Trouble Shooting Chart Startpoint symptom: Dead

Check power primary circuit,

C601 , C602, VA601 , PS601 ,
No C607, Q611 , Q612, Q613, C615,
Is the fuse OK ? * R626, D615,
Secondary circuit, Q631, C641,
I
Yes R635, VR631 , D641 , Q432,
C435, C436, R636
-1

Check voltage on both ends of AC cord, SW601, F601, L601,

C607 ? R602
F
L

I
+300V

Q611 , Q612, Q613, C617, R620,

R621 , R622, D625, C616, R624,
Check voltage on pin 1 of IC651 ? D634, C644, C643, C645, D641 ,
+ ICOO1, CO07, T611 ,L603, L606,
+15V Q686, Q685, D685

t
No 1(3651, C651 , IC801 , IC802,
Is the power LED lighting ? > C815, C816, C801 , C828, C81O,
I , I I C809 I
Yes

Check voltage(+24V) on Q683- Ov

L * D633, R643
emitter
1
+24V

Check voltage(+l 30V) on both Ov

● - C641 , D631
ends of C641

+130V or more

F---- t ---------- ------ -------------- 1

i

~ Go to next page
1
I I
L ------- ------- -------------- ------- J

-33-
Training Manual AC 1Chassis
 i

Trouble Shooting Chart Startpoint symptom: Dead

1 Disconnect error detector diodes, D646, r ---------------------------

:’ To avoid the damage to the other circuits,
------ -- 1
:
D654, D655, D455, D492, D201 and transis- : please turn TV set on for 2-3 seconds for :
i
tor Q527, Q449 ~ checking
L --------------------------- ------ -- J
I
Check follows

*
Yes Check vertical deflection circuit,
Does a horizontal line appear on
* IC501 , Q527, R518, C515, C524,
the screen ?
C517, C520, D507, DY
1
No

t
Ov
R855, C855, IC801 and check
Check voltage on pin 41 of IC801
error detection lines

Check voltage(+24V) on Q683-col- Ov Q683, R683, Q682, R681 ,

Iector * IC501 , C521

+24V

v
Check voltage(+l 5V) on Q684-col- Ov
* Q684, R685, D683.
Iector

+15V

,
+Ov Short circuit on 12V line, check
Check voltage(+l 2V) on Q652-
emitter ~ Q652, R652, R653, D652, C652,
C654, C510, C106, C119, IC501,
+12V tuner

+ Short c wit on 7.8V line, check

Check voltage(+7.8V) on Q653- ‘es Q653, W356, D653, C653, C655,
emitter w R654, R655, IC201 , c130, C139,

L_____ -_---- _--. --------------------i

-34-
~rai .,ing Manual AC I Chassis
 i

Trouble Shooting Chart Startpoint symptom: Dead

v
m
Horiz. IV
El No
Check waveform on pin 25 of
w IC201 , X361 , R365
IC201

Check waveform on Q431 -collector D

No Horiz. output circuit, Q432, C435,

Is the CRT heater coil lighting ? ~ R435, R442, L441 , T471 , T431 ,
DY, R451

Check voltage on terminal KQS-1 C429, D491 , C491

+
180V

Check voltage on both ends of

C445, D442, R448
C445 +

1
+5 to +1OV

Q449, R449, R446, R447

-35-
Training Manual ACIChassis
 ii

Trouble Shooting Chart Startpoint symptom: No picture/No sound

.----------- ------------ ------ --- q

Nc) ~
Is CRT heater lighting ? >: Go to chapter “Dead” on page 33 I
I I
I
I L ------- ------- ------- ------- ----- J

Yes

v
Is video signal observed on Q1 83-
base ?
❑ A
Horlz. 1.5V
Yes
~ IC201 , Q183, SW191 , R192,
R190, C21O

No

v 1.5El
Is video signal observed on Q1 84- Yes Q1 83, R196, sound trap circuit,
emitter ? w X181, X182, X183, D181-D184,
R188 etc.

I Iiclrizl.,v I yes -
Is video signal observed on pin 8 of
* Q184, R197
IC201 ?
1 r
I L I
No

Check voltage(+33V) on both ends Ov

- R816, D801 , C829
of D801

+33V

Is tuning voltage changing on termi- No Check tuning circuit, IC801,

>
nal TU on the tuner when tuning ? Q813, R811 , R81O, C805, C806,
R813, R814, C803, C802, R809,
Yes OV to +33V R106, C102, L802, R813

r ----b-- -------------- --------------

1

I Go to next page ~1
I I
I
L ------- ------- ------- ------- ------- i

-36-
Trsining Manual AC1 Chassis
 i

Trouble Shooting Chart Startpoint symptom: No picture/No sound

t
Is supply voltage (+12V) observed No VL: Q1 03, R896, Cl 05
on terminal LB, HB, U on the tuner * VH: QI04, R897, C103
correctly ? U: QI05, R898, C101
. IC801
I
t
Yes

O or +12V
Check AGC voltage on terminal
w C104, R164, R165, C108, C168
AGC on the tuner

+3V to +6V

L Y
Check aerial cable, tuner and IF
peripheral circuit, IC201, Q1 01,
X161, X171, C162, C197

OR

Memorv circuit
IC802, R801 , R802, R807, R808,
R867, R868
AFT circuit
R177, C177, R176, R175
Video detection circuit
X171, R174, C176, R173, R170,
C175, C172, C178
Ident. circuit to CPU
C858, R858, R859, IC201
TV/AV switch circuit
R171 , R815, IC801

-37-
Training Manual AC lChassis
 i

Trouble Shooting Chart Startpoint symptom: No picture-sound OK

Is -Y signal observed on pin 32 of

F 1--’--1
Horiz. 8V
No IC201, L241, C211, R211, R222,
IC201 ? R224, C222

‘WI
~ Holiz. 8V
El No
Is -Y signal observed on Q261 - Q261 , R232, R263, D232, Q252,
emitter ? Q251 , D251

L731, C731, screen circuit, T471

-38-
Training Manual AC] Chassis
Trouble Shooting Chart Startpoint symptom: No sound-picture OK

+5V
Check voltage on pin 42 of IC801 - Q806, IC201 , R871

I
t
Ov

Ov
Check voltage on pin 46 of IC801 b R859, R858, C858, IC201 , IC801

+5V

w
Check voltage on pin 5 of ICOO1 ‘v C822 C823 R851, R852, R885,
when the maximum volume setting
H,c801’c824L848
+6V

El
m0.5V
‘es Speakers, headphone socket,
II Check waveform

1
on pin 9 of ICOO1
I
*
I
CO05, CO06

I No

El
m
0.5V
Check waveform on pin 51 of ‘es ICOO1, Q016, COO1, C016, C172,
IC201 w R1 66, CO04, CO03, R016

No

Check SIF filterincl circuit

No sound on all of systems --> Check
circuit
No sound on 6.5 MHz system--> Check
No sound on 6.OMHZ system --> Check
No sound on 4.5 MHz system --> Check
C171, R152, Q137, L132, R151, C147 peripheral
Q1 35, Q1 31, R832, Xl 31, C131 peripheral circuit
QI 35, Q1 32, R833, Xl 32, Cl 32 peripheral circuit
Q1 36, Q134, R835, X134, C134 peripheral circuit

“39-
Training Manual ACIChassis
Trouble Shooting Chart Startpoint symptom: No colour

Yes
No colour on NTSC system *

No colour on PAL system X241 , IC201

&

‘es SECAM decoder peripheral cir-

No colour on SECAM system
- cuit, IC281, C281, C283, C884,
I C285, C286, C287, C288, Q281
No colour on all of systems 1

v
T471 , R351 , R352, R353, D352,
R354

-?

-40-
Training Manual AC] Chassis
 i

Trouble Shooting Chart Startpoint symptom: Incorrect colour phase

Incorrect colour phase

Q711, R71 2A, VR711 VR712,

Excessive red colour ●
C712, R711

Loss or poor red colour Q711, VR712, VR711 , R235,

w R714
L’

Q721 , R721 , R722, C722,

Excessive green colour
- VR721

Loss or poor green colour * Q721 , VR721 , R724, R233

L Q701 , R701 A, R702A, VR701 ,

Excessive blue colour
w VR702, C702

Q701 , VR701 , VR702, R704,

& Loss or poor blue colour
w R234

IC271 peripheral circuit

Incorrect colour phase D C271 , C273, C274, C237, C236,
C278, C289

-41-
Training Manual ACIChassis
 i

Trouble Shooting Cnart Startpoint symptom: No vertical deflection

Ov
Check voltage on pin 13 of IC501 w L511, D512

Vert. IV

Check waveform on pin 6 of IC501 IC501 , IC201 , C512, C513, D513,

A R512, C511, R511, SW191

Yes

R513, C515, C518, R518, C524,

DY

Q526, VR51 O, R525, R514,

Compressed or expanded vertical
> R515, R522, C514, R516, C513,
screen size
R526
.

-42-
Training Manual AC1 Chassis
 i

Trouble Shooting Charl Startpoint symptom: No on-screen display

II No on-screen display

11.ru
Check waveform on pin 26 of
IC801
1 ‘ “~
Yes

1
Check waveform on pin 25 of
IC801
•I Veft. 5V

‘0 w Q837, R837, R838, C819, Q839,

R846, Q845

Yes

IC801 , C812, C813, L804, R228

-43-
TrainingManualACIChessis
 s!ifgwwo
TRAINING MANUAL AC1 SANYO Electric Co., Ltd.

Al 4800/Jun.96/500/Sl
Training Manual ACI Chassis