DEPARTMENT OF INFORMATION AND COMMUNICATION TECHNOLOGY

COURSE WORK ASSESSMENT

CODE & COURSE : DFC 2053 – COMPUTER SYSTEM ARCHITECTURE

CLO : CLO 1 - explain effectively computer function, input/output

and central processing unit in computer system
DURATION : 2 HOURS

Instruction(s): Answer all questions.

Activity 1
Activity Outcome: Explain the computer functions and interconnections.

1. Have you ever wondered what the inside of computer really looks like? Draw a block diagram
to illustrate the basic organization of computer system and describe the functions for each
unit.

2. A bus is a communication pathway connecting two or more device. Describe the concept of
interconnection within a computer system as follows :
a. Draw interconnection structures
b. Describe the functions for each bus
 DEPARTMENT OF INFORMATION AND COMMUNICATION TECHNOLOGY

COURSE WORK ASSESSMENT

CODE & COURSE : DFC 2053– COMPUTER SYSTEM ARCHITECTURE

CLO : CLO 1 - explain effectively computer function, input/output

and central processing unit in computer system
DURATION : 2 HOURS

Instruction(s): Answer all questions.

Activity 2
Activity Outcome: Understand the concept of cache memory.

1. There are three techniques used in cache memory mapping. Briefly draw and describe of
each techniques.

i) Direct
ii) Associative
iii) Set Associative
 DEPARTMENT OF INFORMATION AND COMMUNICATION TECHNOLOGY

COURSE WORK ASSESSMENT

CODE & COURSE : DFC 2053– COMPUTER SYSTEM ARCHITECTURE

CLO : CLO 1 - explain effectively computer function, input/output

and central processing unit in computer system
DURATION : 2 HOURS

Instruction(s): Answer all questions.

Activity 3
Activity Outcome: Understand Input / Output in computer system.

1. Draw the I/O Module Diagram and explain how it works.

2. Describe the I/O bus and interface modules
 DEPARTMENT OF INFORMATION AND COMMUNICATION TECHNOLOGY

COURSE WORK ASSESSMENT

CODE & COURSE : DFC 2053– COMPUTER SYSTEM ARCHITECTURE

CLO : CLO 2 - apply appropriate method to solve arithmetic problem

in numbering system and sequential logic circuit.
DURATION : 2 HOURS

Instruction(s): Answer all questions.

Activity 4
Activity Outcome: Understand data representation on CPU.

1. Perform arithmetic operations (additional and subtraction) in different number base.

i) Perform the following additional in the binary number system.

a) 1101101 + 1010 b) 1001 + 111
c) 1100 + 101 d) 111 + 1011

ii) Perform the following subtractions in the binary number system.

a) 1101 - 110 b) 1100 - 101
c) 1001 – 11 d) 101 - 10

2. Convert decimal, binary, octal and hexadecimal numbers to different bases and vice-
versa.

i) Convert each of the following binary numbers into its equivalent in the octal and
hexadecimal.
a) 11102 b) 1010110102
c) 10100010112 d) 111001001102

ii) Convert each of the following octal numbers into its equivalent in the binary number.
a) 378 b) 7248
c) 618 d) 458

iii) Convert each of the following hexadecimal numbers into its equivalent in the binary
number.
a) 1C16 b) F216
c) 450 16 d) 8EA16
 DEPARTMENT OF INFORMATION AND COMMUNICATION TECHNOLOGY

COURSE WORK ASSESSMENT

CODE & COURSE : DFC 2053– COMPUTER SYSTEM ARCHITECTURE

CLO : CLO 2 - apply appropriate method to solve arithmetic problem

in numbering system and sequential logic circuit.
DURATION : 2 HOURS

Instruction(s): Answer all questions.

Activity 5
Activity Outcome: Perform operations with Boolean algebra.

1. Draw symbols and develop truth tables of each given Logic Gates below.
(a) NOT
(b) AND
(c) OR
(d) NOR
(e) NAND
(f) Exclusive NOR
(g) Exclusive OR

2. Discuss and propose effective ways that can help you to memorize the truth table of:
(a) AND
(b) OR
(c) NAND
(d) NOR
 DEPARTMENT OF INFORMATION AND COMMUNICATION TECHNOLOGY

COURSE WORK ASSESSMENT

CODE & COURSE : DFC 2053– COMPUTER SYSTEM ARCHITECTURE

CLO : CLO 2 - apply appropriate method to solve arithmetic problem

in numbering system and sequential logic circuit.
DURATION : 2 HOURS

Instruction(s): Answer all questions.

Activity 5
Activity Outcome: Build sequential logic circuit.

1. Draw the logic symbols and develop truth tables of each given flip flop below.
a) SR
b) Clocked SR
c) JK
d) T
e) D

3. Draw the timing diagram of JK, Clocked SR, T and D flip-flop

CLK

Q
CLK

CLK

CLK

Q
 DEPARTMENT OF INFORMATION AND COMMUNICATION TECHNOLOGY
COURSE WORK ASSESSMENT

CODE & COURSE : DFC 2053– COMPUTER SYSTEM ARCHITECTURE

CLO : CLO 3 - Construct a simple program in assembly language to

perform given tasks.
DURATION : 2 HOURS

Instruction(s): Answer all questions.

Activity 6
Activity Outcome: Apply assembly language

1. Complete the table below:

Bits of Data size Postfix Sample instruction Underline the affected

operation Hex Digit

32 Longword HHHH HHHH

16 MOVE.W HHHH HHHH

8 .B HHHH HHHH
 2. State the value of D1 and D2 after execution for each line

1. MOVE.B #3, D1 D1=?

2. ADD.B #5, D1 D1=?

3. MOVE.W #512, D2 D2=?

4. ADD.W D1,D2 D1=? D2=?

3. Given the value D1=0000CAFE and D2 = FFFF1222

i. Calculate the value OR.B D2,D1
ii. Calculate the value of NOT.W D2

4. Given the value D1 = ABBBBB12 AND D2=ACCC1251

i. Calculate the value AND.B D2,D1
ii. Calculate the value MOVE.W D1,D2
 DEPARTMENT OF INFORMATION AND COMMUNICATION TECHNOLOGY
COURSE WORK ASSESSMENT

CODE & COURSE : DFC 2053– COMPUTER SYSTEM ARCHITECTURE

CLO : CLO 3 - Construct a simple program in assembly language to

perform given tasks.
DURATION : 2 HOURS

Activity 7
Activity Outcome: Apply assembly language

1. Identify the type of addressing mode in the following instruction.

a. MOVE.B #8,D3
b. MOVE.W D3,(A1)
c. MOVE.W $1900,D2
d. MOVE.L D1, D0

2. Rewrite the following statement to an instruction format

a. Sub a data in data register D1 and D2 in word size
b. Add a data in address register A1 and D3 in word size
c. Move a binary data 101 into data register D1 in byte size
d. Move a decimal data 512 into data register D2 in word size
e. Move a binary data 101 into data register D1 in byte size
f. Set the starting address $1000
 DEPARTMENT OF INFORMATION AND COMMUNICATION TECHNOLOGY

COURSE WORK ASSESSMENT

CODE & COURSE : DFC 2053– COMPUTER SYSTEM ARCHITECTURE

CLO : CLO 3 - Construct a simple program in assembly language to

perform given tasks.
DURATION : 2 HOURS

Instruction(s): Answer all questions.

Activity 8
Activity Outcome: Apply assembly language

1. Given the value, D1 = 0000 FFFE and D2 = ABCD 1234.

a) Calculate the value of OR.B D2, D1
b) Calculate the value of ADD.W D2,D1

2. Write a programme using Assemble language to solve the operation below and show the
destination:
a) (BACA16 – 123416) + (NOT ADA16 AND 8716)
b) (10010 AND 2010) + (1010 / A16) + NOT FFFF16

3. Write comment in the below table.

SYNTAX COMMENT
ORG $6000
MOVE.L #$FFFF 1234, D0
MOVE.B (A1), D1
ADD.W D2, D1
MULU.W #$5D, DO
NOT.W D2
RTS
 DEPARTMENT OF INFORMATION AND COMMUNICATION TECHNOLOGY
COURSE WORK ASSESSMENT

CODE & COURSE : DFC 2053– COMPUTER SYSTEM ARCHITECTURE

CLO : CLO 1 - explain effectively computer function, input/output

and central processing unit in computer system
DURATION : 2 HOURS

Instruction(s): Answer all questions.

Activity 9
Activity Outcome: Understand the Central Processing Unit (CPU).

1. Draw and describe block diagram for the major component of CPU

2. Solve the equation and draw the stack using Reverse Polish Notation

a) 2+3+4

b) (2+3)*4

c) 2*(5+2*3)

d) (3+4)*(20-(3*4+2))

e) 5*(3+4)-(2*(2+2*(1+2)))