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A B C D E

PCB LAYER
CPU Thermal
MAX6509 31 Skylark II - SC
CLK GEN.
Mobile CPU IMVP IV Project Code : 91.47I01.001
L1:COMPONENT
(INTERSIL) L2:GND
ICS ITP Dothan ISL621838
04. 21.~ 2004-SA L3:SIGNAL1
4
950810CG 3
pull-H/L 05. 23.~ 2004-SB 4

4
5,6 06. 29.~ 2004-SC L4:VCC
L5:SIGNAL2
HOST BUS 400MHz
L6:SIGNAL3
RGB CRT
DDR SDRAM CONN13 L7:GND
200/266 MHZ
SO-DIMM*2
Montara-GM L8:COMPONENT
10,11,12
(855GM) LVDS LCD
14
DC/DC&CHARGER
7,8,9
Switching Power
USB
MDC MAX1999/MAX1909
(Bluetooth) HUB I/F 66MHz Power Switchs PCMCA INPUTS OUTPUTS
3 24 TSP2220 SLOT*1 3

AC-LINK PCI7420 (TI) 21 21 DCBATOUT 5V_S5

Cardbus+1394 3D3V_S5

MIC IN (TI) 5V_S3


AC'97 1394
CONN*1 3D3V_S3
CODEC
ICH4-M
19,20
PCI BUS 21 1D5V_S5
ALC655 5V_S0
(REALTEK) 25
LAN TXFM
3D3V_S0

RTL8100CL (LANCOM)
LF-H80P23 RJ45
VCC_IO_S0
(REALTEK) 22 PAGE:34,36,37
AD+ BT+
RJ1123
Line Out 15,16,17
PAGE: 39

OP AMP MiniPCI CPU DC/DC


802.11a/b Switching Power
G1421B ATA100 18

2
(GMT) 26 ISL6218 38 2
USB INPUTS OUTPUTS
USB*224
DCBATOUT VCC_CORE_S0
LPC BUS CPU_CORE_S0
HDD
28

SPEAKER NS SIO KBC FWH OTHER DC/DC


MAX1845
26
PC87392 M38857M8 49LF004A 35,37

(NS) (MITSUBISHI) (SST) INPUTS OUTPUTS


29 33 32
DCBATOUT 2D5V_S3
1D5V_S0
LPC 1D25V_S0

FIR G768D(GMT) DEBUG 1D2V_S0


Van Cntl TOUCH CONN.
1
TFDU6102
(VISHAY)30 Temp PAD 33 INT KB 32
VCC_IO_S0
1
31 33
Sensor
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Port Replicator (100 PIN) Taipei Hsien 221, Taiwan, R.O.C.
Title
SEARIAL Block Diagram
AC IN RJ45 PORT CRT PRINTER USB*2 PS2 MIC LINE IN LINE OUT 27 Size
A3
Document Number Rev

Skylark II SC
Date: Tuesday, July 20, 2004 Sheet 1 of 42
A B C D E
A B C D E

4 4

S5 S3 S0
5V_S0 5V_S0 13,14,16,17,18,21,24,25,26,27,28,29,31,32,33,37,38,39,42
5V_S5 5V_S5 14,17,35,37,41,42 5V_S3 5V_S3 33,36,37,41
3D3V_S0 3D3V_S0 3,4,5,7,8,9,10,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,30,31,32,33,37,38,39,42
3D3V_S5 3D3V_S5 15,16,17,25,28,31,33,35,37,38 3D3V_S3 3D3V_S3 14,25,27,33,37,42
1D5V_S0 1D5V_S0 5,8,9,15,17,32,37,38
1D5V_S5 1D5V_S5 17,37,38 2D5V_S3 2D5V_S3 7,9,10,11,36,37,38,42
1D25V_S0 1D25V_S0 11,12,38
VCC_RTC_S5 VCC_RTC_S5 16 1D25V_DDRVREF_S3 1D25V_DDRVREF_S3 7,10,36,38
1D2V_S0 1D2V_S0 7,9,36,38

VCC_CORE_S0 VCC_CORE_S0 6,39

VCC_IO_S0 VCC_IO_S0 4,5,6,7,9,16,17,29,38,39

1D5V_VCCA_S0 1D5V_VCCA_S0 5

AC-IN / BAT.-IN LAN-AC 5V_G768_S0 5V_G768_S0 31

AD+ AD+ 37,40,42 1D5V_LAN_S5AC 1D5V_LAN_S5AC 17,37

DCBATOUT DCBATOUT 14,20,35,36,37,38,39,40,41,42 3D3V_LAN_S5AC 3D3V_LAN_S5AC 17,18,22,23,24,37 5VA_S0 5VA_S0 25,26,42


AUDIO
3
AUD_VREF_S0 AUD_VREF_S0 26 3

LCD_DCBAT LCD_DCBAT 14
3D3V_LCD_S0 3D3V_LCD_S0 14 LCD

CRT_VCC_S0 CRT_VCC_S0 13 CRT

OTHERS
5V_AUX 5V_AUX 28,31,35,38,41

3D3V_AUX 3D3V_AUX 16,31,35

UP+5V UP+5V 31,35,40,41

BT+ BT+ 40,41,42

3D3V_RTC 3D3V_RTC 16

2 ICH_VBIAS ICH_VBIAS 16 2

MAX1999_REF MAX1999_REF 35,38

MAX1909_LDO MAX1909_LDO 40

MAX1999_VCC MAX1999_VCC 35

OP+5V OP+5V 25,26

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Table of Content
Size Document Number Rev
A3 SC
Date: Tuesday, July 20, 2004
Skylark
Sheet
II2 of 42
A B C D E
A B C D E

3D3V_S0 3D3V_S0
3D3V_S0
R457
1 2 3D3V_CLKGEN_S0 1 R388 2 3D3V_48MPWR_S0 3D3V_APWR_S0 1 R387 2
0R3-U 0R3-U

1
0R3-U BC209
BC222 BC35 BC45 BC33 BC44 BC46 BC203 BC50 SCD1U16V BC170 BC173 BC36 BC183 BC177 BC169
SC4D7U10V5ZY SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SC4D7U10V5ZY SCD1U16V SCD1U16V SCD1U16V SCD01U25V2KX SC4D7U10V5ZY

2
PLACE NEAR EACH PIN
PLACE NEAR EACH PIN PLACE NEAR EACH PIN
4 4

RN67 SRN33-2-U2
CLK_CPU 5
U52 1 4 R4551 2 42D2R3F
3D3V_CLKGEN_S0 2 3 R4541 2 42D2R3F
8 52 CLK_CPU_1
VDDPCI CPUCLKT0 CLK_CPU# 5
14 51 CLK_CPU#_1 RN65 SRN33-2-U2
VDDPCI CPUCLKC0 CLK_MCH 7

CK-408
1 4 R4471 2 42D2R3F
50 49 CLK_MCH_1 2 3 R4421 2 42D2R3F
VDDCPU CPUCLKT1 CLK_MCH#_1 ZZ.R0034.1D1
46 48

V1.1
VDDCPU CPUCLKC1 CLK_MCH# 7
RN64 SRN33-2-U2 R433 1 2 DY-0R2-0 CLK_ITP_CPU 5
3D3V_APWR_S0 26 45 CLK_ITP_R_1 1 4 CLK_ITP_R R443 1 2 0R2-0
VDDA CPUCLKT2 CLK_ITP 4
3D3V_48MPWR_S0 37 44 CLK_ITP#_R_1 2 3 CLK_ITP#_R R415 1 2 0R2-0
VDD48 CPUCLKC2 CLK_ITP# 4
32 R416 1 2 DY-0R2-0
VDD3V66 CLK_ITP_CPU# 5
19 ZZ.R0034.1D1
VDD3V66 CKG_FS1 R426 1
1 55 2 42D2R3F
VDDREF FS1 CKG_FS0 R425 1
54 2 42D2R3F
FS0
R450 3D3V_S0
16 CLKPCIF_ICH 1 2 33R2 CLKPCIF_ICH_1 5 SB
TPAD30 TP33 PCICLK_F0 Free running ** CLK48_ICH_1 R424 1
R446 6 39 2 22R2 CLK48_ICH 15
PCICLK_F1 * 48MHZ_USB/FS2
22 PCLK_LAN 1 2 33R2 TPAD30 TP34 7 38 CLK48_DREF_GMCH_1 R423 1 2 33R2 CLK48_DREF_GMCH 8
ASEL/PCICLK_F2 48MHZ_DOT

1
R440
1 2 33R2 ** 35 CARDBUS_CLK48 R414 1 2 33R2 R172
33 PCLK_KBC 3V66_1/VCH_CLK/FS3 CLK48_DOT 19
R439 PCLK_LAN_1 10 33 CLK66_DREF_GMCH_1 R413 1 2 33R2 10KR2
PCICLK0 CLK66_DREF_GMCH 8
3 1 2 33R2 PCLK_KBC_1 11 ** ** 3V66_0/FS4 3
29 PCLK_SIO E_PCICLK1/PCICLK1
PCLK_SIO_1 12

2
PCICLK2 ** *
32 PCLK_FWH 1 R441 2 33R2 PCLK_FWH_1 13 43 CK-408_MULT0
E_PCICLK3/PCICLK3 * MULTSEL
19 PCLK_CBUS 1 2 33R2 PCLK_CBUS_1 16 53 PM_STPCPU# 16
PCICLK4 *CPU_STOP#

1
R431 PCLK_MINI_1 17 40 TP71
LPC_DB_PCICLK_1 PCICLK5 *PWRSAVE# TPAD30
R432 18 34 PM_STPPCI# 16
PCICLK6 PCI_STOP#
18 PCLK_MINI 1 2 33R2 R166
R420 42 2 R165 1 475R3F DUMMY-R3
IREF
32 LPC_DB_PCICLK 1 2 33R2 TPAD30 TP24 21 56 R465
CLK66_GMCH_1 3V66_2 REF CLK14_ICH_1 33R2 1
22 2 CLK14_ICH 16

2
3V66_3
8 CLK66_GMCH 1 R422 2 47R2 23 R458
3V66_4 33R2 1
R421 SB 24
3V66_5
2 CLK14_SIO 29
15 CLK66_ICH 1 2 33R2 CLK66_ICH_1 TPAD30 TP68 4
* GND
16 PM_SLP_S1# 25 9
SMBD_ICH PD# GND
10,14,16 SMBD_ICH 29 15
SDATA GND
10,14,16 SMBC_ICH SMBC_ICH 30
SCLK GND
20 Place close These two traces must
39 VTT_PWRGD# 28 27
VTT_PWRGD# GND
47 to CLK GEN be equal length
GND
BC54 41
CK-408_GEN_X1 GND
2 36
X1 GND
3 31
DY-SC10P50V2JN-1 X2 GND
2

ZZ.10034.1F1
X1 ICS950810CG
X-14D318MHZ-1-U1 SB_1
* These inputs have 120K internal pull-up resistor to VDD
1

BC55 CPU & MEMORY Freq. Selection


CK-408_GEN_X2
** Internal pull-down resistors to ground
2 2
DY-SC10P50V2JN-1 3D3V_S0
ZZ.10034.1F1

No stuff:

1
caps are Frequency Setting

1
internal to R453 R451 CPU AGP PCI
CK-TITAN. 1KR2 DUMMY-R3 FS1/0 = 00 66.66MHz 66.67MHz 33.33MHz
FS1/0 = 01 100.00MHz 66.67MHz 33.33MHz

2
FS1/0 = 11 133.33MHz 66.67MHz 33.33MHz
CKG_FS1 FS1/0 = 10 200.00MHz 66.67MHz 33.33MHz
CKG_FS0

1
FS2 = 0 unbuffer mode (disable 66MHz-IN)
R186
R452 1KR2 FS2 = 1 buffer mode
DUMMY-R3
Mult0 = 0 Rr=221,Iref=5mA

2
2
=>Vswing=1.0V@50ohm
Mult0 = 1 Rr=475,Iref=2.32mA
=>Vswing=0.7V@50ohm

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Clock GEN/ICS950810CG
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 3 of 42

A B C D E
A B C D E

4 4

ITP Debug Pad

VCC_IO_S0 VCC_IO_S0

CPU ITP Conn.

1
R501 R212 R213 R499
150R2
54D9R3F 54D9R3F 39D2R3F
TPAD30 TP64

2
R482 1 2 0R2-0 TDI_FLEX TPAD30 TP50
5 H_TDI
5 H_TMS R214 1 2 0R2-0 TMS_FLEX TPAD30 TP53
R209 1 2 0R2-0 TRST_FLEX TPAD30 TP49 TCK(PIN 5)
5 H_TRST#
R207 1 2 0R2-0 TCK_FLEX TPAD30 TP47
3 5 H_TCK R211 3
1 2 TDO_FLEX TPAD30 TP51
5 H_TDO 22D6R3F TPAD30 TP69
3 CLK_ITP# CLK_ITP# TCK(PIN A13)
CLK_ITP TPAD30 TP72
3 CLK_ITP
R483 H_TCK TPAD30 TP46
GTL_CPURST# 1 2 RESET_FLEX# TPAD30 TP54 FBO(PIN 11)
5,7 GTL_CPURST# 22D6R3F TPAD30 TP55
5 H_BPM5_PREQ#
1
TPAD30 TP52
5 H_BPM4_PRDY#
R208 TPAD30 TP57
27D4R3F 5 H_BPM3_ITP#
TPAD30 TP56
2

5 H_BPM2_ITP#
Should place near conn.
3D3V_S0 TPAD30 TP58
5 H_BPM1_ITP#
TPAD30 TP59
1 5 H_BPM0_ITP#
R215 TPAD30 TP61
150R2 VCC_IO_S0 TPAD30 TP62
TPAD30 TP63
2

1
TPAD30 TP60
5 ITP_DBRESET# C148
SCD1U10V2MX-1

2
2 2

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
ITP
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 4 of 42

A B C D E
A B C D E

7 GTL_D#[15..0] U26C
GTL_D#[47..32] 7
GTL_D#15 C25 Y25 GTL_D#47
D15# D47#
GTL_D#14 E23 AA26 GTL_D#46
1D5V_VCCA_S0 D14# D46#
For CPU VCCA[0:3] PLL GTL_D#13 B23 Y23 GTL_D#45
D13# D45#
GTL_D#12 C26 V26 GTL_D#44
place one 0.01u & 10u for GTL_D#11 E24
D12# D44#
U25 GTL_D#43
D11# D43#
each VCCA pin GTL_D#10 D24
D10# D42#
V24 GTL_D#42
GTL_D#9 B24 U26 GTL_D#41
D9# D41#
SC10U6D3V5ZY

SC10U6D3V5ZY

SC10U6D3V5ZY

SC10U6D3V5ZY
C20 AA23 GTL_D#40

SCD1U10V2MX-1

SCD1U10V2MX-1

SCD1U10V2MX-1

SCD1U10V2MX-1
GTL_D#8
D8# D40#
1

1
GTL_D#7 B20 R23 GTL_D#39
BC74 BC56 BC29 BC57 BC47 BC75 BC58 BC30 D7# D39#
GTL_D#6 A21 R26 GTL_D#38
D6# D38#
4 GTL_D#5 B26 R24 GTL_D#37 4
2

2
D5# D37#
GTL_D#4 A24 V23 GTL_D#36
D4# D36#
GTL_D#3 B21 U23 GTL_D#35
D3# D35#
GTL_D#2 A22 T25 GTL_D#34
D2# D34#
GTL_D#1 A25 AA24 GTL_D#33
D1# D33#
GTL_D#0 A19 Y26 GTL_D#32
D0# D32#
Layout note: DINV2#
T24 GTL_DINV#2 7
D25 W25
U26D COMP0 and COMP2 need to 7 GTL_DINV#0
C23
DINV0# DSTBN2#
W24
GTL_DSTBN#2 7
7 GTL_DSTBN#0 DSTBN0# DSTBP2# GTL_DSTBP#2 7
be Zo=27.4ohm traces. 7 GTL_DSTBP#0 C22
DSTBP0#
B15 C9 H_BPM3_ITP#
3 CLK_CPU
3 CLK_CPU# B14
BCLK0 BPM3#
A9 H_BPM2_ITP#
H_BPM3_ITP#
H_BPM2_ITP#
4
4
COMP1 and COMP3 should be 7 GTL_D#[31..16]
GTL_D#31 K25 AF26 GTL_D#63
GTL_D#[63..48] 7
BCLK1 BPM2# D31# D63# GTL_D#62
3 CLK_ITP_CPU
A16
A15
ITP_CLK0 BPM1#
B8
C8
H_BPM1_ITP#
H_BPM0_ITP#
H_BPM1_ITP# 4 routed asx Zo=55ohm, GTL_D#30
GTL_D#29
N25
H26
D30# D62#
AF22
AF25 GTL_D#61
3 CLK_ITP_CPU# H_BPM0_ITP# 4
ITP_CLK1 BPM0# traces shorter than 0.5". GTL_D#28 M25
D29#
D28#
D61#
D60#
AD21 GTL_D#60
C2 AB1 R156 1 2 54D9R3F GTL_D#27 N24 AE21 GTL_D#59
16 CC_A20M# A20M# COMP3 VCC_IO_S0 D27# D59#
CC_FERR# D3 AB2 27D4-1 1 2 27D4R3F R155 GTL_D#26 L26 AF20 GTL_D#58
16 CC_FERR# FERR# COMP2 D26# D58#
A3 P26 R168 1 2 54D9R3F GTL_D#25 J25 AD24 GTL_D#57
16 CC_IGNNE# IGNNE# COMP1 D25# D57#
P25 27D4-2 1 2 27D4R3F R167 GTL_D#24 M23 AF23 GTL_D#56
COMP0 D24# D56#

1
GTL_D#23 J23 AE22 GTL_D#55
R128 D23# D55# GTL_D#54
B7 CC_DPSLP# 7,16,29 GTL_D#22 G24 AD23
DPSLP# 1KR3F D22# D54# GTL_D#53
16 CC_INTR D1 GTL_D#21 F25 AC25
LINT0 D21# D53# GTL_D#52
16 CC_NMI D4 AC1 GTL_D#20 H24 AC22
LINT1 GTLREF3 D20# D52# GTL_D#51
G1 GTL_D#19 M26 AC20

2
GTLREF2 D19# D51# GTL_D#50
16 CC_SMI# B4
SMI# GTLREF1
E26 Voltage divider placed GTL_D#18 L23
D18# D50#
AB24
C6 AD26 H_GTLREF_0 GTL_D#17 G25 AC23 GTL_D#49
16 CC_STPCLK# STPCLK# GTLREF0 within 0.5" of CPU pin D17# D49# GTL_D#48
GTL_D#16 H23 AB25
D16# D48#

1
AC26 via a Zo=55ohm trace.
3 VCCA3 CC_PROCHOT# R140 3
N1 B17 J26 AD20

SCD1U10V2MX-1
VCCA2 PROCHOT# 2KR3F 7 GTL_DINV#1 DINV1# DINV3# GTL_DINV#3 7
1D5V_VCCA_S0 B1 E4 CC_CPUPWRGD K24 AE24
VCCA1 PWRGOOD CC_CPUPWRGD 7,16,28 7 GTL_DSTBN#1 DSTBN1# DSTBN3# GTL_DSTBN#3 7

C98
VCC_IO_S0 F26 L24 AE25
VCCA0 7 GTL_DSTBP#1 DSTBP1# DSTBP3# GTL_DSTBP#3 7

2
TPAD30 TP41 B2
RSVD
1

TPAD30 TP6 AF7 BANIAS-1D6G-1U


R500 TPAD30 TP48 RSVD
C14 TP28
150R2 TPAD30 TP42 RSVD U26B
C3
RSVD
A1 stepping:No stuff 7 GTL_A#[16..3]
1 R205 2 TEST3 C16 A0 stepping:stuff TPAD30
DY-1KR2 TPAD30 RSVD
E1 GTL_A#16 AA2
2

TP37 RSVD R213,R176 A16#


GTL_A#15 Y3 N2 GTL_ADS# 7
A15# ADS#
16 CC_CPUSLP# A6 L1 GTL_BNR# 7
SLP# DY-1KR2 ZZ.10234.1D1 BNR#
4 H_TCK H_TCK A13 GTL_A#14 AA3 J3 GTL_BPRI# 7
TCK A14# BPRI#
C5 TEST1 1 2 R216 GTL_A#13 U1 N4 GTL_BR0# 7
TEST1 A13# BR0#
H_TDI C12 F23 TEST2 1 2 R173 GTL_A#12 Y1 A7 ITP_DBRESET# 4
4 H_TDI TDI TEST2 DY-1KR2 ZZ.10234.1D1 A12# DBR#
4 H_TDO H_TDO A12 B18 THERMDP1 31 GTL_A#11 Y4 M2 GTL_DBSY# 7
TDO THERMDA A11# DBSY#
A18 THERMDN 31 GTL_A#10 W2 L4 GTL_DEFER# 7
TPAD30 TP5 THERMDC A10# DEFER#
AE7 C17 PM_THERMTRIP# 16,28 GTL_A#9 T4 H2 GTL_DRDY# 7
TPAD30 TP7 VCCSENSE THERMTRIP# A9# DRDY#
AF6 C11 H_TMS H_TMS 4 GTL_A#8 W1 K3 GTL_HIT# 7
VSSSENSE TMS A8# HIT#
B13 H_TRST# 4 GTL_A#7 V2 K4 GTL_HITM# 7
TRST# A7# HITM#
39 H_VID[5:0] GTL_A#6 R3 A4 GTL_IERR# CC_INIT# 16,32
A6# IERR#
1

H_VID5 H4 GTL_A#5 V3 B5
VID5 R210 A5# INIT# C445 SC100P50V2JN
H_VID4 G4 GTL_A#4 U4 J2 GTL_LOCK# 7
VID4 A4# LOCK#
1

H_VID3 G3 680R2 A10


VID3 place within 2" to CPU PRDY# H_BPM4_PRDY# 4
H_VID2 F3 GTL_A#3 P4 B10 H_BPM5_PREQ# 4
R132 VID2 A3# PREQ#
H_VID1 F2 B11 GTL_CPURST# 4,7
2

DY-54D9R3F R131 VID1 RESET#


H_VID0 E2
DY-54D9R3F VID0
U3
2

ZZ.54R95.651 ZZ.54R95.651 7 GTL_ADSTB#0 ADSTB0#


M3 GTL_TRDY# 7
2 TRDY# 2
BANIAS-1D6G-1U
L2 GTL_RS#2 7
RS2#
Place these two change to"71.BANIA.L02"1.3G RS1#
K1 GTL_RS#1 7
resistors near pin 7 GTL_A#[31..17] H1 GTL_RS#0 7
RS0#
AE7,AF6 GTL_A#31 AF1 C19
A31# DPWR# GTL_DPWR# 7
VCC_IO_S0 GTL_A#30 AE1
A30#
GTL_A#29 AF3
A29#
GTL_A#28 AD6
GTL_IERR# R217 1 A28#
2 56R2J GTL_A#27 AE2
A27#
GTL_A#26 AD5 GTL_REQ#[0..4] 7
CC_CPUPWRGD R188 1 A26#
2 330R2 GTL_A#25 AC6
A25# GTL_REQ#4
GTL_A#24 AB4 T1
CC_PROCHOT# R206 1 A24# REQ4#
2 56R2J GTL_A#23 AD2 P1 GTL_REQ#3
A23# REQ3# GTL_REQ#2
GTL_A#22 AE4 T2
1D5V_VCCA_S0 A22# REQ2# GTL_REQ#1
GTL_A#21 AD3 P3
A21# REQ1#
GTL_A#20 AC3 R2 GTL_REQ#0
GTL_A#19 A20# REQ0#
AC7
A19#
GTL_A#18 AC4
A18#
1

GTL_A#17 AF4
A17#
1

3D3V_S0 I max = 120 mA R150


BC27 2KR3F AE5
1D5V_S0 1D5V_VCCA_S0 7 GTL_ADSTB#1 ADSTB1#
U23
2

SC20P50V2JN-U
2

1 5 R381 BANIAS-1D6G-1U
SHDN# SET
2 2 1
GND
1

3 4
IN OUT R144 DY-0R3-U
10KR3F ZZ.R0004.151
1 1
G913C-U
BC26 BC28
Wistron Corporation
2

SC1U10V3ZY SC1U10V3ZY
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
[1.5V for Dothan, Dothan CPU (1 of 2)
1.8V for Banias] Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 5 of 42

A B C D E
1
2
3
4
2 1 2 1 2 1 2 1

U26A
C24 C21

VCC_IO_S0
VCC_IO_S0
VSS VSS

C311
C288
C271
D2 C18
VSS VSS

BC202
BC194

VCC_CORE_S0
VCC_CORE_S0
VCC_CORE_S0
D5 C15
VSS VSS
D7 C13

BANIAS-1D6G-1U
VSS VSS
D9 C10
VSS VSS

SC10U6D3V5ZY
SC10U6D3V5ZY
SC10U6D3V5ZY
SC10U6D3V5ZY
D11 C7

SCD1U10V2MX-1
VSS VSS
2 1 2 1 2 1 D13 C4
VSS VSS
D15 C1
VSS VSS
D17 B25
VSS VSS

A
A

C289
C270
D19 VSS B22
VSS

BC193
BC195
D21 B19
VSS VSS
D23 B16
VSS VSS
D26 B12
VSS VSS
E3 B9
VSS VSS

SC10U6D3V5ZY
SC10U6D3V5ZY
SC10U6D3V5ZY
E6 B6

SCD1U10V2MX-1
VSS VSS
2 1 2 1 B3
VSS
E8 A26
VSS VSS
E10 A23
VSS VSS

C253
C269
E12 A20
VSS VSS

BC186
BC196
E14 VSS A17
E16 VSS A14
VSS VSS
E18 A11
VSS VSS
E20 A8
VSS VSS

SC10U6D3V5ZY
SC10U6D3V5ZY
E22 A5

SCD1U10V2MX-1
SCD1U10V2MX-1
VSS VSS
2 1 E25 VSS A2
F1 VSS AD25
VSS VSS
AE3
VSS

C252
C268
F4 AE6
VSS VSS

BC188
BC187
F5 AE8
VSS VSS

Place near CPU


F7 VSS AE10
F9 VSS AE12
VSS VSS
F11 AE14
VSS VSS

SC10U6D3V5ZY

0.1uF_16V *10 ,0603,X7R


10uF_6.3V *35 ,0805,X5R F13 AE16

SCD1U10V2MX-1
SCD1U10V2MX-1
SCD1U10V2MX-1
VSS VSS
2 1 F15 AE18
VSS VSS
F17 VSS AE20
F19 VSS AE23
VSS VSS

C251
C267
F21 AE26
VSS VSS

BC197
BC180 AF2
VSS
F24 AF5
VSS VSS
G6 VSS AF9
G2 VSS AF11
VSS VSS

SC10U6D3V5ZY
G22 AF13

SCD1U10V2MX-1
SCD1U10V2MX-1
SCD1U10V2MX-1

B
B

VSS VSS
2 1 2 1 G23 AF15
VSS VSS
G26 AF17
VSS VSS
H3 VSS AF19
VSS

C284
C295
H5 AF21
VSS VSS

BC207
BC184

H21 AF24
VSS VSS
H25
J1 VSS D6
VSS VCC
J4 VCC D8
VSS

SC10U6D3V5ZY
SC10U6D3V5ZY J6 D18

SCD1U10V2MX-1
SCD1U10V2MX-1

VSS VCC
2 1 2 1 J22 D20
VSS VCC
J24 D22
VSS VCC
K2 E5
VSS VCC

C281
C225

K5 VCC E7
VSS

BC206
BC163

K21 E9
VSS VCC
K23 E17
VSS VCC
K26 E19
VSS VCC
L3 E21
VSS VCC

SC10U6D3V5ZY
SC10U6D3V5ZY

L6 F6

SCD1U10V2MX-1
SCD1U10V2MX-1

VSS VCC
2 1 2 1 L22 F8
VSS VCC
L25 F18
VSS VCC
M1 F20
VSS VCC
C280
C278

M4 F22
VSS VCC

BC205
BC162

M5 VCC G5
M21 VSS G21
VSS VCC
M24 H6
VSS VCC
N3 H22
VSS VCC
SC10U6D3V5ZY
SC10U6D3V5ZY

N6 J5

SCD1U10V2MX-1
SCD1U10V2MX-1

VSS VCC
2 1 N22 VCC J21
2 1 N23 VSS K22
VSS VCC
N26 U5
VSS VCC
C285

P2 V6
VSS VCC

BC204
BC161

C279

V22
VCC

C
C

P5 VCC W5
P21 VSS W21
VSS VCC
P24 Y6
VSS VCC
SC10U6D3V5ZY

R1 Y22

SCD1U10V2MX-1
SCD1U10V2MX-1

VSS VCC
SC10U6D3V5ZY

2 1 R4 AA5
VSS VCC
R6 VCC AA7
R22 VSS AA9
VSS VCC
C296

R25 AA11
VSS VCC
BC160

T3 AA13
VSS VCC
T5 AA15
VSS VCC
T21 VCC AA17
T23 VSS AA19
VSS VCC
SC10U6D3V5ZY

T26 AA21
SCD1U10V2MX-1

VSS VCC
2 1 U2 AB6
VSS VCC
U6 AB8
VSS VCC
U22 VCC AB10
VSS
C286

U24 AB12
VSS VCC
BC159

V1 AB14
VSS VCC
V4 AB16
VSS VCC
V5 AB18
VSS VCC
V21 VCC AB20
VSS
SC10U6D3V5ZY

V25 AB22
SCD1U10V2MX-1

VSS VCC
2 1 W3 AC9
VSS VCC
W6 AC11
VSS VCC
W22 AC13
VSS VCC
C287

W23 VCC AC15


VSS
BC158

W26 AC17
VSS VCC
Y2 AC19
VSS VCC
Y5 AD8
VSS VCC
Y21 AD10
VSS VCC
SC10U6D3V5ZY

Y24 AD12
SCD1U10V2MX-1

VSS VCC
AA1 AD14
VSS VCC
AA4 AD16
VSS VCC
D
D

AA6 AD18
VSS VCC
AA8 AE9
VSS VCC
AA10 VCC AE11
AA12 VSS AE13
VSS VCC
AA14 AE15
VSS VCC
AA16 AE17
VSS VCC
AA18 AE19
VSS VCC
AA20 VCC AF8
AA22 VSS AF10
VSS VCC
AA25 AF12
VSS VCC
AB3 AF14
VSS VCC
AB5 AF16
VSS VCC
AB7 VCC AF18
Title

Size

VSS
A3

AB9
AB11 VSS D10
VSS VCCP
AB13 D12
VSS VCCP
VCC_CORE_S0

AB15 D14
VSS VCCP
AB17 VCCP D16
AB19 VSS E11
VSS VCCP
AB21 E13
VSS VCCP
AB23 E15
VSS VCCP
AB26 F10
VSS VCCP
AC2 F12
Document Number

VSS VCCP
AC5 F14
Date: Tuesday, July 20, 2004

VSS VCCP
AC8 F16
VSS VCCP
AC10 K6
VSS VCCP
AC12 L5
VSS VCCP
Skylark II

AC14 VCCP L21


AC16 VSS M6
VSS VCCP
AC18 M22
VSS VCCP
AC21 N5
VSS VCCP
AC24 N21
VSS VCCP
AD1 P6
E
E

Dothan CPU (2 of 2)

VSS VCCP
AD4 P22
Sheet

VSS VCCP
AD7 R5
VSS VCCP
AD9 R21
6

VSS VCCP
AD11 T6
VCCQ ???

VSS VCCP
Decoupling

AD13 VCCP T22


VSS
near between

AD15 U21
VSS VCCP
P69 need place
Ref 10598 EMTS

AD17
VSS
of

AD19 P23
VSS VCCQ0
VCC_IO_S0

AD22 W4
Taipei Hsien 221, Taiwan, R.O.C.

VSS VCCQ1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

42
Rev
Wistron Corporation

SC
1
2
3
4
A B C D E

CPU
GMCH
CPURST# U25A
U25C M_DATA[71..0] 12
(GTL_CPURST#) GTL_D#[63..0] 5 10,12 M_A[12..0]
5 GTL_A#[31:3] M_DQS[8..0] 12
GTL_A#3 P23 K22 GTL_D#0 M_A0 AC18 AG2 M_DQS0
HA[3]# HD[0]# SMA[0] SDQS[0]
GTL_A#4 T25 H27 GTL_D#1 M_A1 AD14 AE5 M_DM0 M_DM[8..0] 12
HA[4]# HD[1]# SMA[1] SDM[0]
ITP GTL_A#5 T28
GTL_A#6 R27
HA[5]# HD[2]#
K25
L24
GTL_D#2
GTL_D#3
M_A2
M_A3
AD13
AD17
SMA[2] SDQ[0]
AF2
AE3
M_DATA0
M_DATA1
HA[6]# HD[3]# SMA[3] SDQ[1] M_DATA2
4 GTL_A#7 U23 J27 GTL_D#4 M_A4 AD11 AF4 4
1D2V_S0 HA[7]# HD[4]# M_A5 SMA[4] SDQ[2] M_DATA3
GTL_A#8 U24 G28 GTL_D#5 AC13 AH2
HA[8]# HD[5]# M_A6 SMA[5] SDQ[3] M_DATA4
GTL_A#9 R24 L27 GTL_D#6 AD8 AD3
HA[9]# HD[6]# SMA[6] SDQ[4] M_DATA5
GTL_A#10 U28 L23 GTL_D#7 M_A7 AD7 AE2
HA[10]# HD[7]# SMA[7] SDQ[5]

1
1D2V_S0 GTL_A#11 V28 L25 GTL_D#8 M_A8 AC6 AG4 M_DATA6
HA[11]# HD[8]# SMA[8] SDQ[6]

DDR
R113 GTL_A#12 U27 J24 GTL_D#9 M_A9 AC5 AH3 M_DATA7
49D9R3F HA[12]# HD[9]# M_A10 SMA[9] SDQ[7]
GTL_A#13 T27 H25 GTL_D#10 AC19
HA[13]# HD[10]# SMA[10]
1

350 mV +/-8% GTL_A#14 V27 K23 GTL_D#11 M_A11 AD5 AH5 M_DQS1
R111 PSWING GTL_A#15 U25
HA[14]# HD[11]#
G27 GTL_D#12 M_A12 AB5
SMA[11]
MEMORY SDQS[1]
AE6 M_DM1
2

243R3FClose HA[15]# HD[12]# SMA[12] SDM[1] M_DATA8


to pin GTL_A#16 V26
HA[16]# HD[13]#
K26 GTL_D#13
SDQ[8]
AD6
GTL_A#17 Y24 J23 GTL_D#14 AD16 AG5 M_DATA9
HA[17]# HD[14]# 10,12 M_AB1 SMAB[1] SDQ[9]
GTL_A#18 V25 H26 GTL_D#15 AC12 AG7 M_DATA10
10,12 M_AB2
2

HA[18]# HD[15]# SMAB[2] SDQ[10] M_DATA11


HLVREF 800 mV +/-8% GTL_A#19 V23
HA[19]# 10,12 M_AB4 AF11
SMAB[4] SDQ[11]
AE8
GTL_A#20 W25 K27 AD10 AF5 M_DATA12
HA[20]# HDSTBP[0]# GTL_DSTBP#0 5 10,12 M_AB5 SMAB[5] SDQ[12]
SCD01U25V2KX

Close to pin GTL_A#21 Y25 J28 AH4 M_DATA13


SCD1U10V2MX-1

HA[21]# HDSTBN[0]# GTL_DSTBN#0 5 SDQ[13]


1

GTL_A#22AA27 J25 AD25 AF7 M_DATA14


HA[22]# DINV[0]# GTL_DINV#0 5 10,12 M_WE# SWE# SDQ[14]
1

GTL_A#23 W24 AC24 AH6 M_DATA15


HA[23]# 10,12 M_CAS# SCAS# SDQ[15]
R110 C86 C87 R112 C88 GTL_A#24 W23 F25 GTL_D#16 AC21
HA[24]# HD[16]# 10,12 M_RAS# SRAS#
100R3F 100R3F SCD1U10V2MX-1 GTL_A#25 W27 F26 GTL_D#17 AH8 M_DQS2
2

HA[25]# HD[17]# SDQS[2]


GTL_A#26 Y27 B27 GTL_D#18 AE9 M_DM2
2

HA[26]# HD[18]# SDM[2]


GTL_A#27AA28 H23 GTL_D#19 AF8 M_DATA16
2

HA[27]# HD[19]# SDQ[16]

HOST
GTL_A#28 W28 E27 GTL_D#20 AG8 M_DATA17
HA[28]# HD[20]# SDQ[17]
GTL_A#29AB27 G25 GTL_D#21 10,12 M_BS0# AD22 AH9 M_DATA18
HA[29]# HD[21]# SBA[0] SDQ[18]
GTL_A#30 Y26 F28 GTL_D#22 10,12 M_BS1# AD20 AG10M_DATA19
HA[30]# HD[22]# SBA[1] SDQ[19]
GTL_A#31AB28 D27 GTL_D#23 AH7 M_DATA20
HA[31]# HD[23]# SDQ[20]
G24 GTL_D#24 10,12 M_CS0_R# AD23 AD9 M_DATA21
HD[24]# SCS[0]# SDQ[21]
5 GTL_ADSTB#0 T26 C28 GTL_D#25 10,12 M_CS1_R# AD26 AF10 M_DATA22
HADSTB[0]# HD[25]# SCS[1]# SDQ[22]
5 GTL_ADSTB#1 AA26 B26 GTL_D#26 10,12 M_CS2_R# AC22 AE11 M_DATA23
HADSTB[1]# HD[26]# SCS[2]# SDQ[23]
G22 GTL_D#27 10,12 M_CS3_R# AC25
VCC_IO_S0 HD[27]# SCS[3]#
3
5 GTL_REQ#[4:0] C26 GTL_D#28 AE12 M_DQS3 3
HD[28]# SDQS[3]
GTL_REQ#0 R28 E26 GTL_D#29 AH12 M_DM3
HREQ[0]# HD[29]# SDM[3]
GTL_REQ#1 P25 G23 GTL_D#30 10,12 M_CKE0_R# AC7 AH10 M_DATA24
HREQ[1]# HD[30]# SCKE[0] SDQ[24]
1

GTL_REQ#2 R23 B28 GTL_D#31 10,12 M_CKE1_R# AB7 AH11 M_DATA25


R492 HREQ[2]# HD[31]# SCKE[1] SDQ[25]
GTL_REQ#3 R25 10,12 M_CKE2_R# AC9 AG13M_DATA26
301R3F HREQ[3]# SCKE[2] SDQ[26]
GTL_REQ#4 T23 D26 GTL_DSTBP#1 5 10,12 M_CKE3_R# AC10 AF14 M_DATA27
HREQ[4]# HDSTBP[1]# SCKE[3] SDQ[27]
C27 GTL_DSTBN#1 5 AG11M_DATA28
HDSTBN[1]# SDQ[28]
3 CLK_MCH AE29 E25 GTL_DINV#1 5 AD12 M_DATA29
2

BCLK DINV[1]# SDQ[29]


HYSWING 3 CLK_MCH# AD29 10 CLK_DDR0 AB2 AF13 M_DATA30
BCLK# SCK[0] SDQ[30]
B21 GTL_D#32 10 CLK_DDR0# AA2 AH13 M_DATA31
HD[32]# SCK[0]# SDQ[31]
1

5 GTL_ADS# L28 G21 GTL_D#33 10 CLK_DDR1 AC26


R493 ADS# HD[33]# SCK[1]
5 GTL_DRDY# N24 C24 GTL_D#34 10 CLK_DDR1# AB25 AH17 M_DQS4
150R3F C310 DRDY# HD[34]# SCK[1]# SDQS[4]
5 GTL_DEFER# M28 C23 GTL_D#35 10 CLK_DDR2 AC3 AD19 M_DM4
SCD1U10V2MX-1 DEFER# HD[35]# SCK[2] SDM[4]
5 GTL_TRDY# M25 D22 GTL_D#36 10 CLK_DDR2# AD4 AH16 M_DATA32
HTRDY# HD[36]# SCK[2]# SDQ[32]
5 GTL_RS#0 N23 C25 GTL_D#37 10 CLK_DDR3 AC2 AG17M_DATA33
2

RS[0]# HD[37]# SCK[3] SDQ[33]


5 GTL_RS#1 P26 E24 GTL_D#38 10 CLK_DDR3# AD2 AF19 M_DATA34
RS[1]# HD[38]# SCK[3]# SDQ[34]
5 GTL_RS#2 M27 D24 GTL_D#39 10 CLK_DDR4 AB23 AE20 M_DATA35
RS[2]# HD[39]# SCK[4] SDQ[35]
17,22,32,33 PCIRST1# AD28 G20 GTL_D#40 10 CLK_DDR4# AB24 AD18 M_DATA36
RSTIN# HD[40]# SCK[4]# SDQ[36]
5 GTL_BR0# M23 E23 GTL_D#41 10 CLK_DDR5 AA3 AE18 M_DATA37
BREQ0# HD[41]# SCK[5] SDQ[37]
5 GTL_BNR# N25 B22 GTL_D#42 10 CLK_DDR5# AB4 AH18 M_DATA38
BNR# HD[42]# SCK[5]# SDQ[38]
5 GTL_BPRI# P28 B23 GTL_D#43 AG19M_DATA39
BPRI# HD[43]# SDQ[39]
5 GTL_DBSY# M26 F23 GTL_D#44
DBSY# HD[44]# 2D5V_S3 M_DQS7
5 GTL_HITM# N28 F21 GTL_D#45 AH27 AE21 M_DQS5
HITM# HD[45]# M_DM7 SDQS[7] SDQS[5]
5 GTL_HIT# N27 C20 GTL_D#46 AH28 AD21 M_DM5
HIT# HD[46]# M_DATA56 SDM[7] SDM[5]
5 GTL_LOCK# P27 C21 GTL_D#47 AH26 AH20 M_DATA40 2D5V_S3
HLOCK# HD[47]# SDQ[56] SDQ[40]

1
VCC_IO_S0 M_DATA57 AE26 AG20M_DATA41
R184 M_DATA58 SDQ[57] SDQ[41]
5,16,29 CC_DPSLP# Y23 E21 GTL_DSTBP#2 5 AG28 AF22 M_DATA42
DPSLP# HDSTBP[2]# SDQ[58] SDQ[42]

1
F15 E22 604R3F M_DATA59 AF28 AH22 M_DATA43
4,5 GTL_CPURST# CPURST# HDSTBN[2]# GTL_DSTBN#2 5 SDQ[59] SDQ[43]
1

GMCH_PWROK J11 B25 GTL_DINV#2 5 M_DATA60 AG26 AF20 M_DATA44 R109


2
R177 PWROK DINV[2]# M_DATA61 SDQ[60] SDQ[44] 60D4R3F 2
AF26 AH19 M_DATA45

2
301R3F SDQ[61] SDQ[45]
5 GTL_DPWR# AA22 G18 GTL_D#48 SMVSWINGL M_DATA62 AE27 AH21 M_DATA46
DPWR# HD[48]# SDQ[62] SDQ[46]
E19 GTL_D#49 M_DATA63 AD27 AG22M_DATA47

2
HD[49]# SDQ[63] SDQ[47]

1
HL_0 U7 E20 GTL_D#50
2

HL[0] HD[50]#

1
HXSWING HL_1 U4 G17 GTL_D#51 R183 M_DQS8 AD15 AH24 M_DQS6
HL[1] HD[51]# SDQS[8] SDQS[6]

1
HUB LINK

HL_2 U3 D20 GTL_D#52 150R3F C142 M_DM8 AH15 AD24 M_DM6


HL[2] HD[52]# SDM[8] SDM[6]
1

HL_3 V3 F19 AG14 AE23 M_DATA48 R108

SCD1U10V2MX-1
GTL_D#53 M_DATA64

2
HL[3] HD[53]# SDQ[64] SDQ[48]
1

R185 HL_4 W2 C19 GTL_D#54 M_DATA65 AE14 AH23 M_DATA49 C85 60D4R3F

2
150R3F C114 HL_5 HL[4] HD[54]# SDQ[65] SDQ[49]
W6 C17 GTL_D#55 M_DATA66 AE17 AE24 M_DATA50 SCD1U10V2MX-1
SCD1U10V2MX-1 HL_6 HL[5] HD[55]# SDQ[66] SDQ[50]
V6 F17 GTL_D#56 M_DATA67 AG16 AH25 M_DATA51
2

2
HL_7 HL[6] HD[56]# SDQ[67] SDQ[51]
W7 B19 GTL_D#57 M_DATA68 AH14 AG23M_DATA52
2

HL_8 HL[7] HD[57]# 2D5V_S3 SDQ[68] SDQ[52]


T3 G16 GTL_D#58 M_DATA69 AE15 AF23 M_DATA53
HL_9 HL[8] HD[58]# SDQ[69] SDQ[53]
V5 E16 GTL_D#59 M_DATA70 AF16 AF25 M_DATA54
HL_10 HL[9] HD[59]# M_DATA71 SDQ[70] SDQ[54]
15 HL_[10:0] V4 C16 GTL_D#60 AF17 AG25M_DATA55
HL[10] HD[60]# SDQ[71] SDQ[55]

1
W3 E17 GTL_D#61
1D2V_S0 15 HL_STB HLSTB HD[61]# R171 1D25V_DDRVREF_S3
15 HL_STB# V2 D16 GTL_D#62 AJ22
HLSTB# HD[62]# 150R3F SMVSWINGL
HLVREF W1 C18 GTL_D#63 AB1
HLVREF HD[63]# SMRCOMP
1 R114 2 27D4R3F T2 AJ19 AJ24
HLZCOMP SMVSWINGH SMVREF_0

SCD01U25V2KX
E18 GTL_DSTBP#3 5

2
HDSTBP[3]#
1 R494 2 27D4R3F HYRCOMP H28 D18 GTL_DSTBN#3 5
SMVSWINGH C297 C298
HYRCOMP HDSTBN[3]#

1
SCD01U25V2KX
G19 MONTARA-GM-A2
DINV[3]# GTL_DINV#3 5
1 R449 2 27D4R3F HXRCOMP B20
HXRCOMP 1

1
K21 HDVREF R176
HDVREF 9

2
HDVREF[0] 604R3F C113
PSWING U2 J21
PSWING HDVREF[1]
J17 op buffer build-in
SCD1U10V2MX-1
HDVREF[2] 2
HYSWING K28
to SC1486.
2

HYSWING
HXSWING B18
HXSWING
Y22 HAVREF HAVREF 9
R369 HAVREF
1 16 AGPBUSY# F7 Y28 HCCVREF HCCVREF 9 1
AGPBUSY# HCCVREF
1 2
VCC_IO_S0
1K5R2 HXRCOMP,HYRCOMP as Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
18mil wide trace
1

MONTARA-GM-A2 Taipei Hsien 221, Taiwan, R.O.C.


R368
1 2 3 2 Title
3D3V_S0 CC_CPUPWRGD 5,16,28
Q44
10KR2 MMBT3904-1-U Montara (1 of 3)
Size Document Number Rev
A3 SC
GMCH_PWROK Skylark II
Date: Tuesday, July 20, 2004 Sheet 7 of 42

A B C D E
A B C D E

1D5V_S0
U25E

AA29 AE13 R394 R101


VSS VSS
W29 AB13 2 1 ADDID7 GST[0] 1 2
VSS VSS
U29 U13
VSS VSS DY-1KR2 DUMMY-R2
N29 R13
VSS VSS 1D5V_S0 ZZ.10234.1D1 R122
L29 N13
VSS VSS
J29 H13 GST[1] 1 2
VSS VSS
G29 F13
VSS VSS DUMMY-R2
E29 D13
VSS VSS R400 R121
4 C29 A13 4
VSS VSS 3D3V_S0
AE28 AJ12 1 2 DVODETECT GST[2] 1 2
VSS VSS
AC28 AG12
VSS VSS 1KR2 DUMMY-R2
E28 AA12
VSS VSS
D28 J12
VSS VSS
AJ27 AJ11
VSS VSS
AG27 AC11

AA5
D12
B12
F12
VSS VSS

3
4
G5

G6

C4

D3
C3

D2
C2

D7
E5

E3
E2

B3

B2
F5

F4

F6

F3

F2
AC27 AB11

L7

L4
VSS VSS U25B RN1
F27 H11
VSS VSS SRN2D7KJ
A27 F11

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VSS VSS
AJ26 D11
VSS VSS

GND
AB26 AJ10
VSS VSS
W26 AE10 R3

2
1
VSS VSS DVOBD[0]
U26
VSS VSS
AA10 DVOBCCLKINt need R5
DVOBD[1] DDCA_DATA
G9 DAT_DDC1 13,27
R26 J10 R6 B6 CLK_DDC1 13,27
N26
VSS VSS
C10 add 100k resistor R4
DVOBD[2] DDCA_CLK
C5
VSS VSS DVOBD[3] DDCPDATA
L26 AG9 to GND if don't use P6 B4
VSS VSS DVOBD[4] DDCPCLK
J26 AB9 P5
VSS VSS DVOB and DVOC DVOBD[5]
G26 W9 N5 A7 DAC_RED 13
VSS VSS DVOBD[6] RED
AE25 U9 P2 A8
VSS VSS DVOBD[7] RED#
AA25
D25
VSS
VSS
VSS
VSS
T9
R9
N2
N3
DVOBD[8]
DVOBD[9]
DVOB CRT GREEN
GREEN#
C8
D8
DAC_GREEN 13
short trace
A25 N9 M1 C9 DAC_BLUE 13
VSS VSS DVOBD[10] BLUE
AG24 L9 M5 D9
VSS VSS 1D5V_S0 DVOBD[11] BLUE#
AA24 E9 H10 DAC_HSYNC 13,27
VSS VSS HSYNC
V24 AC8 P3 J9 DAC_VSYNC 13,27
VSS VSS R115 DVOBCLK VSYNC
T24 Y8 P4
VSS VSS DVOBCLK#

2
P24 V8 1 2 M2 G8 BL_PWM TP67 TPAD30 S.B.
VSS VSS DVOBFLDSTL PANELBKLTCTL
M24 T8 T6 F8 NB_BL_ON 14
3 VSS VSS R117 100KR2 DVOBHSYNC PANELBKLTEN 3
K24 P8 T5 A5 LCDVDD_ON 14
VSS VSS DVOBVSYNC PANELVDDEN

VIDEO
H24 K8 100KR2 L2
VSS VSS DVOBBLANK#
F24 H8 F14 TXOUT0+ 14

1
VSS VSS IYAP[0]
B24 AJ7 G2 G14 TXOUT0- 14
VSS VSS DVOBCINTR# IYAM[0]
AJ23 AE7 E14 TXOUT1+ 14
VSS VSS IYAP[1]
AC23 AA7 M3 E15 TXOUT1- 14
VSS VSS DVOBCCLKINT IYAM[1]
AA23 R7 C14 TXOUT2+ 14
VSS VSS IYAP[2]

1
D23 M7 K5 C15 TXOUT2- 14
VSS VSS R382 DVOCD[0] IYAM[2]
A23 J7 K1 B13
VSS VSS DVOCD[1] IYAP[3]
AE22 G7 K3 C13
VSS VSS 1D5V_S0 100KR2 DVOCD[2] IYAM[3]
W22 E7 K2 E13 TXCLK+ 14
VSS VSS DVOCD[3] ICLKAP
U22 C7 J6 D14 TXCLK- 14

2
VSS VSS DVOCD[4] ICLKAM
R22
VSS VSS
AG6 J5
DVOCD[5] LVDS
1

N22 Y6 H2 G12
VSS VSS R118 DVOCD[6] IYBP[0]
L22 L6 H1 H12
VSS VSS 1KR3F DVOCD[7] IYBM[0] 1D5V_S0 1D5V_S0
J22 Y5 H3 E11
VSS VSS DVOCD[8] IYBP[1]
F22
C22
VSS VSS
U5
B5
H4
H6
DVOCD[9] DVOC IYBM[1]
E12
C11
2

VSS VSS GVREF DVOCD[10] IYBP[2]


AG21 AE4 G3 C12
VSS VSS DVOCD[11] IYBM[2]
AB21 AC4 G10
VSS VSS IYBP[3]
1

AA21 AA4 J3 G11


VSS VSS DVOCCLK IYBM[3]

3
4

3
4
Y21 W4 R119 J2
VSS VSS 1KR3F C89 DVOCCLK#
V21 T4 1 100KR2 2 H5 E10 RN62
VSS VSS SCD1U10V2MX-1 R393 DVOCFLDSTL ICLKBM SRN10KJ RN63
T21 N4 K6 F10
VSS VSS DVOCHSYNC ICLKBP
P21 K4 L5
2

VSS VSS DVOCVSYNC SRN10KJ


M21 G4 L3 H9
VSS VSS DVOCBLANK# LCLKCTLA
H21 D4 R120 C6

2
1

2
1
VSS VSS LCLKCTLB
D21 AJ3 1 2 40D2R3F D1
VSS VSS DVORCOMP
A21 AG3 F1 P7
2 VSS VSS GVREF MDDCCLK 2
AJ20 R2 T7
VSS VSS MDDCDATA 1D5V_S0
AC20 AJ1 3 CLK66_GMCH Y3 N7
VSS VSS GCLKIN MDVICLK
AA20 AE1 M6
VSS VSS MDVIDATA
J20 AA1 D5 K7 1 R401 2 10KR2
VSS VSS DPMS MI2CCLK
F20 U1 3 CLK48_DREF_GMCH B7 N6 1 R399 2 10KR2
VSS VSS DREFCLK MI2CDATA
AE19 L1 3 CLK66_DREF_GMCH B17
VSS VSS DREFSSCLK
AB19 G1 D6 E8 REFSET
VSS VSS EXTTS_0 REFSET
1

H19 C1
VSS VSS
D19 F16 A10
DUMMY-R2

DUMMY-R2

DUMMY-R2

VSS VSS LIBG


R430

R395

R370

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
A19 AG15
VSS VSS

1
AJ18 AB15
VSS VSS MONTARA-GM-A2 R160 R154
AG18 U15
AJ29
AH29
B29
A29
AJ28
A28
AA9
AJ4
AJ2
A2

AC16
AC15
AH1
B1
VSS VSS 1K5R3F 137R3F
AA18 R15 change to"71.MONTA.D0U"
2

VSS VSS
J18 N15
VSS VSS
F18 H15

2
VSS VSS
1

AC17 D15
VSS VSS
M_RCVO#
AB17 AC14 M_RCVI#
DUMMY-C2

DUMMY-C2

DUMMY-C2

VSS VSS
C273

C230

C220

U17 AA14
VSS VSS
TP39
TPAD30 TP43
TPAD30 TP44
TPAD30 TP45
TPAD30 TP38
TPAD30 TP40
TPAD30 TP66
TPAD30 TP13
TPAD30 TP12
TPAD30 TP2
TPAD30 TP3

R17 T14
VSS VSS
N17 P14
VSS VSS
TPAD30

H17 J14
2

VSS VSS
D17
VSS
A17
VSS
AE16 B8
VSS VSSADAC 1D5V_S0 3D3V_S0
AA16
VSS VSSALVDS
B11 DDR Feedback(inside the package)
TPAD30 TP73
TPAD30 TP70
TP1

T16 R116
VSS Route transitioned to buttom
P16 1 2
VSS
1

side with vias near ball


TPAD30

J16
VSS
Need connect to cap first
R100 10KR2
1 (C252,C253 on next page) 1

then to GND 1KR2 D20


MONTARA-GM-A2
2 PM_THRM# 16,31
Wistron Corporation
2

CLK48_DPMS 3 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
3

D 1
1 Q20 Title
16,31 PM_SUS_CLK 2N7002
G
S BAW56-1 Montara (2 of 3)
2

Size Document Number Rev


A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 8 of 42

A B C D E
A B C D E

2D5V_S3
1D5V_S0
U25D
P9 AG29
VCCDVO VCCSM
M9 AF29
VCCDVO VCCSM

1
K9 AC29 C254 C233 C275 C272 C291 C241 C226
C224 C256 C246 C247 VCCDVO VCCSM
R8 AF27
SC10U6D3V5ZY SC10U6D3V5ZY SCD1U10V2MX-1 SCD1U10V2MX-1 VCCDVO VCCSM SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
N8 AJ25

2
VCCDVO VCCSM SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
M8 AF24
VCCDVO VCCSM
L8 AB22
VCCDVO VCCSM
4 J8 AJ21 4
VCCDVO VCCSM
H7 AF21
VCCDVO VCCSM

1
E6 AB20 C262 C274 C290 C303
VCCDVO VCCSM C109 C108
M4 AF18
VCCDVO VCCSM SCD1U10V2MX-1 SCD1U10V2MX-1 SC10U6D3V5ZY SC10U6D3V5ZY
J4 AB18

2
VCCDVO VCCSM SCD1U10V2MX-1 SCD1U10V2MX-1
E4 AJ17
VCCDVO VCCSM
N1 AB16
VCCDVO VCCSM
J1 AF15
VCCDVO VCCSM
E1 AB14
1D2V_S0 VCCDVO VCCSM
AJ13
VCCSM
AA13
VCCSM
W21 AF12
VCC VCCSM
AA19 AB12
VCC VCCSM
AA17 AA11
VCC VCCSM
1

1
POWER
T17 AB10
C264 C265 C276 C277 C263 C84 C83 VCC VCCSM
P17 AJ9
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SC10U6D3V5ZY SC10U6D3V5ZY SC10U6D3V5ZY VCC VCCSM
U16 AF9
2

2
VCC VCCSM
R16 Y9
VCC VCCSM
N16 AB8
VCC VCCSM
AA15 AA8
VCC VCCSM 2D5V_S3
T15 Y7
2D5V_S3 VCC VCCSM L23
P15 AF6
VCC VCCSM 1D2V_VCC_QSM_S0
J15 AB6 1 2
VCC VCCSM
Caps for VCCTXLVDS U14
VCC VCCSM
AA6

1
R14 C240 C239 C238 C244 C243 IND-D68UH-2

SCD1U10V2MX-1

SCD1U10V2MX-1

SCD1U10V2MX-1

SCD1U10V2MX-1

SCD1U10V2MX-1
VCC
N14 AJ5
VCC VCCSM
1

1
H14 Y4 R408

2
C146 C112 C260 C259 C258 VCC VCCSM
T13 AF3 VSS_QSM_GND 1 2
SC10U6D3V5ZY SC10U6D3V5ZY SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 VCC VCCSM
P13 AB3
2

2
3 VCC VCCSM 1R5 3
AG1
VCCSM 1D2V_S0
A12 AC1
1D5V_S0 VCCTXLVDS VCCSM L11
D10
VCCTXLVDS
Caps for VCCALVDS Caps for VCCDLVDS 1D5V_S0 B10
VCCTXLVDS VCCQSM
AJ8 1D2V_VCC_ASM_S0 1 2
F9 AJ6
VCCTXLVDS VCCQSM

1
IND-1UH-6
1

1
B15 AF1 C227 TC16
C261 C242 C223 C222 C257 VCCDLVDS VCCASM SCD1U10V2MX-1 ST100U4VBM
B14 AD1

2
SCD1U10V2MX-1 SCD01U25V2KX SC10U6D3V5ZY SC10U6D3V5ZY SCD1U10V2MX-1 VCCDLVDS VCCASM
J13 C176,TC22
2

2
VCCDLVDS
G13 should on the
1D2V_S0 VCCDLVDS C304 SCD1U10V2MX-1
V29 1 2
VTTHF C305 SCD1U10V2MX-1 same side
1D5V_S0 A11 M29 1 2
VCCALVDS VTTHF C306 SCD1U10V2MX-1
R386 L24 H29 1 2
VTTHF C300 SCD1U10V2MX-1
1 21D2V_ADPLLA_S0
1 2 1D2V_ADPLLA-1_S0 A6 A24 1 2
3D3V_S0 1R5 VCCADPLLA VTTHF C299 SCD1U10V2MX-1
B16 A22 1 2
VCCADPLLB VTTHF
1

1
Caps for VCCGPIO IND-D1UH
ESR<50mohm,ESL<2.5mH TC17 C235 Y2
VCCAGPLL
ST220U4VDM-7 D29 AB29
TC8,C76 on the same side
2

2
1D2V_S0 SCD1U10V2MX-1 1D5V_S0 VCCAHPLL VTTLF
Y29
VTTLF
1

R162 L12 B9 K29


C231 C229 VCCADAC VTTLF VCC_IO_S0
1 21D2V_ADPLLB_S0
1 2 1D2V_ADPLLB-1_S0 A9 F29
SCD1U10V2MX-1 SC10U6D3V5ZY 1R5 IND-D1UH VCCADAC VTTLF
A26
2

VTTLF
1

V22
VTTLF
ESR<50mohm,ESL<2.5mH TC1 C266 3D3V_S0
VTTLF
T22

1
ST220U4VDM-7 SCD1U10V2MX-1 P22
TC9,C79 on the same side
2

VTTLF C316 C293 C292 C294


A3 M22
VCCGPIO VTTLF SC10U6D3V5ZY SC10U6D3V5ZY SCD1U10V2MX-1 SCD1U10V2MX-1
A4 H22

2
1D2V_S0 1D2V_S0 VCCGPIO VTTLF
U21
1D2V_S0 VTTLF
V9 R21
2 VCCHL VTTLF 2
Caps for VCCHL W8
VCCHL VTTLF
N21 ESR<15mohm
U8 L21
VCCHL VTTLF
1

1D2V_S0 V7 H20
VCCHL VTTLF
1

C228 U6 A20
C255 C234 C245 SCD1U10V2MX-1 VCCHL VTTLF
W5 J19
2

VCCHL VTTLF
SC10U6D3V5ZY SCD1U10V2MX-1 SCD1U10V2MX-1 Cap for Y1 H18
2

VCCHL VTTLF
1

VCCAGPLL V1
VCCHL VTTLF
A18
C307 H16
SCD1U10V2MX-1 VTTLF
G15
2

VTTLF
Cap for
VCCAHPLL
MONTARA-GM-A2

1D5V_S0
Caps for VCCADAC
Reference Voltage: 2/3 Vcc_IO_S0
1

VCC_IO_S0 VCC_IO_S0 VCC_IO_S0


C248 C249
SCD1U10V2MX-1 SCD01U25V2KX
2

1
R490 R428 R429
49D9R3F 49D9R3F 49D9R3F
1 1
This two cap chould connect to
2

2
VSSADAC first then to GND
7 HCCVREF HCCVREF 7 HAVREF HAVREF 7 HDVREF HDVREF Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

1
Taipei Hsien 221, Taiwan, R.O.C.
1

1
R491 R437 R438
C315 BC229 100R3F BC200 C282 100R3F C283 BC201 100R3F Title
SCD1U10V2MX-1 SC1U10V3KX SC1U10V3KX SCD1U10V2MX-1 SCD1U10V2MX-1 SC1U10V3KX
Montara (3 of 3)
2

2
2

2
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 9 of 42

A B C D E
A B C D E

_A[12..0] U60 U59

M_A0 112 121 M_CS0_R# 7,12 12 M_A_SR0 M_A_SR0 112 121 M_CS2_R# 7,12
A0 /CS0 A0 /CS0
M_A1 111 122 M_CS1_R# 7,12 7,12 M_AB1 111 122 M_CS3_R# 7,12
A1 /CS1 A1 /CS1
M_A2 110 7,12 M_AB2 110
A2 A2
M_A3 109 96 M_CKE0_R# 7,12 12 M_A_SR3 M_A_SR3 109 96 M_CKE2_R# 7,12
A3 CKE0 A3 CKE0
M_A4 108 95 M_CKE1_R# 7,12 7,12 M_AB4 108 95 M_CKE3_R# 7,12
A4 CKE1 A4 CKE1
M_A5 107 7,12 M_AB5 107
A5 A5 CLK_DDR5
M_A6 106 11 M_DQS_R0 12 M_A_SR6 M_A_SR6 106 11 M_DQS_R0
A6 DQS0 A6 DQS0
M_A7 105 25 M_DQS_R1 12 M_A_SR7 M_A_SR7 105 25 M_DQS_R1 CLK_DDR5#
A7 DQS1 A7 DQS1

1
M_A8 102 47 M_DQS_R2 12 M_A_SR8 M_A_SR8 102 47 M_DQS_R2
A8 DQS2 A8 DQS2

1
4 M_A9 101 61 M_DQS_R3 M_A_SR9 101 61 M_DQS_R3 C150 4
A9 DQS3 12 M_A_SR9 A9 DQS3
M_A10 115 133 M_DQS_R4 M_A_SR10 115 133 M_DQS_R4 C149

DUMMY-C2
A10 / AP DQS4 12 M_A_SR10 A10 / AP DQS4
M_A11 100 147 M_DQS_R5 M_A_SR11 100 147 M_DQS_R5

DUMMY-C2
A11 DQS5 12 M_A_SR11 A11 DQS5
M_A12 99 169 M_DQS_R6 12 M_A_SR12 M_A_SR12 99 169 M_DQS_R6
A12 DQS6 A12 DQS6
183 M_DQS_R7 183 M_DQS_R7

2
DQS7 DQS7
7,12 M_BS0# 117 77 M_DQS_R8 12 M_BS0_SR# 117 77 M_DQS_R8

2
BA0 DQS8 BA0 DQS8
7,12 M_BS1# 116 12 M_BS1_SR# 116
BA1 BA1

1
12 M_DM_R_0 M_DQS_R[0..8] 12 12 M_DM_R_0
DM0 DM0

1
M_DATA_R_0 5 26 M_DM_R_1 M_DATA_R_0 5 26 M_DM_R_1 R224
DQ0 DM1 DQ0 DM1 R223
ATA_R_[71..0] M_DATA_R_1 7 48 M_DM_R_2 M_DATA_R_1 7 48 M_DM_R_2
DQ1 DM2 DQ1 DM2
M_DATA_R_2 13 62 M_DM_R_3 M_DATA_R_2 13 62 M_DM_R_3

DUMMY-R2
DQ2 DM3 DQ2 DM3
M_DATA_R_3 17 134 M_DM_R_4 M_DATA_R_3 17 134 M_DM_R_4

DUMMY-R2
DQ3 DM4 DQ3 DM4
M_DATA_R_4 6 148 M_DM_R_5 M_DATA_R_4 6 148 M_DM_R_5

2
DQ4 DM5 DQ4 DM5
M_DATA_R_5 8 170 M_DM_R_6 M_DATA_R_5 8 170 M_DM_R_6

2
DQ5 DM6 DQ5 DM6
M_DATA_R_6 14 184 M_DM_R_7 M_DATA_R_6 14 184 M_DM_R_7
DQ6 DM7 DQ6 DM7
M_DATA_R_7 18 78 M_DM_R_8 M_DATA_R_7 18 78 M_DM_R_8
DQ7 DM8 DQ7 DM8
M_DATA_R_8 19 M_DM_R_[8..0] 12 M_DATA_R_8 19
DQ8 DQ8
M_DATA_R_9 23 35 CLK_DDR0 7 M_DATA_R_9 23 35 CLK_DDR3 7
DQ9 CK0 DQ9 CK0
M_DATA_R_10 29 37 CLK_DDR0# 7 M_DATA_R_10 29 37 CLK_DDR3# 7 For EMI Place
DQ10 /CK0 DQ10 /CK0
M_DATA_R_11 31 160 CLK_DDR1 7 M_DATA_R_11 31 160 CLK_DDR4 7
DQ11 CK1 DQ11 CK1
M_DATA_R_12 20
DQ12 /CK1
158 CLK_DDR1# 7 M_DATA_R_12 20
DQ12 /CK1
158 CLK_DDR4# 7 near
M_DATA_R_13 24 89 M_DATA_R_13 24 89
M_DATA_R_14 30
DQ13 CK2
91
CLK_DDR2 7
CLK_DDR2# 7 M_DATA_R_14 30
DQ13 CK2
91
CLK_DDR5 7
CLK_DDR5# 7
Connector
DQ14 /CK2 DQ14 /CK2
M_DATA_R_15 32 M_DATA_R_15 32
DQ15 DQ15
M_DATA_R_16 41 195 SMBC_ICH 3,14,16 M_DATA_R_16 41 195 SMBC_ICH
DQ16 SCL DQ16 SCL
M_DATA_R_17 43 193 SMBD_ICH 3,14,16 M_DATA_R_17 43 193 SMBD_ICH
DQ17 SDA R258 DQ17 SDA R257
M_DATA_R_18 49 M_DATA_R_18 49
DQ18 DQ18
REVERSE TYPE

M_DATA_R_19 53 194 DM1_SA0 1 2 3D3V_S0 M_DATA_R_19 53 194 DM2_SA0 1 2


DQ19 SA0 DQ19 SA0 3D3V_S0
M_DATA_R_20 42 196 M_DATA_R_20 42 196
DQ20 SA1 DQ20 SA1

1
M_DATA_R_21 44 198 M_DATA_R_21 44 198 0R2-0

NORMAL TYPE
DQ21 SA2 DQ21 SA2

1
M_DATA_R_22 50 R259 DUMMY-R2 M_DATA_R_22 50
DQ22 DQ22
M_DATA_R_23 54 9 M_DATA_R_23 54 9
3 DQ23 VDD 0R2-0 DQ23 VDD R256 3
M_DATA_R_24 55 10 M_DATA_R_24 55 10
DQ24 VDD DQ24 VDD
M_DATA_R_25 59 21 M_DATA_R_25 59 21

2
DQ25 VDD DQ25 VDD DUMMY-R2
M_DATA_R_26 65 22 M_DATA_R_26 65 22
DQ26 VDD DQ26 VDD
M_DATA_R_27 67 33 M_DATA_R_27 67 33

2
DQ27 VDD DQ27 VDD
M_DATA_R_28 56 34 M_DATA_R_28 56 34
DQ28 VDD DQ28 VDD
M_DATA_R_29 60 36 M_DATA_R_29 60 36
DQ29 VDD CLK_DDR0 DQ29 VDD
M_DATA_R_30 66 45 M_DATA_R_30 66 45
DQ30 VDD DQ30 VDD
M_DATA_R_31 68 46 CLK_DDR0# M_DATA_R_31 68 46
DQ31 VDD DQ31 VDD
1

M_DATA_R_32 127 57 CLK_DDR1 M_DATA_R_32 127 57


DQ32 VDD DQ32 VDD
M_DATA_R_33 129
DQ33 VDD
58 C116 1 CLK_DDR1# M_DATA_R_33 129
DQ33 VDD
58

1
M_DATA_R_34 135 69 C117 CLK_DDR2 M_DATA_R_34 135 69
DUMMY-C2

DQ34 VDD DQ34 VDD

1
M_DATA_R_35 139 70 C157
DUMMY-C2 CLK_DDR2# M_DATA_R_35 139 70 CLK_DDR3
DQ35 VDD DQ35 VDD

1
M_DATA_R_36 128 81 C155 M_DATA_R_36 128 81 CLK_DDR3#

DUMMY-C2
DQ36 VDD DQ36 VDD

1
M_DATA_R_37 130 82 C151 M_DATA_R_37 130 82 CLK_DDR4

DUMMY-C2
2

DQ37 VDD DQ37 VDD

1
M_DATA_R_38 136 92 C152 M_DATA_R_38 136 92 C115 CLK_DDR4#

DUMMY-C2
2

DQ38 VDD DQ38 VDD

1
M_DATA_R_39 140 93 M_DATA_R_39 140 93 C143

DUMMY-C2

DUMMY-C2
2

DQ39 VDD DQ39 VDD


1

1
M_DATA_R_40 141 94 M_DATA_R_40 141 94 C156

DUMMY-C2
2
DQ40 VDD DQ40 VDD
1

M_DATA_R_41 145 113 R187 M_DATA_R_41 145 113 C154

DUMMY-C2
2
DQ41 VDD DQ41 VDD
1

M_DATA_R_42 151 114 R189 M_DATA_R_42 151 114

DUMMY-C2
2

2
DQ42 VDD DQ42 VDD
1

M_DATA_R_43 153 131 R249 M_DATA_R_43 153 131


DUMMY-R2

2
DQ43 VDD DQ43 VDD
1
M_DATA_R_44 142 132 R245 M_DATA_R_44 142 132
DUMMY-R2

2
DQ44 VDD DQ44 VDD

1
M_DATA_R_45 146 143 R225 M_DATA_R_45 146 143
DUMMY-R2
2

2
DQ45 VDD DQ45 VDD

1
M_DATA_R_46 152 144 R229 M_DATA_R_46 152 144 R180
DUMMY-R2
2

DQ46 VDD DQ46 VDD

1
M_DATA_R_47 154 155 DUMMY-R2 M_DATA_R_47 154 155 R194
2

DQ47 VDD DQ47 VDD

1
M_DATA_R_48 163 156 M_DATA_R_48 163 156 R247

DUMMY-R2

DUMMY-R2
2

DQ48 VDD DQ48 VDD R244


M_DATA_R_49 165 157 M_DATA_R_49 165 157

DUMMY-R2
2

DQ49 VDD DQ49 VDD


M_DATA_R_50 171 167 M_DATA_R_50 171 167

DUMMY-R2
2

2
DQ50 VDD DQ50 VDD
M_DATA_R_51 175 168 M_DATA_R_51 175 168

DUMMY-R2
2
DQ51 VDD DQ51 VDD
M_DATA_R_52 164 179 For EMI M_DATA_R_52 164 179

2
DQ52 VDD DQ52 VDD
M_DATA_R_53 166 180 M_DATA_R_53 166 180

2
M_DATA_R_54 172
DQ53 VDD
191 Place near Connector M_DATA_R_54 172
DQ53 VDD
191
DQ54 VDD DQ54 VDD
M_DATA_R_55 176 192 2D5V_S3 M_DATA_R_55 176 192 2D5V_S3
2 DQ55 VDD DQ55 VDD 2
M_DATA_R_56 177 M_DATA_R_56 177
DQ56 DQ56
M_DATA_R_57 181
DQ57 VSS
3 M_DATA_R_57 181
DQ57 VSS
3 For EMI
M_DATA_R_58 187 4 M_DATA_R_58 187 4
M_DATA_R_59 189
DQ58 VSS
15 M_DATA_R_59 189
DQ58 VSS
15 Place near Connector
DQ59 VSS DQ59 VSS
M_DATA_R_60 178 16 M_DATA_R_60 178 16
DQ60 VSS DQ60 VSS
M_DATA_R_61 182 27 M_DATA_R_61 182 27
DQ61 VSS DQ61 VSS
M_DATA_R_62 188 28 M_DATA_R_62 188 28
DQ62 VSS DQ62 VSS
M_DATA_R_63 190 38 M_DATA_R_63 190 38
DQ63 VSS DQ63 VSS
39 39
VSS VSS
M_DATA_R_64 71 40 M_DATA_R_64 71 40
CB0 VSS CB0 VSS
M_DATA_R_65 73 51 M_DATA_R_65 73 51
CB1 VSS CB1 VSS
M_DATA_R_66 79 52 M_DATA_R_66 79 52
CB2 VSS CB2 VSS
M_DATA_R_67 83 63 M_DATA_R_67 83 63
CB3 VSS CB3 VSS
M_DATA_R_68 72 64 M_DATA_R_68 72 64
CB4 VSS CB4 VSS
M_DATA_R_69 74 75 M_DATA_R_69 74 75
CB5 VSS CB5 VSS
M_DATA_R_70 80 76 M_DATA_R_70 80 76
CB6 VSS CB6 VSS
M_DATA_R_71 84 87 M_DATA_R_71 84 87
CB7 VSS CB7 VSS
88 88
VSS VSS
85 90 85 90
NC VSS NC VSS
DM0_RESET# 86 103 DM1_RESET# 86 103
TPAD30 TP75 DM0_A13 NC/(RESET#) VSS TPAD30 TP76 NC/(RESET#) VSS
97 104 DM1_A13 97 104
TPAD30 TP80 DM0_BA2 NC/A13 VSS TPAD30 TP77 NC/A13 VSS
98 125 DM1_BA2 98 125
TPAD30 TP79 NC/BA2 VSS TPAD30 TP78 NC/BA2 VSS
123 126 123 126
NC VSS NC VSS
124 137 124 137
NC VSS NC VSS
200 138 200 138
NC VSS NC VSS
149 149
VSS VSS
7,12 M_RAS# 118 150 12 M_RAS_SR# 118 150
/RAS VSS /RAS VSS
7,12 M_CAS# 120 159 12 M_CAS_SR# 120 159
/CAS VSS /CAS VSS
7,12 M_WE# 119 161 12 M_WE_SR# 119 161
/WE VSS R161 /WE VSS
162 162
DDR_VREF_SKT VSS VSS
1 173 1D25V_DDRVREF_S3 1 2 DDR_VREF_SKT 1 173
VREF VSS 0R5J-1 VREF VSS
2 174 2 174
1 VREF VSS VREF VSS 1
SC10U6D3V5ZY

SC10U6D3V5ZY
SCD1U10V2MX-1

SCD1U10V2MX-1

3D3V_S0 197 185 3D3V_S0 197 185


VDDSPD VSS VDDSPD VSS
1

199 186 199 186


VDDID VSS VDDID VSS
BC42

BC39

BC32

BC38

202 201 201 202


Wistron Corporation
2

GND GND GND GND


21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SKTSODIMM200-1U1 Taipei Hsien 221, Taiwan, R.O.C.
SKT-SODIMM200-U
Title
DDR Socket
Size Document Number Rev
Custom SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 10 of 42

A B C D E
A B C D E

PLACE ONE 0.1 and ONE 0.01 CAP CLOSE TO EVERY 4


PULL-UP TERMINATION RESISTORS, CRB-P13
1D25V_S0 DATA(64)+ADD(13)+DQS(9)+CB(8)+CMD(13)=107
0.1UF 0402 X7R 59X

4 BC37 BC34 BC41 BC98 BC83 BC63 BC96 BC89 4


SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX SCD01U16V2KX

1
BC87 BC91 BC78 BC62 BC48 BC88 BC106 BC105 BC104 BC102 BC100 BC97
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
2

2
1

1
BC90 BC92 BC84 BC82 BC81 BC80 BC76 BC68 BC66 BC60 BC51 BC40
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
2

2
3 3

PLACE CAPS BETWEEN AND NEAR DDR SKTS


PLACE EACH 0.1UF CAP CLOSE TO POWER
PIN
2D5V_S3

2 2
1

1
1

BC93 BC107 BC49 BC64 BC77 BC85 BC94 BC101


C153 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
2

2
SC10U6D3V5ZY
2

1
BC103 BC43 BC53 BC67 BC79 BC86 BC95 BC99
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
2

2
1

BC108 C107 C111 C145


SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
2

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DDR Decoupling CPA
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 11 of 42

A B C D E
A B C D E

SERIES DAMPING Put decap near power(1.25V) and pull-up resistor PARALLEL TERMINATION
Put decap near power(1.25V) and pull-up resistor
1D25V_S0
1D25V_S0
R170 10R2 R239 10R2 R175 56R2J R236 56R2J RN22 RN28
M_DQS0 1 2 M_DQS_R0 M_DQS4 1 2 M_DQS_R4 M_DQS_R0 1 2 1 2 M_DQS_R4 M_A_SR12 4 5 4 5
RN4 RN31 RN2 RN32 M_A_SR9 3 6 3 6 M_WE_SR#
M_DATA5 1 8 M_DATA_R_5 M_DATA37 1 8 M_DATA_R_37 M_DATA_R_6 1 8 1 8 M_DATA_R_36 M_A_SR8 2 7 2 7 M_BS0_SR#
M_DATA4 2 7 M_DATA_R_4 M_DATA36 2 7 M_DATA_R_36 M_DATA_R_7 2 7 2 7 M_DATA_R_37 M_A_SR11 1 8 1 8 M_A_SR10
M_DATA1 3 6 M_DATA_R_1 M_DATA33 3 6 M_DATA_R_33 M_DATA_R_3 3 6 3 6 M_DATA_R_33
4 M_DATA0 4 5 M_DATA_R_0 M_DATA32 4 5 M_DATA_R_32 M_DATA_R_2 4 5 4 5 M_DATA_R_32 4
SRN56-1 SRN56-1
SRN10-1 SRN10-1 SRN56-1 SRN56-1 Put decap near power(1.25V) and pull-up resistor
RN6 RN33 RN3 RN34 RN25 RN27
M_DATA7 1 8 M_DATA_R_7 M_DATA35 1 8 M_DATA_R_35 M_DATA_R_4 1 8 1 8 M_DATA_R_38 4 5 4 5 M_BS1_SR#
7,10 M_AB1
M_DATA3 2 7 M_DATA_R_3 M_DATA39 2 7 M_DATA_R_39 M_DATA_R_5 2 7 2 7 M_DATA_R_34 3 6 3 6
7,10 M_AB5 M_AB2 7,10
M_DATA6 3 6 M_DATA_R_6 M_DATA38 3 6 M_DATA_R_38 M_DATA_R_0 3 6 3 6 M_DATA_R_39 M_A_SR7 2 7 2 7 M_A_SR0
M_DATA2 4 5 M_DATA_R_2 M_DATA34 4 5 M_DATA_R_34 M_DATA_R_1 4 5 4 5 M_DATA_R_35 M_A_SR3 1 8 1 8 M_CAS_SR#

SRN10-1 SRN10-1 SRN56-1 SRN56-1


R182 10R2 R243 10R2 R179 56R2J R241 56R2J SRN56-1 SRN56-1
M_DQS1 1 2 M_DQS_R1 M_DQS5 1 2 M_DQS_R5 M_DQS_R1 1 2 1 2 M_DQS_R5 Put decap near power(1.25V) and pull-up resistor
RN8 RN36 RN5 RN35 RN30
M_DATA11 1 8 M_DATA_R_11 M_DATA45 1 8 M_DATA_R_45 M_DATA_R_10 1 8 1 8 M_DATA_R_45 M_A5 4 5 1 2 R227 56R2J
M_CKE0_R# 7,10
M_DATA9 2 7 M_DATA_R_9 M_DATA41 2 7 M_DATA_R_41 M_DATA_R_12 2 7 2 7 M_DATA_R_44 M_A1 3 6 1 2 R219 56R2J
M_CKE2_R# 7,10
M_DATA12 3 6 M_DATA_R_12 M_DATA44 3 6 M_DATA_R_44 M_DATA_R_9 3 6 3 6 M_DATA_R_40 M_A2 2 7 1 2 R228 56R2J
M_CKE1_R# 7,10
M_DATA8 4 5 M_DATA_R_8 M_DATA40 4 5 M_DATA_R_40 M_DATA_R_8 4 5 4 5 M_DATA_R_41 M_A4 1 8 1 2 R226 56R2J
M_CKE3_R# 7,10
SRN10-1 SRN10-1 SRN56-1 SRN56-1
RN9 RN38 RN7 RN37 SRN56-1 Put decap near power(1.25V) and pull-up resistor
M_DATA15 1 8 M_DATA_R_15 M_DATA47 1 8 M_DATA_R_47 M_DATA_R_15 1 8 1 8 M_DATA_R_42 RN20
M_DATA14 2 7 M_DATA_R_14 M_DATA46 2 7 M_DATA_R_46 M_DATA_R_14 2 7 2 7 M_DATA_R_43 M_DATA_R_71 1 8 1 2 R235 56R2J
M_CS0_R# 7,10
M_DATA13 3 6 M_DATA_R_13 M_DATA43 3 6 M_DATA_R_43 M_DATA_R_13 3 6 3 6 M_DATA_R_46 M_DATA_R_70 2 7 1 2 R231 56R2J
M_CS3_R# 7,10
M_DATA10 4 5 M_DATA_R_10 M_DATA42 4 5 M_DATA_R_42 M_DATA_R_11 4 5 4 5 M_DATA_R_47 M_DATA_R_67 3 6 1 2 R234 56R2J
M_CS1_R# 7,10
M_DATA_R_66 4 5 1 2 R232 56R2J
M_CS2_R# 7,10
SRN10-1 SRN10-1 SRN56-1 SRN56-1
R196 10R2 R248 10R2 R193 56R2J R246 56R2J SRN56-1
M_DQS2 1 2 M_DQS_R2 M_DQS6 1 2 M_DQS_R6 M_DQS_R2 1 2 1 2 M_DQS_R6 RN19 RN24
RN12 RN40 RN10 RN39 M_DATA_R_65 1 8 4 5 M_RAS_SR#
3 M_DATA21 1 8 M_DATA_R_21 M_DATA53 1 8 M_DATA_R_53 M_DATA_R_17 1 8 1 8 M_DATA_R_52 M_DATA_R_64 2 7 3 6 M_A_SR6 3
M_DATA16 2 7 M_DATA_R_16 M_DATA52 2 7 M_DATA_R_52 M_DATA_R_21 2 7 2 7 M_DATA_R_53 M_DATA_R_68 3 6 2 7 M_AB4 7,10
M_DATA17 3 6 M_DATA_R_17 M_DATA49 3 6 M_DATA_R_49 M_DATA_R_16 3 6 3 6 M_DATA_R_48 M_DATA_R_69 4 5 1 8
M_DATA20 4 5 M_DATA_R_20 M_DATA48 4 5 M_DATA_R_48 M_DATA_R_20 4 5 4 5 M_DATA_R_49
SRN56-1
SRN10-1 SRN10-1 SRN56-1 SRN56-1 M_DQS_R8 1 2 SRN56-1
RN13 RN42 RN11 RN41 R218 56R2J
M_DATA19 1 8 M_DATA_R_19 M_DATA51 1 8 M_DATA_R_51 M_DATA_R_23 1 8 1 8 M_DATA_R_50 M_DM_R_0 R174 1 2 56R2J
M_DATA23 2 7 M_DATA_R_23 M_DATA55 2 7 M_DATA_R_55 M_DATA_R_19 2 7 2 7 M_DATA_R_54 M_DM_R_1 R178 1 2 56R2J
M_DATA18 3 6 M_DATA_R_18 M_DATA54 3 6 M_DATA_R_54 M_DATA_R_18 3 6 3 6 M_DATA_R_55 M_DM_R_2 R192 1 2 56R2J
M_DATA22 4 5 M_DATA_R_22 M_DATA50 4 5 M_DATA_R_50 M_DATA_R_22 4 5 4 5 M_DATA_R_51 M_DM_R_3 R198 1 2 56R2J M_DQS_R[8..0] 10
M_DM_R_4 R237 1 2 56R2J
SRN10-1 SRN10-1 SRN56-1 SRN56-1 M_DM_R_5 R240 1 2 56R2J
R199 56R2J R252 56R2J M_DM_R_6 R250 1 2 56R2J M_DQS[8..0] 7
R201 10R2 R255 10R2 M_DQS_R3 1 2 1 2 M_DQS_R7 M_DM_R_7 R253 1 2 56R2J
M_DQS3 1 2 M_DQS_R3 M_DQS7 1 2 M_DQS_R7 RN14 RN44
M_DATA[71..0] 7
RN15 RN43 M_DATA_R_25 1 8 1 8 M_DATA_R_60
M_DATA29 1 8 M_DATA_R_29 M_DATA61 1 8 M_DATA_R_61 M_DATA_R_29 2 7 2 7 M_DATA_R_56 M_DM_R_8 1 2
M_DATA25 2 7 M_DATA_R_25 M_DATA57 2 7 M_DATA_R_57 M_DATA_R_24 3 6 3 6 M_DATA_R_57 R220 56R2J
M_DATA_R_[71..0] 10
M_DATA28 3 6 M_DATA_R_28 M_DATA60 3 6 M_DATA_R_60 M_DATA_R_28 4 5 4 5 M_DATA_R_61
M_DATA24 4 5 M_DATA_R_24 M_DATA56 4 5 M_DATA_R_56
SRN56-1 SRN56-1
SRN10-1 SRN10-1 RN16 RN46
RN18 RN45 M_DATA_R_31 1 8 1 8 M_DATA_R_59 M_A[12..0] 7,10
M_DATA31 1 8 M_DATA_R_31 M_DATA63 1 8 M_DATA_R_63 M_DATA_R_27 2 7 2 7 M_DATA_R_58
M_DATA27 2 7 M_DATA_R_27 M_DATA62 2 7 M_DATA_R_62 M_DATA_R_26 3 6 3 6 M_DATA_R_62 M_DM_R_[8..0] 10
M_DATA26 3 6 M_DATA_R_26 M_DATA59 3 6 M_DATA_R_59 M_DATA_R_30 4 5 4 5 M_DATA_R_63
M_DATA30 4 5 M_DATA_R_30 M_DATA58 4 5 M_DATA_R_58
SRN56-1 SRN56-1
2 M_DM[8..0] 7 2
SRN10-1 SRN10-1 Put decap near power(1.25V) and pull-up resistor

R222 10R2
M_DQS8 1 2 M_DQS_R8
RN17
M_DATA69 1 8 M_DATA_R_69 Put decap near power(1.25V) and pull-up resistor RN29
M_DATA68 2 7 M_DATA_R_68 7,10 M_BS1# 1 8 M_BS1_SR# 10
M_DATA64 3 6 M_DATA_R_64 7,10 M_RAS# 2 7 M_RAS_SR# 10
M_DATA65 4 5 M_DATA_R_65 7,10 M_BS0# 3 6 M_BS0_SR# 10
M_A10 4 5 M_A_SR10 10
SRN10-1
RN21 SRN10-1
M_DATA71 1 8 M_DATA_R_71
M_DATA70 2 7 M_DATA_R_70
M_DATA67 3 6 M_DATA_R_67 R230
M_DATA66 4 5 M_DATA_R_66 7,10 M_WE# 1 2 M_WE_SR# 10
SRN10-1 10R2
RN23
M_A3 1 8 R233
M_A_SR3 10
M_A7 2 7 1 2
M_A_SR7 10 7,10 M_CAS# M_CAS_SR# 10
M_A9 3 6 M_A_SR9 10
M_A12 4 5 10R2
M_A_SR12 10
SRN10-1

R169 10R2
1
M_DM0 1 2 M_DM_R_0 RN26 1
M_A0 1 8 M_A_SR0 10
R242 10R2 R181 10R2 M_A6 2 7
M_DM5 1 2 M_DM_R_5 M_DM1 1 2 M_DM_R_1 M_A8 3 6
M_A_SR6 10
M_A_SR8 10
Wistron Corporation
M_A11 4 5 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
M_A_SR11 10
R251 10R2 R195 10R2 Taipei Hsien 221, Taiwan, R.O.C.
M_DM6 1 2 M_DM_R_6 M_DM2 1 2 M_DM_R_2 SRN10-1
Title
R254 10R2 R200 10R2 DDR Serial/Terminator Resistor
M_DM7 1 2 M_DM_R_7 M_DM3 1 2 M_DM_R_3
Size Document Number Rev
R221 10R2 R238 10R2 A3
Skylark II SC
M_DM8 1 2 M_DM_R_8 M_DM4 1 2 M_DM_R_4
Date: Tuesday, July 20, 2004 Sheet 12 of 42

A B C D E
A B C D E

Ferrite bead impedance:


75ohm@100MHz Change 68.00082.051
68.00084.271
to CRT 5V_S0
1
F1
2
CRT_VCC_S0
L1
DAC_RED_SYS 1 2

1
FUSE-1A6V
BLM18BB470SN1 D1
RB751V-40-U

1
5V_S0 5V_S0 5V_S0
L2
DAC_GREEN_SYS 1 2 BC116

1 2
D3 D4 D2 SCD1U16V

2
1

1
BLM18BB470SN1 1 1 1
4 4
L3 3 3 3 R1 R274 R273 CRT1
DAC_BLUE_SYS 1 2 10KR2 2K2R2 10KR2 16
ZZ.47034.1F1
DY-SC47P50V2JN

DY-SC47P50V2JN

DY-SC47P50V2JN
2 2 2

2
1

1
ZZ.47034.1F1

ZZ.47034.1F1
BLM18BB470SN1 SB 6

1
C160

C161

C162
BC112 BC113 BC115 DY-DA204U-U1 DY-DA204U-U1 DY-DA204U-U1 15 CRT_IN# 11
R275 R276 R277 ZZ.00204.011 ZZ.00204.011 ZZ.00204.011 CRT_R 1

2
75R3F 75R3F 75R3F SC3P50V2CN SC3P50V2CN SC3P50V2CN 7
DAT_DDC1_5 12
No Stuff CRT_G 2

2
8
13
5V_S0 CRT_B 3
9
14
4
10
BC1 CLK_DDC1_5 15
SCD1U16V 5
R651 33R2
1 2 17
U1A

14

1
R279 L14 VIDEO-15-35
1 2 2 3 HSYNC_5 1 2
8,27 DAC_HSYNC DY-BLM11B750S
39R2J R652 33R2
TSAHCT125 1 2
14

7
4
3
R278 L13 3

8,27 DAC_VSYNC 1 2 5 6 VSYNC_5 1 2


U1B DY-BLM11B750S

ZZ.47034.1F1

ZZ.47034.1F1
39R2J

DY-SC47P50V2JN

DY-SC47P50V2JN
TSAHCT125
7

1
5V_S0 5V_S0

BC118

BC119
D24 D25 BC117 BC114
1 1 SC3D3P50V SC3D3P50V Layout Note:

2
3 3 Must be a ground return path for
CRT_R,CRT_G,CRT_B
2 2
check list 0.70 said Tie to
DY-DA204U-U1
ZZ.00204.011
DY-DA204U-U1
ZZ.00204.011
GND??

5V_S0
1

C147 DDC_CLK & DATE LEVEL SHIFT


SCD1U16V U31
2

8 DAC_GREEN 4 3 DAC_GREEN_DOCK DAC_GREEN_DOCK 27


A B0
5 2
VCC GND 3D3V_S0 3D3V_S0
6 1 DAC_GREEN_SYS
2 S B1 2

1
NC7SB3157P6X-U
R282
10KR2

1
U32
R281 R280

2
4 3 DAC_BLUE_DOCK 2K2R2 2K2R2
8 DAC_BLUE A B0 DAC_BLUE_DOCK 27
5 2
VCC GND

1
DAC_BLUE_SYS Q22 2N7002

G
6 1

2
S B1

8,27 DAT_DDC1 2 3 DAT_DDC1_5


NC7SB3157P6X-U

D
U30

8 DAC_RED 4 3 DAC_RED_DOCK DAC_RED_DOCK 27


A B0

1
Q23 2N7002

G
5 2
VCC GND
6 1 DAC_RED_SYS
S B1
8,27 CLK_DDC1 2 3 CLK_DDC1_5

D
NC7SB3157P6X-U
1

R283

4K7R2
2

1 1
R636
1 2
27,33 DOCK_IN#
0R2-0 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
Title
CRT CONN.
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 13 of 42

A B C D E
A B C D E

Pin 32 "PWR_LED#" is
directly short to GND. LVDS I/F
LCD_DCBAT
DCBATOUT LCD_DCBAT
Because this LED doesn't TXOUT0- 8
TXOUT0+ 8
R34
Layout 40 mil need BLINK function in TXOUT1- 8
1 2 TXOUT1+ 8
J2 TXOUT2- 8
CN2 0R1206 CN3
TXOUT2+ 8
44 43 C176 C177 42 G1
TXCLK- 8
40 SCD1U SCD1U 40 1 2 TXCLK+ 8
1 39 39 1
38 38 GAP-OPEN
37 37 R293 3D3V_S0
NUM_LED# 33
36 36 0R2-0
CAPS_LED# 33
3D3V_S0 35 LCD_35 35 LCD_35 1 2 BRIGHTNESS 33
34 34 U13
3D3V_S0
33 SPLED# 33 SPLED# 16 5 1 802.11LED# 802.11LED# 33
VCC A BT_802.11_LED#
32 32 2
B
31 WIRELESS_LED# 31 WIRELESS_LED# 4 3
R297 Y GND
BRIGHTNESS 30 BRIGHTNESS 30
29 LCD_29 29 LCD_29 1 2
CAPS_LED# 28 CAPS_LED# 28 3D3V_S0 NC7SZ32-U
27 NUM_LED# D11 27 NUM_LED# DUMMY-R2 U77D
MEDIA_LED# 26 1 2 MEDIA_LED# 26 TSLCX08-U

14
28 HDD_LED#
25 SMBC_ICH_1 RB521S-30-U 25 1
SMBC_ICH_1 2 SMBC_ICH 3,10,16
SMBD_ICH_1 24 1 R641 2 SMBD_ICH_1 24 R640 DY-0R2-0 12
3,10,16 SMBD_ICH NB_BL_ON 8
23 ENABLE DY-0R2-0 23 ENABLE 11
CHARGE_LED# 22 22 13 3D3V_S0
41 CHARGE_LED# BACKLT_OFF# 15
21 21
5V_S5 5V_S5
20 20

1
19 19 5V_S0 SB_11
3D3V_S3 3D3V_S3 R50
18 18
17 5V_S0 17
4K7R2 D16
16 16
15 TXCLK+ 15 TXCLK+ 1 6 802.11LED 29

2
TXCLK- 14 TXCLK- 14
13 13
TXOUT2+ 12 TXOUT2+ 12 2 5 BT_LED 24

3
11 TXOUT2- 11 TXOUT2- D Q14
2 10 10 1 BT_802.11_LED 2
9 TXOUT1+ 9 TXOUT1+ G 3 4 802.11_ACT 18
TXOUT1- 8 TXOUT1- 8 S 2N7002

1
7 7
TXOUT0+ 6 TXOUT0+ 6 RB731U
5 TXOUT0- 5 TXOUT0- R63 R85 R86 R650
100KR2 100KR2 100KR2 100KR2
3D3V_LCD_S0

4 4
3 3

2
2 3D3V_LCD_S0 2

1 3D3V_LCD_S0 1 3D3V_LCD_S0
42 41 41

ETY-CONN40A-S1
DY-SPD-CONN40D-6

U8 Layout 40 mil
3D3V_S0 SI3445DV-U
C172 SC1000P50V SPLED# 6
C173 SC1000P50V WIRELESS_LED# 4 5

D
C174 SC1000P50V ENABLE

S
2
C28 SC1000P50V BRIGHTNESS 1

1
SC2D2U16V5ZY

SC2D2U16V5ZY
1

1
R42 3D3V_LCD_S0

G
C39 C31 100KR2

SCD1U16V
2

1
1
C23 C178

2
3 3
SC10U10V5ZY

2
SB R35 R27
1KR2
4K7R2

2
1

3
D

3
D 1 Q6
1 Q3 2N7002
8 LCDVDD_ON G
2N7002 S
G

2
S

2
Power Plane S5 S5 S5 S0 S5 S5 S5 S5
Check signal type
Control Signal PM_SLP_S5# PM_SLP_S3# PM_SLP_S1# EMAIL_LED STDBYLED_EN# SPLED STDBYLED# Standby_LED E_mail_LED
and Voltage level
STDBYLED_EN#
POWER ON DFAULT H H H L H FLASH L OFF OFF
802.11LED#
S0 without E_mail LED H H H L H Flash L OFF OFF
SB_SDA
SB_SCL
S0 with E_mail LED H H H H H Flash L OFF Flash NUM_LED#
CAP_LED#
4 S1 without E_mail LED H H L L L L L ON OFF BRIGHTNESS 4
CHARGE_LED#
S3 H L L L L L L ON OFF Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Enter/Leave S4 without Taipei Hsien 221, Taiwan, R.O.C.
E_mail LED H L L L L Flash FLASH Flash OFF
Title
Enter/Leave S4 with LCD CONN & INVERTER
E_mail LED H L L H L Flash FLASH Flash OFF
Size Document Number Rev
A3 SC
S4/S5 H L L L H FLASH L OFF OFF Skylark II
Date: Tuesday, July 20, 2004 Sheet 14 of 42

A B C D E
A B C D E

3D3V_S5 HUB INTERFACE LAYOUT


U51A Banias/Montara-GM
HL_[10..0] 7 Route signals with 20 mil space routing. to
RN60 Checklist Ver.0.89 P.35
2 3 USB_OC#4 C20 L19 HL_0 others group traces
24 USBP0 USBP0P HI0
1 4 USB_OC#5 24 USBN0 D20
USBP0N HI1
L20 HL_1 Signals must match +/- 0.1" of HUB_STB/STB#
A21 M19 HL_2
SRN10KJ
27 USBP3
B21
USBP1P HI2
M21 HL_3
signals. 1D5V_S0
27 USBN3 USBP1N HI3
27 USBP2 C18 P19 HL_4
USBP2P HI4 Banias/Montara-GM Banias/Odem RDDP
27 USBN2 D18 R19 HL_5
USBP2N HI5
RN59 24 USBP1 A19 T20 HL_6 Checklist Ver.0.7 P.120
USBP3P HI6

1
1 8 USB_OC#0 SC_1 24 USBN1 B19
USBP3N HI7
R20 HL_7 P.34 When board
4 2 7 USB_OC#1 C16 P23 HL_8 R361 R360 4
24 USBP4 USBP4P HI8 48.7 ohm 1% pull impedance is 55
3 6 USB_OC#2 D16 L22 HL_9 487R3F 130R3F
24 USBN4 USBP4N HI9 up to 1D5V_S0 1D5V_S0 +/-15% Ohm
4 5 USB_OC#3 A17 N22 HL_10 R364 56R2J
USBP5P HI10 HL_11 36.5 ohm to GND
B17 K21 1 2 R362

2
USBP5N HI11
SRN8K2-U 1 2 HUB_VREF HUB_VSWING
USB_OC#0 B15 P21 48D7R3F
OC0# HI_STB/HI_STBS HL_STB 7

1
USB_OC#1 C14 N20
OC1# HI_STB#/HI_STBF HL_STB# 7
3D3V_S0 USB_OC#2 A15
OC2#
CLOSE TO PIN with in 0.5" BC140 R340 R339
USB_OC#3 B14 R23 SCD1U16V 150R3F 150R3F BC149
R351 USB_OC#4 OC3# HICOMP 10 mil trace,20 mil space SCD1U16V
A14 R22 HUB_VSWING
OC4# HI_VSWING
1 2 USB_OC#5 D14 M23 HUB_VREF

2
OC5# HIREF
T21 CLK66_ICH 3
10KR2 CLK66
13 CRT_IN# J20
GPIO32
Close to

1
32 FWH_WP# G22 pin
GPIO33 TP22 TPAD30 R359
24 BT_DETACH BT_DETACH F20 A10
GPIO34 LAN_RXD0 TP26 TPAD30
24 BT_IN# BT_IN# G20 A9
GPIO35 LAN_RXD1 TP23 TPAD30 10R2
F21 A11
GPIO36 LAN_RXD2
2

H20 B10 TP21 TPAD30

2
R367 GPIO37 LAN_TXD0 TP19 TPAD30
14 BACKLT_OFF# F23 C10
10KR2 TP4 GPIO38 LAN_TXD1 TP15 TPAD30 R418
H22 A12
TPAD30 GPIO39 LAN_TXD2 BC141
31 THRM_SDN_EN# G23 B11 1 2
TP11 GPIO40 LAN_RSTSYNC TP20 TPAD30 SC10P50V2JN-1 3D3V_S0
H21 C11
1

TPAD30 GPIO41 LAN_CLK DY-10KR2


F22
GPIO42 TP17 TPAD30
29 BOOTBLOCK# E23 D11
GPIO43 EE_DIN

2
D10 TP18 TPAD30
CLK48_ICH EE_CS TP14 TPAD30 R435
3 CLK48_ICH F19 C12
CLK48 EE_SHCLK TP27 TPAD30
A8
EE_DOUT DY-1KR2
ZZ.10234.1D1
1
ZZ.33034.151

B23 C9 ICH_AC_SYNC R417 1 2 33R2 AC_SYNC 24,25

1
R384 USBRBIAS# AC_SYNC R436
3 D9 ICH_AC_DOUT 1 2 33R2 AC_SDOUT 24,25
3
33R2 AC_SDOUT
A23 B8 AC_BITCLK 25
USBRBIAS AC_BIT_CLK
C13 AC_RST#_R
AC_RST#
1

D13 AC_SDATA_IN0 25
2

R373 AC_SDIN0 R411


A13 AC_DIN1 24 1 2 33R2 AC_RST# 24,25
20R3F AC_SDIN1
B13 ICH_AC_DIN2
BC167 AC_SDIN2 TP16
SC10P50V2JN-1 TPAD30
2
ZZ.10034.1B1

ICH4-M-U Place these resistor near


Place near S/B as possible
S/B

PIDE_D[0..15] 28
U51E
PIDE_A[0..2] 28

PIDE_D15 Y11 Y17


PIDE_D14 PDD15 SDD15
W11 AA17
PDD14 SDD14
ICH4 Integrated Pull-up and Pull-down Resistors PIDE_D13
PIDE_D12
W10
AB10
PDD13 SDD13
Y16
AB16
3D3V_S0
PDD12 SDD12
ICH4 EDS 11450 1.1 PIDE_D11 W9
PDD11 SDD11
Y15
PIDE_D10 AC9 AA15
PIDE_D9 PDD10 SDD10
Y9 AC15
PDD9 SDD9
2
EE_DIN, EE_DOUT, PME#, PWRBTN# PIDE_D8 AB9
PDD8 SDD8
Y14
2
PIDE_D7 AA8 AA14
PDD7 SDD7
GNT[B:A]#/GNT[5]#/GPIO[17:16], ICH4 internal 20K pull-ups PIDE_D6 Y8
PDD6 SDD6
W14

1
2
PIDE_D5 AB8 AB15
PDD5 SDD5
LAD[3:0]#/FWH[3:0]#, LDRQ[1:0], PIDE_D4 AA7
PDD4 SDD4
W15 RN57
PIDE_D3 AA10 AC16
PIDE_D2 PDD3 SDD3 SRN4D7KJ
Y10 W16
PDD2 SDD2
LAN_RXD[2:0] ICH4 internal 10K pull-ups PIDE_D1 AC11
PDD1 SDD1
AB17
PIDE_D0 AB11 W17

4
3
PDD0 SDD0
AC_BITCLK, AC_RST#, AC_SDIN[2:0], ICH4 internal 20K pull-downs
28 PIDE_IOW# W12 AA18
PDIOW# SDIOW#
AC_SDOUT, AC_SYNC, DPRSLPVR, SPKR 28 PIDE_DACK# Y12
PDDACK# SDDACK#
AB19
28 PIDE_DREQ AA11 AB18
PDDREQ SDDREQ
28 PIDE_IOR# AC12 Y18
PDIOR# SDIOR#
USB[5:0][P,N] ICH4 internal 15K pull-downs 28 PIDE_IORDY AB12
PIORDY SIORDY
AC19

R356
PDD[7]/SDD[7], PDDREQ / SDDREQ ICH4 internal 11.5K pull-downs 3D3V_S0 2 1 PIDE_A0 AA13
PDA0 SDA0
AA20
PIDE_A1 AB13 AC20
4K7R2 PDA1 SDA1
PIDE_A2 W13 AC21
PDA2 SDA2
LANCLK ICH4 internal 100K pull-downs

28 PIDE_CS1# Y13 AB21


PDCS1# SDCS1#
ICH4 IDE Integrated Series Termination Resistors 28 PIDE_CS3# AB14
PDCS3# SDCS3#
AC22

AC13 PIDE_IRQ14 28
IRQ14
AA19
IRQ15
PDD[15:0],SDD[15:0],PDIOW#,SDIOW#,
1 1
PDIOR#,PDIOW#,PDREQ,SDREQ, ICH4-M-U
approximately 33 ohm
PDDACK#, SDDACK#, PIORDY,SIORDY, Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PDA[2:0],SDA[2:0], PDCS1#,SDCS1#, 3D3V_S0 Taipei Hsien 221, Taiwan, R.O.C.
RN58
PDCS3#,SDCS3#,IRQ14,IRQ15, 2 3 Title
1 4
ICH4-M (1 of 3)
SRN8K2J Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 15 of 42

A B C D E
A B C D E

PCI/Interrupt I/F Pullups


PCI_AD[31..0] 18,19,22 RTC Circuitry
3D3V_S0
PCI_C/BE#[3..0] 18,19,22 VCC_RTC_S5 3D3V_RTC
RP7 3D3V_AUX
PCI_STOP# 1 10 SB_12 U51D
PCI_TRDY# 2 9 PCI_PLOCK#

1
PCI_FRAME# 3 8 PCI_DEVSEL# 19 PIRQA# D5 P4 PCI_AD31
PIRQA# AD31 D34
PCI_SERR# 4 7 PCI_PERR# 19 PIRQB# C2 D2 PCI_AD30
PIRQB# AD30
3D3V_S0 5 6 PCI_IRDY# 19 PIRQC# B4
PIRQC# AD29
R1 PCI_AD29
RB751V-40-U
SB
22 PIRQD# A3 D3 PCI_AD28
PIRQD# AD28 BC174
SRP8K2-1 18 PIRQE# C8 P2 PCI_AD27

2
PIRQF# PIRQE#/GPIO2 AD27 SCD1U16V
D7 E1 PCI_AD26
4 3D3V_S0 PIRQF#/GPIO3 AD26 4
18 PIRQG# C3 P1 PCI_AD25
PIRQG#/GPIO4 AD25
ICH_GPIO5 C4
PIRQH#/GPIO5 AD24
E2 PCI_AD24 SB
RP6 M5 PCI_AD23 BC164
PCI_REQA# AD23 SCD1U16V RTC1
1 10 REQ4:RealTek LAN 22 PCI_REQ#4 B6
REQ4# AD22
E4 PCI_AD22
PCI_REQ#2 2 9 PCI_REQ#0 REQ0:Mini PCI PCI_REQ#3 C7 N3 PCI_AD21 5
REQ3# AD21
PCI_REQ#3 3 8 PCI_REQ#1 REQ1:R5C590 PCI_REQ#2 B3 E3 PCI_AD20
REQ2# AD20
PCI_REQB# 4 7 PCI_REQ#4 19 PCI_REQ#1 A2 N2 PCI_AD19 R383 D35 R389
REQ1# AD19
3D3V_S0 5 6 18 PCI_REQ#0 B1
REQ0# AD18
E5 PCI_AD18 LAYOUT: RTCRST# 1 2 2 1 1 2 RTBAT 1
PCI_REQB# A6 N1 PCI_AD17 MAKE PAD 2
REQB#/REQ5#/GPIO1 AD17 180KR2
SRP8K2-1 PCI_REQA# B5 F4 PCI_AD16 3
REQA#/GPIO0 AD16
F5 PCI_AD15 ACCESSABLE RB751V-40-U 1KR2
AD15

2
3D3V_S0 D6 L3 PCI_AD14
22 PCI_GNT#4 GNT4# AD14
TPAD30 PCI_GNT#3 B7 H2 PCI_AD13 GP1 4
TP30 GNT3# AD13
TPAD30 PCI_GNT#2 A7 L2 PCI_AD12 BC165
TP31 GNT2# AD12 SCD1U16V
RP5 E6 G4 PCI_AD11 GAP-OPEN
19 PCI_GNT#1 GNT1# AD11
PCI_SERIRQ 1 10 18 PCI_GNT#0 C1 L1 PCI_AD10 RTCRST# RTCRST# delay SCON3

1
PCIRST#_3 PIRQF# GNT0# AD10
2 9 PCI_GNTB# C5 G2 PCI_AD9 18~25ms
PIRQD# TPAD30 TP29 GNTB#/GNT5#/GPIO17 AD9
3 8 PIRQA# PCI_GNTA# E8
GNTA#/GPIO16 AD8
K2 PCI_AD8 RTC-conn-C
PIRQC# 4 7 PIRQB# TPAD30 TP25 J5 PCI_AD7 ICH_VBIAS BC175
AD7
3D3V_S0 5 6 PIRQE# 18,19,22 PCI_FRAME# F1 H4 PCI_AD6
FRAME# AD6
18,19,22 PCI_IRDY# L5 J4 PCI_AD5 ICH_VBIAS
IRDY# AD5
SRP8K2-1 18,19,22 PCI_TRDY# F2 G5 PCI_AD4
TRDY# AD4

1
M3 K1 PCI_AD3 SCD047U25V3KX
3D3V_S0 18,19,22 PCI_DEVSEL# DEVSEL# AD3
F3 H3 PCI_AD2 R396
18,19,22 PCI_STOP# STOP# AD2
ICH_PME# G1 J3 PCI_AD1 10MR2J
18,19,22 PCI_PAR PAR AD1
Internal 18,19,22 PCI_PERR# L4 H5 PCI_AD0
RN69 SRN8K2J PERR# AD0 BC190
Pull-up 19 PCI_PLOCK# PCI_PLOCK# M2

2
PIRQG# PLOCK#
2 3 18,19,22 PCI_SERR# K5 N4 PCI_C/BE#3 RTCX1 1 2
ICH_GPIO5 SERR# C/BE3#
1 4 18,19,22 ICH_PME# ICH_PME# W2 M4 PCI_C/BE#2
PME# C/BE2# RTCX2 SC1P50V2CN
17,19,21 PCIRST#_3 U5 K4 PCI_C/BE#1
3 PCIRST# C/BE1# 3
3 CLKPCIF_ICH CLKPCIF_ICH P5 J2 PCI_C/BE#0
PCICLK C/BE0#

3
1
R434 X2
R419 ICH4-M-U 10MR2J XTAL-32D768K-4P
R380 DY-10R2
1 2 PM_SLP_S1# DY-SC10P50V2JN-1 ZZ.10034.1D1
PM_SLP_S1# 3

2
BIOS NOTE:
1 2

2
0R2-0 3D3V_S5
ZZ.10034.1F1
BIOS should disable PM_STPCPU# on CK_Titan.
BC185
U49 BC189
PM_SLP_S1#_G 1 5 (Use H_DPSLP# instead) 1 2
A VCC U51B
2

1
PM_SLP_S3# 2 SC1P50V2CN
B BC172 J19 R2 AGPBUSY# 7
DY-SCD1U16V3KX APICCLK AGPBUSY#/GPIO6 R487
3 4 H19 R3 ECSMI 33
GND Y APICD0 GPIO7
1 R363 2 K20 V4 ECSWI 33
10KR2 3D3V_S0
10KR2 APICD1 GPIO8
DY-NC7SZ08-U

2
ZZ.7SZ08.0AG TP9 V23 V5 RN72
5 CC_STPCLK# STPCLK# GPIO12 ECSCI 33
TPAD30 AB23 W3 PM_THRM# 3 2
5 CC_A20M# A20M# GPIO13 BT_WAKEUP_3 24
5 CC_CPUSLP# U21 AGPBUSY# 4 1
CPUSLP#
5,7,28 CC_CPUPWRGD Y23 Y21 PM_STPPCI# 3
CPUPWRGD STP_PCI#/GPIO18 SRN10KJ
5 CC_INTR AB22 W18 PM_SLP_S1#_G
VCC_IO_S0 INTR SLP_S1#/GPIO19 3D3V_S5
5 CC_NMI V21 W19 PM_STPCPU# 3
NMI STP_CPU#/GPIO20
1

W23 T3 PM_C3_STAT# TPAD30 RN70


5 CC_SMI# SMI# C3_STAT#/GPIO21 TP36
R349 W21 Y20 PM_CPUPERF# TPAD30 BATLOW# 3 2
5 CC_IGNNE# IGNEE# CPUPERF#/GPIO22 TP8
56R2J Y22 J21 ICH_GMUXSEL# TPAD30 SYS_RESET# 4 1
33 ICH_A20GATE A20GATE SSMUXSEL/GPIO23 TP10
U22 AC2 PCI_CLKRUN# SRN10KJ
33 RCIN# RCIN# CLKRUN#/GPIO24 PCI_CLKRUN# 18,19,22,29
5 CC_FERR# 2 R357 1 AA21 V2 BT_ENABLE
TP35
2

56R2J FERR# GPIO25 EMAIL_LED TPAD30 R642


5,32 CC_INIT# V22 W1 EMAIL_LED# 33
INIT# GPIO27
W4 SPLED# SPLED# 14 PCI_CLKRUN# 1 2
GPIO28 10KR2
18,19,29,33 PCI_SERIRQ J22
2 SERIRQ 2
Y4 PM_SLP_S3#_1 1 2 R462 0R2-0 PM_SLP_S3# 20,25,31,35,36,37,38 RN71
SLP_S3#
29,32,33 LPC_LFRAME# T5 Y2 PM_SLP_S4#_1 1 2 R460 0R2-0 PM_SLP_S4# 28,33,36,37
EMAIL_LED# 3 2
LFRAME#/FWH4 SLP_S4#
29 LPC_LDRQ0# U3 AA2 PM_SLP_S5#_1 1 2 R461 0R2-0 TP74
SPLED# 4 1
LDRQ0# SLP_S5# ICH_RI# R469 1
LPC_LDRQ1# U4 Y1 2 10KR2 TPAD30
3D3V_S5 R374 SRN10KJ
VCC_RTC_S5 RN73 TP32 TPAD30 LDRQ1# RI#
AA1 SB_PWRBTN# 28 VGATE 2 1
LPC_LAD0 PWRBTN# SYS_RESET#
1 8 LPC_LAD0_R T2 Y3 R475
LAD0/FWH0 SYS_RESET# ICH4_LANRST# 100KR2
LPC_LAD1 2 7 LPC_LAD1_R R4 Y5 2 1
LAD1/FWH1 LAN_RST#
1

LPC_LAD2 3 6 LPC_LAD2_R T4 AB2 BATLOW# 10KR2


R379 LAD2/FWH2 BATLOW#/TP0
29,32,33 LPC_LAD[3..0] LPC_LAD3 4 5 LPC_LAD3_R U2 AB3 PM_SUS_STAT# PM_SUS_STAT# 33
100KR2 SRN22-1 LAD3/FWH3 SUS_STAT#/LPCPD# R358
V19 VGATE 39
VGATE/VRMPWRGD 3D3V_S5 5V_S0 3D3V_S0
8,31 PM_SUS_CLK AA4 W20 THRMTRIP# 1 2 PM_THERMTRIP# 5,28
SUSCLK THRMTRIP# PM_THRM# 0R2-0
V1 PM_THRM# 8,31
2

THRM# VCC_IO_S0
[Place near ICH] W6
INTRUDER# R350
RTCRST# W7
RTCRST# SMLINK0
AC3 SB_2 1 2

1
AB6 AB1 56R2J
31 G768D_PWROK PWROK SMLINK1 3D3V_S5
RSMRST# AA6 AB4 SMBD_SB R459
31 RSMRST# RSMRST# SMBDATA

3
4

3
4
AB5 AC4 SMBC_SB R445
VCCRTC SMBCLK
2

VCC_RTC_S5 ICH_VBIAS Y6 AA5 1 2 RN68 10KR2 RN66


R444 VBIAS SMBALERT#/GPIO11 10KR2 SRN10KJ SRN10KJ
RTCX1 AC7

2
DY-100KR2 RTCX1
RTCX2 AC6 H23 SB_SPKR SB_SPKR 25
RTCX2 SPKR

1
V20 J23 CLK14_ICH Q48

G
37,39 DPRSLPVR CLK14_ICH 3
1

2
1

2
1
CC_DPSLP# DPRSLPVR CLK14
SB_3 5,7,29 CC_DPSLP# U23
DPSLP#
1 SMBC_SB 3 2 SMBC_ICH 3,10,14

1
R365 2N7002

G
S
ICH4-M-U DY-33R2 Q49

D
Should go high no sooner than 10mS ZZ.33034.1D1
H/W Strapping SMBD_SB 3 2
2N7002
SMBD_ICH 3,10,14
after both +3VRUN and +1.8VRUN
2

CLK termination 3D3V_S0

S
If ICH-4 LAN not used,10K ohm

D
have reach their nominal voltage PD
1
close to ICH4 BC144
R366 1
or connect directly to 2 1
Should go high no sooner than 10mS DY-SC10P50V2JN-1
----RSMRST#(SUSPWROK)
ZZ.10034.1F1 DY-1KR2
after both +3VSUS and +1.8VSUS But in Bon conncet to Stuff for No Reboot Wistron Corporation
have reach their nominal voltage PWROK(DELAY_IMVP_PWRGD) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
ICH4-M (2 of 3)
Size Document Number Rev
Custom SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 16 of 42

A B C D E
A B C D E

PCIRST#_3 Buffer to enhance the driving strength 3D3V_S0


3D3V_S0

U77A

14

1
U51C
1 R626 BC198 BC59 BC214 BC192 BC213 BC135
3 1 2 SCD1U16V SCD1U16V SCD1U16V SCD1U16V SC10U10V5ZY SC10U10V5ZY A5 B22
PCIRST1# 7,22,32,33

2
VCC3_3 VSS
2 B2 AC23
VCC3_3 VSS

1
TSLCX08-U 68R2 H6 AC18
C424 VCC3_3 VSS
4 J1 AC14 4

7
DUMMY-C3 VCC3_3 VSS
K6 AC10
VCC3_3 VSS
M10 AC5
3D3V_S0 VCC3_3 VSS
P6 AC1
VCC3_3 VSS

1
U1 AB20

2
BC215 BC208 BC219 3D3V_S0 3D3V_LAN_S5AC VCC3_3 VSS
P12 AB7
SCD1U16V SCD1U16V SCD1U16V VCC3_3 VSS
V10 AA22

14

2
VCC3_3 VSS
V16 AA16
VCC3_3 VSS
4 R619 R463 R471 V18 AA12
VCC3_3 VSS
6 2 1 PCIRST2# 18,29,33 2 1 2 1 AC8 AA9
VCC3_3 VSS
6,19,21 PCIRST#_3 5 AC17 AA3
VCC3_3 VSS

1
33R2 0R2-0 DY-0R2-0 H18 Y19
TSLCX08-U C425 ZZ.R0034.1D1 VCC3_3 VSS
J18 Y7

7
VCC3_3 VSS

1
U77B DUMMY-C3 W22
C301 BC220 BC221 VSS
E9 W8
SC4D7U10V5ZY SCD1U16V SCD1U16V VCCLAN3_3/VCCSUS3_3 VSS
F9 W5

2
VCCLAN3_3/VCCSUS3_3 VSS
C383 near E11 M20

2
VCCSUS3_3 VSS
F10 V17
KBC U90 3D3V_S5 V9
VCCSUS3_3 VSS
V15
VCCSUS3_3 VSS
V8 V3
VCCSUS3_3 VSS
V7 T23
5V_S0 VCCSUS3_3 VSS
F15 P20
VCCSUS3_3 VSS

1
U1C F16 T19
BC199 BC166 BC191 BC155 VCCSUS3_3 VSS
F17 T1
14

10

SCD1U10V2MX-1 SCD1U16V SCD1U16V SC10U10V5ZY VCCSUS3_3 VSS


F18 R21

2
VCCSUS3_3 VSS
R2 K14 R18
VCCSUS3_3 VSS
PCIRST#_3 9 8 1 2 RSTDRV#_5 28 R5
1D5V_S0 VSS
K10 P22
33R2 VCC1_5 VSS
K12 P13
3 TSAHCT125 VCC1_5 VSS 3
K18 P11
7

VCC1_5 VSS

1
K22 P3
C217 BC150 BC154 C214 C219 BC156 C71 VCC1_5 VSS
P10 N23
SC47P50V2JN SCD01U16V2KX SCD1U16V SCD1U16V SCD1U10V2MX-1 SC10U10V5ZY SC10U10V5ZY VCC1_5 VSS
T18 N21

2
1D5V_S0 VCC1_5 VSS
V14 N19
VCC1_5 VSS
PCIRST#_3 3V to 5V level shift for HDD & CDROM U19 N14
5V_S0 VCC1_5 VSS
L23 N13
1D5V_S0 1D5V_LAN_S5AC VCCHI VSS
M14 N12
VCCHI VSS

1
P18 N11
BC142 BC152 BC143 VCCHI VSS
*Within a given well, 5VREF needs to be up before the T22
VCCHI VSS
N10

2
SC1U10V3KX SC1000P50V SC10U10V5ZY

ZZ.R0034.1D1
N5
corresponding 3.3V rail

2
VSS

DY-0R2-0
F6 M13
VCCLAN1_5/VCCSUS1_5 VSS

R478
R391 R477 F7 M12
D38 DY-1KR2 0R2-0 VCCLAN1_5/VCCSUS1_5 VSS
E12 M11
RB751V-40-U ZZ.10234.1D1 VCCSUS1_5 VSS
R6 M1

1
3D3V_S0 VCCSUS1_5 VSS
T6 M22
2

2
VCCSUS1_5 VSS
U6 L21
VCCSUS1_5 VSS

1
G18 L14
VCCSUS1_5 VSS
1

BC217 BC218 BC216 E13 L13


D37 R412 SCD1U16V SCD1U16V SC10U10V5ZY VCCSUS1_5 VSS
F14 L12

2
1KR2 VCCSUS1_5 VSS
E20 L11
RB751V-40-U VCCSUS1_5 VSS
L10
VSS
E7 K23
2

V5REF_RUN V5REF VSS


V6 U20
V5REF VSS
K19
V5REF_SUS VSS
E15 K13
BC181 BC182 V5REF_SUS VSS
K11
SCD1U16V SCD1U16V 1D5V_S5 VSS
P14 K3
V_CPU_IO VSS
U18 J6
2 V_CPU_IO VSS 2
AA23 H1
V_CPU_IO VSS
G21
VSS

1
3D3V_S5 5V_S5 C22 G19
BC18 BC153 BC145 VCCPLL VSS
G6
SCD1U16V SCD1U16V SC10U10V5ZY VSS
G3

2
VSS
1

D1 F8
D36 R390 VSS VSS
C23 E22
1KR2 VSS VSS
C21 E21
RB751V-40-U VSS VSS
C19 E19
VSS VSS
C17 E18
2

VCC_IO_S0 VSS VSS


C15 E17
VSS VSS
C6 E16
VSS VSS
D22 E14
BC171 BC176 VSS VSS
B20 E10
VSS VSS

1
SCD1U16V SC1U10V3ZY B18 D23
BC139 BC147 BC148 VSS VSS
B16 D21
SCD1U16V SCD1U16V SC1U10V3ZY VSS VSS
B12 D19

2
VSS VSS
B9 D17
VSS VSS
A22 D15
VSS VSS
A20 D12
VSS VSS
A18 D8
1D5V_S0 VSS VSS
A16 D4
VSS VSS
A4
VSS
A1
VSS
1

BC151 BC157 ICH4-M-U


SCD1U16V SC1U10V3ZY
2

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
ICH4-M (3 of 3)
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 17 of 42

A B C D E
A B C D E

1 1

Mini PCI 802.11A/B


3D3V_S0

CN12
125 RING BC226 BC225 BC227 BC223
TIP 1 2 SC4D7U10V5ZY SCD1U16V SCD1U16V SCD1U16V
PCI_AD[0..31] 16,19,22
3 4 PIN 3-16 : LAN RESERVE
5 6 3D3V_S0
7 8
9 10
14 802.11_ACT 1 R502 2 11 12
0R2-0 13 14 5V_S0 3D3V_S0 3D3V_LAN_S5AC
29 RADIO_ON
3D3V_S0 15 16
16 PIRQG# 1 R485 2 17 18
0R2-0 19 20 1 R470 2 PIRQE# 16

1
21 22 0R2-0
23 24 R473
25 26 DY-10KR2
3 PCLK_MINI PCIRST2# 17,29,33
27 28 ZZ.10334.1D1
2 29 30 2
16 PCI_REQ#0 PCI_GNT#0 16

2
31 32
1

PCI_AD31 33 34 LAN_ICH_PME# 1 R472 2 ICH_PME# 16,19,22


DUMMY-R2

R486 PCI_AD29 35 36 0R2-0


37 38 PCI_AD30
PCI_AD27 39 40 5V_S0
PCI_AD25 41 42 PCI_AD28
43 44 PCI_AD26
1 2

45 46 PCI_AD24 R476
16,19,22 PCI_C/BE#3
PCI_AD23 47 48 MOD_IDSEL 1 2 PCI_AD17 BC65
DUMMY-C2

C314 49 50 10R2 BC212 SCD1U16V


PCI_AD21 51 52 PCI_AD22 63.10034.151 SC4D7U10V5ZY
PCI_AD19 53 54 PCI_AD20
55 56 PCI_PAR 16,19,22
PCI_AD17 57 58 PCI_AD18
2

16,19,22 PCI_C/BE#2 59 60 PCI_AD16


16,19,22 PCI_IRDY# 61 62
63 64 PCI_FRAME# 16,19,22
16,19,22,29 PCI_CLKRUN# 65 66 PCI_TRDY# 16,19,22
16,19,22 PCI_SERR# 67 68 PCI_STOP# 16,19,22
69 70
16,19,22 PCI_PERR# 71 72 PCI_DEVSEL# 16,19,22
16,19,22 PCI_C/BE#1 73 74
PCI_AD14 75 76 PCI_AD15
77 78 PCI_AD13
PCI_AD12 79 80 PCI_AD11
PCI_AD10 81 82
83 84 PCI_AD9
PCI_AD8 85 86 PCI_C/BE#0 PCI_C/BE#0 16,19,22
3 3
PCI_AD7 87 88
89 90 PCI_AD6
PCI_AD5 91 92 PCI_AD4
93 94 PCI_AD2
5V_S0 PCI_AD3 95 96 PCI_AD0
97 98 (VCC)
PCI_AD1 99 100 PCI_SERIRQ 16,19,29,33
101 102
103 104 (M66EN)
3D3V_S0 105 106
107 108
109 110
1

111 112
R191 113 114
115 116 3D3V_S0
10KR2 117 118
119 120 R190
2

121 122 1 2
10KR2
5V_S0 123 124 3D3V_S0
126

G21 SPD-CONN124A-2-U1
1 2 MINIPCI_AGND

GAP-CLOSE

4 4

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Mini PCI Socket
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 18 of 42

A B C D E
A B C D E

3D3V_S0 A_SKT_VCC_S0
3D3V_S0 C378SCD1U16V

1
02/24/2004 1 2
R561 Change from slotB to slotA C366SCD1U16V
U65B 4K7R2 U65D U65C 1 2

1
C356 C374 V1 D19 A4

2
SCD1U16V SC1U10V3ZY VCCP VCCB VCCA
W8 K19 A10

2
VCCP VCCB VCCA
A_CAD[31..0] 21
PCI_AD31 T2 P2 E13 E3 A_CAD31
AD31 SUSPEND# 47KR2 B_CAD31/B_D10 A_CAD31/A_D10
PCI_AD30 P5 A16 D1 A_CAD30
AD30 R567 1 B_CAD30/B_D9 A_CAD30/A_D9 A_CAD29
PCI_AD29 U1 2 E14 D2
AD29 B_CAD29/B_D1 A_CAD29/A_D1 A_CAD28
4 PCI_AD28 U2 M1 CB_DATA 21 B16 D3 4
AD28 DATA B_CAD28/B_D8 A_CAD28/A_D8
PCI_AD27 T3 L5 CB_CLOCK 21 A17 E5 A_CAD27
AD27 CLOCK B_CAD27/B_D0 A_CAD27/A_D0
PCI_AD26 P6 M2 CB_LATCH 21 F14 B3 A_CAD26
AD26 LATCH B_CAD26/B_A0 A_CAD26/A_A0
PCI_AD25 V2 D17 A3 A_CAD25
AD25 B_CAD25/B_A1 A_CAD25/A_A1
PCI_AD24 U3 C19 E6 A_CAD24
AD24 B_CAD24/B_A2 A_CAD24/A_A2
PCI_AD23 W3 F15 C5 A_CAD23
AD23 B_CAD23/B_A3 A_CAD23/A_A3
PCI_AD22 U4 L7 CB_SPKR 25 E18 B5 A_CAD22
AD22 SPKROUT B_CAD22/B_A4 A_CAD22/A_A4
PCI_AD21 R6 G15 A5 A_CAD21
AD21 B_CAD21/B_A5 A_CAD21/A_A5
PCI_AD20 V4 1 R580 2 F17 B6 A_CAD20
AD20 43KR3 B_CAD20/B_A6 A_CAD20/A_A6
PCI_AD19 W4 M3 PIRQB# 16 H14 A6 A_CAD19
AD19 MFUNC0 B_CAD19/B_A25 A_CAD19/A_A25
PCI_AD18 U5 L6 PIRQC# 16 F19 C7 A_CAD18
AD18 MFUNC1 B_CAD18/B_A7 A_CAD18/A_A7
PCI_AD17 N7 N1 PIRQA# 16 H15 B7 A_CAD17
AD17 MFUNC2 B_CAD17/B_A24 A_CAD17/A_A24
PCI_AD16 V5 N2 K18 B10 A_CAD16
AD16 MFUNC3 PCI_SERIRQ 16,18,29,33 B_CAD16/B_A17 A_CAD16/A_A17
PCI_AD15 W7 N3 K13 G10 A_CAD15
AD15 MFUNC4 PCI_PLOCK# 16 B_CAD15/B_IOWR# A_CAD15/A_IOWR#
PCI_AD14 U8 M5 K14 F10 A_CAD14
AD14 MFUNC5 B_CAD14/B_A9 A_CAD14/A_A9
PCI_AD13 V8 P1 PCI_CLKRUN# 16,18,22,29 L17 C11 A_CAD13
AD13 MFUNC6 B_CAD13/B_IORD# A_CAD13/A_IORD#
PCI_AD12 N10 L18 B11 A_CAD12
AD12 B_CAD12/B_A11 A_CAD12/A_A11
PCI_AD11 R9 L19 A11 A_CAD11
AD11 B_CAD11/B_OE# A_CAD11/A_OE#
PCI_AD10 V9 L15 E11 A_CAD10
AD10 B_CAD10/B_CE2# A_CAD10/A_CE2#
PCI_AD9 W9 SB_12 M18 C12 A_CAD9
PCI_AD8
PCI_AD7
V10
W10
AD9
AD8 CLK_48
L2 CardBus B_CAD9/B_A10
B_CAD8/B_D15
M19
L13
CardBus A_CAD9/A_A10
A_CAD8/A_D15
A12
E12
A_CAD8
A_CAD7
PCI_AD6 R10
AD7
AD6
B B_CAD7/B_D7
B_CAD6/B_D13
N17 A A_CAD7/A_D7
A_CAD6/A_D13
B13 A_CAD6
PCI_AD5 W11 N18 C13 A_CAD5
AD5 B_CAD5/B_D6 A_CAD5/A_D6
PCI_AD4 V11 M14 B14 A_CAD4
PCI_AD3
PCI_AD2
U11
N11
AD4
AD3
PCI BUS B_CAD4/B_D12
B_CAD3/B_D5
M15
P18
A_CAD4/A_D12
A_CAD3/A_D5
A14
C14
A_CAD3
A_CAD2
AD2 B_CAD2/B_D11 A_CAD2/A_D11
PCI_AD1 R11 CLK48_DOT 3 P19 F12 A_CAD1
AD1 B_CAD1/B_D4 A_CAD1/A_D4
PCI_AD0 W12 P17 A15 A_CAD0
AD0 B_CAD0/B_D3 A_CAD0/A_D3

2
3 3
16,18,22 PCI_AD[31..0] A_CC/BE#[3..0] 21
PCI_C/BE#3 W2 R566 D18 B4 A_CC/BE#3
C/BE3# B_CC/BE3#/B_REG# A_CC/BE3#/A_REG#
PCI_C/BE#2 R7 G17 A7 A_CC/BE#2
C/BE2# DUMMY-R2 B_CC/BE2#/B_A12 A_CC/BE2#/A_A12
PCI_C/BE#1 P9 K17 C10 A_CC/BE#1
C/BE1# B_CC/BE1#/B_A8 A_CC/BE1#/A_A8 A_CC/BE#0
PCI_C/BE#0 U10 M17 B12
C/BE0# B_CC/BE0#/B_CE1# A_CAUDIO/A_BVD2(SPKR#)
16,18,22 PCI_C/BE#[3..0]

2 1
16,18,22 PCI_PAR N9 J18 A9 A_CPAR 21
PAR B_CPAR/B_A13 A_CPAR/A_A13
W5 C385 G18
16,18,22 PCI_FRAME# FRAME# B_CFRAME#/B_A23
16,18,22 PCI_TRDY# V6 H13 E8
TRDY# DUMMY-C2 B_CTRDY#/B_A22 A_CFRAME#/A_A23 A_CFRAME# 21
16,18,22 PCI_IRDY# U6 G19 C8 A_CTRDY# 21
IRDY# B_CIRDY#/B_A15 A_CTRDY#/A_A22
16,18,22 PCI_STOP# W6 J15 F9 A_CIRDY# 21
R554 STOP# B_CSTOP#/B_A20 A_CIRDY#/A_A15
16,18,22 PCI_DEVSEL# R8 H18 G9 A_CSTOP# 21
1

PCI_AD25 DEVSEL# 02/09/2004 B_SDEVSL#/B_A21 A_CSTOP#/A_A20


1 2 PCI7620_IDSEL V3 J17 A8 A_CDEVSEL# 21
10R2 IDSEL B_CBLOCK#/B_A19 A_CDEVSL#/A_A21
B9 A_CBLOCK# 21
A_CBLOCK#/A_A19
16,18,22 PCI_PERR# U7 J13
PERR# B_CPERR#/B_A14
16,18,22 PCI_SERR# V7 B18 C9 A_CPERR# 21
SERR# B_CSERR#/B_WAIT# A_CPERR#/A_A14
B2 A_CSERR# 21
A_CSERR#/A_WAIT#
16 PCI_REQ#1 T1 E17
REQ# B_CREQ#/B_INPACK#
16 PCI_GNT#1 R2 H19 F6 A_CREQ# 21
GNT# B_CGNT#/B_WE# A_CREQ#/A_INPACK#
E9 A_CGNT# 21
A_CGNT#/A_WE#
3 PCLK_CBUS R1 A18
PCLK B_CSTSCHG/B_BVD1(STSCHG#/R1#)
16,17,21 PCIRST#_3 P3 B17 C3 A_CSTSCHG 21
PRST# B_CCLKRUN#(B_WP/IOIS16#) A_CSTSCHG/A_BVD1/(STSCHG#/R1#)
N5 H17 C2 A_CCLKRUN# 21
GRST# B_CCLK/B_A16 A_CCLKRUN#/A_WP/(IOIS16#) BCCLK1
B8 2 A_CCLK 21
A_CCLK/A_A16 R552 10R2
B19
B_CINT#/B_READY/(IREQ#)
16,18,22 ICH_PME# R3
RI_OUT#/PME# A_CINT#/A_READY/(IREQ#)
A2 SB A_CINT# 21
E19
B_CRST#/B_RESET
C6 A_CRST# 21
A_CRST#/A_RESET
1

2 2
PCI7420GHK-U C17
R560 B_CAUDIO/B_BVD2/(SPKR#)
B1 A_CAUDIO 21
3D3V_S0 10R2 A_CAUDIO/A_DVD2/SPKR#
N15
02/09/2004- B_CCD1#/B_CD1#
C16 B15 A_CCD1# 21
U65A B_CCD2#/B_CD2# A_CCD1#/A_CD1#
Change to 71.07420.00U C18 C1 A_CCD2# 21
2

B_CVS1/B_VS1# A_CCD2#/A_CD2#
F18 C4 A_CVS1 21
B_CVS2/B_VS2# A_CVS1/A_VS1#
SC10P50V2JN-1

G7 E7 A_CVS2 21
VCC A_CVS2/A_VS2#
G8 N19
VCC B_RSVD/B_D14
1

C384

G11 C15 A13 A_RSVD_D14 21


VCC B_RSVD/B_D2 A_RSVD/A_D14
G12 K15 F5 A_RSVD_D2 21
VCC B_RSVD/B_A18 A_RSVD/A_D2
G13 E10 A_RSVD_A18 21
2

VCC A_RSVD/A_A18
H10
VCC
H12 PCI7420GHK-U
VCC PCI7420GHK-U
J8
VCC
K8
VCC A_SKT_VCC_S0
K12
VCC
M7
VCC
M11
VCC
1.8V Output from internal voltage regulator 21 A_SKT_VCC_S0
M13 K5 3D3V_S0
VCC VR_PORT
DY-SC4D7U10V5ZY

SC4D7U10V5ZY
N8 J19 3D3V_S0
VCC VR_PORT
ZZ.47593.411

U9 3,4,5,7,8,9,10,13,14,15,16,17,18,20,21,22,24,25,27,28,29,30,31,32,33,37,38,39,42 3D3V_S0
GND

1
M10 C353
GND U65E C383 C388 C357 C396 C387 C347
M9
GND
M8 L1 R581

2
GND VR_EN#
L12 K7 1 2
GND SCL 220R2J SC1U10V3ZY SCD1U16V SCD1U16V
L11
GND SCD1U16V SCD1U16V
L10 R564
GND U65F
2

1 L9 1
GND R565 C352
L8 L3 1 2
GND C386 SDA 220R2J
K11 M12 H5
K10
GND
GND
0R2-0 SC1U10V3ZY SC1U10V3ZY N13
NC
NC
RSVD
RSVD
J5 Wistron Corporation
K9 PCI7420GHK-U R14 J6 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

GND NC RSVD
J12 U16 K1 Taipei Hsien 221, Taiwan, R.O.C.
GND NC RSVD
J11 P14 K2
GND DON'T SUPPORT ROM FUNCTION PULL DOWN 220OHM NC RSVD Title
J10 P15 K3
GND NC RSVD
J9 Internal voltage regulator enable R19
H11
GND
GND
TEST0 CARDBUS & PCI7420
H9 Size Document Number Rev
GND A3
H8 SC
GND PCI7420GHK-U Skylark II
Date: Tuesday, July 20, 2004 Sheet 19 of 42
PCI7420GHK-U
A B C D E
A B C D E

3D3V_S0
3,4,5,7,8,9,10,13,14,15,16,17,18,19,21,22,24,25,27,28,29,30,31,32,33,37,38,39,42 3D3V_S0
U65H

F3 1394_AVDD
MC_PWR_CTRL_1
F2 3D3V_S0
MS_BS
G2 R530
MS_DATA1
G1 1 2
MS_SDIO(DATA0) U65G
G3
MS_DATA2

1
E1 0R5J-1
MC_CD_1# C362 C359 C355 C358
H7 R12
MS_DATA3 AVD2 SCD1U16V SCD1U16V SCD1U16V SC4D7U10V5ZY
4 G5 U15 4

2
MS_CLK AVD3
V17
AVD4 R543 6K34R3F
U19
VDPLL
PCI7420GHK-U W15 1 2
R0
V15
R1
U14 TPBIAS0
U65I TPBIAS0
3D3V_S0 3D3V_S0 V14 TPA0P
TPA0+
F1 W14 TPA0N
MC_PWR_CTRL_0 SB: 2004/03/08 TPA0-
J2
SD_DAT3

ZZ.10334.1D1
H2 change to dummy V13 TPB0P 3D3V_S0
SD_CMD TPB0+

1
ZZ.10334.1D1

DY-10KR2

DY-10KR2
for TI suggest W13 TPB0N
TPB0-

R568
H1 R518 4K7R2
SD_CLK

R569
R17 1 2
PHY_TEST_MA
H3
SD_DAT0
J1 U17 1 2

2
SD_DAT2 FILTER0 C360 SCD1U16V 1394_BUSPWR
J7

2
SD_DAT1 MC_CD_0# C350
E2 U18
MC_CD_0# FILTER1
1 2
J3 SD_WP P12 R555 1 2
SD_WP CPS 402KR3F SC30P50V2JN

2
R18 1 2 X4
CNA R517 4K7R2
PCI7420GHK-U
T19 1394_XO X-24D576MHZ-19-U
XO

1
C351
T18 1394_XI 1 2
3 XI 3
Close to pin SC30P50V2JN
N12
PC0

1394 CONN
U12
PC1 3D3V_S0
V12
PC2
R526
T17 1394_PWR_CLASS_ID0 2 1
VSPLL 10KR2
U13 1394_PWR_CLASS_ID1
DCBATOUT AGN2
U53 R13 1394_PWR_CLASS_ID2
1394_BUSPWR AGN3
(60 mil) 1
F4
2
1
2
S
P-MOS
D
8
7
AGN4
W17
S

2
3 D 6 D22
S FET D
FUSE-1D1A-2 4 5 2 1 V19 R547 R531
G D TPBIAS1 220R2J 220R2J
C302 SI4435DY F2J4STP V18 TPA1P_F TP82 TPAD28
SCD1U25V3KX TPA1+ TPA1N_F TP81 TPAD28
W18

1
TPA1-
R466 V16 TPB1P_F
TPB1+ TPB1N_F
1 2 W16
TPB1-

1
100KR2 R542 R540
1

C361
SCD1U16V

1KR2

1KR2
R467

2
47KR2 PCI7420GHK-U

2
DUMMY PORT
2
3

D
16,25,31,35,36,37,38 PM_SLP_S3# 1 R468 2 1 Q50
2 2
0R2-0 G 2N7002
S
2

C323
DY-SC10U25V6MX-L
1

C436
SCD1U25V3KX

C312
CLOSE TO PCI7420
SCD1U25V3KX
1

1394_BUSPWR TR2
2

2 3 TPA0P

1
BC235
1 4 TPA0N R545 R541
SCD33U16V3ZY 56R2J
2
ACM201290029T 56R2J
SKT1 2 TPBIAS0

2
8 TPA0P
TPA0+ TPA0N
1 TPB0P
TPA0- TPB0N
2
1 3 TR1 1 2 1 R550 2 1
4 TPB0+ 1 4 TPB0P R546 56R2J 4K99R2F
5 1394_TPB1_R
6 1 2 1 2 Wistron Corporation
TPB0- 2 3 TPB0N R551 56R2J 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
7 C372 Taipei Hsien 221, Taiwan, R.O.C.
ACM201290029T SC220P50V2JN
SKT-1394-6P-4-U1 Title
1394
CLOSE TO 1394 Size
A3
Document Number Rev
CONNECTOR Skylark II SC
Date: Tuesday, July 20, 2004 Sheet 20 of 42

A B C D E
5V_S0

PCMCIA socket

1
BC245
C422 A_SKT_VCC_S0
A_CC/BE#[3..0] 19
SCD1U16V SC4D7U10V5ZY
( 40 mil)

1
BC236 BC240 C410
U70 SC10U10V5ZY SC1000P50V SCD1U16V
A_CAD[31..0] 19

2
CN14
19 CB_DATA 3 9
DATA AVCC
1 19 CB_CLOCK 4 10
CLOCK AVCC
35 19 CB_LATCH 5
LATCH
2 A_CAD0 16,17,19 PCIRST#_3 12
RESET#
36 A_CCD1# 19 1 2 21 8
SHDN# AVPP A_SKT_VPP_S0
3 A_CAD1
37
4
A_CAD2
A_CAD3
R593 10KR2
13 15
( 10 mil) Proto1:
3D3V_S0 3.3V OC#
38 A_CAD4 change to

1
5 A_CAD5 0402 size

1
39 A_CAD6 1
5V

1
6 A_CAD7 2 24 C408 C409 R601 SC_2
C395 BC241 5V NC SCD1U16V SCD1U16V 100KR2
40 A_RSVD_D14 19 23

2
SCD1U16V SC4D7U10V5ZY NC
7 A_CC/BE#0 22

2
NC
41 A_CAD8 7 19
12V NC
8 A_CAD9 20 18
12V NC
42 A_CAD10 17
NC
9 A_CAD11 16
NC
43 A_CVS1 19 11 14
GND NC
10 A_CAD12 25 6
GND NC
44 A_CAD13
11 A_CAD14
45 A_CAD15 TSP2220A
12 A_CC/BE#1
46 A_CAD16
13 A_CPAR 19
47 A_RSVD_A18 19
14 A_CPERR# 19
48 A_CBLOCK# 19
15 A_CGNT# 19
49 A_CSTOP# 19
16 A_CINT# 19
50 A_CDEVSEL# 19
17 A_SKT_VCC_S0
51
18 A_SKT_VPP_S0
52
19 A_CCLK 19
53 A_CTRDY# 19
20 A_CIRDY# 19
54 A_CFRAME# 19
21 A_CC/BE#2
55 A_CAD17
22 A_CAD18
56 A_CAD19
23 A_CAD20
57 A_CVS2 19
24 A_CAD21
58 A_CRST# 19
25 A_CAD22
59
26 A_CAD23
A_CSERR# 19 Cardbus Cage
60 SKT2
A_CREQ# 19
27 A_CAD24 1 2 5V_S0
61 A_CC/BE#3 13,14,16,17,18,24,25,26,27,28,29,31,32,33,37,38,39,42 5V_S0
28 A_CAD25
62 A_CAUDIO 19 3 4
29 A_CAD26
63 A_CSTSCHG 19
30 A_CAD27 DY-CARD-SKT18-U
64 A_CAD28 3D3V_S0
31 A_CAD29 3,4,5,7,8,9,10,13,14,15,16,17,18,19,20,22,24,25,27,28,29,30,31,32,33,37,38,39,42 3D3V_S0
65 A_CAD30
32 A_RSVD_D2 19
66 A_CAD31 A_SKT_VCC_S0
33 A_CCLKRUN# 19 19 A_SKT_VCC_S0
67 A_CCD2# 19
34
68

PCMCIA-12-U

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CARDBUS CONNECTOR & POWER SWICH
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 21 of 42
A B C D E

PCI_C/BE#[0..3] 16,18,19 3D3V_LAN_S5AC


PCI_AD[0..31] 16,18,19
3D3V_LAN_S5AC

3
LAN_TX_RX# 23,27 ( DVDD_A is 2.5V)
CTRL25 1 Q55
C344 C334 C325 C317 C320 DVDD_A DVDD
LED_GN 23,27 BCP69T1-U

1
SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

2
L26
LAN_LINK10# 23
1 2
2

2
4 0R3-U C329 C319 C321 C318 C322 C343 C342 4

1
CLOSE TO RTL8100CL

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V
R513 C364
1 2 3D3V_LAN_S5AC SCD1U16V C363

2
SC10U10V5ZY
5K6R3F TP65
AVDD25 DVDD TPAD30

L27
1 2
BLM11A601S

LAN_TX_RX#

LAN_LINK10#
LAN_X2

LAN_X1
LAN_RTSET
C346

PCI_AD0
PCI_AD1
EECS_3
1

SCD1U16V

EEDO

WAKE
LED_GN

EESK

EEDI
At RTL8100CL(10/100)
application, AVDDL is
2

3.3V.
3D3V_LAN_S5AC
AVDDL
L25
At RTL8100C(10/100) application, DVDD is 2.5V. 2 1

128
127

126

125

124

123

122

121

120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
At RTL8110S(1G) application, DVDD is 1.8V. U61 C324 C345 C348 C349

1
SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V
BLM11A601S

EESK
VSS

VSS

VSS

XTAL2

XTAL1

VSSPST

EEDO
AVDD18

VDD18

VDD18

VDD33
EEDI
LED0

LED1
LED2
LED3

PCIAD0
PCIAD1
EECS
LANWAKE
RSET

GND

GND
CTRL18

AVDDH

2
3 3

23 MDI0+ MDI0+ 1 102 PCI_AD2


MDI0+ PCIAD2
23 MDI0- MDI0- 2 101
AVDDL MDI0- VSSPST
3 100
AVDDL GND
4 99 DVDD
VSS VDD18
23 MDI1+ MDI1+ 5 98 PCI_AD3
MDI1+ PCIAD3
23 MDI1- MDI1- 6
MDI1- PCIAD4
97 PCI_AD4 Close to RTL8100CL
AVDDL 7 96 PCI_AD5
CTRL25 8
AVDDL PCIAD5
95 PCI_AD6
Pin121,Pin122
3D3V_S0 CTRL25 PCIAD6
9 94 3D3V_LAN_S5AC
VSS VDD33 LAN_X1
10 93 PCI_AD7
AVDDH PCIAD7
1

11 92 PCI_C/BE#0
R535 HSDAC+ CBEB0
AVDD25 12 91
1KR3 HSDAC- VSSPST R510
13 90 PCI_AD8
VSS PCIAD8
14 89 PCI_AD9 LAN_X2 1 2
MDI2+ PCIAD9
15 88
2

MDI2- M66EN DUMMY-R2


ISOLATE# 16 87 PCI_AD10
AVDDL PCIAD10
17 86 PCI_AD11 X3
VSS PCIAD11
1

18 85 PCI_AD12 1 2
R536 MDI3+ PCIAD12
19 84
AVDDL MDI3- VDD33 PCI_AD13 XTAL-25MHZ-3-U1
20 83
15KR2 AVDDL PCIAD13 82.30020.071
21 82 PCI_AD14
VSSPST PCIAD14

1
22 81
2

GND VSSPST BC233 BC232


23 80
ISOLATE# GND SC27P50V2JN SC27P50V2JN
24 79 PCI_AD15

2
VDD18 PCIAD15
16 PIRQD# 1 R521 2 LAN_INTA# 25 78 DVDD
0R2-0 INTA# VDD18
3D3V_LAN_S5AC 26 77 PCI_C/BE#1
VDD33 CBEB1
7,17,32,33 PCIRST1# 27 76 PCI_PAR PCI_PAR 16,18,19
2 PCIRST# PAR 2
3 PCLK_LAN 28 75 PCI_SERR# PCI_SERR# 16,18,19
PCICLK SERR#
16 PCI_GNT#4 29 74
GNT# NC
16 PCI_REQ#4 30 73
PME#_LAN REQ# GND
31 72
DVDD PME# NC
32 71
VDD18 VDD33 PCI_PERR#
PCI_AD31 33 70 PCI_PERR# 16,18,19
PCIAD31 PERR# 3D3V_LAN_S5AC
PCI_AD30 34 69 PCI_STOP# PCI_STOP# 16,18,19
PCIAD30 STOP#
35
GND DEVSEL#
68 PCI_DEVSEL# PCI_DEVSEL# 16,18,19 SB_9
PCI_AD29 36 67 PCI_TRDY#
PCIAD29 TRDY# PCI_TRDY# 16,18,19
PCI_AD28 37
PCIAD28 VSSPST
66 SB_9
38 65 PCI_CLKRUN# 16,18,19,29
VSSPST CLKRUN#

1
PCIAD27
PCIAD26

PCIAD25
PCIAD24

PCIAD23

PCIAD22
PCIAD21

PCIAD20

PCIAD19

PCIAD18
PCIAD17
PCIAD16

FRAME#
VSSPST

R504 3D3V_LAN_S5AC
CBEB3

CBEB2
VDD33

VDD18

VDD18

VDD33

VDD18
IRDY#
IDSEL

GND

GND

GND

3K3R2

1
U58

2
3D3V_LAN_S5AC RTL8100CL-U EECS_3 1 8 BC231
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64

EESK CS VCC SCD1U16V


2 7

2
SK DC 78.10491.4F1
EEDI 3 6
DI ORG
1

EEDO 4 5
R529 DO GND
10KR3
PCI_C/BE#2

M93C46-W-2
PCI_AD27
PCI_AD26

PCI_AD25
PCI_AD24

PCI_AD23

PCI_AD22
PCI_AD21

PCI_AD20

PCI_AD19

PCI_AD18
PCI_AD17
PCI_AD16
PCI_C/BE#3

LAN_IDSEL

main source: 72.93C46.E01


DVDD
2

1 R520 2 2 1 ICH_PME# 16,18,19 Second


0R2-0
D40 source:72.93C46.D01(ATMEL)
S1N4148-U
PCI_FRAME#

1 1
PCI_IRDY#

3D3V_LAN_S5AC
Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


R509 Taipei Hsien 221, Taiwan, R.O.C.
10R2
PCI_IRDY# 16,18,19
Title
1

PCI_AD26
PCI_FRAME# 16,18,19 LAN
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 22 of 42

A B C D E
A B C D E

1 1

RD+ 27

RD- 27

1.route on bottom as differential pairs.


Place near to ALC655 New Symbol have something wrong
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
for Realtek Change from 68.00201.021 to 68.00115.021
3.No vias, No 90 degree bends.
For EMI
4.pairs must be equal lengths.
R4 5.6mil trace width,12mil separation.
1 2
6.36mil between pairs and any other trace.
DY-0R2-0
ZZ.R0034.1D1
7.Must not cross ground moat,except
L4
RJ-45 moat.
BC234 RD- 1 2 RD-C put two resistor in parallel to prepare for
1

SCD1U16V common choke


R522 R523 RJ1
49D9R3F 49D9R3F RD+ 4 3 RD+C 13
LED_YN 9
LAN_RXC_GND R9
2

2 LAN_CMT_GND 22,27 LAN_TX_RX# 1 2 LED_YP 10 2


DLW21HN900SQ2 TD+C 330R2 1
22 MDI1-
22 MDI1+ TD-C 2
R6 RD+C 3
U2 1 2 4
5
LAN_RDC_GND

3 15 RD- DY-0R2-0 RD-C 6


CT RX- ZZ.R0034.1D1
11 16 RD+ 7
CT RX+
14 8
CT
6 2 22,27 LED_GN LED_GN 11
CT RD-
RD+
1 For EMI 3D3V_LAN_S5AC 1 R506 2 LED_GP 12
8 9 TD- RJ45-45 330R2
22 MDI0- TD- TX-
22 MDI0+ 7
TD+ TX+
10 TD+ SC_3
RJ45-78

DY-SC1000P50V

DY-SC1000P50V
RING_A 14
1

ZZ.10224.2F1

ZZ.10224.2F1
BC2 XFORM-112 put two resistor in parallel to prepare for TIP_A 15
1

C163

C164
R524 SCD1U16V [CLOSE TO CONNECTOR] common choke

8
7
6
5
49D9R3F R525 R10 16
49D9R3F DUMMY-R2 RN51
RJ45-51
2

SRN75J
2

1
2
3
4
BC3 BC120
SCD1U16V Termination Plane
CHANGE 75R2 to
66.75036.08A CN1
SC1KP2KV
For EMI RJ11 signal must leave the other
signal or power plane 100mil.

4
3 3
MLXCON2 L16 BLM18HG601SN1D
TD- 27 1 2
2 DOCRINGB L15
1 DOCTIPB 1 2

Place near to ALC655 For EMI BLM18HG601SN1D


LED_YN
R7

3
1 2
LED_YP
DY-0R2-0
ZZ.R0034.1D1 LED_GN

LED_GP
L5
C2 C1 C3 C4
TD- 1 2 TD-C
3D3V_LAN_S5AC

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN
SB_9
TD+ 4 3 TD+C
1

3D3V_LAN_S5AC R505
DY-10KR2
U62 ZZ.10334.1D1 DLW21HN900SQ2
LED_GN 1 5
2

A VCC
22 LAN_LINK10# LAN_LINK10# 2 R8
B
3 4 LED_YN 1 2
GND Y
NC7SZ08-1 DY-0R2-0
4
ZZ.R0034.1D1 4

TD+ 27
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LEDS1-0 00 01 10 11 Title
LED0 TX/RX TX/RX TX TX LAN Connector
Green LED:Speed 100: ON/Speed 10:OFF
Size Document Number Rev
LED1 LINK100 LINK10/100 LINK10/100 LINK100 Yellow LED:Link : ON, TX/RX: A3
Skylark II SC
LED2 LINK10 FULL RX LINK10 Flash(10Hz)
Date: Tuesday, July 20, 2004 Sheet 23 of 42

A B C D E
1 2 3 4 5

MDC CONN
CN9

35
A Voice Modem A
31 32
R138
25 MDM_AUD_IN 1 2 MDM_AUD_IN_R 1 2 1 R139 2 BT_DETACH 15
3 4 0R2-0
MDM_AUD_OUT 25
DUMMY-R3 5 6 1 R143 2 BT_ON# 29
7 8 0R2-0
3D3V_S0 9 10 1 2 BT_IN# 15
11 12 R142 DY-0R2-0 ZZ.R0034.1D1
USBP4 15
13 14 USBN4 15
15 16
3D3V_LAN_S5AC 1 R164 2 MDC_PWR 17 18 BT_WAKEUP 1 R147 2 BT_WAKEUP_3 16
SB_9 0R2-0 19 20 0R2-0
21 22 AC_SYNC 15,25
23 24 AC_DIN1A_R DUMMY-R3 1 2
15,25 AC_SDOUT AC_DIN1 15
25 26 AC_DIN1B_R 1 2 R149 22R2
15,25 AC_RST#
27 28
1 R163 2 29 30 MDC_BITCLK R153 1 2 MDC_AC_BITCLK 25
14 BT_LED 0R2-0 R152 47R2

SCD1U16V
33 34

SC10P50V2JN-1
SCD1U16V
SC4D7U10V5ZY

1
C237

C106

C51
AMP-CONN30A-1

36
1

1
R159
C103
4K7R2

2
NEAR CONNECTOR
B B

USB PORT

Front Side Right-Hand Side


5V_S0 USB1_VCC
USB0_VCC
F5 Layout > 50 mil 5V_S0
C
1 2 F3 Layout > 50 mil C
SCD1U16V

1 2
1

SCD1U16V
6V1D1A

1
C426 TC6 C423 6V1D1A
ST100U6D3VDM-3 SC10U10V5ZY C46 TC9 C45
2

ST100U6D3VDM-3 SC10U10V5ZY

2
SKT3

8
7 SKT4
5
USBN1 1 L28 2 1
15 USBN1
1
USB1- 2 USBN0 1 L7 2 USB0- 2
15 USBN0
15 USBP1 USBP1 4 3 USB1+ 3 USB0+ 3
DLW21SN900SQ2-U 4 4
6 15 USBP0 USBP0 4 3 5
8 DLW21SN900SQ2-U 6

SKT-USB-26-U

7
SKT-USB-40-U

D D

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
MDC CONN & USB CONN
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 24 of 42

1 2 3 4 5
A B C D E

ALC655 AC97 AUDIO CODEC


OP+5V

1
G1421_SD# 5VA_S0
R538

1
SB_14 DUMMY-0R2-0
R539 R532
R553 G1421_SD# 1 2 DY-10KR2

2
1
DY-0R2-0 DY-47KR2
C379

2
1
4 SCD1U16V G1421_SD 4
G1421_SD 26

2
C365

CODEC_EAPD

3
*Layout* DY-SC1U10V3KX D

2
DIGITAL I/F 1 Q54
AUDIO(analog) G DY-2N7002
AUD_AGND MDM_AUD_IN MDM_AUD_IN 24 (10,10) mil S

2
EPSON 26 CODEC_SPDIF
SOUNDR SOUNDR 26
FA-365 20PF 3D3V_S0
U67
C380
SC1000P50V SOUNDL

48
47
46
45
44
43
42
41
40
39
38
37
SOUNDL 26
C368 50PPM

SCD1U16V

SCD1U16V
SC22P50V2JN-1 AUD_AGND

XTLSEL

AVSS2

NC
LFE_OUT
JDO/GPIO0

AVDD2
MONO_OUT
SURR_OUT_L
SURR_OUT_R
S/PDIF_OUT

CEN_OUT
1

SPDIFI/EAPD
AD_XTALIN
C367 C370 C398 C397
2

SC1000P50V SC1000P50V

2
X5
C369 X-24D576MHZ-3-U1 1 AUD_AGND AUD_AGND
SC22P50V2JN-1 DVDD1
2 36
1

AD_XTALOUT XTL_IN L_OUT_R


3 35
XTL_OUT L_OUT_L
15,24 AC_SDOUT AC_SDOUT 4 34
DVSS1 Front_MIC1
SRN33-2-U2 5
SDATA_OUT NC
33 ADCAP1 NS
15 AC_BITCLK AC_BITCLK RN74 1 4 AC_BTCLK_R 6 32 ADVRDA
BIT_CLK Front_MIC2 C399
24 MDC_AC_BITCLK MDC_AC_BITCLK 2 3 7 31 ADVRAD
DVSS2 VRDA DY-SC1000P50V
1 2 AC_SDIN8 30 ADAF2
SDATA_IN AFLT2
15 AC_SDATA_IN0 AC_SDATA_IN0 R544 22R2 9
DVDD2 AFLT1
29 ADAF1 NS
15,24 AC_SYNC AC_SYNC 10
SYNC VREFOUT
28 VREFOUT VREFOUT SC
15,24 AC_RST# AC_RST# 11 27 CODECVREF ALC655_VREF
RESET# VREF 5VA_S0 C402 C400
12 26
PC_BEEP AVSS1
*Layout* NS DY-SC1U10V3ZY

SCD1U10V2KX

SCD1U10V2KX
25
AVDD1

1
JD1/GPIO1

LINE_IN_R
Make Equal

LINE_IN_L

SC1U10V3ZY
SC4D7U10V5ZY
ZZ.10593.4B1

SC10U10V5ZY
3 3
AC-LINK

CD_GND

1
Close to

C407

C381
C401 AUD_AGND

PHONE
Length

AUX_R
AUX_L

C405

C376
CD_R
(digital) C406 C404 DY-SCD1U10V2KX

CD_L
ALC655

MIC1
MIC2

2
JD2
SCD1U SC1000P50V

2
6 mil AUD_AGND
ALC655-U

13
14
15
16
17
18
19
20
21
22
23
24
R549 C371
BUZZER_S 1 2 BUZZER 1 2 CB_BEEP C403 AUD_AGND
AUD_AGND SC1000P50V
1

4K7R2 SCD1U16V AUD_AGND


1

R548
C373 2K2R2
SC2200P50V2KX
2

AUD_AGND LINEIN_R LINE_IN_R LINE_IN_R 26


R558 C375
MDM_AUD_OUT 1 2 MDM_AUD_OUT0 1 2 MDMAUD_OUT0 C393
24 MDM_AUD_OUT
SC1U10V3ZY
1

*Layout* 47KR2
C377
SCD1U16V
*Layout* LINEIN_L LINE_IN_L LINE_IN_L 26

10 mil SC2200P50V2KX
10 mil C394
2

SB SC1U10V3ZY

AUD_AGND
C382
26 MIC_IN MIC_IN MIC
2 2
SC1U10V3ZY

*Layout*
POWER GENERATE 5VA_S0 20 mil 3D3V_S5 3D3V_S3
BEEP SOUND LOGIC 5VA_S0

SYS_SPKR

14
U66A
1

TRANSFER_PLUS_2_6 1
R599 SC_4 5VA_S0 3 BUZZER_S
C414 28K7R3F 2
5V_S0 U74 SC22P50V2JN-1 U69B
10

14
1 5 R600 U66B TSLCX86MTC-U
2

7
SHDN# SET
5VA_SETPIN 1 2 14 9 CB_SPKR 4
PR

AUD_AGND VCC Q 19 CB_SPKR


2 12 6
GND D
16 SB_SPKR SB_SPKR 5
C421 3 4 10KR3F 11 TSLCX86MTC-U AUD_AGND
IN OUT 33 KBC_SPKR CLK
SC1U10V3ZY 8

7
Q
G923-330T1U-1 7
CL

GND
1

C416 C415 TSLCX74-U AUD_AGND


13

AUD_AGND SB SC1U10V3ZY SC2D2U16V5ZY


*Layout*
2

1
AUD_AGND AUD_AGND
PM_SLP_S3# 16,20,31,35,36,37,38 locate near audio 1

moat opening 6
*Layout* mil Wistron Corporation
Place G40/G41 together under U67 For EMI Testing: 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
G42 G43 G44 G45 G46 G47 G48
G40 G41 Title
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 AC'97 CODEC - ALC655
GAP-CLOSE-PWR GAP-CLOSE-PWR GAP-OPEN-PWR GAP-OPEN-PWR GAP-OPEN-PWR GAP-OPEN-PWR GAP-OPEN-PWR GAP-OPEN-PWR Size Document Number Rev
GAP-OPEN-PWR A3
Skylark II SC
AUD_AGND AUD_AGND AUD_AGND AUD_AGND AUD_AGND AUD_AGND AUD_AGND AUD_AGND AUD_AGND Date: Tuesday, July 20, 2004 Sheet 25 of 42

A B C D E
A B C D E

AUDIO OP AMPLIFIER Speaker Connector CN7


MLXCON2

4
C338 *Layout* 20mil
2
SC220P50V2JN 1
R516
C341 10KR2 R515
SOUNDL 1 2 SOUND_L1 1 2 HP_L 1 2 C57 C75
25 SOUNDL

3
15KR2 SC1000P50V SC1000P50V
SC2D2U16V5ZY
4 4

C332
1 2

SC220P50V2JN
R508
10KR2 R512 5VA_S0
C328 5VA_S0
1 2 SOUND_L2 1 2 SOUND_L_OP1 1 2
15KR2

1
SC2D2U16V5ZY SC_5 R480
U63 Q56 10KR2
DTA124EUA-U1
25 G1421_SD

1
4 3 SPKR_L+
LLINEIN LOUT+ 5V_S0 U64 Q57
5 10 SPKR_L-

2
L_BYPASS LHPIN LOUT- 22 K
DOCK_JACK_IN# OUT 3
6
LBYPASS R1
7 14 5 1 2 DOCK_JACK_IN 27
LVDD SE/BTL# VCC OE# D41 R659 GND 1
16 HP_IN 2 MUTE 29 IN
HP/LINE# A
1 R557 2 8 11 MUTE_5 4 3 2 4 3 1 2 R2
10KR2 SHUTDOWN MUTEIN Y GND
2 9
TJ MUTEOUT

1
22 K
1 R527 2 17 1 0R2-0 AUD_AGND DTC144EUA
AUD_AGND 0R2-0 HP-IN GND/HS R533 NC7SZ125-U
23 12 5 2 ENAUDIO#
VOL GND/HS 100KR2
13
AUD_AGND GND/HS AUD_AGND Q53
18 24
RVDD GND/HS

3
R_BYPASS 19 6 1 1 R660 2 D 2N7002

3
C331 RBYPASS
20 15 1 ENAUDIO 29
SC4D7U10V5ZY RHPIN ROUT- 0R2-0
21 22 SPKR_R+ G

GND
RLINEIN ROUT+ RB731U
R528 S SC_6

2
1 2
G1421BF3U

25
AUD_AGND

1
I/P signal level C330 100KR2
SPKR_R+ 27
SC4D7U10V5ZY R643 AUD_AGND HP_JKIN#
need +5V level SPKR_L+ 27
3 DY-0R2-0 3
AUD_AGND

1
5V_S0 OP+5V U29 5V_S0

2
1
R534
2 SB
AUD_AGND TC4
ST100U6D3VDM-3
TC5
ST100U6D3VDM-3 2 5 Headphone Jack

2
0R3-U 5VA_S0 GND IN
3
NC
1

R507 AUD_AGND 4 1 S/PDIF_PWR CN17


C354 C339 C340 10KR2 R511 ON/OFF# OUT
C326

1
SC10U10V5ZY SCD1U16V SCD1U16V 1 2 SOUND_R2 1 2 SOUND_R_OP1 1 2 9
2

15KR2 R632 AAT4250-U L29 8 GND


SC2D2U16V5ZY 10KR2 VCC
1 2 SPDIF 7 VIN
AUD_AGND AUD_AGND AUD_AGND C333 16
25 CODEC_SPDIF

4
BLM18HG102SN1D 6

2
U79 5
SC220P50V2JN SPKR_R+1 1 R628 2 4
IRF5852 0R2-0 SPKR_L+2 2
R519 SPKR_L+1 1 R629 2 SPKR_R+2 3
C327 10KR2 R514 0R2-0 1

1
25 SOUNDR SOUNDR 1 2 SOUND_R1 1 2 HP_R 1 2

1
15KR2 C428
SC2D2U16V5ZY R630 R631 C427 MINDIN10-1-U1
SC_5 C337 1KR2 1KR2 SC680P50V2KX SC680P50V2KX

2
1

2
SC220P50V2JN
SB_24
5VA_S0 AUD_AGND AUD_AGND AUD_AGND
Audio VREF Generator
1

U82
R484 DOCK_JACK_IN# DOCK_LIN_R 27
1 5 5VA_S0
DY-20KR2 5VA_S0 SHDN# SET DOCK_LIN_L 27
R634 C442 C443
DY-SC2D2U10V5MX-U1

2
2 ZZ.20334.1D1 GND 2
U56 3 4 1 2
2

AUD_VREF_S0 IN OUT 10KR2 SC1U10V3ZY SC1U10V3ZY


1 5 JK1
IN+ VDD
2 5
VSS
1

3 4 DY-G913C-U 25 LINE_IN_L LINE_IN_L 1 R578 2 2K2R2 4


C313 R479 IN- OUT
R579 3
DY-20KR3 DY-MAX4490AXK-T LINE_IN_R 1 2 2K2R2
25 LINE_IN_R
2

ZZ.22513.511 ZZ.20334.151 ZZ.04490.01F 2

1
5VA_S0 1
2

U80C SC_7 R587 R559 C430 10 5VA_S0


4

TSHC4066 10KR2 10KR2 C431 SC180P25V2JN 11

2
AUD_AGND AUD_AGND AUD_AGND 14 7 SC180P25V2JN

1
MINDIN-5P-1

2
5
Line-In & R657
1KR2
5VA_S0 AUD_AGNDAUD_AGND AUD_AGND Ext MIC Jack
Microphone External Preamp

2
AUD_AGND
3
1

SC R633 AUD_AGND C444

1
R586 1 2 R584 1 2 SC4D7U10V5ZY
0R2-0 1KR2 R658
300R3 SB_15 2K2R2 AUD_AGND
5VA_S0
2

AUD_VREF_S0

2
C419
SC4D7U10V5ZY 5VA_S0 SC
1

C418 5VA_S0
DY-SC1U10V3ZY R591 R585
1

ZZ.10593.4B1 DY-47KR2 2K2R2 AUD_AGND MIC_JKIN# Q58


Internal Microphone
1

3
ZZ.47334.1D1 R556 DTC124EUA-U1
U73 C391 R574 10KR2
2

AUD_AGND 5 1 MIC_IN_2 MIC_IN_1 1 R575 2 EXT_MIC_IN 10KR2


R592 VDD IN+ 0R2-0
2 D42
2

1 VSS DY-SC1U10V3ZY 1
25 MIC_IN 1 2 4 3 1 R576 2 INT_MIC_IN 2 22 K
2

OUT IN- ZZ.10593.4B1 0R2-0 CN15


3 2
1

4
DY-0R3-U DY-MAX4490AXK-T AUD_AGND 1 R577 2 DOCK_EXT_MIC_IN_1 Q59 MLXCON2
ZZ.R0004.151 ZZ.04490.01F 0R2-0 3 OUT DOCK_MIC_JKIN# 1
C392 2 R1 INT_MIC 2
R617 R608
Wistron Corporation
2

1 2 1 2 SC3300P50V2KX IN 1 GND 22 K 1
DY-2K2R3 R2 BAW56-1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
27 DOCK_EXT_MIC_IN
ZZ.22234.151 DY-5K6R3 Taipei Hsien 221, Taiwan, R.O.C.
1

ZZ.56234.151 AUD_AGND DTC144EUA

3
C420 C413 Title
27 DOCK_MIC_JKIN
DY-SC4D7U10V5ZY AUD_AGND Audio AMP and Jack
ZZ.47593.411
DY-SC220P50V2JN TPAD30 TP89 Size Document Number Rev
Additional 12dB gain ZZ.22134.1F1 AUD_AGND AUD_AGND Custom SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 26 of 42
A B C D E
PPD1
PPD2 5V_S0
29 PD[7..0]
PPD3

RN54
5V_S0

BC263 SCD1U16V
PPD4
PACK# SERIAL PORT
PD1 1 8 PPD1 D6 PSLCT
PD2 2 7 PPD2 1 2 PRN5V 1 2 PBUSY C211 C201
PD3 3 6 PPD3 PPE SCD1U16V 1 2

1
PD4 4 5 PPD4 CH751H-40 BC264 SCD1U16V C54
1 2 C69 SCD33U16V3ZY
SRN33 RP2 SCD33U16V3ZY SCD047U25V3KX U41

2
4
3
2
1

4
3
2
1
RN52 PD1 1 10 MAX3243_C1+ 28 26 C208
PRINIT#_5 RC1 RC3 MAX3243_C1- C1+ VCC
29 PRNACK#_5 1 8 PACK# ERROR#_5 2 9 24 27 MAXV+ 1 2
PD0 C1- V+
29 SLCT_5 2 7 PSLCT 3 8 PD2 MAX3243_C2+ 1 3 MAXV-
SLCTIN#_5 SRC100P50V-U SRC100P50V-U C2+ V- SCD33U16V3ZY
29 BUSY_5 3 6 PBUSY AUTOFD#_5 4 7 MAX3243_C2- 2
PPE PD3 C2-
29 PE_5 4 5 5 6 29 SOUT1_5 14 9 PSOUT1

5
6
7
8

5
6
7
8
T1IN T1OUT
29 RTS1#_5 13 10 PRTS1#
SRN33 T2IN T2OUT PDTR1#
SRP1K R319 29 DTR1_BOUT1_5 12 11
COM_RI0# T3IN T3OUT
29 STROB#_5 1 2 PSTROB# 1 2 20
R308 33R2 3D3V_S0 R2OUTB PDSR1#
29 DSR1#_5 19 4
10KR2 R1OUT R1IN PRI1#
RP1 29 RI1#_5 18 5
RN53 PE_5 R2OUT R2IN PCTS1#
1 10 PSTROB# 29 CTS1#_5 17 6
PPD5 SLCT_5 R3OUT R3IN PSIN1
PD5 1 8 2 9 PD4 PPD5 29 SIN1_5 16 7
R4OUT R4IN PDCD1#
PD6 2 7 PPD6 BUSY_5 3 8 PD5 PPD6 29 DCD1#_5 15 8
R5OUT R5IN

1
PD7 3 6 PPD7 PRNACK#_5 4 7 PD6 PPD7 23
C192 FORCEON
29 SLCTIN#_5 4 5 PSLCTIN# 5 6 PD7 PSLCTIN# 5V_S0 1 2 MAX3243_ON 22
SC100P50V2JN R68 100KR2 FORCEOFF#
PERROR# 21 25

2
SRN33 PAUTOFD# INVALID# GND
SRP1K
PPD0 MAX3243
RN55 R26 PINIT#
1 8 PERROR# STROB#_5 1 2
29 ERROR#_5
2 7 PAUTOFD#
29 AUTOFD#_5
PD0 3 6 PPD0 1KR2

4
3
2
1

4
3
2
1
29 PRINIT#_5 4 5 PINIT#
Place near Dock1 PWR TRACE
SRN33 RC4 RC2
SRC100P50V-U SRC100P50V-U 5V_S0 100mil
DOCK+5V

5
6
7
8

5
6
7
8
F2

ST150U6D3VDM-4
1 2
For EMI
FUSE-2A8V

1
Place near Dock1
C168 C167 C166

TC20
SC4D7U10V5ZY SCD1U16V SC1000P50V

2
DOCK_AD+
DOCK1
DOCK+5V C207
102 SCD1U25V3KX
3D3V_S3

SCD1U25V3KX

SCD1U25V3KX

SCD1U25V3KX

SCD1U25V3KX

SCD1U25V3KX
GND 100 50 GND

1
99 49 3D3V_S0
33 PS2_KBCLK_5

C205

C438

C439

C440

C441
33 PS2_KBDATA_5 98 48

1
97 47 C206 SB_17
33 PS2_MCLK_5

1
GND 96 46 R310
95 45 SCD1U25V3KX R309
33 PS2_MDATA_5 DY-10KR2
94 44 GND
93 43 DOCKIN# DUMMY-R2
PDSR1# 92 42 PDCD1# D28 1 LC1 2 USB2P_DOCK
15 USBP2

2
PRTS1# 91 41 PSIN1 2 1 0R2-0
DOCK_IN# 13,33
PCTS1# 90 40 PSOUT1
GND 89 39 PDTR1# 1N4148W 1 R647 2 USB2N_DOCK
15 USBN2
4
3
2
1

PRI1# 88 38 PAUTOFD# C189 0R2-0


PSTROB# 87 37 PERROR# SCD1U16V 1 R648 2 USB3P_DOCK
15 USBP3
RC6 PPD0 86 36 PINIT# 0R2-0
SRC100P50V-U 85 35 PSLCTIN#
PPD1 84 34 GND 15 USBN3 1 R649 2 USB3N_DOCK
5
6
7
8

For EMI PPD2 83 33 0R2-0


PPD3 82 32 PACK#
PPD4 81 31 PBUSY SB_16 Place Near USB
80 30 PSLCT C13 C12
PPD5
GND
79 29 PPE
2 2 Connector
PPD6 78 28 PNF SC470P50V2KX SC470P50V2KX
26 DOCK_LIN_L 1 1
26 DOCK_LIN_R PPD7 77 27
GND
76 26 SPKR_L+ 26
26 DOCK_JACK_IN 75 25 SPKR_R+ 26 SB_17
74 24
DOCK_LIN_L 73 23 DOCK_MIC_JKIN 26
C11 DOCK_LIN_R 72 22 L17 BLM18BB470SN1
DOCK_EXT_MIC_IN 26
SC1000P50V 71 21 USB2N_DOCK 1 2 CRT_R_P
GND 13 DAC_RED_DOCK
USB3N_DOCK 70 20 USB2P_DOCK C10
USB3P_DOCK 69 19 SC1000P50V L18 BLM18BB470SN1
3D3V_S0 DOCK+5V
DOCK+5V 68 18 1 2 CRT_G_P
13 DAC_GREEN_DOCK
1 1 67 17 GND
8,13 DAC_VSYNC
C7 C8 66 16 L19 BLM18BB470SN1
8,13 CLK_DDC1 DAC_HSYNC 8,13
SC470P50V2KX

SC470P50V2KX

2 2 8,13 DAT_DDC1 65 15 CRT_AGND 13 DAC_BLUE_DOCK 1 2 CRT_B_P


1

64 14 CRT_B_P
63 13 CRT_G_P PCTS1#
R290 R291 GND 62 12 CRT_R_P PSIN1

1
330R2 330R2 61 11 PDSR1#
60 10 RD+ PDCD1# C169 C170 C171
RD+ 23
2

59 9 RD- 75R3F 75R3F 75R3F


RD- 23
22,23 LED_GN 58 8 TD+ TD+ 23
57 7 TD- TD- 23 PRTS1#

2
22,23 LAN_TX_RX# 56 6 GND PRI1#
GND 55 X X 5 PDTR1#
54 X X 4 PSOUT1
53 X X 3
52 2
4
3
2
1

51 X X 1
4
3
2
1

4
3
2
1

RC8 101
SRC100P50V-U RC7 Wistron Corporation
RC5 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
5
6
7
8

For EMI SRC100P50V-U SRC100P50V-U Taipei Hsien 221, Taiwan, R.O.C.


FCI-CONN100-4R-U
5
6
7
8

5
6
7
8

Title
PORT REPLICATOR
For EMI Size Document Number Rev
A3
Skylark II SC
Date: Tuesday, July 20, 2004 Sheet 27 of 42
A B C D E

Power ON Circuit
5V_AUX 5V_AUX

1
5V_AUX

1
5V_AUX R596
4 R604 10KR2 4
10KR2 U71 From PWRBTN
U68A 5V_AUX U72 5 1 R602

14

2
VCC NC PWRBTN#_RC
TSAHCT32 2 1 2 PWRBTN# 33

2
A
1 5 1 4 3
Q CK Y GND 1KR2
3 3 2
Q# D

1
2 8 6 NC7SZ14-U
PM_SLP_S4# 16,33,36,37 VCC CLR#
4 7 C411
GND PR#

1
5V_AUX SCD1U16V

2
R610

1
100KR2 NC7SZ74K8X
R597
31,35 MAX1999_ON U68B 22KR3

14

2
TSAHCT32 3D3V_S5
Q63 R589 4

2
3 OUT 1 2 6 3D3V_S0
2 R1 5 AC_OK 40

1
IN 1 GND 5V_AUX

1
R2 220KR3 C412 R605

7
DTC144EUA R609 SCD1U16V 10KR2

2
U78
51KR3 R603 1 5

2
NC VCC

3
31 HW_THRM_SDN D 1 2 2 D44

2
Q66 A
1 3 4 2 1 SB_PWRBTN# 16
GND Y

1
G 2N7002 47KR2
3

R635 S C417 To SB

2
1 2 1 Q69 SCD1U16V NC7SZ14-U S1N4148-U
5,7,16 CC_CPUPWRGD

2
330R2 MMBT3904-U1
SB_10
2
1

3 3
BC254
PM_THERMTRIP# 5,16
SCD1U10V2MX-1
2

HDD CONN
CN13
MH3
MH4
43 44 R269 1 33R2 2 RSTDRV#_5
PIDE_D8 41 42 PIDE_D7
PIDE_D9 39 40 PIDE_D6
2 2
PIDE_D10 37 38 PIDE_D5
PIDE_D11 35 36 PIDE_D4
PIDE_D12 33 34 PIDE_D3
PIDE_D13 31 32 PIDE_D2
PIDE_D14 29 30 PIDE_D1
PIDE_D15 27 28 PIDE_D0
25 26 PIDE_D[0..15] 15
23 24 PIDE_DREQ
21 22 PIDE_IOW#
R537 19 20 PIDE_IOR# RSTDRV#_5 17
1 2 HDD_CSEL 17 18 PIDE_IORDY
15 16 PIDE_DACK# PIDE_DREQ 15
470R3 13 14 PIDE_IRQ14 PIDE_IOW# 15
11 12 PIDE_A1 PIDE_IOR# 15
PIDE_A2 9 10 PIDE_A0
PIDE_CS3# 7 8 PIDE_CS1#
5 6 HDD_LED#
5V_S0 3 4 PIDE_A[0..2] 15
PIDE_A0 15
1 2
MH2 PIDE_IORDY 15
MH1 PIDE_DACK# 15
PIDE_IRQ14 15
SYN-CONN44D-2-U2
PIDE_CS3# 15
PIDE_CS1# 15
HDD_LED# 14
2
1

1
D23 1
C336 C335
SCD1U16V SC10U10V5ZY S1N4148-U
Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

HDD/Power ON Circuit
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 28 of 42

A B C D E
A B C D E

LPCPD#
3D3V_S0 LPC_LAD[0..3] 16,32,33
3D3V_S0
3D3V_S0 16,32,33 LPC_LFRAME#
16 LPC_LDRQ0#
16,18,19,33 PCI_SERIRQ
PCLK_SIO
3 PCLK_SIO
17,18,33 PCIRST2# SIN1_5 27

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
3 CLK14_SIO CTS1#_5 27

3
4

3
4
BC168 BC179 BC25 BC20 IR_TXD_3
30 IR_TXD_3 DSR1#_5 27
RN61 RN56 SC1U10V3ZY SCD1U16V SCD1U16V SCD1U16V IR_SL0_3
30 IR_SL0_3 DCD1#_5 27

2
SRN10KJ SRN10KJ IR_RXD_3
30 IR_RXD_3 RI1#_5 27
4 3D3V_S0 4

2
1

2
1
U48

88
63
39
14

65

69
68
70
67
66

20

10
11
12
15
16
17
18

57
60
56
55
62
9
8

7
PC87392-U

IRSL1

LPCPD#

DSR1#

RI1#
VDD
VDD
VDD
VDD

NC

IRTX

SERIRQ
CLKIN

LCLK
IRRX1

LAD0
LAD1
LAD2
LAD3
LRESET#

CTS1#
LDRQ#

SIN1
LFRAME#

DCD1#
PWUREQ#/IRSL3
IRRX2_IRSL0
OEM1
SW1 OEM2
1 4 CHKPW#
2 3 BOOTBLOCK# 15
HDS402E
GPIO00 3 71
GPIO00/XD0/JOYABTN1 GPIO37/DR1#/IRSL2/XIORD#
Place on Top Side SB_18 26 MUTE MUTE 2
GPIO01/XD1/JOYBBTN1 GPIO36/CLKRUN#
6 PCI_CLKRUN# 16,18,19,22
1 19 GPIO35
(Under KB) 40 KBC_CHARGE_ON#_OFF
CHKPW# 100
GPI002/XD2/JOYAY GPIO35/SMI#
5 PLANARID2
GPIO03/XD3/JOYBY GPIO34/XRD#/WDO#
14 802.11LED 99 82 PLANARID1
OEM1 GPIO04/XD4/JOYBX GPIO33/XA11/MDTX/XIOWR#
SB_18 98
GPIO05/XD5/JOYAX GPIO32/XA10/MDRX/XIORD#
83 PLANARID0
OEM2 97 84 BT_ON# BT_ON# 24
GPIO06/XD6/JOYBBTN0 GPIO31/XA9/PIRQD/MTR1#
96 85 GPIO30
GPIO07/XD7/JOYABTN0 GPIO30/XA8/PIRQC
change to 62.40013.061
81 61 DTR1_BOUT1_5 27
GPIO10/XA12/RI2#/JOYABTN1 DTR1_BOUT1/BADDR
80 58 RTS1#_5 27
GPIO11/XA13/DTR2_BOUT2#/JOYBBTP1 RTS1#/TEST
79 59 SOUT1_5 27
3D3V_S0 GPIO12/XA14/CTS2#/JOYAY SOUT1/XCNF0
78 4
GPIO13/XA15/SOUT2/JOYBY XWR#/XCNF1
77 90
GPIO14/XA16/RTS2#/JOYBX XSTB1#/XCNF2/NC
76 73
GPIO15/XA17/SIN2/JOYAX XCS1#/MTR1#/DRATEO/XIOWR#
75
3D3V_S0 GPIO16/XA18/DSR2#/JOYBBTN0
RP3 R127 74 23
GPIO17/XA19/DCD2#/JOYABTN0 RDATA#
1 10 1 2 27
3 GPIO00 WDATA# 3
GPIO30 2 9 26
WGATE#

1
3 8 GPIO26 DY-0R2-0 GPIO27 86 22
GPIO27 ZZ.R0034.1D1 R405 GPIO26 GPIO27/XA7/PIRQB HDSEL#
4 7 87 29
3D3V_S0 10KR2 GPIO26/XA6/PIRQA/XSTB2# DIR#
5 6 GPIO24 72 28
GPIO24 GPIO25/XCS0#/XRDY/DR1# STEP#

AFD_DSTRB#/DENSEL/DRATE1
91 25
U22 GPIO24/XA4/XSTB0# TRK0#
DY-SRP10K 26 ENAUDIO ENAUDIO 92 32

2
GPIO23/XA3 INDEX#
ZZ.10336.100 5 1 18 RADIO_ON RADIO_ON 93 21
VCC NC AD_OFF# GPIO22/XA2 DSKCHG#
2 94 24
A GPIO21/XA1 WP#
4 3 PWRSAV_CTL# 95 31

SLIN_ASTRB#/STEP#
37 AD_OFF Y GND GPIO20/XA0 MTR0#
1

BUSY_WAIT#/MTR1#
30
DR0#
1

NC7SZ14-U R107 33
DENSEL

PD4/DSKCHG#
R348 34

SLCT/WGATE#

ERR#/HDSEL#
DRATEO/IRSL2

2
1

PD3/RDATA#

PD6/DRATE0

STB_WRITE#
100KR2 DY-10KR2

PE/WDATA#

PD0/INDEX#

PNF/XRDY#
PD5/MSEN0

PD7/MSEN1
ACK#/DR1#

PD1/TRK0#
INIT#/DIR#

PD2/WP#
2

3D3V_S0 RN79
2

SRN10KJ

VSS
VSS
VSS
VSS
3
4
RP4 3D3V_S0 5V_S0

89
64
38
13

36
37
40
41
47
49

52
50
48
46
45
44
43
42

51
53
54
35
EN_HP_OUT 1 10

1
PNF 2 9 LPCPD#
1

IR_SL0_3 3 8 R398
GPIO35 4 7 PWRSAV_CTL# R656 10KR2
5 6 BT_ON# 10KR2 PNF FDC / PP select By PNF and Register
SRP10K 2 PWRSAV_CTL1 35,36
2

3
R404 D STROB#_5 27
1 2 1 Q47
2 AUTOFD#_5 27 2
DY-0R2-0 G 2N7002
27 SLCT_5 ERROR#_5 27
S 27 PE_5
2

BC178
27 BUSY_5
SCD1U16V PD7
27 PRNACK#_5
27 SLCTIN#_5 PD6
27 PRINIT#_5 PD5
PD4 PD[7..0] 27
3D3V_S0 VCC_IO_S0 PD3
PD2
1

SC_8 PD1
1

PD0
R653 R655 R397
DY-0R2-0 10KR2 1K5R2
2

2
3

Q46
3D3V_S0 1

MMBT3904-1-U
2
1

Planar ID
1

1 2 CC_DPSLP# 5,7,16
R151 R145 R385 2 1 0 R402 0R2-0
DUMMY-R3 10KR2 DUMMY-R3
SA 0 0 0 6218_DPSLP# 39
2

1 PLANARID0 SB 0 0 1 1
PLANARID1
PLANARID2 SC 0 1 0
Wistron Corporation
1

SD 0 1 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


1

Taipei Hsien 221, Taiwan, R.O.C.


R148 R146 R392 -1 1 0 0
10KR2 DUMMY-R3 10KR2 Title
-2 1 0 1 SIO/PC87392
2

Size Document Number Rev


A3 SC
Date: Tuesday, July 20, 2004
Skylark
Sheet
II29 of 42

A B C D E
A B C D E

5V_S0

FIR
13,14,16,17,18,21,24,25,26,27,28,29,31,32,33,37,38,39,42 5V_S0

3D3V_S0

3,4,5,7,8,9,10,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,31,32,33,37,38,39,42 3D3V_S0

4 4

VISHAY FIR Module


3D3V_S0
Layout Guide:
R106 (1) FIR_5V : 30 mils,
1 2 (2) BCY1, BC50
1D8R5 close to U3
BC23
DY-SCD1U
U46
3D3V5_S0
FIR_GND
SC 1
VCC2/IRED_ANODE
2
IRED_CATHODE
3
29 IR_TXD_3 TXD
4
29 IR_RXD_3 RXD
5
29 IR_SL0_3 SD
6
VCC1
7
MODE
8
GND
VISHAY
FIR-TFDU6102

FIR_GND 3D3V_S0 SC_10


3 3

1
BC21 BC17
G3 SCD1U SC10U10V5ZY

2
1 2

GAP-CLOSE-PWR
FIR_GND FIR_GND

FIR_GND

2 2

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Printer/FIR
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 30 of 42

A B C D E
A B C D E

Q30
2N7002

S
D
33,41 KBC_SCL_5 1 RB1 2 3 2 G768D_SMBC_KBC
0R2-0

G
R22 THERMDP1/DP2/THERMDN ON THE SAME LAYER

1
1 2 5V_G768_S0 W/S = 10/5 MIL, 12 MIL AWAY FROM OTHERS Check default setting,
10KR2 CAPS CLOSE TO G768D default enable is
Q33 3D3V_S0 5V_S0 preferred
4 2N7002 Layout 15 mil 4
THERMDP1 240 ms after VCC_G768 > 4.38v, p2, 7 R3

S
D
5 THERMDP1

1
33,41 KBC_SDA_5 1 RB2 2 3 2 G768D_SMBD_KBC 1 2 THRM_SDN_EN# 15
0R2-0 R25 R5
5 THERMDN
BC128 DY-10KR2 10KR2 DY-0R2-0
SB SC2K2P VCC_FAN

G
R23 U9

1
2 1 5V_G768_S0 THERMDN

2
2
3 1 VCC_FAN
10KR2 Q45 DXP1 FANVCC
5V_S0 1 5
DXP2

3
BC129 16 G768_HW_SHDN D
BC136 MMBT3904-U1 SC2K2P TH_SHUT
4 1 G768D_PWROK

3
DXN
1 2 THERMDP2 G
CLK32_G768 9 2 5V_G768_S0 S SC_10

2
CLK VCC Q1
SYSTEM SENSOR VCC
15
SCD1U16V G768D_SMBC_KBC 14 2N7002
SMBCLK U1D
G768D_SMBD_KBC 12 8

14

13
SMBDATA AGND TSAHCT125
R31 7
DGND
16 G768D_PWROK G768D_PWROK 2 1 6
51KR3 RESET# FAN_FB
R123 10 12 11 HW_THRM_SDN HW_THRM_SDN 28
FG

1
1 2 11
R32 ALERT#
13
100R2 NC
32K suspend clock output

7
100KR2
3D3V_S5 G768D

2
U4
16,20,25,35,36,37,38 PM_SLP_S3# 1 5
OE VCC R303
8,16 PM_SUS_CLK 2
A
3 4 32KHZ 1 2 CLK32_G768 8,16 PM_THRM#
GND Y
3 NC7SZ126-U 10R2 3
1

R296
240KR3
5V_S0
2

FAN

1
Conn. R307
5V_S0 5V_G768_S0 DY-4K7R2
CN4
4 C191

2
1 R294 2 FAN_FB 1 2
UP+5V 0R3-U

1
3 DUMMY-C3
UP+5V C175 C185 2
SCD1U16V SC10U10V5ZY 1 VCC_FAN
R409

2
1 2 CPU_THSET
1

2
1

C250 5 BC125 BC126 D27


18KR2F U50 SCD1U16V R410 SC4D7U10V5ZY SCD1U16V
2

S1N4148-U
0R2-0 SCON3

1
1 6
2

D39 SET VCC


2 5
GND OUTSET
28,35 MAX1999_ON 1 2 3 4 CPU_TH_HYST
OUT# HYST
MMBD4148
2 2
MAX6510HAUT-T-U

[T8]
HW thermal shut down tempature
setting 95 degree . Put Near CPU .

3D3V_S5 3D3V_AUX RESUME RESET


R582
DY-0R2-0 ZZ.R0034.1D1
1 2

1 R572 2 1
R571
2
TO SB
RSMRST# 16
0R2-0
180KR2
BC237
SCD1U16V

5V_AUX SC_11
14

1 1
U68C
3

3
9 TSAHCT32 DD
35,36,38,39 BL3
8 HW_THRM_SDN_1 1 1 SW_THRM_SDN 33
Wistron Corporation
HW_THRM_SDN 10 G G 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

1
S S Taipei Hsien 221, Taiwan, R.O.C.
2

2
1

Q62 Q61
R595
7

R573 2N7002 2N7002 Title


10KR2 10KR2
G768D
2

Size Document Number Rev


2

A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 31 of 42

A B C D E
A B C D E

TOP VIEW
Boot Device must have ID[3:0] = 0000
Has internal pull-down resistors
All may be left floated A15 (B1)
FPET7 Elec. P3-46
A14 (B2)

....

....
4
3D3V_S0
A2 (B14) 4

3D3V_S0
A1 (B15)
Unused FGPI pins must not be float
1

R625
10KR2
63.10334.151 U77C 3D3V_S0 1D5V_S0
14
(BOTTOM VIEW)
2

EXT_FWH# 9
8 FWHRST# GOLDEN FINGER FOR DEBUG BOARD

1
7,17,22,33 PCIRST1# 10
R594 R588
TSLCX08-U 10KR2 1K5R2
7

63.10334.151 63.15234.151 5V_S0 5V_S0


CN16

2
A1 B1
A1 B1

3
RN76 Q64 PCIRST1# A2 B2 PCIRST1#
A2 B2
5 4 SELECT_FWH 1FWH_INT_Q LPC_LFRAME# A3 B3 LPC_LFRAME#
A3 B3
6 3 FWH_FGPI4 A4 B4
MMBT3904-1-U A4 B4
7 2 3 LPC_DB_PCICLK A5 B5 LPC_DB_PCICLK

2
84.03904.B11 A5 B5
8 1 A6 B6
A6 B6
U76 FWH_INIT# A7 B7 FWH_INIT#
SRN10K-2 A7 B7
CC_INIT# 5,16 A8 B8
A8 B8
1 32 FWH_INIT# LPC_LAD3 A9 B9 LPC_LAD3
NC OE#/INIT# LPC_LAD2 A9 B9
2 31 LPC_LFRAME# 16,29,33 A10 B10 LPC_LAD2
3D3V_S0 3D3V_S0 NC WE#/FWH4 A10 B10
3 30 LPC_LAD1 A11 B11 LPC_LAD1
3 NC NC A11 B11 3
4 29 LPC_LAD0 A12 B12 LPC_LAD0
VSS DQ7/RES A12 B12
5 28 EXT_FWH# A13 B13 EXT_FWH#
IC DQ6/RES A13 B13
6 27 A14 B14
A10/FGPI4 DQ5/RES A14 B14
3 PCLK_FWH 7 26 3D3V_S0 A15 B15 3D3V_S0
R/C#(CLK) DQ4/RES A15 B15
8 25 LPC_LAD3
VDD DQ3/LAD3
9 24
NC VSS
1

10 23 LPC_LAD2 FOX-GF30
R622 RST# DQ2/LAD2 ZZ.GF030.XXX
FWH_FGPI3 11 22 LPC_LAD1
R618 10KR2 A9(FGPI3) DQ1/LAD1
DUMMY-R3 FWH_FGPI2 12 21 LPC_LAD0
63.10334.1D1 A8(FGPI2) DQ0/LAD0
FWH_FGPI1 13 20
FWH_FGPI0 A7(FGPI1) A0/ID0
14 19
2

A6(FGPI0) A1/ID1
15 FWH_WP# 15 18
1 2

A5(WP#) A2/ID2 3D3V_S0


16 17 LPC_LAD[3..0] 16,29,33
A4(TBL#) A3/ID3

BC247 49LF004A-33
DUMMY-C3 3,4,5,7,8,9,10,13,14,15,16,17,18,19,20,21,22,24,25,27,28,29,30,31,33,37,38,39,42 3D3V_S0
72.49004.B09
5V_S0
2

RN78
5 4 FWH_FGPI3 13,14,16,17,18,21,24,25,26,27,28,29,31,33,37,38,39,42 5V_S0
6 3 FWH_FGPI2
7 2 FWH_FGPI1 1D5V_S0
8 1 FWH_FGPI0

5,8,9,15,17,37,38 1D5V_S0
SRN10K-2
2 2

3D3V_S0

1
BC248 BC251 BC246 BC244 BC253
SC10U10V5ZY SCD1U16V SCD1U16V SCD1U16V SCD1U16V

2
78.10492.4B1 78.10492.4B1 78.10492.4B1 78.10492.4B1

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

FWH/Debug Port
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 32 of 42

A B C D E
A B C D E

3D3V_S3 5V_S5
G22 3D3V_S3
2 1 PWRBTN# RN48 14,17,35,37,41,42 5V_S5
1 8 WIRELESS_SMI#
2 7 ECSCI 3D3V_S5
GAP-OPEN RP8 3 6 ECSMI
KROW5 1 10 4 5 ECSWI

KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
15,16,17,25,28,31,35,37,38 3D3V_S5

KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KROW7 2 9 KROW4 3D3V_S3
KROW8 3 8 KROW3 SRN10K 5V_S0
16,28,36,37 PM_SLP_S4#
KROW6 4 7 KROW1
5 6 KROW2 13,14,16,17,18,21,24,25,26,27,28,29,31,32,37,38,39,42 5V_S0
3D3V_S5 U69A

4
BC239 SRP10K BC250 BC109 3D3V_S3
SCD1U16V 14 5 66.10336.100 SC10U10V5ZY SCD1U16V

PR
4 78.10492.4B1 VCC Q 78.10492.4B1 4
2

54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39

62
61
60
59
58
57
56
55

71
D (NEAR M38857) 14,25,27,37,42 3D3V_S3
3 U75 3D3V_S3

P0-0
P0-1
P0-2
P0-3
P0-4
P0-5
P0-6
P0-7
P1-0
P1-1
P1-2
P1-3
P1-4
P1-5
P1-6
P1-7

P3-2
P3-3
P3-4
P3-5
P3-6
P3-7

VCC
P3-0/PWM-00
P3-1/PWM-10
7,17,22,32 PCIRST1# CLK
6 KBRESET_S3# ZZ.10334.1D1
Q R624 DY-10KR2 3D3V_S3
7

CL
GND
1 2 1
TSLCX74-U P6-0/AN-0
RECORD 38 80 AD_IN# AD_IN# 40 RN75

1
P2-0/CMPREF P6-1/AN-1
41 FLASH_GPIO1 37 79 BAT_IN# BAT_IN# 41 BAT_IN# 1 8
3D3V_S5 P2-1 P6-2/AN-2 BL2#
41 FLASH_GPIO2 36 78 802.11LED# 14 2 7
P2-2 P6-3/AN-3
35 77 SYS_PWRSAV# 37 RECORD 3 6
P2-3 P6-4/AN-4
34 76 DOCK_IN# 13,27 4 5
P2-4(LED-0) P6-5/AN-5 WIRELESS_SMI#
33 75
14 CAPS_LED# P2-5(LED-1) P6-6/AN-6
32 74 SW_THRM_SDN 31 SRN10K
3D3V_S0 14 NUM_LED# P2-6(LED-2) P6-7/AN-7
KBCFLASH 31 802.11LED# 2 1
R261 P2-7(LED-3) R49 10KR2
17
ZZ.10334.1D1 MATRIX1 P5-0/INT-5 R268
2 1 27 16 ECSMI ECSMI 16
DY-10KR2 P4-0/XCOUT P5-1/INT-20
MATRIX2 26 15 ECSWI ECSWI 16 AD_IN# 2 1
P4-1/XCIN P5-2/INT-30
2 R265 1 ZZ.10334.1D1 23 14 PM_SUS_STAT# 16
DY-10KR2 P4-2/INT-0 P5-3/INT-40 10KR2
22 13 COVERUP
P4-3/INT-1 P5-4/CNTR-0
21 12 BL2# BL2# 41
16 RCIN# P4-4/RXD P5-5/CNTR-1
16 ICH_A20GATE 1 R606 2 ICH_A20GATE_1 20 11 BRIGHTNESS 14
3D3V_S3
0R2-0 P4-5/TXD P5-6/DA-1/PWM-01
16 ECSCI ECSCI 19 10 KBC_SPKR 25
P4-6/SCLK P5-7/DA-2/PWM-11 X6
KBC_GPIO47 18
P4-7/SRDY#/CLKRUN#

3
RESO-8MHZ-2 RN47

1
28 XIN_KBC R607 2 3
R598 XIN DUMMY-R3
29 XOUT_KBC 2 1 4
10KR2 XOUT
72 KBC_REF
VREF ZZ.DUMMY.XR3
Internal KeyBoard Connector MATRIX1 SRN10KJ

P8-4/LFRAME#
P8-5/LRESET#
2

1
P8-7/SERIRQ
BC249

P8-0/LAD-0
P8-1/LAD-1
P8-2/LAD-2
P8-3/LAD-3

P7-5/INT-41
P7-4/INT-31
P7-3/INT-21
3 82.10009.001 3

P8-6/LCLK
CN11 SCD1U16V MATRIX2

P7-7/SCL
P7-6/SDA
R613
78.10492.4B1

RESET#
34 33 (3.3V) 1 2

CNVSS
5V_S3

AVSS

SC15P50V2JN

SC15P50V2JN
KROW8 30

P7-2
P7-1
P7-0

VSS

C389

C390
29 KROW7 470R3
KROW6 28 15KR3F 63.47134.151

3
27 KROW5 R612

70
69
68
67
66
65
64
63

2
3
4
5
6
7
8
9

25
24
30
73
KROW4 26 M38857M8-A01HP
25 KROW3 (2.5V) 1 D45

1 2
KROW2 16,29,32 LPC_LAD0
24 KBC_REF_1 APL431-U

KBDATA_5
16,29,32 LPC_LAD1

MDATA_5
74.00431.F3B

KBCLK_5

TDATA_5
23 KROW1

MCLK_5
TCLK_5

2
16,29,32 LPC_LAD2 R611
KCOL16 22 16,29,32 LPC_LAD3
21 KCOL15 1 R654 2 47KR3F
KCOL14 20
16,29,32 LPC_LFRAME#
17,18,29 PCIRST2#
0R2-0 CNVSS COVER3D3V_S3
SWITCH
19 KCOL13 KBRESET_S3#

2
3 PCLK_KBC
KCOL12 18 16,18,19,29 PCI_SERIRQ
17 KCOL11
1

1
KCOL10 16 KBC_SDA_5 31,41
1

15 KCOL9 R272 R311


KCOL8 14 DUMMY-R3 BC110 100KR2
KBC_SCL_5 31,41

3
13 KCOL7 SC68P50V2JN CN6
2

KCOL6 12

2
11 KCOL5 5V_S0 COVERUP 1 2 CV1 1
12

KCOL4 10 Q65 R2 R313 2


9 KCOL3 BC111 Q60 IN 1 100R2
DUMMY-C3 47K 3 OUTCNVSS_2 2
GND
KCOL2 8 R1 R590
7 KCOL1 KBCFLASH 2 R1 3 CNVSS_1 1 2 BC127 MLXCON2

4
1 GND ZZ.DUMMY.XR3
OUT
EMAIL_LED 6 IN SC1000P50V
5 R2 DY-DTA124EE DUMMY-R3
2

4 DY-DTC144EUA 84.00124.01H D43


28 PWRBTN# 84.00144.B1K
3 1 2 CNVSS
2 MATRIX1 2 SB_19 2

1
1 MATRIX2 3D3V_S3 DY-S1N4148-U
32 31 U81 83.04148.011 BC238 KCOL16
5 1 R583 DY-SCD1U16V KCOL14
VCC NC DY-10KR2 78.10492.4B1
2 EMAIL_LED# 16 KCOL12
ETY-CONN30A-S1 A 63.10334.151
EMAIL_LED 4 3 KCOL10

2
Y GND
KCOL8
KCOL6
Chang to "20.K0144.030" NC7SZ14-U KCOL4
For EMI (CLOSE KB CONNECTOR) KCOL3

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN
KCOL2
KCOL1
KROW2
KROW4
TouchPad Connector < 6V/1.1A > NEAR KBC CHIP KROW6
KROW8
5V_S0 KROW7
KROW5
PS/2 CONN 5V_S0 KROW3
KROW1
RN49 KCOL15

C118

C119

C120

C121

C123

C125

C127

C129

C132

C133
BC52 BC242 8 1 KCOL13
1

SCD1U16V SC1U10V3ZY 7 2 KCOL11


1

R627 78.10593.4B1 6 3 KCOL9


10KR2 R616
SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN

SC100P50V2JN
5 4 KCOL7 SC
63.10334.151 10KR2 KCOL5
63.10334.151 SRN10K-2
2

CN10
2

8 7 MCLK_5 R621 1 2 47R2 PS2_MCLK_5 27


1
1 2 63.47034.151 1
3 TDATA_5
TCLK_5 4 MDATA_5 R615 1 2 47R2
5 63.47034.151 PS2_MDATA_5 27 Wistron Corporation
6 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
C122

C124

C126

C128

C130

C131

C134

C136

C138

C140

C141

C139

C137

C135
10 9 SC Taipei Hsien 221, Taiwan, R.O.C.
1

KBDATA_5 R620 1 2 47R2


63.47034.151 PS2_KBDATA_5 27
BC252 BC243 Title
SC47P50V2JN ETY-CONN10 SC47P50V2JN
KBC/Touch Pad/PS2
2

78.47034.1B1 78.47034.1B1
KBCLK_5 R623 1 2 47R2 Size Document Number Rev
63.47034.151 PS2_KBCLK_5 27
SC-31-4 Custom SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 33 of 42

A B C D E
A B C D E

CPU_CORE Max1999
Intersil 6218 5V/3D3V
Input Signal Output Signal VCC_IO_S0
VID Setting
H_VID0
VID0(I / 3.3V) Output Signal VRM_PG
MAX1999_ON3
H_VID1 ON3 MAX1999_PGD 1D2V_S0 VCC_IO_S0
VID1(I / 3.3V) PGOOD(OD / 3.3V) PGOOD(OD / 5V) IN OUT
4 4
H_VID2 MAX1999_ON5
VID2(I / 3.3V) ON5
H_VID3 MAX4230AXK-T
VID3(I / 3.3V) MAX1999_SHDN#
Output Power VCC_CORE_S0 SHDN# Output Power
H_VID4 (Imax=25A)
VID4(I / 3.3V) 5V_S5 (4A)
MAX1999_SKIP# 5V(O)
VCC_CORE_PWR(O) SKIP#
1D5V_S0
3D3V_S5 (4A) 2D5V_S3
3D3V(O) VIN
Input Signal Input Power
1D5V_S0
VCORE_EN VOUT
EN (I / 3.3V) MAX1999_LDO5 (100mA)
DCBATOUT_MAX1999 LDO5(O) PM_SLP_S3#
V+ VC
Voltage Sense SI-3012KS-TL
MAX1999_LDO3 (100mA)
COREFB LDO3 (O)
VSEN(I / Vcore)
COREFB#
RGND(I / Vcore) 1D5V_S5
3 3

Input Power
3D3V_S5 1D5V_S5
DCBATOUT IN OUT
VCC(I)

5V_S0
VCC(I) CM2830AAM23-U1
3D3V_S0
VCC(I)

1D25V_S0
2D5V_S3
Charger_Max1909 + Tiny12 INPUT
1D25V_S0
OUT
Input Signal Output Signal
CHARGE_ON#
2 Max1845 ICTL(I / 3.3V) 2

2D5V/1D2V MAX1909_VCTL LP2996MR-U


VCTL(I / 3.3V) BL2#_1
PB3
Input Signal Output Signal BT_TH
BT_TH(I / 3.3V)
CHG_LED#
BT_SCL LED (O/5V)
1D2V_ON PGOOD(OD / 5V) M1845PGOOD BT_SCL(IO / 5V) Adapter
ON1
BT_SDA
BT_SDA(IO / 5V)
2D5V_ON Output Power Input Signal Output Signal
ON2 DCBATOUT AD_OFF MAX1909_DC_IN
VCC (O) (I) (O)
Output Power
BT+
VCC (O)
1D2V_S0 (2A) Input Power Output Power
M1845SKIP# 1D2V(0) Input Power
SKIP# AD+ AD_+1 AD+
DCIN (I) VCC(I) VCC(O)
2D5V_S0 (5A)
2D5V(O) MAX1909 ACIN
Input Power DCIN (I)
1 1
DCBATOUT
_MAX1999 Wistron Corporation
V+
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MISC
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 34 of 42

A B C D E
A B C D E

SYSTEM DC/DC
3D3V_S5/5V_S5
4 4

DCBATOUT
5V_AUX MAX1999_VCC
R28
1 2 MAX1999_V+ R299 C179
1 2
4D7R5

1
SC4D7U25V6KX
R24 C181 10R2 SC1U10V3ZY

3
1 2 C182 DCBATOUT
DCBATOUT SCD1U D9

2
4D7R5
BAW56-1
3D3V_S5

SC4D7U25V6KX

SC4D7U25V6KX

SC10U25V0KX
MAX1999_BST3 MAX1999_BST5

1
SC4D7U25V6KX

SC4D7U25V6KX

SCD1U10V2MX-1

SCD1U
C18

C19

C25
C24
1

5V_S5
C20

C26

SCD1U
C21

8
7
6
5

5
6
7
8
C193

SCD1U16V

2
1

C32
For Test Only

D
D
D
D
U11 U10

D
D
D
D
2

R298 R324
G31 SI4800BDY 0R3-U 0R3-U SI4800BDY G37

20

17
1 2 U39 1 2
SB

VCC
V+
2

2
BST3
GAP-OPEN-PWR GAP-OPEN-PWR

S
S
S
G

G
S
S
S
G29 FOR EMI 28 14 G36

1
2
3
4

4
3
2
1
BST3 BST5
1 2 1 2

3 GAP-OPEN-PWR L21 MAX1999_DH3 26 16 MAX1999_DH5 L20 GAP-OPEN-PWR 3


G30 DH3 DH5 G35
1 2 MAX1999_OUT3 1 2 MAX1999_LX3 27 15 MAX1999_LX5 1 2 MAX1999_OUT5 1 2
LX3 LX5
GAP-OPEN-PWR IND-4D7UH-16 MAX1999_DL3 24 19 MAX1999_DL5 IND-4D7UH-16 GAP-OPEN-PWR
DL3 DL5

SC47P50V2JN
22 21
OUT3 OUT5
1

5
6
7
8

1
C35

6K65R3F
C34 U14
1

1
C36
TC8 MAX1999_FB3 7 9 MAX1999_FB5 C33 TC7

D
D
D
D
FB3 FB5
8
7
6
5

ST150U6D3VDM-4 ST150U6D3V-1-U

R38
D12 R76 SI4892DY D7

SC100P50V2JN

SC100P50V2JN
2

2
DY-SSM14 15KR3F SC47P50V2JN DY-SSM14
D
D
D
D

G
S
S
S
U15

1
SI4892DY MAX1999_ON3 3
2

1 2

1 2

4
3
2
1

2
ON3
G
S
S
S

MAX1999_ON5 4 10 MAX1999_PRO#
ON5 PRO# R36
1
1
2
3
4

NC
1

R77 2MR2

10K2R3F
MAX1999_SHDN# 6
SHDN#
R37
10KR3F

2
R40
2MR2 5V_S5
2

2
11 MAX1999_ILIM5
2

ILIM5

1
R325
1 2 13 R80
MAX1999_VCC TON
10KR3 5 MAX1999_ILIM3 10KR3
ILIM3
1

1
2
R39 8 2 R90
20KR2F MAX1999_REF REF PGOOD 130KR2F
R89
2

C42
MAX1999_SKIP# 12 23 1 2
2

2
2 SKIP# GND 2

LDO3

LDO5
SCD22U10V3KX
1

17K4R3F Q9
MAX1999_VCC

3
R91 D 2N7002 R315
3

R334 D 1 1 2 PWRSAV_CTL1

25

18
1 2 1 Q35 MAX1999EEI 1 2 G
29,36 PWRSAV_CTL1 G S 330KR2

2
2N7002

1
330KR2 S C43
3D3V_AUX 5V_AUX
2
1

R99 R92 23K2R3F


C58
100mA MAX. 100mA MAX. MAX1999_FB5 SC10U10V5ZY

2
SC10U10V5ZY
SC4D7U10V5ZY

C183 C180 10KR3F 10KR3F


2

SC10U10V5ZY MAX1999_FB3

2
2
R65 R64
R292
DCBATOUT 470KR2 470KR2
1 2 1 2
0R3-U UP+5V
Ton = VCC : 200KHz/300KHz 1

1
G
MAX1999_REF MAX1999_VCC MAX1999_VCC
Ton = GND : 400KHz/500KHz MAX1999_VCC C41
(5V/3D3V) 2 3 1 2

MAX1999_PRO#
S

D
SCD1U16V
1

100KR2

Q8 FDN338P-U
1

100KR2

R88
DUMMY-R3

R333

R79
R51
R52

28,31 MAX1999_ON 1 R327 2 1 2 MAX1999_ON3 470KR2


0R2-0 10R2
3 2

R326 2 1
MAX1999_SKIP#
2

D MAX1999_VCC 1 2 1 R78 2 MAX1999_ON5


2

1 1 0R3-U 1
G DUMMY-R2 R317
2N7002

S 1 2 MAX1999_SHDN#
Wistron Corporation
2
3

Q15

D MAX1999_V+ 100KR2

3
1 D 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
16,20,25,31,36,37,38 PM_SLP_S3#
G 1 Q36 Taipei Hsien 221, Taiwan, R.O.C.

SCD1U
2N7002

S 31,36,38,39 BL3 G 2N7002


2

C59
SKIP# = VCC : PWM MODE R93 S Title
2
Q34

1 2
SKIP# = GND : SKIP MODE MAX1999/3D3V_S5/5V_S5
DY-10KR3 Size Document Number Rev
SKIP# = REF/FloatING : Ultrasonic MODE ZZ.10334.151 A3 SC
Skylark II
(25KHz min) Date: Tuesday, July 20, 2004 Sheet 35 of 42

A B C D E
A B C D E

R285 R300
1 2 2D5V_ON 1D2V_ON 1 2 M1845SKIP# 1 R302 2 PM_SLP_S3#
PM_SLP_S3# 16,20,25,31,35,37,38
16,28,33,37 PM_SLP_S4# 0R3-U
10KR3
DUMMY-R2
5V_S3
G33 SB_6
1 2 R637 R638 SB_6
4 2 1 1 2 4
GAP-OPEN-PWR M1845_DCBATOUT
G32 300KR3D 300KR3D
DCBATOUT 1 2

GAP-OPEN-PWR BC7

1
SC4D7U10V5ZY
G34 BC133 C90 BC134 BC132

BC137
1 2 SCD1U SC10U25V0KX SCD1U SCD1U BC12 BC130

8
7
6
5

5
6
7
8
BC11 R316 10R3 SCD1U SC4D7U25V6KX SC4D7U25V6KX

2
D
D
D
D
GAP-OPEN-PWRSC4D7U25V6KX U43 M1845VCCF 1 2 U42

D
D
D
D
1D2V_S0 SI4800BDY SI4800BDY

for GM+ BC131 FOR EMI

3
SC1U10V3ZY
1D2V_S0-->1D35V_S0 D30 2D5V_S3

S
S
S
G

G
S
S
S
1
2
3
4

4
3
2
1
BAW56-1
L9 2.5V (I=4.65A) OCP: 6.5A)
R54 L8

2
GAP-OPEN-PWR

GAP-OPEN-PWR

1 2 1 2

GAP-OPEN-PWR

GAP-OPEN-PWR

GAP-OPEN-PWR
M1845BST1 1 2
2

IND-4D7UH-16 10KR3

2
G9
G10

IND-4D7UH-16

8
7
6
5

G8

G7

G6
C197

5
6
7
8
SC47P50V2JN

D
D
D
D
U45 C53

22

21
1

4
SI4800BDY BC14 U12 U44 SC47P50V2JN

D
D
D
D

1
1
D13 SCD1U16V

VCC

VDD
V+
SI4800BDY

1
DY-SSM14 9 13 M1845ILIM2 BC13 D18
1D2V_DC_S0 UVP ILIM2 SCD1U16V DY-SSM14 R82
M1845ILIM1 3 19 M1845BST2 2MR2 2D5V_DC_S3

S
S
S
G
2

ILIM1 BST2
1

3 3

1
2
3
4

2
G
S
S
S
1

R312
SC100P50V2JN

25

4
3
2
1

2
BST1

1
R306 2MR2
C94

M1845DH1 26 18 M1845DH2 C190 R30


DH1 DH2
1

1
2KR3F M1845LX1 27 17 M1845LX2 SC100P50V2JN 15KR3F
2

LX1 LX2
1

D32 D31
ST150U6D3VDM-4

M1845DL1 24 20 M1845DL2
2

DY-SSM14 DL1 DL2


TC12

ST330U6D3VDM-4
2
DY-B220LFA
28 16
2

CS1 CS2
1

1
BC8

TC11
2

2
1
R305

1
DY-SC2K2P 1 15 R17

2
10KR3F OUT1 OUT2 10KR3F R376 R377
M1845FB1 2 14 M1845FB2 200R3 200R3
2

FB1 FB2

2
1
11 12 5V_S3

2
ON1 ON2 R18
1

M1845TON 5 7 M1845PGOOD 200KR3F


TON PGOOD
R129 R130
for GM+ 10
REF

1
200R3 200R3 8 BC10
R124

GND

2
OVP
1

2
M1845SKIP# 6 DY-SC2K2P R19 R345
SKIP#
1

DUMMY-R2 R29 Q41


=3K48 5V_S3 1 2 1
2

MAX1845EEI-U 75KR2F
M1845REF

23
R21 1KR2 MMBT3906-U

3
5V_S3 R20 200KR3F
2

2
DUMMY-R3
2

Q21 R124 SB_4 R301


2

3
1 2 1 DUMMY-R3 R81 D
2

MMBT3906-U 1 2 1 Q10
29,35 PWRSAV_CTL1 G 2N7002
3

1
2 2
1KR2 BC6 470KR2 S

2
SCD22U16V3ZY C52
SC10U10V5ZY

2
M1845FB2

5V_S3 1D25V_DDRVREF_S3

ZZ.R0004.151
1
DY-0R3-U
R464
64.47005.651
R427 U54

2
2D5V_DC_S3 1 2 1 5
IN+ VDD

DY-SC1U10V3ZY
D29 2
VSS

DY-SC1U10V3ZY
470R3F

ZZ.10593.4B1
1D2V_ON 1 3 4
R456 IN- OUT

ZZ.10593.4B1
BC210

BC211
3 DY-MAX4400AXK-T
2D5V_ON 2 470R3F ZZ.04400.01F
Q32

2
3

DUMMY-BAV70LT1D DUMMY-2N7002
1 BL3 31,35,38,39
G 64.47005.651 R448
S 1 2
2

0R3-U
63.R0004.151

1 SB_5 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
MAX1845/2D5V_S3/1D2V_S0/1D25V_DDRVREF_S3
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 36 of 42

A B C D E
A B C D E

Adaptor In Circuit
DOCK_AD+
D33 DOCK_AD+_S AD+
2 L22
U47
CN8 3 1 2 1 S D 8
2 S D 7

SC1U50V5ZY
4 1 AD+_1 1 FBMJ3216HS480NT 3 S D 6 4

1
4 G D 5

1
3 SBM1040CT-13 C221 C218 R95

1
SCD1U25V3KX AO4407 12KR3 C213

2
K 22

1
2 C99 SCD1U
4 SCD1U25V3KX R338 C212

2
5 100KR2 1 2
2 SB

1
DC-JACK72 DY-SCD1U

2
3
K 22
C236 D SB_7
SC1U50V5ZY 1 Q43
29 AD_OFF

2
2N7002 FOR EMI
G

1
S

2
R337

3
Q40 100KR2
DTA124EUA-U1

2
LAN Power
3D3V_S5 3D3V_LAN_S5AC NS
3
R503
1D5V_S5 1D5V_LAN_S5AC Power Save Circuit 3

1 2 R83 U28
2 1 R264 R267 R271
0R3-U 1D5V_LAN_S5AC 1 2 1 2 3 4 1 2
16,39 DPRSLPVR IN- OUT SYS_PWRSAV# 33
DY-0R3-U 100KR2 100KR2 2 1KR2
3D3V_S5 3D3V_LAN_S5AC ZZ.R0004.151 VSS
2D5V_S3 1 2 1 5 3D3V_S0
IN+ VDD

1
3D3V_S5 U55 C158 C159 R263 DUMMY-R2

2
3D3V_LAN_S5AC R488 SC4D7U10V5ZY SC4D7U10V5ZY G1214
2 5 BC228 DY-12K4R3D
GND IN ZZ.12426.651
3 U57 1 R266 2

1
NC DY-SC20P50V2JN-U 0R2-0
4 1

2
ON/OFF# OUT ZZ.20034.1F1
1 5
SHDN# SET
DY-SC1U10V3ZY

DY-SCD1U16V

2
GND

1
R262 R260
ZZ.10593.4B1

DY-AAT4250-U 3 4
ZZ.10491.4F1

IN OUT
1

ZZ.04250.03F BC230 R489 1 2 1 2


1D5V_S0
C308

C309

DY-SC1U10V3ZY DY-60K4R3F
ZZ.10593.4B1 DY-G913C-U BC224 ZZ.60425.651 10K2R2F 90K9R2F
2

ZZ.00913.03F DY-SC1U10V3ZY

2
ZZ.10593.4B1

2
Run Power Suspend Power 2

5V_S3 5V_S5
5V_S0 5V_S5
Q27 U34
Q12 U33 DCBATOUT TP0610T 1 S D 8
DCBATOUT TP0610T 1 8 2 7
S D S D
2 S D 7 R289 3 S D 6
R71 3 S D 6 1 2 2 1 S3_GATE 4 G D 5
1 2 2 1 S0_GATE 4 5

2
G D
10KR3 FDS9412-U
1

10KR2 FDS9412-U C165 R288 D26

3
R45 D19 SC1000P50V 330KR2 MMGZ5242B
3

C80 330KR2 3D3V_S0 3D3V_S5 R287 3D3V_S3 3D3V_S5


R70 SCD1U25V3KX MMGZ5242B U36 1 2 SB

1
1 2 SB 1 8 U37
2

S D
2 7 330KR2 1 8

1
S D S D
330KR2 3 6 2 7
1

S D S D
4 G D 5 R286 3 S D 6
R69 1KR2 4 G D 5
1KR2 FDS9412-U
FDS9412-U

2
SB
2

SB

3
1 D 1
3

D 1 Q26
16,28,33,36 PM_SLP_S4#
1 Q11 2N7002
16,20,25,31,35,36,38 PM_SLP_S3#
G 2N7002
G
S Wistron Corporation

2
S 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

Taipei Hsien 221, Taiwan, R.O.C.

Title
Adaptor/5V_S3,S0/3D3V_S3,S0/LAN_PWR
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 37 of 42

A B C D E
A B C D E

BATRERY LOW3 DETECTOR 1D2V_S0 → VCC_IO_S0(1.05V)


5V_AUX 1D2V_S0 C144
DCBATOUT 5V_AUX R197 SC4D7U10V5ZY MAX1999_REF 3D3V_S0
1 2 1D2V_S0_1 1 2 (2V)

1
Set 8V
R13 0R1206

1
10KR2 Q52 R498

1
SUD50N03-11

1
R495

DUMMY-R3
4 R12 3 2 5V_S0 4K75R3F 4
BL3 31,35,36,39

D
S
10KR2

2
3
R11 D

1
160KR3F BL3# 1 Q2 U27 (1.05V)

G
G 5 1 4490_IN+
SC 2N7002 VCC_IO_S0 VDD IN+
S 2
2

2
VSS BC73
U3 4 3
OUT IN-

1
1 5 G38 R497
S-80740_VDD OUT NC R496
2 1 2
VDD BC71 MAX4230AXK-T 2K26R3F
3 4
VSS NC

DUMMY-R3
SCD1U16V

SCD1U16V
GAP-OPEN-PWR SC100P50V2JN BC72
1

S-80840CNMC G39 BC70 R204 SCD1U16V

2
R14 1 2 1D2V_S0_2 1 2 4490_IN-

2
BC4 160KR3F VDD Min 4.04V
GAP-OPEN-PWR SC20P50V2JN-U1K5R2

ST100U4VBM
1
SCD1U16V
2

TC18 R203

2
1 2

1
1KR3F
BC69 R202
DUMMY-R3

2
3 3

2D5V_S3

2D5V_S3 → 1D25V_S0 2D5V_S3 → 1D5V_S0

SC10U6D3V5ZY
1

1
DDR_VREF MUST NEAR NB/DIMM C47 C48 1.5V_S0/800mA
SCD1U16V

2
1D5V_S0

1
16,20,25,31,35,36,37 PM_SLP_S3#
R330

1
4K32R3F TC10
64.43215.551 C200 C199 C198

1
2
3
4
ST47U6D3VDM-U SCD1U16V SCD1U16V SCD1U16V

2
79.47610.2P1

VIN
VOUT
ADJ
VC

1
2D5V_S3 1D25V_S0
U16 R329
SI-3012KS-TL 24KR3D
SI3012KS CAN
1

74.03012.03D
R157 OUTPUT 1A

GND
GND
GND
GND

2
2 2
0R5J-1 U24
LP2996MR-U
DDR_VREF_S3 1D25V_DDRVREF_S3 Vadj = 1.28V
2

8
7
6
5
R158
PM_SLP_S3# 2 4 2 1
SD# VREF
2D5V_S0_LDO 5
VDDQ
1

6 3
AVIN VSENSE C105 0R3-U
7 8
GND
GND

PVIN VTT
2

SCD01U16V2KX
1

9
1

C104 TC2
SCD1U16V ST100U6D3V-U
2

TC3
C110
SC1U10V3ZY
3D3V_S5 --> 1D5V_S5
2

SE220U2D5VM-1
79.2271V.9P1

1.5V/80mA
U18 1D5V_S5
CM2830AAIM23-U1

1 2
GND VOUT
IN

1 1

1
Wistron Corporation
3

3D3V_S5 C70
2 SC2D2U16V5ZY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
C437 Taipei Hsien 221, Taiwan, R.O.C.

Title
I max = 300 mA SC1U10V3ZY
SB_21 1D5V_S5,S0/1D25V_S0/VCC_IO_S0
Size Document Number Rev
A3
Skylark II SC
Date: Tuesday, July 20, 2004 Sheet 38 of 42

A B C D E
A B C D E

Deep_Sleep
93.1k/(93.1k+2.55k)=97.334%
ref : DOC 390 page 25 DCBATOUT
OffSet 2.67%
G25
1 2

GAP-OPEN-PWR
Deeper Deep Active G27

DPRSLPVR 1 0 0 RISEN= 1 2
4
STP_CPU# 0 0 1 6218_DACOUT DCBATOUT_6218 5V_S0 25A*8.5mR/2/32uA=3.32KR GAP-OPEN-PWR
4

FDD6676 Rds(on)=8.5mR DCBATOUT_6218 G26

2
1 2
R126 5V_S0 G20

1
GAP-OPEN-PWR 1 2
1K21R3F R378 G28

1
4D7R3 1 2 GAP-OPEN-PWR

1
R134 C82 G19
0R3-U SC1U10V3KX GAP-OPEN-PWR 1 2

2
1

SC10U25V0KX

SC10U25V0KX

SC10U25V0KX

SC10U25V0KX
C97 GAP-OPEN-PWR

SCD1U25V3KX
2

1
SCD027U50V3KX R104 C29 C188 C44 C187 C37 G18
2

5
6
7
8

5
6
7
8
97K6R3F

SCD1U25V3KX
1 2
D21 R125 U38 U40

D
D
D
D

D
D
D
D
1 2

2
1

1
4K12R3F FDS6690A GAP-OPEN-PWR
16,37 DPRSLPVR BAT54-7-U FDS6690A
C96 C91 G17
29 6218_DPSLP#
SC1U10V3KX R133 1 2
5 H_VID[5..0]

1 2
R135 0R2-0
16 VGATE
1K37R3F GAP-OPEN-PWR

S
S
S

S
S
S
G

G
1 2

3
R103 C186 G16
2

4
3
2
1

4
3
2
1
PWRCH Low ==> One Phase U20 SC2K2P 1 2
C95 0R3-U CPU_CORE VCC_CORE_S0
1 38 SCD33U16V3ZY GAP-OPEN-PWR
R105

2
VDD VBAT G15
1 2 2 37 6218_ISEN1 L10
DACOUT ISEN1
6218_DSV 3 36 CPU_CORE_1 1 2 1 2
243KR3F DSV PHASE1
6218_FSET 4 35 6218_UG1
R328 FSET UG1 6218_BOOT1 IND-D68UH-4-U GAP-OPEN-PWR
5 34
N/C BOOT1

1
CPUCORE_ON 1 2 CPUCORE_ON_1 6 33 D D G14
3 DPRSLPVR DPRSLPVR_R 7 EN VSSP1 Q28 Q29 3
1 2 32 6218_LG1 1 2

ISL6218
DRSEN LG1
3

SE330U2VDM-2
10KR3 D 6218_DPSLP# 1R353 0R2-0
2 CC_DPSLP#_R 8 31 FDD6606 FDD6606 R33 TC19
Q13 R354 0R2-0 DSEN# VDDP 2D2R3-1-U GAP-OPEN-PWR
31,35,36,38 BL3 1 H_VID0 9 30
VID0 N/C

2
G 2N7002 H_VID1 10 29 G13

2
VID1 N/C
1

5V_S0 S H_VID2 11 28 1 1 D10 1 2


2

R55 VID2 N/C


H_VID3 12 27 G G
DY-10KR2 VID3 N/C DY-B340LA GAP-OPEN-PWR
H_VID4 13 26

3
VID4 N/C
1

ZZ.10334.1D1 H_VID5 14 25 S S C27 G12

1
VID5 N/C

1
VGATE 15 24 SC1000P50V 1 2
2

PGOOD VSEN TC15


6218_EA+ 16 23 6218_DRSV
R347 EA+ DRSV DY-ST220U2VDM-1 GAP-OPEN-PWR
6218_CONP 17 22 6218_STV

2
DUMMY-R3 COMP STV ZZ.22719.2P1 G11
R335 6218_FB 18 21 6218_OCSEL
FB OCSET

1
1 2 6218_SOFT 19 20 1 2
1 2

SOFT VSS

1
C78
6K04R3F SC1U10V3KX TC14 GAP-OPEN-PWR

2
ISL6218CV-T G5 R67 SE330U2VDM-2

2
C216 1 2 54K9R3F
DUMMY-C3

2
1

1
GAP-CLOSE-PWR
C62 G4 C61 TC13 EEFU0D221XR/SP-CAP/
2

1
1 2 SC560P SE330U2VDM-2 2V/220uF/12mOhm/3mm-max
2

2
DUMMY-C3 1
GAP-CLOSE-PWR R44
C60 45K3R3
2
1

SC1800P50V3KX
IMVP IV
2

2
1

C204 R102
Load Line Slope :3mR DUMMY-C3 15KR3F C63

1
32A=> 96mV SCD015U50V3KX
2
2

2 Rdroop = 96mV / R43 2


2

75KR3F
32uA C79

2
SC2K2P

V_OCSET = 1.75V
1

V_DRSV = 0.75716V
C210
No Stuff DY-SCD015U25V3KX R94
V_BOOT =1.2611V
12

ZZ.15322.2B1 3K57R3F I_OCSET = 12.5uA =>


R336
OCP =125% ~ 175%
2

DY-2K21R3F
ZZ.22115.651
2

3D3V_S0
3D3V_S0 3D3V_S0 J2 Turn on CPU Core 3D3V_S0
DCDC
1

3 VTT_PWRGD#
R372 R352 R355
10KR3 R346 1KR3
3K3R2 10KR3
2

1
CPUCORE_ON 1 R318 2 CPUCORDE_ON_DELAY VGATE 1
0R2-0
3

D
Wistron Corporation
3

D C203 VTT_PWRGD# 1 Q39


VCC_IO_S0 1 Q38 SC1U10V3ZY 2N7002 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
G
3

G 2N7002 D S Taipei Hsien 221, Taiwan, R.O.C.


2

S 1 Q37
2
3

R371 2N7002 Title


G
1 2 2 Q42 S
IMVP IV-CPU POWER-ISL6218
2

S2N3904-U2
10KR2 Size Document Number Rev
1

A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 39 of 42

A B C D E
A B C D E

BT+ 41,42
ID = -10A/70deg AD+ 37,42
Rds(ON) = 24mohm ID = -10A/70deg BT+
DCBATOUT 14,20,35,36,37,38,39,41,42
SO-8 Rds(ON) = 24mohm
AD+
DCBATOUT DCBATOUT SO-8
U35 R57 U7
8 D S 1 AD+_TO_SYS 1 2 1 S D 8
4 7 D S 2 2 S D 7 4
D S D01R3720F S D

DY-SCD1U

ZZ.10492.4B1
6 3 3 6

1
5 D G 4 4 G D 5
C6 C5 C14 R646

1
SC1000P50V SC1000P50V R15 AO4407
100KR3F AO4407 C9 DY-20KR3F
SC1U50V5ZY

2
MAX1909_ACIN
MAX1909_PDL SB

1
AC_IN Threshold 2.089V Max. R16
13KR3F
AC_IN > REF/2 --> AC DETECT
AD+_TO_SYS

2
DCBATOUT

LDO :5.40V (< 5mA)


D5

C55
AD+ 1 2 MAX1909_DC_IN
MAX1909_LDO
SET Vout MAX VCELL= 4.1998V/CELL

SC10U25V0KX

SC10U25V0KX
CH521S-30 Near MAX1909
VBAT=CELL*VCELL==>VCELL=VBAT/CELL Pin 2

1
SCD1U
C73 C72 C215 C15 C17 C16
=VREF+(VVCTL-1.8) /9.52 =4.1998V SCD1U SCD1U

4
3
2
1
MAX1909_LDO SCD1U

2
1

MAX1909_DHIV
41 CHARGE_ON#_OFF C81 SC1U10V3ZY U6

G
S
S
S
3 3
SC1U25V5ZY U19

26

25
AO4411

2
2

R58

CSSN
CSSP
1

33R2
1

R96

D
D
D
D
20KR3F R341 MAX1909_PDS 27 22

5
6
7
8
PDS DHIV
1

R73 R320 100KR2 AD+_TO_SYS 24


SRC PDL
28 Near MAX1909 GANG SONG 15UH/12*12*4
54K9R3F 1 2
Pin 21 DCR=40mohm
2

DCIN LDO
30KR3F

BT+
3MAX1909_ICTL

Iset for seting C49


21 MAX1909_DLOV SC1U10V3ZY L6 IND-15UH-19
max output R41
2

DLOV
MAX1909_VCTL 11 CHG_PWR-2 1 2 CHG_PWR-3 1 2
VCTL
current MAX1909_ICTL 10
ICTL
MAX1909_MODE 7 D015R3720F-1
MODE
1

R72 SET CHG OFF DHI


23 MAX1909_DHI

5
6
7
8
D
Pre-CHG_I = 300mA
1

2
20KR3F

SC10U25V0KX

SC10U25V0KX
DY-SC10U25V0KX
1 3

D
D
D
D
ACIN
BAT_CHG_I = 3.0A

ZZ.10622.531

SC10U25V0KX
G R343 U5

1
C40

C38

C22
S R321 10KR3F MAX1909_IINP 8 D8
2

IINP

C30
Q16 22K6R3F 20 MAX1909_DLO DY-SSM24L
DLO
1
C74

2N7002 MAX1909_CLS 9 AO4422


2

2
R84 CLS

G
S
S
S
10KR3F

4
3
2
1
SCD1U

AC_OK 6 19
ACOK PGND
2

29
PGND
R332 1KR3F 18
2 CSIP 2
41 BT_THM 1 2 MAX1909_PKPRES# 5
PKPRES
MAX1909_LDO

MAX1909_CCV 13 17
CCV CSIN
MAX1909_CCI 12 16 BT+SENSE 41
CCI BATT
1

V( MODE ) >=2.8V = 4 Cell MAX1909_CCS 14


CCS GND
15
R59
V( MODE ) = 1.8V = 3 Cell
REF

R344 10KR3
C56

100KR3F
1

UP+5V
SCD01U25V2KX

V_REF :4.2235V
2

4
C202

MAX1909ETI
(<500uA)
SCD01U25V2KX

C50
2

SCD1U
1

MAX1909_REF

SB_23
1

R331 R342 SET Iin MAX = 3.0A(FOR 65W) G2


2

DUMMY-R2 DY-1KR3F R323 1 2


180KR3F

1
Iin=(0.075/RS1)*(VCLS/V_REF) GAP-CLOSE
2

SB_8 R644 R645


2

41 AC_OK#
SC1U10V3ZY

MAX1909_CLS 100KR2 10KR2


C209

2
1

28 AC_OK
R322 AC_OK_1
120KR3F AC_OK_1 41

3
MAX1909_ICTL D
1
2
3

D SB AD_IN# G Q71
1 33 AD_IN# 1
1 Q19 S 2N7002
29 KBC_CHARGE_ON#_OFF

2
3

3
Q70 D 2N7002 D
G
S 2N7002 1 1 Wistron Corporation
2
1

G G Q72 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


R639 S S 2N7002 Taipei Hsien 221, Taiwan, R.O.C.
2

2
100KR2
Title
Battery Charger Max1909
2

Size Document Number Rev


SB_22 A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 40 of 42

A B C D E
A B C D E

Battery Conn
UP+5V
D14
2

1 R53 2 BTCLK_5 3
4 0R2-0 4
1

DY-BAV99LT1
D17
2
BT_SCL_5
BT_SDA_5 1 R66 2 BTDATA_5 3
5V_S3 5V_S3 UP+5V 0R2-0
1

1
DY-BAV99LT1
R270
10KR3 BT+
CN5
3
4

3
4
G24

2
RN50 RN77 1 2 7
40 BT+SENSE
SRN10KJ SRN10KJ 6

1
G
D15 GAP-CLOSE BT_THM 5
33 BAT_IN# 1 2 4
2 3 G23 3
2
1

2
1
SD103AWS BT-SENSE 1 2 2
S Move to KBC page
D
x
1

Q67
G

GAP-CLOSE 1
2N7002 BT_SDA_5
31,33 KBC_SDA_5
2 3 BT_SCL_5 C194
31,33 KBC_SCL_5

1
SC1000P50V AMP-CON7-3-U1
S

C195 C196
40 BT_THM
Q68 SCD1U25V3KX SC1000P50V

2
3 2N7002 3

UP+5V

Charger uP

1
R75
100KR2
UP+5V
5V_S5

2
R97 R87
1 2 1 R98 2 1 2
0R2-0 Q17
2

1
5V_AUX UP+5V D 10KR2 1KR2 OUT 3
2

R48 R47 BT_THM 1 Q18 C77 R1 2


GND 1 FLASH_GPIO1 33
U68D 10KR2 G SCD1U16V IN

2
TSAHCT32 10KR2 2N7002 UP+5V R2
S
14

2
1
1

12 C76 DTC144EUA
1

1
11 SCD1U16V SB-40-2 84.00144.B1K
14 CHARGE_LED#

2
13 Q5 U17 R62
AC_OK# 40
3

2 2
D 2N7002 SB-40-1 10KR2
1 8 1
7

Q4 BT_SDA_5 VCC (RESET#)PB5


G 7 2

2
PB2(SCK/T0) (XTAL1)PB3
3

S D 2N7002 BT_SCL_5 6 3 CHARGE_ON#_OFF 40


2

PB1(MISO/INT0/AIN1) (XTAL2)PB4
1 1 R46 2 CHARGE_LED#_1 5 4
47KR2 PB0(MOSI/AIN0) GND
G
S
2

ATTINY12L-4SC-3
SCD1U10V2KX
1

UP+5V
C433

SC_12 SB
2
2

1
R60
UP+5V 5V_S5 2K2R2 R74
10KR2
R136
1

1 2 D46

2
BL2#_1 1 R614 2 2 1 BL2# 33
DY-0R3-U R61 0R2-0
40 AC_OK_1 1 2
5V_AUX_S5 S1N4148-U
C93 DCBATOUT 2K2R2 Q7
R137
1 2 1 2 OUT 3
R1 2
GND 1 FLASH_GPIO2 33
DY-0R3-U
DY-SCD1U16V

DY-SCD1U16V
DY-SC10U10V6ZY-U

IN
ZZ.R0004.151 U21 ZZ.10491.4F1 R2
ZZ.10491.4F1
1

ZZ.10693.4I1

1 8
OUT INPUT
C101

C100

2 7 DTC144EUA
SENSE FB
1

1 3 6 84.00144.B1K 1
2

SD 5V/TAP
GND 100mA ERROR
4 5 DY-SC1U50V5ZY
C92
Wistron Corporation
2

DY-LP2951ACM ZZ.10594.411
ZZ.02951.A31 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R141 Taipei Hsien 221, Taiwan, R.O.C.
*Layout* 1 2
Title
15 mil DY-0R2-0
ZZ.R0034.1D1
Charger uP & Battery Conn
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 41 of 42

A B C D E
A B C D E

5VA_S0

FOR EMI
U66C

14
9 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S3 3D3V_S0 3D3V_S0 3D3V_S0 2D5V_S3 AD+
8
10

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V
TSLCX86MTC-U

BC138
SCD1U

SCD1U
BC16
4 4

BC255

BC261

BC262

BC121

BC124
BC31

BC19

BC61
2

2
AUD_AGND

5VA_S0 5VA_S0
U80D
8

TSHC4066 5VA_S0 3D3V_S0


14 7 U66D BT+ 5V_S5 5V_S0 DCBATOUT

11

14
6 14 7 12

SCD1U16V

SCD1U16V
11

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V
U80B 12 13

1
BC146
BC5

BC9
SCD1U

SCD1U

BC15

BC22

BC24
TSHC4066

BC122

BC123
AUD_AGND TSLCX86MTC-U
9

7
SC

2
AUD_AGND
10

C67 SCD1U
DOCK_AD+

5VA_S0 AUD_AGND
U80A
1

TSHC4066 C65 SCD1U


DOCK_AD+
14 7

3 13 3
C64 SCD1U
DOCK_AD+
C68 SCD1U H1 H16
DOCK_AD+

3
AUD_AGND
2

2 1 2 1

BEETLE2 BEETLE2

4
HOLE HOLE BOSS1 BOSS1 HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
ZZ.0HOLE.XXX 34.48T01.001 ZZ.43F01.001 ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX
ZZ.ETLE4.XXX
H3 H5 H11 H17 H6 H8 H13 H14 H9 H19 H7 H10 H12

3
H4

5
1 4

2 1
1

1
2 3
BEETLE2

4
BEETLE4

6
2 2
HOLE
ZZ.0HOLE.XXX

H15
L K25 K1 K2 K6 K8 K3 K7 K9 K5 K4 K15 K16 K20 K21
GNDPADS GNDPADS GNDPADS GNDPADS GNDPADS GNDPADS
GNDPADS GNDPADS GNDPADS GNDPADS GNDPADS GNDPADS GNDPADS GNDPADS 34.48R21.002 ZZ.48R21.002 ZZ.48R21.002 ZZ.48R21.002 ZZ.48R21.002 ZZ.48R21.002 ZZ.ETLE4.XXX
ZZ.48R20.001 34.48R21.002 34.48R21.002 ZZ.48R21.002 34.48R21.002 34.48R21.002 34.48R21.002 34.48R21.002
H2

5
1

1
1 4
1

ZZ.ETLE4.XXX 2 3
H18

5
I BEETLE4

6
K28
J K26 K27
K11
K12
K10
GNDPADS
K17
GNDPADS
K22
GNDPADS
K23
GNDPADS
K19
GNDPADS
K18
GNDPADS
K24
GNDPADS K13 K14
1 4

GNDPADS GNDPADS ZZ.45T11.001 ZZ.45T11.001 ZZ.45T11.001 ZZ.45T11.001 ZZ.45T11.001 ZZ.45T11.001 ZZ.45T11.001 GNDPAD GNDPAD
GNDPADS GNDPADS GNDPADS ZZ.45T11.001 ZZ.45T11.001
ZZ.42P27.001 ZZ.42P27.001 34.42P27.001 2 3
1

1
BEETLE4
1

6
1 1

AUD_AGND AUD_AGND Wistron Corporation


21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MISC
Size Document Number Rev
A3 SC
Skylark II
Date: Tuesday, July 20, 2004 Sheet 42 of 42

A B C D E

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