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LED LCD TV
SERVICE MANUAL
CHASSIS : LD12C
CONTENTS .............................................................................................. 2
SPECIFICATION ...................................................................................... 4
Copyright © 2011 LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
Copyright © 2011 LG Electronics. Inc. All rights reserved. -3- LGE Internal Use Only
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
Copyright © 2011 LG Electronics. Inc. All rights reserved. -4- LGE Internal Use Only
Only for training and service purposes
No. Item Specification Remarks
3 Receiving system Analog : Upper Heterodyne G DVB-T
Digital : COFDM , QAM - Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
G DVB-T2
- Guard Interval(Bitrate_Mbit/s)
1/4,1/8,1/16,1/32,1/128,19/128,19/256,
- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
G DVB-C
- Symbolrate : 4.0Msymbols/s to 7.2Msymbols/s
- Modulation : 16QAM, 64-QAM, 128-QAM and 256-QAM
G DVB-S
- Symbolrate
DVB-S2 (8PSK/ QPSK) : 2 ~ 45 Msymbol/s
DVB-S (QPSK) : 2~ 45 Msymbol/s
-viterbi
DVB-S mode :1/2, 2/3, 3/4, 5/6, 7/8
DVB-S2 mode : 1/2, 23, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10
4 Scart Gender Jack(1EA) PAL, SECAM Scart Jack is Full scart and support MNT/DTV-OUT, DTV Recording(not support DTV Auto AV)
5 Video Input RCA(2EA) PAL, SECAM, NTSC 4System : PAL, SECAM, NTSC, PAL60
Rear 1EA, AV gender jack 1EA
6 Head phone out Antenna, AV1, AV2, AV3,
Component, RGB, HDMI1, HDMI2,
HDMI3, HDMI4 USB
7 Component Input(1EA) Y/Cb/Cr, Y/Pb/Pr Component Gender 1EA
8 RGB Input RGB-PC Analog(D-SUB 15PIN)
9 HDMI Input (4EA) HDMI1-DTV/DVI PC(HDMI version 1.3)
HDMI2-DTV Support HDCP
HDMI3-DTV
HDMI4-DTV
10 Audio Input (4EA) RGB/DVI Audio, Component, AV1, 2 L/R Input
11 SDPIF out (1EA) SPDIF out
12 USB (2EA) EMF, DivX HD, JPEG, MP3, DivX HD
For Service (download) - USB current : max 500 mA
- USB voltage : 4.75 V - 5.25 V
13 Wireless jack (1EA) 24V power & control Voltage : 24 V, Power : max 8 W
Copyright © 2011 LG Electronics. Inc. All rights reserved. -5- LGE Internal Use Only
Only for training and service purposes
5. Component Video Input (Y, CB/PB, CR/PR)
Specification
No. Remark
Resolution H-freq(kHz) V-freq(Hz)
1. 720x480 15.73 60.00 SDTV,DVD 480i
2. 720x480 15.63 59.94 SDTV,DVD 480i
3. 720x480 31.47 59.94 480p
4. 720x480 31.50 60.00 480p
5. 720x576 15.625 50.00 SDTV,DVD 625 Line
6. 720x576 31.25 50.00 HDTV 576p
7. 1280x720 45.00 50.00 HDTV 720p
8. 1280x720 44.96 59.94 HDTV 720p
9. 1280x720 45.00 60.00 HDTV 720p
10. 1920x1080 31.25 50.00 HDTV 1080i
11. 1920x1080 33.75 60.00 HDTV 1080i
12. 1920x1080 33.72 59.94 HDTV 1080i
13. 1920x1080 56.250 50 HDTV 1080p
14. 1920x1080 67.5 60 HDTV 1080p
6. RGB (PC)
Specification
No. Proposed Remarks
Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)
1. 720*400 31.468 70.08 28.321 For only DOS mode
2. 640*480 31.469 59.94 25.17 VESA Input 848*480 60 Hz, 852*480 60 Hz
-> 640*480 60 Hz Display
3. 800*600 37.879 60.31 40.00 VESA
4. 1024*768 48.363 60.00 65.00 VESA(XGA)
5. 1360*768 47.72 59.8 84.75 WXGA
6. 1920*1080 66.587 59.93 138.625 WUXGA FHD model
Copyright © 2011 LG Electronics. Inc. All rights reserved. -6- LGE Internal Use Only
Only for training and service purposes
7. HDMI Input
(1) DTV Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*480 31.469 /31.5 59.94 /60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 /45 59.94 /60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72 /33.75 59.94 /60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 /27 23.97 /24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716 /33.75 29.976 /30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 /67.5 59.94 /60 148.35/148.50 HDTV 1080P
(2) PC Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*400 31.468 70.08 28.321 HDCP
2. 640*480 31.469 59.94 25.17 VESA HDCP
3. 800*600 37.879 60.31 40.00 VESA HDCP
4. 1024*768 48.363 60.00 65.00 VESA(XGA) HDCP
5. 1360*768 47.72 59.8 84.75 WXGA HDCP
6. 1280*1024 63.595 60.0 108.875 SXGA HDCP/FHD model
7. 1920*1080 67.5 60.00 138.625 WUXGA HDCP/FHD model
Copyright © 2011 LG Electronics. Inc. All rights reserved. -7- LGE Internal Use Only
Only for training and service purposes
8. 3D Mode
(1) HDMI Input (1.4a)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
1 1920*1080 53.95 / 54 23.98 / 24 148.35/148.5 HDTV 1080P Frame packing
2 1280*720 89.9 / 90 59.94/60 148.35/148.5 HDTV 720P Frame packing
3 1280*720 75 50 148.5 HDTV 720P Frame packing
4 1920*1080 67.5 60 148.5 HDTV 1080P Side by Side(half), Top and bottom
5 1920*1080 56.3 50 148.5 HDTV 1080P Side by Side(half), Top and bottom
6 1280*720 45 60 74.25 HDTV 720P Side by Side(half), Top and Bottom
7 1280*720 37.5 50 74.25 HDTV 720P Side by Side(half), Top and Bottom
8 1920*1080 33.7 60 74.25 HDTV 1080i Side by Side(half), Top and Bottom
9 1920*1080 28.1 50 74.25 HDTV 1080i Side by Side(half), Top and Bottom
10 1920*1080 27 24 74.25 HDTV 1080P Side by Side(half), Top and Bottom
11 1920*1080 33.7 30 89.1 HDTV 1080P Side by Side(half), Top and Bottom
(3) RF 3D Input(DTV)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
1 1280*720 37.500 50 74.25 HDTV 720P Side by Side, Top & Bottom
2 1920*1080 28.125 50 74.25 HDTV 1080I Side by Side, Top & Bottom
Copyright © 2011 LG Electronics. Inc. All rights reserved. -8- LGE Internal Use Only
Only for training and service purposes
(5) RGB-PC Input
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
1 1920*1080 67.5 60 148.5 HDTV 1080P Side by Side, Top & Bottom
(6) DLNA
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
1 1920*1080 33.75 30 HDTV 1080P Side by Side, Top & Bottom,
Checkerboard
Copyright © 2011 LG Electronics. Inc. All rights reserved. -9- LGE Internal Use Only
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range (3) Adjustment
1) Adjustment method
This specification sheet is applied to all of the LED LCD TV - Using RS-232, adjust items in the other shown in
with LD12C chassis. “3.1.(3).3)”
2) Adj. protocol
2. Designation Protocol Command Set ACK
(1) Because this is not a hot chassis, it is not necessary to use Enter adj. mode aa 00 00 a 00 OK00x
an isolation transformer. However, the use of isolation Source change xb 00 40 b 00 OK40x (Adjust 480i, 1080p Comp1 )
transformer will help protect test instrument.
xb 00 60 b 00 OK60x (Adjust 1920*1080 RGB)
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of Begin adj. ad 00 10
25 ºC ± 5 ºC of temperature and 65 % ± 10 % of relative Return adj. result OKx (Case of Success)
humidity if there is no specific designation. NGx (Case of Fail)
(4) The input voltage of the receiver must keep AC 100-240 Read adj. data (main) (main)
V~ 50 / 60Hz.
ad 00 20 000000000000000000000000007c007b006dx
(5) The receiver must be operated for about 5 minutes prior to
(sub) (Sub)
the adjustment when module is in the circumstance of over
15. ad 00 21 000000070000000000000000007c00830077x
Confirm adj. ad 00 99 NG 03 00x (Fail)
In case of keeping module is in the circumstance of 0 °C, it NG 03 01x (Fail)
should be placed in the circumstance of above 15 °C for 2 NG 03 02x (Fail)
hours
OK 03 03x (Success)
Copyright © 2011 LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
2) MAC Address Download 3.4. LAN PORT INSPECTION(PING TEST)
- Com 1,2,3,4 and 115200(Baud rate) Connect SET -> LAN port == PC -> LAN Port
- Port connection button click(1)
SET PC
(1) Equipment setting
1) Play the LAN Port Test PROGRAM.
2) Input IP set up for an inspection to Test
Program.
*IP Number : 12.12.2.2
(2) LAN PORT inspection (PING TEST)
1) Play the LAN Port Test Program.
2) Connect each other LAN Port Jack.
3) Play Test (F9) button and confirm OK Message.
4) Remove LAN CABLE
Copyright © 2011 LG Electronics. Inc. All rights reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
* Manual Download (Model Name and Serial Number) 2) Check the method of CI+ key by command (RS232 : ci
If the TV set is downloaded by OTA or service man, 00 20)
sometimes model name or serial number is initialized.(Not
CMD 1 CMD 2 Data 0
always)
There is impossible to download by bar code scan, so It C I 2 0
need Manual download.
a. Press the ‘instart’ key of ADJ remote control. 3) Result value
b. Go to the menu ‘5.Model Number D/L’ like below photo. i 01 OK 1d1852d21c1ed5dcx
c. Input the Factory model name(ex 42LW950-ZA) or Serial CI+ key Value
number like photo.
3.6. CI+ Key Download method => Check the Download to Widevine Key value in LGset.
3.6.1. Download Procedure
(1) Press "Power on" key of a Service Remote control. 3.7.2. check the method of Widevine Key value.
(Baud rate : 115200 bps) (1) Check the method on Instart menu.
(2) Connect RS232-C Signal Cable. (2) Check the method of RS232C Command.
(3) Write CI+ Key through RS-232-C. 1) into the main ass’y mode (RS232 : aa 00 00)
(4) Check whether the key was downloaded or not at ‘In Start’
CMD 1 CMD 2 Data 0
menu. (Refer to below).
A A 0 0
=> Check the Download to CI+ Key value in LGset. CMD 1 CMD 2 Data 0
C I 1 0
3.6.2. Check the method of CI+ Key value
(1) check the method on Instart menu
(2) check the method of RS232C Command 3) result value
1) into the main ass’y mode (RS232 : aa 00 00) - normally status for download : OKx
- abnormally status for download : NGx
CMD 1 CMD 2 Data 0
-
A A 0 0 3.7.3 check the method of Widevine Key value (RS232)
1) into the main ass’y mode (RS232 : aa 00 00)
2) check the key download for transmitted command
(RS232 : ci 00 10) CMD 1 CMD 2 Data 0
A A 0 0
CMD 1 CMD 2 Data 0
C I 1 0 2) Check the method of Widevine key by command
(RS232 : ci 00 20)
3) result value
CMD 1 CMD 2 Data 0
- normally status for download : OKx
- abnormally status for download : NGx C I 2 0
3.6.3. Check the method of CI+ Key value (RS232) 3) result value
1) into the main ass’y mode (RS232 : aa 00 00) i 01 OK 1d1852d21c1ed5dcx
CMD 1 CMD 2 Data 0 Widevine key Value
A A 0 0
Copyright © 2011 LG Electronics. Inc. All rights reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
3.8. Mac+Widevine+GP3 BCM CI+ download 4. Manual Adjustment
3.8.1 Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port
4.1. ADC(GP3) Adjustment
4.1.1. Overview
ADC adjustment is needed to find the optimum black level and
gain in Analog-to-Digital device and to compensate RGB
deviation.
CI + Key Write
Result Play
Copyright © 2011 LG Electronics. Inc. All rights reserved. - 13 - LGE Internal Use Only
Only for training and service purposes
4.2. EDID(The Extended Display Identification (5) EDID DATA_2D
A HDMI
Data)/DDC(Display Data Channel) download
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
(1) Overview
0x00 0 FF FF FF FF FF FF 0 1E 6D ⓐ ⓑ
It is a VESA regulation. A PC or a MNT will display an
0x01 ⓒ 1 3 80 10 9 78 0A EE 91 A3 54 4C 99 26
optimal resolution through information sharing without any
0x02 0F 50 54 A1 8 0 71 40 81 C0 81 0 81 80 95 0
necessity of user input. It is a realization of “Plug and Play”.
0x03 90 40 A9 C0 B3 0 2 3A 80 18 71 38 2D 40 58 2C
0x04 45 0 A0 5A 0 0 0 1E 66 21 50 B0 51 0 1B 30
(2) Equipment
0x05 40 70 36 0 A0 5A 0 0 0 1E 0 0 0 FD 0 39
- Adjust remote control
0x06 3F 1F 52 10 0 0A 20 20 20 20 20 20 ⓓ
- Since embedded EDID data is used, EDID download JIG,
0x07 ⓓ 1 ⓔ1
HDMI cable and D-sub cable are not need. 0x00 2 3 26 F1 4E 10 1F 84 13 5 14 3 2 12 20 21
0x01 22 15 1 26 15 7 50 9 57 7 67 ⓕ
(3) Download method 0x02 ⓕ E3 5 3 1 1 1D 80 18 71 1C 16 20 58 2C
1) Press Adj. key on the Adj. R/C, then select “10.EDID 0x03 25 0 A0 5A 0 0 0 9E 1 1D 0 80 51 D0 1A 20
D/L”, By pressing Enter key, enter EDID D/L menu. 0x04 6E 88 55 0 A0 5A 0 0 0 1A 2 3A 80 18 71 38
2) Select [Start] key by pressing Enter key, HDMI1/ HDMI2/ 0x05 2D 40 58 2C 45 0 A0 5A 0 0 0 1E 66 21 50 B0
HDMI3/ RGB are Writing and display OK or NG. 0x06 51 0 1B 30 40 70 36 0 A0 5A 0 0 0 1E 0 0
For Analog EDID For HDMI EDID 0x07 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ⓔ2
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F A Reference
0x00 0 FF FF FF FF FF FF 0 1E 6D ⓐ ⓑ - HDMI1 ~ HDMI4 / RGB
0x01 ⓒ 1 3 80 10 9 78 0A EE 91 A3 54 4C 99 26 - In the data of EDID, bellows may be different by S/W or
0x02 0F 50 54 A1 8 0 71 40 81 C0 81 0 81 80 95 0 Input mode.
0x03 90 40 A9 C0 B3 0 2 3A 80 18 71 38 2D 40 58 2C ⓐ Product ID
0x04 45 0 A0 5A 0 0 0 1E 66 21 50 B0 51 0 1B 30 Model Name HEX EDID Table DDC Function
0x05 40 70 36 0 A0 5A 0 0 0 1E 0 0 0 FD 0 39
ALL 0001 0100 Analog
0x06 3F 1F 52 10 0 0A 20 20 20 20 20 20 ⓓ
0x07 ⓓ 1 ⓔ1
0001 0100 Digital
0x00 2 3 37 F1 4E 10 1F 84 13 5 14 3 2 12 20 21 ⓑ Serial No. : Controlled on product line
0x01 22 15 1 26 15 7 50 9 57 7 ⓕ ⓒ Month, Year: Controlled on production line:
0x02 ⓕ ex) Monthly : ‘01’ -> ‘01’
0x03 ⓕ E3 5 3 1 1 1D 80 18 71 1C 16 20 58
Year : ‘2010’ -> ‘14’
0x04 2C 25 0 A0 5A 0 0 0 9E 1 1D 0 80 51 D0 1A
ⓓ Model Name(Hex):
0x05 20 6E 88 55 0 A0 5A 0 0 0 1A 2 3A 80 18 71
0x06 38 2D 40 58 2C 45 0 A0 5A 0 0 0 1E 0 0 0
MODEL MODEL NAME(HEX)
0x07 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ⓔ2 all 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
Copyright © 2011 LG Electronics. Inc. All rights reserved. - 14 - LGE Internal Use Only
Only for training and service purposes
ⓕ Vendor Specific(HDMI)_3D 4.3.3. Equipment connection MAP
INPUT MODEL NAME(HEX)
Co lo r Analyzer
HDMI1 78 03 0C 00 10 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10
Probe RS -232C
HDMI2 78 03 0C 00 20 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10
Co m p ut er
HDMI3 78 03 0C 00 30 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10 RS -232C
RS -232C
HDMI4 78 03 0C 00 40 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10 Pat t ern Generat o r
A Adj. Map
ITEM Command Data Range(Hex.) Default(Decimal)
Cmd 1 Cmd 2 Min Max
Cool R-Gain j g 00 C0
G-Gain j h 00 C0
Copyright © 2011 LG Electronics. Inc. All rights reserved. - 15 - LGE Internal Use Only
Only for training and service purposes
4.3.5. Adjustment method A Standard color coordinate and temperature using CA-210
(1) Auto adjustment method (CH 14)
1) Set TV in adj. mode using POWER ON key. Mode Color Coordination Temp ∆UV
2) Zero calibrate probe then place it on the center of the
Display. x y
3) Connect Cable (RS-232C) COOL 0.269 ± 0.002 0.273 ± 0.002 13000 K 0.0000
4) Select mode in adj. Program and begin adjustment.
MEDIUM 0.285 ± 0.002 0.293 ± 0.002 9300 K 0.0000
5) When adjustment is complete (OK Sign), check
adjustment status pre mode. (Warm, Medium, Cool) WARM 0.313 ± 0.002 0.329 ± 0.002 6500 K 0.0000
6) Remove probe and RS-232C cable to complete adj.
A W/B Adj. must begin as start command “wb 00 00” , and 4.3.7. White balance table
finish as end command “wb 00 ff”, and Adj. offset if need. A Module change color coordinate because of aging time.
A Apply under the color coordinate table, for compensated
(2) Manual adjustment method aging time.
1) Set TV in Adjustment mode using POWER ON GP2 Aging Time Cool Medium Warm
2) Zero Calibrate the probe of Color Analyzer, then place it on
(Min.) X Y X Y X Y
the center of LCD module within 10 cm of the surface.
3) Press ADJ key -> EZ adjust using adjustment R/C -> 7. 269 273 285 293 313 329
White-Balance then press the cursor to the right key(G). 1 0-2 279 288 295 308 319 338
(When key(G) is pressed 216 Gray internal pattern will 2 3-5 278 286 294 306 318 336
be displayed) 3 6-9 277 285 293 305 317 335
4) One of R Gain / G Gain / B Gain should be fixed at 192,
4 10-19 276 283 292 303 316 333
and the rest will be lowered to meet the desired value.
5 20-35 274 280 290 300 314 330
5) Adj. is performed in COOL, MEDIUM, WARM 3 modes
of color temperature. 6 36-49 272 277 288 297 312 327
7 50-79 271 275 287 295 311 325
A If internal pattern is not available, use RF input. In EZ 8 80-149 270 274 286 294 310 324
Adj. menu 7.White Balance, you can select one of 2 9 Over 150 269 273 285 293 309 323
Test-pattern: ON, OFF. Default is inner(ON). By
selecting OFF, you can adjust using RF signal in 216
Gray pattern. 4.4. Wireless function check
Step 1) Connect set and Dongle of Wireless to Cable of HDMI
A Adj. condition and cautionary items & TTA 20Pin
1) Lighting condition in surrounding area Step 2) At OSD of SET, check the message like Fig.3
Surrounding lighting should be lower 10 lux. Try to Step 3) Detach Cable of Wireless Dongle
isolate adj. area into dark surrounding.
2) Probe location : Color Analyzer(CA-210) probe should
be within 10 cm and perpendicular of the module
surface (80° ~ 100°)
3) Aging time
Connect
- After Aging Start, Keep the Power ON status during 5
Minutes.
- In case of LCD, Back-light on should be checked
Fig . 1 Fig . 2
using no signal or Full-white pattern. < Do ng le> < Wireless Read y Set >
Copyright © 2011 LG Electronics. Inc. All rights reserved. - 16 - LGE Internal Use Only
Only for training and service purposes
4.5. EYE-Q function check 4.8. 3D function test
Step 1) Turn on TV (Pattern Generator MSHG-600, MSPG-6100 [Support HDMI 1.4])
Step 2) Press EYE key of Adj. R/C * HDMI mode No. 872, pattern No. 83)
Step 3) Cover the Eye Q II sensor on the front of the using 1) Please input 3D test pattern like below
your hand and wait for 6 seconds
Step 4) Confirm that R/G/B value is lower than 10 of the “Raw
Data (Sensor data, Back light)”. If after 6 seconds,
R/G/B value is not lower than 10, replace Eye Q II
sensor.
Step 5) Remove your hand from the Eye Q II sensor and wait
for 6 seconds.
Step 6) Confirm that “ok” pop up. If change is not seen,
replace Eye Q II sensor.
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Only for training and service purposes
4.10. Option selection per country 6. Audio
(1) Overview
No. Item Min. Typ. Max. Unit
- Option selection is only done for models in Non-EU.
- Applied model: LD03D/03E Chassis applied EU model. 1. Audio practical max 9 10 12 W EQ Off
Output, L/R AVL Off
(2) Method
1) Press ADJ key on the Adj. Remote Control, then select (Distortion=10 % 0.5 Vrms Clear Voice Off
Country Group Menu. max Output)
2) Depending on destination, select Country Group Code
2. Speaker (8 Ω 9 10.0 12.0 W EQ On
04 or Country Group EU then on the lower Country
option, select US, CA, MX. Selection is done using +, - Impedance) AVL On
or GF KEY. Clear Voice On
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Only for training and service purposes
BLOCK DIAGRAM
Copyright © 2011 LG Electronics. Inc. All rights reserved. - 19 - LGE Internal Use Only
Only for training and service purposes
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
710
700
400
900
521
910
540
530
LV2
800
LV1
810
A10
200
A5
120
AG1
511
A21
A2
510
300
Copyright LG Electronics. Inc. All rights reserved. - 20 - LGE Internal Use Only
Only for training and service purposes
NAND FLASH MEMORY 8Gbit 16Gbit Boot ROM Device Select - (FA4,FAD7,FAD2,FAD1) Strap Setting
+3.3V_Normal
+3.3V_Normal
+3.3V_Normal 0000: ST Micro M25P or compatible Serial Flash
IC102-*1
TH58DVG4S0ETA20 0010: 8-bit 512Mbit 512B page SLC NAND Flash devices
IC102 0100: 8-bit 128, 256Mbit 512B page SLC NAND Flash devices
TC58DVG3S0ETA00 0110: 8-bit 1Gbit 2KB page SLC NAND Flash devices
R113 R117 R122 R127 R154 R157 R160 R164 R167 R170 R175 R177 R179 R181 R183 R187 R192
10K 10K 10K 10K 1000: 8-bit 2Gbit, 4Gbit, 8Gbit 2KB page SLC NAND Flash devices 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K
NC_1 NC_26 OPT OPT 1010: 8-bit 16Gbit, 32Gbit 4KB page SLC NAND Flash devices (O) OPT OPT OPT OPT OPT OPT OPT OPT OPT OPT
1 DEV_NAND_16Gbit 48 CI_ADDR[4]
NC_1 NC_28 0001: 8-bit 8/16/32Gbit 2KB page MLC NAND Flash devices
1 NAND_8Gbit 48 NC_2 NC_25 NAND_DATA[7] 0011: 8-bit 16/32Gbit 4KB page MLC NAND Flash devices NAND_DATA[0]
2 47
NC_2 NC_27 NAND_DATA[2] 0101: 8-bit 32Gbit 8KB page MLC NAND Flash devices
2.7K
5 44 NAND_DATA[4]
NC_5 I/O8 1101, 1111: Reserved
5 44 NAND_DATA[7] RY/BY2 I/O7 CI_ADDR[9]
16Gbit 6 43
R149 0 NC_6 I/O7 CI_ADDR[11]
6 43 NAND_DATA[6] RY/BY1 I/O6
7 42 CI_ADDR[12]
RY/BY I/O6
NAND_RBb 7 42 NAND_DATA[5] RE I/O5 CI_ADDR[13]
8 41
RE I/O5 CI_ADDR[8]
NAND_REb 8 41 NAND_DATA[4] CE1 NC_22
CE NC_24
9 40 NAND ECC (FA3, FA2, FALE) NAND_DATA[3]
NAND_CEb 9 40 CE2 PSL NAND_DATA[5]
16Gbit 16Gbit 10 39 +3.3V_Normal
NC_7 PSL 0
NAND_CEb2 R148 0 10 39 R151 NC_6 NC_21 R155 R158 R161 R165 R168 R171 R176 R178 R180 R182 R184 R188 R193
11 38 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K
NC_8 NC_23
C102 11 38 VCC_1 VCC_2 OPT OPT OPT
4700pF 12 37 R111 R115 R119
VCC_1 VCC_2 +3.3V_Normal 10K 10K 10K
12 37 VSS_1 VSS_2 OPT 000 = ECC disabled
C101 13 36 OPT
VSS_1 VSS_2 C104 10uF CI_ADDR[3] 001 = ECC 1-bit repair
0.1uF 13 36 NC_7 NC_20
10V 010 = ECC 4-bit BCH (O)
14 35 CI_ADDR[2]
NC_9 NC_22 011 = ECC 8-bit BCH, 27 byte spare
14 35 C103 NC_8 NC_19 NAND_ALE 100 = ECC 12-bit BCH, 27 byte spare
0.1uF 15 34
NC_10 NC_21 R112 R116 R120 101 = ECC 8-bit BCH, 16 byte spare NAND_DATA[0]:
15 34 CLE NC_18 10K 10K 10K 110, 111 = Reservedd 0: System is LITTLE endian (O) CI_ADDR[9],CI_ADDR[11],CI_ADDR[12],CI_ADDR[13]
16 33 OPT TVM Crystal oscillator bias/gain control
CLE NC_20 1: System is BIG endian
NAND_CLE 16 33 ALE I/O4 0000: 210uA
17 32
ALE I/O4 CI_ADDR[7]: 0001: 390uA
NAND_ALE 17 32 NAND_DATA[3] WE I/O3 0: Disable EDID automatic Downloading from Flash (O) 0010: 570uA
18 31
WE I/O3 1: Enable EDID automatic Downloading from Flash 0011: 730uA
NAND_WEb 18 31 NAND_DATA[2] WP I/O2 0100: 890uA (O)
19 30
WP I/O2 NAND_DATA[6] : 0111: 1290uA
Write Protection +3.3V_Normal 19 30 NAND_DATA[1] NC_9 I/O1 0: Disable OSC clock output on chip Pin (O) 1000: 1416uA
20 29
NC_11 I/O1 1: Enable OSC clock output on chip pin. 1111: 2196uA
- High : Normal Operation 20 29 NAND_DATA[0] NC_10 NC_17 DUAL COMPONENT 0101, 0110, 1001, 1010, 1011, 1100, 1101, 1110: Reserved
R103
4.7K
BCM_NVM_256K
IC103-*1
+3.3V_Normal
NVRAM AT24C256C-SSHL-T
A0
1 8
VCC
A1 WP
R196 2 7
IC101 10K A2 SCL
LGE35230(BCM35230KFSBG) +3.3V_Normal 3 6
BCM_WITHOUT_CAP
B5 AE27 BCM_NVM_1M +3.3V_Normal
HDMI_CLK- HDMI0_CLKN TXOUT0_L0N TXB4P Q101 IC101
4.7K
4.7K
IC103
OPT
R173
R174
C5 AE28
HDMI_CLK+ HDMI0_CLKP TXOUT0_L0P TXB4N BSS83 LGE35230(BCM35230KFSBG) M24M01-HRMN6TP
G
AF27
TXOUT0_L1N TXB3P NAND_DATA[0-7]
A4 AF28
HDMI_RX0- HDMI0_D0N TXOUT0_L1P TXB3N C118 NC VCC
B4 AG27 BCM_WITHOUT_CAP 1 8 Write Protection
HDMI_RX0+ HDMI0_D0P TXOUT0_L2N TXBCLKP 0.1uF AG6 AB1 NAND_DATA[7]
AG28 16V 54MHz_XTAL_P TVM_XTALIN FAD_7 R169
TXOUT0_L2P TXBCLKN AB3 NAND_DATA[6] 0 E1 WP - Low : Normal Operation
+3.3V_Normal A3 AE26 FAD_6 2 7
HDMI_RX1- HDMI0_D1N TXCLK_LN TXB2P AF6 AC1 NAND_DATA[5] A8’h - High : Write Protection
B3 AF26 54MHz_XTAL_N TVM_XTALOUT FAD_5
HDMI_RX1+ HDMI0_D1P TXCLK_LP TXB2N AC2 NAND_DATA[4] E2 SCL
AH27 +3.3V_Normal FAD_4 3 6 R190 33
TXB1P AC3 SCL3_3.3V
TXOUT0_L3N
4.7K
NAND_DATA[3]
OPT
R172
A2 AG26 FAD_3
R101 R105 R104 R195 HDMI_RX2- HDMI0_D2N TXOUT0_L3P TXB1N V5 AD2 NAND_DATA[2] VSS SDA
B2 AF25 LNB_INT IRRXDA FAD_2 4 5 R191 33
4.7K 4.7K 4.7K 4.7K HDMI_RX2+ TXB0P AD3 SDA3_3.3V
HDMI0_D2P TXOUT0_L4N NAND_DATA[1]
AE25 R198 FAD_1
TXOUT0_L4P TXB0N 10K AE2 NAND_DATA[0]
FAD_0
AB4
W2 FP_IN0
CEC RGB_DDC_SCL Y4
AH26
S
B
D
FP_IN1
TXOUT0_U0N TXA4P AG1
V4 AG25 FALE NAND_ALE
DDC0_SCL TXOUT0_U0P TXA4N Q102 AA4 AF1
W4 AE24 SPARE_ADC1 FCEB_0 NAND_CEb
DDC0_SDA TXOUT0_U1N TXA3P BSS83 Y5 AC5
AD24 SPARE_ADC2 FCEB_1 NAND_CEb2 X101-*2
G
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
POWER 2.5V
+2.5V_BCM35230 ADAC_AVDD25 CORE 0.9V
+2.5V_BCM35230 AADC_AVDD25
+0.9V_CORE HDMI_AVDD +0.9V_CORE USB_AVDD +0.9V_CORE VAFE2_DVDD
L202 L205 L209
BLM18PG121SN1D BLM18PG121SN1D L214 L219
+3.3V_Normal
BLM18PG121SN1D BLM18PG121SN1D BLM18PG121SN1D
+0.9V_CORE +0.9V_CORE
NFM18PS105R0J NFM18PS105R0J C249 C253 C256 C258
C233 C204 10uF 10uF 0.1uF 0.1uF C280 C284 C285 C288 C292 C296 C299
C261 C263 C267 C271 C274 22uF 22uF 4.7uF 0.1uF
6.3V 6.3V 10V 10V 10uF 4.7uF 0.1uF 0.01uF 22uF 0.1uF 4.7uF 0.1uF
C225 C221 C223 C247 10V
BCM_FRC/URSA5
GND GND
R254
R256
R257
R253
R255
PHM
R251
R252
OLED
R250
FHD
1K
1K
1K
1K
1K
1K
1K
1K
NO_FRC/FRC2
NO_T2_TUNER
NO_S_TUNNER
C295 C298
C203 C205 C207 C209 C211 C213 C215 C220 C222 C265 C269 C279 C282 4.7uF 0.1uF
NO_PHM
R260
R265
R261
10uF 10uF 4.7uF 4.7uF 0.1uF 0.1uF 0.01uF 0.1uF 0.01uF 4.7uF 0.1uF 4.7uF 0.1uF
R262
R263
R264
R266
R267
LCD
OPT
HD
10V 10V
1K
1K
10V 10V
1K
1K
1K
1K
1K
1K
R28 R17
FRC2_RESET
TU_TS_CLK
4.7K
R232
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
IC101
C320 0.1uF LGE35230(BCM35230KFSBG)
DSUB_R+
INCM_R C321 0.1uF
R311 DSUB_G+ C327 0.1uF
BCM_WITHOUT_CAP
36 C328 0.1uF B6
INCM_G
VI_R
R317 A6
36 VI_INCM_R
C7
VI_G
A7
IC101
LGE35230(BCM35230KFSBG)
BCM_WITHOUT_CAP
B15 AF8 R326 100
SPDIF_INC_P I2SSCK_OUTA/GPIO AUD_SCK
C15 AF9 R327 100
+3.3V_Normal SPDIF_INC_N I2SWS_OUTA/GPIO AUD_LRCK
AG9 R328 100
I2SSD_OUTA0/GPIO AUD_LRCH
C14 AC9 R329 100
SPDIF_IND_P I2SSOSCK_OUTA/GPIO AUD_MASTER_CLK
B14 AD8
SPDIF_IND_N I2SSD_OUTA1/GPIO TU_RESET_SUB C337 C338 C339 C340
R301 R302 AD9 22pF 22pF
I2SSD_OUTA2/GPIO 22pF 33pF
1.2K 1.2K G4
M_REMOTE_TX OPT OPT OPT OPT
I2SSCK_IN/GPIO
F4 E2
SCL3_3.3V I2SWS_IN I2SSCK_OUTC/GPIO HP_DET
G5 F2
SDA3_3.3V I2SSD_IN/GPIO I2SWS_OUTC/GPIO AV1_CVBS_DET
C301 C302 E3
I2SSD_OUTC/GPIO TU_RESET
33pF 33pF F3
50V 50V I2SSOSCK_OUTC/GPIO
C305 1uF 10V C25
PC_L_IN AADC_LINE_L1
C306 1uF 10V B24 G2
PC_R_IN AADC_LINE_R1 I2SSCK_OUTD/GPIO SC_RE1
C307 1uF 10V A24 G3
INCM_AUD_PC AADC_INCM1 I2SWS_OUTD/GPIO SC_RE2
I2SSD_OUTD/GPIO
G1
/RST_HUB AUDIO INCM
C308 1uF 10V E22 H1
PHONE JACK AV1_L_IN AADC_LINE_L2 I2SSOSCK_OUTD/GPIO S2_RESET
C309 1uF 10V E23
AV1_R_IN AADC_LINE_R2
C310 1uF 10V D23
INCM_AUD_AV1 AADC_INCM2
B13 Route Between AV1_L_IN & AV1_R_IN Trace
C24
SPDIF_OUTA/GPIO SPDIF_OUT Near JK1102 R321 0 INCM_AUD_AV1
AV2_L_IN C311 1uF 10V
AADC_LINE_L3
C312 1uF 10V C23 AG8 Route Between SC/COMP2_L_IN & SC/COMP2_R_IN Trace
AV2_R_IN AADC_LINE_R3 AUDMUTE_0/GPIO Near JK1103 R322 0
B23 E13 INCM_AUD_SC/COMP2
C313 1uF 10V JK2501
INCM_AUD_AV2 AADC_INCM3 AUDMUTE_1
R323 0 Route Between AV2_L_IN & AV2_R_IN Trace
E21 C28 Near JK1104 INCM_AUD_AV2
SC/COMP2_L_IN C314 1uF 10V HP_LOUT_N
AADC_LINE_L4 ADAC_AL_N
C315 1uF 10V D21 C27 Route Between PC_L_IN & PC_R_IN Trace
SC/COMP2_R_IN
D22
AADC_LINE_R4 ADAC_AL_P HP_LOUT_P Near JK801 R324 0 INCM_AUD_PC
INCM_AUD_SC/COMP2 C316 1uF 10V
AADC_INCM4
D28
ADAC_AR_N HP_ROUT_N
B22 D27
AADC_LINE_L5 ADAC_AR_P HP_ROUT_P
C22
AADC_LINE_R5
A22 C26
AADC_INCM5 ADAC_CL_N SCART1_Lout_N Near TU2101/2
TU2201/2/3
Route Along With TUNER_SIF_IF_N
INCM_SIF
A27
ADAC_CL_P SCART1_Lout_P
F21
AADC_LINE_L6
D20 B27
AADC_LINE_R6 ADAC_CR_N SCART1_Rout_N
E20 B28
AADC_INCM6 ADAC_CR_P SCART1_Rout_P
A21 B25
AADC_LINE_L7 ADAC_DL_N
C21 A25
AADC_LINE_R7 ADAC_DL_P
B21
AADC_INCM7
A26
ADAC_DR_N
B26
ADAC_DR_P
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
DDR STRAP DUAL COMPONENT
DDR_DQ[0] +1.5V_DDR
DDR_DQ[1] NFM18PS105R0J IC401,IC402 1ST : EAN61667501, 2ND : EAN61570701
DDR_DQ[2] C410
6.3V
DDR_DQ[3] IC401-*1
DDR_DQ[4]
C403 C405 C407 C417 1ST : T-K4B2G1646B_HCK0, 2ND : T-H5TQ2G63BFR-PBC
2.2uF 10uF 2.2uF IN OUT 470pF IC402-*1
GND +1.5V_DDR
NFM18PS105R0J
JEDEC Types : DDR_DQ[0:4] C432
R401 R403 R405 R407 R409 6.3V
4.7K 4.7K 4.7K 4.7K 4.7K 00001 : DDR3-1333H (CasL=9)
OPT
DDR_1333 DDR_1333 10101 : DDR3-1600K (CasL=11) (O) +1.5V_DDR C421 C423 C425
NFM18PS105R0J 2.2uF 10uF 10uF IN OUT
C402 GND
6.3V
C412
IN OUT 1uF
DDR_DQ[10]
GND +1.5V_DDR
DDR_DQ[9]
NFM18PS105R0J
DDR_DQ[7]
C433
DDR_DQ[8] 6.3V
+1.5V_DDR
DDR_DQ[6] C426
DDR_DQ[5] Bus Width : DDR_DQ[10] IN OUT 1uF
0 - 16b GND
R402 R432 R404 R406 R408 R410 1 - 32b (O)
4.7K 4.7K 4.7K 4.7K 4.7K 4.7K Chip Width : DDR_DQ[8]
OPT OPT OPT OPT C453 C454 C455
OPT
0 - 8b 1uF 1uF 1uF
6.3V 6.3V 6.3V
1 - 16b (O)
Chip Size : DDR_DQ[6:5]
00 - 4Gbit
01 - 2Gbit (O)
10 - 1Gbit
11 - 512Mbit
+1.5V_DDR +1.5V_DDR
IC401 IC402
K4B2G1646C R416 K4B2G1646C R422
4.99K 4.99K
1% 1%
N3 DDR_1333_SS M8 N3 M8 +1.5V_DDR
DDR_AA0 A0 VREFCA C415 R417 DDR_AA0 A0 DDR_1333_SS VREFCA C435 R423
IC101 P7 4.99K P7 4.99K
DDR_AA1 0.01uF 1% DDR_AA1 0.01uF 1%
A1 A1
LGE35230(BCM35230KFSBG) P3 P3
DDR_AA2 A2 DDR_AA2 A2 R430
N2 H1 N2 H1 4.7K
DDR_DQ[0-7] BCM_WITHOUT_CAP DDR_AA3 A3 VREFDQ C416 DDR_VREFA DDR_AA3 A3 VREFDQ C436 DDR_VREFA OPT
P8 P8 R429
DDR01_AA4 A4 0.01uF DDR23_AA4 A4 0.01uF 82
DDR_DQ[0] U26 V23 P2 P2 DDR_RESETb
DDR_DQA_0 DDR_ADA_0 DDR_AA0 DDR01_AA5 A5 DDR23_AA5 A5
DDR_DQ[1] R26 AB27 R8 L8 R415 240 R8 L8 R421 240
DDR_DQA_1 DDR_ADA_1 DDR_AA1 DDR01_AA6 A6 ZQ DDR23_AA6 A6 ZQ C442
DDR_DQ[2] U27 Y23 R2 1% +1.5V_DDR R2 1% +1.5V_DDR 100pF
DDR_DQA_2 DDR_ADA_2 DDR_AA2 DDR_AA7 A7 DDR_AA7 A7
DDR_DQ[3] R27 Y26 T8 T8
DDR_DQA_3 DDR_ADA_3 DDR_AA3 DDR_AA8 A8 DDR_AA8 A8 R428
DDR_DQ[4] V27 R3 B2 R3 B2 82
DDR_DQA_4 DDR_AA9 A9 VDD_1 DDR_AA9 A9 VDD_1
DDR_DQ[5] P26 AB26 L7 D9 L7 D9 DDR_CKE
DDR_DQA_5 DDR_ADA_4 DDR01_AA4 DDR_AA10 A10/AP VDD_2 DDR_AA10 A10/AP VDD_2 C437 R431
DDR_DQ[6] U25 Y24 R7 G7 R7 G7 4.7K
DDR_DQ[8-15] DDR_DQA_6 DDR_ADA_5 DDR01_AA5 DDR_AA11 A11 VDD_3 DDR_AA11 A11 VDD_3 100pF
P27 AC26 N7 K2 N7 K2 OPT
DDR_DQ[7] DDR01_AA6 DDR_AA12 DDR_AA12
DDR_DQA_7 DDR_ADA_6 A12/BC VDD_4 A12/BC VDD_4
DDR_DQ[8] R24 T3 K8 T3 K8
DDR_DQA_8 DDR_AA13 A13 VDD_5 DDR_AA13 A13 VDD_5
DDR_DQ[9] N24 AB24 N1 N1
DDR_DQA_9 DDR_ADA_ALT_4 DDR23_AA4 VDD_6 VDD_6
DDR_DQ[10] T25 AC25 M7 N9 M7 N9
DDR_DQA_10 DDR_ADA_ALT_5 DDR23_AA5 NC_5 VDD_7 NC_5 VDD_7 DDR_AA13 R424 56
DDR_DQ[11] M23 AC24 R1 R1
DDR_DQA_11 DDR_ADA_ALT_6 DDR23_AA6 VDD_8 VDD_8 DDR_AA14 R425 56 OPT
DDR_DQ[12] R23 M2 R9 M2 R9
DDR_DQA_12 DDR_BAA0 BA0 VDD_9 DDR_BAA0 BA0 VDD_9 C438 1uF
DDR_DQ[13] N25 AB25 N8 N8 AR401 56
DDR_DQA_13 DDR_ADA_7 DDR_AA7 DDR_BAA1 BA1 DDR_BAA1 BA1 DDR_AA2
DDR_DQ[14] T24 AD28 M3 M3
DDR_DQ[16-23] DDR_DQA_14 DDR_ADA_8 DDR_AA8 DDR_BAA2 BA2 DDR_BAA2 BA2 C404 0.1uF
N26 Y25 A1 A1 DDR_AA11
DDR_DQ[15] DDR_AA9
DDR_DQA_15 DDR_ADA_9 VDDQ_1 VDDQ_1 DDR_AA3
DDR_DQ[16] L26 AA27 J7 A8 J7 A8
DDR_DQA_16 DDR_ADA_10 DDR_AA10 CK VDDQ_2 DDR23_CLK CK VDDQ_2 DDR_AA7 C406 0.1uF
DDR_DQ[17] H27 AC27 K7 C1 K7 C1 AR402 56
DDR_DQA_17 DDR_ADA_11 DDR_AA11 DDR01_CLK CK VDDQ_3 DDR23_CLKb CK VDDQ_3
DDR_DQ[18] L27 AA26 K9 C9 K9 C9
DDR_DQA_18 DDR_ADA_12 DDR_AA12 R412 DDR01_CLKb
R413 DDR_CKE CKE VDDQ_4 R418 R419 DDR_CKE CKE VDDQ_4 DDR_AA9
DDR_DQ[19] J26 AA24 56 56 D2 56 56 D2 C450 0.1uF
DDR_DQA_19 DDR_ADA_13 DDR_AA13 1% 1% VDDQ_5 1% 1% VDDQ_5 DDR_AA8
DDR_DQ[20] M27 AD27 +1.5V_DDR L2 E9 +1.5V_DDR L2 E9
DDR_DQA_20 DDR_ADA_14 DDR_AA14 CS VDDQ_6 CS VDDQ_6 C408 0.1uF
G27 K1 F1 K1 F1 DDR_AA0
DDR_DQ[21] C401 R414 10K ODT C419 R420 10K ODT AR403 56
DDR_DQA_21 VDDQ_7 VDDQ_7 DDR_AA1
DDR_DQ[22] M26 Y27 1000pF J3 H2 1000pF J3 H2 C439
DDR_DQ[24-31] DDR_DQA_22 DDR_BAA_0 DDR_BAA0 DDR_RASb RAS VDDQ_8 DDR_RASb RAS VDDQ_8 DDR_BAA0 1uF
DDR_DQ[23] H26 AB28 K3 H9 K3 H9
DDR_DQA_23 DDR_BAA_1 DDR_BAA1 DDR_CASb CAS VDDQ_9 DDR_CASb CAS VDDQ_9 DDR_BAA2
DDR_DQ[24] L23 W24 L3 L3
DDR_DQA_24 DDR_BAA_2 DDR_BAA2 DDR_WEb WE DDR_WEb WE DDR_BAA1 C409 0.1uF
DDR_DQ[25] H25 J1 J1 AR404 56
DDR_DQA_25 NC_1 NC_1 DDR_AA10
DDR_DQ[26] L24 V24 T2 J9 T2 J9 C451 0.1uF
DDR_DQA_26 DDR_RASA_N DDR_RASb DDR_RESETb RESET NC_2 DDR_RESETb RESET NC_2 DDR_AA12
DDR_DQ[27] J24 W25 L1 L1
DDR_DQA_27 DDR_CASA_N DDR_CASb NC_3 NC_3 DDR_WEb
DDR_DQ[28] M24 V26 L9 L9
DDR_DQA_28 DDR_WEA_N DDR_WEb NC_4 NC_4 C411 0.1uF
DDR_DQ[29] H23 F3 T7 F3 T7 AR405 56
DDR_DQA_29 DDR_QS0 DQSL NC_6 DDR_AA14 DDR_QS2 DQSL NC_6 DDR_AA14 DDR23_AA6
DDR_DQ[30] L25 U24 G3 G3 C440
DDR_DQA_30 DDR_CKEA DDR_CKE DDR_QS0b DQSL DDR_QS2b DQSL DDR23_AA4 1uF
DDR_DQ[31] H24
DDR_DQA_31 DDR23_AA5
W27 C7 A9 C7 A9
DDR_DM[0-3] DDR_CKA01_P DDR01_CLK DDR_QS1 DQSU VSS_1 DDR_QS3 DQSU VSS_1
W28 B7 B3 B7 B3 AR406 56 C452 0.1uF
DDR_CKA01_N DDR01_CLKb DDR_QS1b DQSU VSS_2 DDR_QS3b DQSU VSS_2 DDR01_AA6
DDR_DM[0] T26 E1 E1
DDR_DMA_0 VSS_3 VSS_3 DDR01_AA4
DDR_DM[1] P25 N28 E7 G8 E7 G8
DDR_DMA_1 DDR_CKA23_P DDR23_CLK DDR_DM[0] DML VSS_4 DDR_DM[2] DML VSS_4 DDR01_AA5
DDR_DM[2] J27 N27 D3 J2 D3 J2
DDR_DMA_2 DDR_CKA23_N DDR23_CLKb DDR_DQ[0-7] DDR_DM[1] DMU VSS_5 DDR_DQ[16-23] DDR_DM[3] DMU VSS_5 R426 56
DDR_DM[3] K24 J8 J8 DDR_CASb
DDR_DMA_3 VSS_6 VSS_6 R427 56 C441 1uF
U23 DDR_DQ[0] E3 M1 DDR_DQ[16] E3 M1 DDR_RASb
DDR_VREFA DDR_VREFA DQL0 VSS_7 DQL0 VSS_7
DDR_DQ[1] F7 M9 DDR_DQ[17] F7 M9
DQL1 VSS_8 DQL1 VSS_8
T27 AA23 DDR_DQ[2] F2 P1 DDR_DQ[18] F2 P1
DDR_QS0 DDR_DQSA_P_0 DDR_RST_N DDR_RESETb DQL2 VSS_9 DQL2 VSS_9
T28 DDR_DQ[3] F8 P9 DDR_DQ[19] F8 P9
DDR_QS0b DDR_DQSA_N_0 DQL3 VSS_10 DQL3 VSS_10
W26 R411 240 DDR_DQ[4] H3 T1 DDR_DQ[20] H3 T1
DDR_ZQ DQL4 VSS_11 DQL4 VSS_11
P24 1% DDR_DQ[5] H8 T9 DDR_DQ[21] H8 T9
DDR_QS1 DDR_DQSA_P_1 DQL5 VSS_12 DQL5 VSS_12
P23 DDR_DQ[6] G2 DDR_DQ[22] G2
DDR_QS1b DDR_DQSA_N_1 DQL6 DQL6
DDR_DQ[7] H7 DDR_DQ[23] H7
DDR_DQ[8-15] DQL7 DDR_DQ[24-31] DQL7
K27 B1 B1
DDR_QS2 DDR_DQSA_P_2 VSSQ_1 VSSQ_1
K28 DDR_DQ[8] D7 B9 DDR_DQ[24] D7 B9
DDR_QS2b DDR_DQSA_N_2 DQU0 VSSQ_2 DQU0 VSSQ_2
DDR_DQ[14] C3 D1 DDR_DQ[30] C3 D1
DQU1 VSSQ_3 DQU1 VSSQ_3
K25 DDR_DQ[13] C8 D8 DDR_DQ[29] C8 D8
DDR_QS3 DDR_DQSA_P_3 DQU2 VSSQ_4 DQU2 VSSQ_4
K26 DDR_DQ[12] C2 E2 DDR_DQ[28] C2 E2
DDR_QS3b DDR_DQSA_N_3 DQU3 VSSQ_5 DQU3 VSSQ_5
DDR_DQ[9] A7 E8 DDR_DQ[25] A7 E8
DQU4 VSSQ_6 DQU4 VSSQ_6
DDR_DQ[10] A2 F9 DDR_DQ[26] A2 F9
DQU5 VSSQ_7 DQU5 VSSQ_7
DDR_DQ[15] B8 G1 DDR_DQ[31] B8 G1
DQU6 VSSQ_8 DQU6 VSSQ_8
DDR_DQ[11] A3 G9 DDR_DQ[27] A3 G9
DQU7 VSSQ_9 DQU7 VSSQ_9
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
NEC MICOM
FLMD0
GND
+3.5V_ST
10K
47K
C602 C603 R641
50V 50V MICOM_DOWNLOAD
OPT
R639
13pF 13pF 0
R637
X601
15pF
15pF
WIRELESS_PWR_EN
C606
C607
P601 +3.5V_ST
WIRELESS_DET
12505WS-12A00
MICOM_RESET
1 X602
+3.5V_ST
2
MICOM_RESET 32.768KHz
3 R615 22
NEC_ISP_Tx R642 +3.5V_ST
10Mhz Crystal
4 4.7M
R617 22 OPT
5 NEC_ISP_Rx
47K
6
7
OCD1A
8
P122/X2/EXCLK/OCD0B
R644
9
OCD1B GND SW1
+3.5V_ST
10
JTP-1127WEM
2 1
22
P120/INTP0/EXLVI
R621 22
270K
11
FLMD0
OPT
C608
R645
P124/XT2/EXCLKS
0.1uF
0.1uF
12
4 3
R606 10K 16V
P121/X1/OCD0A
13
R643
C604
0.1uF
C605
P123/XT1
R607 10K +3.5V_ST R647 20K
NEC_ISP_Rx
R610 10K 1/16W
FLMD0
RESET
NEC_ISP_Tx 1%
REGC
1/16W
R646
VDD
VSS
P40
P41
20K
1%
R626 4.7K
R628 4.7K
48
47
46
45
44
43
42
41
40
39
38
37
R629 22
P60/SCL0 1 36 P140/PCL/INTP6 RL_ON
SCL2_3.3V
R630 22
P61/SDA0 2 35 P00/TI000
SDA2_3.3V SCART_MUTE
P62/EXSCL0 3 34 P01/TI010/TO00 R648 10K C
EDID_WP
OPT
P75 6 uPD78F0514 31 ANI1/P21
POWER_ON/OFF2_1 MODEL1_OPT_3
IC601 P74 ANI2/P22
M24C16-WMN6T AMP_MUTE 7 30 MODEL1_OPT_2
P73/KR3 NEC_MICOM ANI3/P23
MODEL1_OPT_0 8 29 POWER_ON/OFF1
NC/E0 VCC
1 8 R632 22 P72/KR2 9 28 ANI4/P24
R601
SOC_RESET MICOM_DOWNLOAD
47K
NC/E1
2 7
WC P71/KR1 10 27 ANI5/P25
INV_CTL SIDE_HP_MUTE
13
14
15
16
17
18
19
20
21
22
23
24
S/T_SCL
R627
4.7K
P31/INTP2/OCD1A
P30/INTP1
P17/TI50/TO50
P16/TOH1/INTP5
P15/TOH0
P14/RXD6
P13/TXD6
P12/SO10
P11/SL10/RXD0
P10/SCK10/TXD0
AVREF
AVSS
+3.5V_ST
+3.5V_ST
MODEL OPTION
PIN NAME
C609 1uF
PIN NO. HIGH LOW
MICOM MODEL OPTION MODEL_OPT_0 8
10YEAR_TOOL
(10 SENSOR)
11YEAR_TOOL
(11 SENSOR)
MODEL_OPT_3
10K
10K
10K
10K
31 PDP/3D LCD/OLED
10YEAR_TOOL
TOUCH_KEY
I2C LED
PDP/3D
OPT
R611
R613
R622
R624
10K
MODEL1_OPT_0 MODEL_OPT_3
22
R640
10K
10K
10K
11YEAR_TOOL
R636
LCD/OLED
TACT_KEY
PWM_LED
4.7K
MODEL_OPT_1 0 0 1 1
R612
R614
R623
R625
MODEL_OPT_2 0 1 0 1
LED_R/BUZZ
LED_B/LG_LOGO
POWER_DET
IR
NEC_ISP_Tx
NEC_TXD
NEC_ISP_Rx
POWER_ON/OFF2_2
NEC_RXD
OCD1A
S/T_SDA
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
DUAL COMPONENT
D707,D708
D710,D711 1ST : 0DD184009AA 2ND : 0DSIH00028A
BODY_SHIELD
D713 1ST : T-BAT54_SUZHO, 2ND : 0DSON00138A
5V_HDMI_1 GND 5V_HDMI_4
BODY_SHIELD
HDMI_HPD_1 HDMI_HPD_4
20 20
VR706 R728 HP_DET VR708 R729
HP_DET 10V 1K
10V 1K R727
19 R737 19 OPT OPT
5V 0 C714 OPT OPT 5V 0 C717
0.1uF 18 0.1uF
18 VR703 GND R735 VR707 OPT 16V
OPT
17
GND R730
3.6K 10V
OPT
16V
OPT 17
3.6K
OPT
10V
OPT OPT * HDMI CEC
DDC_DATA OPT DDC_DATA
DDC_SDA_1 DDC_SDA_4
16 16
DDC_CLK DDC_CLK
DDC_SCL_1 15 DDC_SCL_4
15
NC
ARC
14 14
CE_REMOTE CE_REMOTE
CEC_REMOTE CEC_REMOTE
13 13 +3.3V_Normal +3.3V_HDMI
CK- CK-
CK-_HDMI1 12
CK-_HDMI4 +3.5V_ST
12 HDMI_ARC CK_GND
CK_GND ARC EAG62611201
L701
EAG62611201
11 11 BLM18PG121SN1D
CK+ CK+
10 R775 10 CK+_HDMI4
CK+_HDMI1
C730 150 D0-
D0- 0.1uF 9
9 D0-_HDMI1 D0-_HDMI4 C720
D0_GND R754 C718 C719
D0_GND 0.1uF
G
8 R776 8 27K 10uF 10uF
16V
D0+ 63.4 D0+
7 7 D0+_HDMI4
D0+_HDMI1
D1- D1- R741
6 6 D1-_HDMI4
D
B
S
D1-_HDMI1 D713 Q710 120K
D1_GND D1_GND BSS83
5 5 BAT54_SUZHO
D1+ D1+
4 4 D1+_HDMI4
D1+_HDMI1
D2- D2-
3 CEC_REMOTE HDMI_CEC
3 D2-_HDMI1 D2-_HDMI4
D2_GND D2_GND
2 2
D2+ D2+
1 1 D2+_HDMI4
D2+_HDMI1
JK703 RSD-105156-100
RSD-105156-100 JK704
HDMI1 HDMI4
+3.3V_HDMI
+5V_Normal +5V_Normal
5V_HDMI_1 5V_HDMI_2
A2
A1
A2
A1
BODY_SHIELD 5V_HDMI_2
C707 C706 C711 C713
HDMI_HPD_2 D707 D710 10uF 10uF 0.1uF 0.1uF
20 10V 10V 16V 16V HDMI1 HDMI S/W OUTPUT
C
D2-_HDMI1
D1+_HDMI1
D1-_HDMI1
D0+_HDMI1
D0-_HDMI1
CK+_HDMI1
CK-_HDMI1
D2+_HDMI1
HDMI_CLK-
HDMI_RX0-
HDMI_RX0+
HDMI_RX1-
HDMI_RX1+
HDMI_RX2-
HDMI_RX2+
HDMI_CLK+
10V 1K
19 R725 C701 C703 C712
5V 0 C715 OPT OPT
10uF 0.1uF 0.1uF
0.1uF R713 R715 R720 R723
18 VR701 OPT 10V 16V 16V
GND R740 16V 4.7K 4.7K 4.7K
3.6K 10V 4.7K
OPT OPT
17 OPT
DDC_DATA
DDC_SDA_2 DDC_SDA_1 DDC_SDA_2
16
DDC_CLK
15 DDC_SCL_2 DDC_SCL_1 DDC_SCL_2
NC
14
CE_REMOTE
CEC_REMOTE
13
CK-
CK-_HDMI2
12
CK_GND
EAG62611201
11
CK+ +5V_Normal
10 +5V_Normal
CK+_HDMI2 5V_HDMI_3 5V_HDMI_4
D0-
9 D0-_HDMI2
D0_GND
A2
A1
A2
A1
TPWR_CI2CA
D0+
7 D0+_HDMI2 D708 D711
D1-
C
[EP]GND
VCC33_3
6 D1-_HDMI2
D1_GND
R0X2P
R0X2N
R0X1P
R0X1N
R0X0P
R0X0N
R0XCP
R0XCN
5 R777 OPT R780 33
TXCN
TXCP
TX0N
TX0P
TX1N
TX1P
TX2N
TX2P
4.7K SCL1_3.3V
D1+ R714 R716 R721 R724
4 D1+_HDMI2 4.7K 4.7K
4.7K 4.7K
3
D2- OPT R781 33 SDA1_3.3V
D2-_HDMI2 DDC_SDA_4
D2_GND
DDC_SDA_3
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
2 DDC_SCL_4
D2+ R778
1 D2+_HDMI2 DDC_SCL_3 HDMI2 R1XCN 1 54 CSCL 33
SCL3_3.3V
CK-_HDMI2
R1XCP 2 53 CSDA
SDA3_3.3V
CK+_HDMI2 THERMAL
R1X0N 3 73 52 INT R779
33
JK701 D0-_HDMI2
R1X0P 4 51 CEC_D
RSD-105156-100
HDMI2 EDID Pull-up D0+_HDMI2
R1X1N CEC_A +5V_Normal
D1-_HDMI2
5 50
R1X1P 6 49 R4PWR5V R706
C710
D1+_HDMI2
R1X2N DSCL4 0
D2-_HDMI2
7 IC701 48 1uF
5V_HDMI_4
R1X2P DSDA4 10V
D2+_HDMI2
8 SII9287B 47
R717
VCC33_1 9 46 R3PWR5V 10
RSVD_1 10 45 CBUS_HPD3
HDMI_HPD_4 1/16W
HDMI3 R2XCN 11 44 DSCL3 C705 R711
5V_HDMI_3 CK-_HDMI3 DDC_SCL_4 1K 5V_HDMI_3
BODY_SHIELD 1uF
R2XCP 12 43 DSDA3 1%
HDMI_HPD_3
CK+_HDMI3 DDC_SDA_4 R718
20 R2X0N R2PWR5V 10
HP_DET VR705 R726
D0-_HDMI3
13 42
1K
19 R731 10V
OPT
R2X0P 14 41 CBUS_HPD2
5V 0 C716 OPT HDMI_HPD_3 1/16W
D0+_HDMI3
0.1uF R2X1N DSCL2 C702 R705
18
GND R739 VR702 OPT 16V D1-_HDMI3
15 40 1K
10V DDC_SCL_3 1uF
3.6K OPT R2X1P DSDA2 1%
17
DDC_DATA OPT OPT
D1+_HDMI3
16 39
DDC_SDA_3
DDC_SDA_3 R2X2N SBVCC
16
DDC_CLK 17 38
D2-_HDMI3
15 DDC_SCL_3 R2X2P 18 37 MICOM_VCC33
NC D2+_HDMI3
C708
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
14
CE_REMOTE 1uF
CEC_REMOTE
13
CK-
CK-_HDMI3
R3XCN
R3XCP
R3X0N
R3X0P
R3X1N
R3X1P
R3X2N
R3X2P
VCC33_2
RSVD_2
DSDA0
DSCL0
CBUS_HPD0
R0PWR5V
DSDA1
DSCL1
CBUS_HPD1
R1PWR5V
12
CK_GND
5V_HDMI_2
EAG62611201
11
CK+
10 R712
CK+_HDMI3 10
D0-
9 D0-_HDMI3
D0_GND
8 1/16W
C709 R707
D0+ 1K
7 D0+_HDMI3 1uF
1%
D1-
6 D1-_HDMI3
D1_GND 5V_HDMI_1
5
D1+ R708
4 D1+_HDMI3 10
D2-
3 D2-_HDMI3
D2_GND 1/16W
2 C704 R703
D2+ 1uF 1K
1 D2+_HDMI3 1%
DDC_SDA_1
DDC_SCL_1
DDC_SDA_2
DDC_SCL_2
HDMI_HPD_1
HDMI_HPD_2
D2+_HDMI4
CK-_HDMI4
CK+_HDMI4
D0-_HDMI4
D0+_HDMI4
D1-_HDMI4
D2-_HDMI4
D1+_HDMI4
JK702
RSD-105156-100
HDMI3
HDMI4
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
RGB/ PC AUDIO/ SPDIF/ EARPHONE/ RS232C
DUAL COMPONENT
RGB PC D810
KDS184
A2
+5V_Normal
EARPHON JACK D804,D805,D806
D807,D808,D813
D814
1ST : EAH39491601, 2ND : EAH33945901
C
A1 D810 1ST : 0DD184009AA, 2ND : 0DSIH00028A
JK803
+3.3V_Normal KJA-PH-0-0177
+5V_Normal
Q801 1ST : 0TRIY80001A, 2ND : 0TR387500AA
GND 5
IC801
74F08D R822
R814 R815 R817 IC805 1ST : EAN61151201, 2ND : EAN61130001
IC802 2.7K L 4
2.7K 2.7K 10K HP_LOUT
D0A VCC AT24C02BN-SH-T
1 14
A0 VCC
DETECT 3
D0B D3B 1 8 HP_DET
DSUB_VSYNC 22 R801 2 13 1K R821
A1 WP
Q0 D3A
2 7
EDID_WP R 1
3 12 HP_ROUT
A2 SCL R848 22
DSUB_HSYNC 22 R802 3 6
RGB_DDC_SCL
R850 0 D1A
4 11
Q3 EAG61030001
GND SDA R847 22
4 5
OPT RGB_DDC_SDA OPT
R851 0 D1B D2B R852 0 R825 0
5 10
C809 C810 SPK_R+_HOTEL
OPT OPT
Q1 D2A R853 0 18pF 18pF OPT
6 9
50V 50V R826 0
OPT SPK_R-_HOTEL
GND Q2
7 8
+3.3V_Normal
R808 C808
D811 EARPHONE AMP
D805 22pF 5.6V L803
10K
30V 50V OPT 120-ohm
OPT
BLM18PG121SN1D
LPF READEY
BLM15BD121SN1 (For H/P Noise Improvement)
L806 C822 C824
ESD_CERADIODE
10uF 0.1uF
10V 16V
D808-*1
OUTL
SGND
VDD
+3.3V_Normal
EN
R837
BLM15BD121SN1 C825 100K
C816 16 15 14 13 2.2uF OPT
L807 1uF R842 OPT
ESD_CERADIODE
DSUB_G+ HP_LOUT_N
ESD_COMMON C817
5.6V
5.6V 5 6 7 8
4.7K
R827
D807-*1
DSUB_R+ ESD_CERADIODE
4.7K
R823
OUTR
G0
G1
HPVSS
ESD_COMMON
C832
5.6V
R813 D807
75 47pF 30V
50V
R869 L805
0 BG2012B080TF
OPT
R828
OPT
R824
HP_ROUT
C823 C829
2.2uF 0.22uF
10V
11
12
13
14
10
15
10V
6
1
7
2
8
3
9
Closed to JACK
11
12
13
14
15
16
16
10
6
RS232C
1
JK804
SLIM-15F-D-2 10
5
9
0 R838
IR_OUT 4
IR_OUT
8
PC AUDIO +3.5V_ST
100 R833 JP809
7
3
JP810
100 R834
JK801 2
ESD_COMMON
KJA-PH-0-0177 D814
ESD_COMMON
5 GND 6
IC803 30V
D813
R866 MAX3232CDR 1
4 L 22 30V
PC_L_IN
D801
ESD_CERADIODE
ESD_CERADIODE
3 DETECT C801 C804 0.1uF C812 C1+ VCC
AMOTECH R804 1 16 SPG09-DB-009
5.6V 560pF 560pF
D813-*1
D814-*1
470K
ESD_COMMON 50V 50V JK805
5.6V
5.6V
1 R V+ GND
0.1uF C813 2 15
C1- DOUT1
3 14
R867
22
PC_R_IN C2+ RIN1
0.1uF C814 4 13
+3.5V_ST
D802
C802 C805
AMOTECH R805 C2- ROUT1
470K 560pF 560pF 5 12
5.6V 50V 50V
ESD_COMMON
R860 R861
0.1uF C815 V- DIN1
6 11 4.7K 4.7K
OPT OPT
DOUT2 DIN2
7 10
R862
0
RIN2 ROUT2
VIN
8
EAN41348201
9
R863
0
BCM_RX
A NEC_RXD
Fiber Optic
R864
0
VCC B BCM_TX
R806
2.7K R865
R803 0
0 GND C NEC_TXD
SPDIF_OUT
D803 C803 4
30V 0.1uF
16V
SHIELD
OPT
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
DUAL COMPONENT
Q901,Q902,Q903
Q904,Q905,Q906 1ST : 0TRIY80001A 2ND : 0TR387500AA
D903,D904
D905,D906 1ST : EAH42720601, 2ND : EAH60994401
+3.5V_ST
IR & KEY
IR_12P IR_15P
EEPROM_SCL R933
100 P902 P901
R919 R920 12507WR-12L 12507WR-15L
10K 10K D905
1% 1% CDS3C05HDMI1
5.6V
EEPROM_SCL
R915 1 1
+3.5V_ST 100
KEY1 R934
EEPROM_SDA 100 EEPROM_SDA
R916 D902 2 2
+3.5V_ST 100 5.6V
R903 KEY2 D906
47K AMOTECH CDS3C05HDMI1
C901 C903 GND
5.6V 3 3
0.1uF 0.1uF
R905 +3.5V_ST D901
IR
47K 5.6V KEY1
R904 AMOTECH 4 4
Q901 C 10K +3.5V_ST
B R909
2SC3052
E 3.3K KEY2
R908 OPT 5 5
C 47K
L901
B
BLM18PG121SN1D
Q902 E 3.5V
2SC3052 6 6
IR
9 9
D907
C911 5.6V
100pF AMOTECH GND
+3.5V_ST +3.3V_Normal 50V 10 10
COMMERCIAL L902
BLM18PG121SN1D
3.3V
+3.5V_ST 11 11
R911
47K
R906 COMMERCIAL_EU C912 C913 R929 LED_R/BUZZ
22 0.1uF 0.1uF LED_R/BUZZ 12 12
IR_OUT R917 16V 16V
47K 1.5K
COMMERCIAL ESD_ATSC ESD_ATSC
R913 COMMERCIAL 13 GND
Q903 C 10K 13
2SC3052 B
COMMERCIAL_EU E R921 S/T_SCL R935
100 S/T_SCL
COMMERCIAL_EU C 47K 14
B
Q905 E COMMERCIAL
2SC3052 ST_SDA
D903 15
COMMERCIAL CDS3C05HDMI1
5.6V
COMMERCIAL_US 16
R910 R936
0 S/T_SDA 100
.
D904
CDS3C05HDMI1
5.6V
WIRELESS +3.5V_ST
R912
47K
+3.5V_ST
Zener Diode is
R907 WIRELESS
22
R918
IR_PASS
WIRELESS
C
R914
47K
WIRELESS
close to wafer
Q904 10K
2SC3052 B
WIRELESS E WIRELESS R922
C 47K
B
Q906 E WIRELESS
2SC3052
WIRELESS
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
WIRELESS READY MODEL
DUAL COMPONENT
JK1001
KJA-PH-3-0168
VCC(24V/20V/17V)_2
2
VCC(24V/20V/17V)_3
3
VCC(24V/20V/17V)_4
4
VCC(24V/20V/17V)_1
+24V 5
VCC(24V/20V/17V)_1
6
DETECT
+3.3V_Normal 7
INTERRUPT
R1002 C1002 8
22K 2.2uF GND_1
WIRELESS WIRELESS
S R1008 9
10K RESET
G WIRELESS 10
R1003 Q1002 R1007 1K GND_2
L1001 11
2.2K AO3407A D WIRELESS_DET
MLB-201209-0120P-N2 WIRELESS I2C_SCL
WIRELESS WIRELESS 12
C WIRELESS WIRELESS_SCL
R1001 I2C_SDA
WIRELESS_PWR_EN 10K B WIRELESS_SDA 13
WIRELESS Q1001 C1004 GND_3
MMBT3904(NXP) 14
WIRELESS 10uF
E UART_RX
35V 15
WIRELESS UART_TX
16
GND_4
17
IR
IR_PASS 18
GND_5
19
CDS3C05HDMI1
CDS3C05HDMI1
GND_6 20
WIRELESS
WIRELESS
D1001
D1002
21
5.6V
5.6V
SHIELD
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
CVBS 1 PHONE JACK
+3.3V_Normal
R1112
2.7K
R1113
1K
CVBS2 REAR JACK
AV1_CVBS_DET
AV2
D1105 R1141
5.6V 22
AV2_R_IN
JK1102
D1109
KJA-PH-1-0177 R1116 C1118 C1123
AMOTECH
5.6V AV2 470K 560pF 560pF
5 M5_GND
AV2 50V 50V
R1136 AV2 AV2 AV2
4 M4 10 R1142
AV1_CVBS_IN 22
ZD1115 AV2_L_IN
3 M3_DETECT 5.1V D1110
R1109 C1106
AMOTECH R1117 C1119 C1124
ZD1116 75 47pF 5.6V
AV2 470K 560pF 560pF
1 M1 5.1V 50V AV2
1% JK1104 50V 50V
PPJ233-01 AV2 AV2
6 M6
AV2_JACK 5C [RD]E-LUG
6C [RD1]E-LUG
[YL]O-SPRING +3.3V_Normal
4A
R1144 5C [RD1]O-SPRING
5A [YL]E-LUG
22 R1128
AV1_R_IN
4C [RD1]CONTACT 2.7K
AV2
D1108 R1111 AV2_CVBS_DET
C1108 C1110 5B [WH1]O-SPRING
5.6V 470K R1129
560pF 560pF 1K
50V 50V D1111 AV2
4A [YL1]CONTACT
AV2
5.6V
5A [YL1]O-SPRING
6A [YL1]E-LUG
6H [RD2]E-LUG
5H [RD2]O-SPRING_2
4H [RD2]CONTACT
5G [WH2]O-SPRING
COMP2 REAR JACK
5F [RD2]O-SPRING_1
7F [RD2]E-LUG-S
5E [BL2]O-SPRING
7E [BL2]E-LUG-S
4D [GN2]CONTACT
5D [GN2]O-SPRING
COMP2
BLM18PG121SN1D R1131
L1103 22
6D [GN2]E-LUG SC/COMP2_R_IN
COMP2 COMP2
R1122
D1112 470K C1121
COMPONENT 1 PHONE JACK 5.6V
C1113
560pF
50V
560pF
50V
COMP2 COMP2
COMP2 COMP2
BLM18PG121SN1D R1132
L1104 22
SC/COMP2_L_IN
COMP2 COMP2 COMP2
D1113 COMP2 C1122
R1123 C1114
+3.3V_Normal 560pF 560pF
5.6V 470K
50V 50V
COMP2
COMP2 L1109
R1105 CM2012FR27KT
R1119 R1133
2.7K 0 10
COMP2_Pr COMP2_Pr SC_R/COMP2_Pr
R1114
1K ZD1103
COMP1_DET COMP2 5.1V COMP2 COMP2 C1115 C1128
R1124 27pF 27pF
ZD1104 75
COMP2 5.1V 50V 50V
D1101
5.6V
COMP2
L1108
JK1101 R1120 CM2012FR27KT
KJA-PH-1-0177 R1134
0 10
COMP2_Pb
COMP2_Pb SC_B/COMP2_Pb
5 M5_GND L1110
CM2012FR10KT ZD1105 COMP2 COMP2 C1116 C1129
R1137 0.1uH COMP2
10 5.1V R1125
4 M4 27pF 27pF
COMP1_Y 75
ZD1106 50V 50V
ZD1117 COMP2 5.1V
3 M3_DETECT 5.1V R1106 C1102 C1125
75 47pF 47pF
ZD1110 50V 50V COMP2
1 M1 1% L1107
5.1V
R1121 R1135 CM2012FR27KT
L1111 0 10
6 M6 COMP2_Y SC_G/COMP2_Y
R1138 CM2012FR27KT COMP2_Y
10 ZD1107 COMP2
COMP1_Pb COMP2 5.1V COMP2 C1117 C1130
R1126
75 27pF 27pF
ZD1111 C1103 C1126 ZD1108
5.1V 27pF 27pF COMP2 5.1V 50V 50V
R1107
75 50V 50V
ZD1112
5.1V 1%
+3.3V_Normal
FOR EMI
L1112
R1139 CM2012FR27KT COMP2
10 R1127
COMP1_Pr
2.7K 1K R1130
ZD1113 C1104 C1127
5.1V R1108 SC_DET/COMP2_DET
27pF 27pF
75
50V 50V
ZD1114 COMP2 COMP2
1%
5.1V D1114
FOR EMI
5.6V
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
TI solution M_REMOTE OPTION
+3.3V_Normal +3.3V_Normal
P1302
12507WR-12L
L1303
M_REMOTE 120-ohm
3.3V M_REMOTE
1
GND
2
R1321 R1322 R1323
M_REMOTE
R1315 2.7K 2.7K 2.7K
RX 100
3 M_REMOTE_RX M_REMOTE M_REMOTE M_REMOTE
M_REMOTE
R1316
TX 100
4 M_REMOTE_TX
M_REMOTE
R1317
RESET 100
5 M_RFModule_RESET
M_REMOTE
R1318
DC 100
6 DC_MREMOTE
M_REMOTE
R1319
DD 100
7 DD_MREMOTE
GND
8
M_REMOTE
R1320
GPIO_0 22
9 3D_GPIO_0
M_REMOTE
R1324
GPIO_1 22
10 3D_GPIO_1
M_REMOTE
R1325
GPIO_2 22
11 3D_GPIO_2
M_REMOTE
R1326
3D_SYNC 22
12 3D_SYNC_RF
13
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Ethernet Block D1401,D1402
D1403,D1404
DUAL COMPONENT
+2.5V_BCM35230
L1401
MLB-201209-0120P-N2
JK1401
XRJH-01A-4-DA7-180-LG(B) C1401
0.1uF
16V
R1
1
R2
2
EPHY_TDP
R3
3
EPHY_TDN
R4
4
EPHY_RDP
R5
5
EPHY_RDN
R6
6 D1401 D1402 D1404 D1406
5.5V 5.5V 5.5V 5.5V
R7 LAN_ESD LAN_ESD LAN_ESD LAN_ESD
7
R8
8
R9
9
R10[GND]
10
+3.3V_Normal
R11
11
YL_C
D1
EPHY_ACTIVITY
GN_C
D3
EPHY_LINK
SHIELD
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
DUAL COMPONENT +3.3V_Normal AMP_RESET_N
C1834
1000pF
Q1801 1ST : 0TRIY80001A 2ND : 0TR387500AA 50V
50V
L1803
+24V_AMP
22000pF
BLM18PG121SN1D
C1837
OPT
AUD_MASTER_CLK R1851
3.3
+24V_AMP OPT
+24V
C1881
OUT1A_2
OUT1A_1
PVDD1_3
PVDD1_2
PVDD1_1
C1842 C1846 C1848
0.1uF 0.1uF 10uF 0.01uF
VDD_IO
GND_IO
/RESET
PGND1A
C1832 C1883 50V 50V 35V 50V
CLK_I
BST1A
0.1uF 10uF
L1801
[EP]
10V SPK_L+
MLB-201209-0120P-N2 16V
D1805
AD
1N4148W R1823 R1834
12 12 L1810
100V 10.0uH C1877 R1839
OPT OPT 0.1uF
OPT C1819 C1825 4.7K
C1801 C1802 C1810 C1814 10uF 0.1uF C1863 50V
0.1uF 0.1uF 390pF NRS6045T100MMGK
50V 50V 10uF 0.1uF 10V 16V 50V C1871
10V 16V 0.47uF
L1811
48
47
46
45
44
43
42
41
40
39
38
37
C1806
1000pF
50V
10.0uH 50V
SPEAKER_L
C1804 C1864 C1878
100pF R1815 AGND_PLL 1 36 OUT1B_2 D1806
390pF
50V
NRS6045T100MMGK 0.1uF
50V
R1840
50V 3.3K 1N4148W R1824 R1832 4.7K
AVDD_PLL 2 35 OUT1B_1 100V
OPT
12 12
THERMAL SPK_L-
DVDD_PLL 3 49 34 PGND1B C1853
22000pF
LF 4 33 BST1B 50V WAFER-ANGLE
NTP
33pF 33pF
50V 50V SPK_R+
SCL
/FAULT
MONITOR0
MONITOR1
MONITOR2
BST2B
PGND2B
OUT2B_1
OUT2B_2
PVDD2_1
PVDD2_2
PVDD2_3
+24V_AMP D1807 R1825 R1833
R1802 1N4148W 12 L1806
10K 12
100V 10.0uH
C1879 R1841
R1816 OPT
C1865 NRS6045T100MMGK 0.1uF 4.7K
C 100 C1807 390pF C1872 50V
50V 0.47uF
R1801 B Q1801
1000pF C1840 C1844 C1850
L1807
10.0uH
50V
SPEAKER_R
AMP_MUTE 50V C1866
10K 2SC3052 0.1uF 0.1uF 10uF 390pF
50V 50V 50V NRS6045T100MMGK C1880 R1842
E 35V D1808
C1838 1N4148W R1826 R1830 0.1uF 4.7K
22000pF 100V 12 12 50V
OPT
AMP_MUTE_HOTEL 50V
R1803 SPK_R-
0
SUB_MUTE
OPT
BLM18PG121SN1D R1818
+24V_AMP
22000pF
C1835
10K OPT
AUD_MASTER_CLK R1852
3.3
GND_IO
/RESET
PGND1A
BST1A
0.1uF 10uF
[EP]
10V SPK_WOOFER_L+
16V
D1801 WOOFER WOOFER L1808 WOOFER
AD
C1805
WOOFER 1000pF
50V WOOFER
L1809
10.0uH WOOFER
50V
WOOFER WOOFER
WOOFER_L
C1803 WOOFER C1860 C1874
100pF R1814 AGND_PLL 1 36 OUT1B_2 D1802
390pF
50V
NRS6045T100MMGK
0.1uF
50V
R1836
50V 3.3K 1N4148W WOOFER WOOFER 4.7K
R1820 R1828
AVDD_PLL 2 35 OUT1B_1 OPT
100V 12 12
THERMAL SPK_WOOFER_L-
DVDD_PLL 3 49 34 PGND1B WOOFER
C1851
WOOFER 22000pF P1802
LF 4 33 BST1B 50V SMAW250-05
DGND_PLL 5
IC1801 32 VDR1 WOOFER
SPK_WOOFER_R- 1
OPT
C1817
10uF
WOOFER GND_1 6 NTP-7400L 31 VCC_5
C1823
10V 0.1uF 2
16V DGND 7 30 GND_2 SPK_WOOFER_R+
R1812 100
SCL3_3.3V
NTP_WOOFER
NTP_WOOFER
C1809 C1813
33pF 33pF
50V 50V SPK_WOOFER_R+
SCL
/FAULT
MONITOR0
MONITOR1
MONITOR2
BST2B
PGND2B
OUT2B_1
OUT2B_2
PVDD2_1
PVDD2_2
PVDD2_3
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
DUAL COMPONENT
Close to CI Slot
R1923 220 CI
PCM_TS_CLK CI_TS_CLK
R1924 100 CI
PCM_TS_VAL CI_TS_VAL
R1925 100 CI CI POWER ENABLE CONTROL
PCM_TS_SYNC CI_TS_SYNC OE DIR CI_DATA NAND_DATA +3.3V_CI
C1916
12pF L L OUTPUT INPUT +5V_CI_ON
+5V_Normal
50V L H INPUT OUTPUT Q1902 L1902
OPT H X Z Z 0.1uF AO3407A BLM18PG121SN1D
CI TS OUTPUT OPT C1903
D
CI
16V
IC1903 R1931 22 CI C1906 CI CI
NAND_REb R1969
R1926 22 CI 74LVC245A OPT 0.1uF C1912 CI C1914 10K
/CI_EN1
G
NAND_DATA[0-7] 16V 0.1uF
R1943 C1909 0.1uF CI
VCC
20 1
DIR CI 16V
CI 22K 4.7uF 16V
CI_DATA[0-7] R1940
OE
19 2
A0 NAND_DATA[0] 16V
AR1904 100 CI 10K OPT
CI_DATA[0] B0
18 3
A1 NAND_DATA[1] OPT
CI_DATA[1]
B1
17 4
A2 NAND_DATA[2]
CI_DATA[2]
B2 A3 NAND_DATA[3] R1987
16 5
2.2K
B3
15 6
A4 NAND_DATA[4] CI
CI_DATA[3] R1980 100 CI C
B4
14 7
A5 NAND_DATA[5] R1942
CI_DATA[4] AR1905 100 CI 4.7K B Q1901
B5 A6 NAND_DATA[6] PCM_5V_CTL
CI_DATA[5] 13 8 2SC3052
CI CI
CI_DATA[6] B6
12 9
A7 NAND_DATA[7] E
CI_DATA[7] B7
11 10
GND
+5V_CI_ON
+3.3V_CI
+3.3V_CI
CI R1970 NAND F/M Data
22
IC1901
CI 74LVC125APW
C1901
1OE VCC 0.1uFOPT IC1902 3,3V_CI POWER
/CI_CE1 1 14 74AHC08PW +3.3V_CI
16V OPT
C1902
1A 4OE 0.1uF
NAND_REb 2 13 1A VCC
/CI_CE2 /CI_CE1 1 CI 14 16V
C1915 R1985 +3.3V_Normal +3.3V_CI
CI 9
1Y 4A OPT IC1905
/PCM_OE 3 12 NAND_WEb 1B 4B
0.1uF 10K
/CI_CE2 2 13 NAND_RBb 74LVC245A
16V CI
CI
2OE 4Y CI 45
4 11 1Y 4A VCC DIR
/PCM_IOWR /CI_EN1 3 12 20 1
L1901
R1986 22 OE
19 2
A0
BLM18PG121SN1D
2A 3OE /CI_EN1 CI_ADDR[2]
NAND_WEb 5 10 2A 4Y CI
/CI_EN1 4 11 CI_ADDR[1] B0
18 3
A1
PCM_ADDR[2] CI_ADDR[3] CI
2Y 3A B1 A2
CI 15 6 9 2B 3B PCM_ADDR[3] 17 4
CI_ADDR[4]
/PCM_WE NAND_REb 5 10 NAND_CLE B2 A3
CI C1907 CI C1908
16 5
GND 3Y PCM_ADDR[4] CI_ADDR[7] 0.1uF 0.1uF
7 8 CI 44 /PCM_IORD 2Y 3A
/PCM_CE1 CI 7 6 9 PCM_ADDR[7]
B3
15 6
A4
CI_ADDR[9]
B4 A5
14 7
GND 3Y PCM_ADDR[9] CI_ADDR[11]
7 8 CI_ADDR[0] B5 A6
13 8
PCM_ADDR[11] CI_ADDR[12]
B6 A7
12 9
PCM_ADDR[12] CI_ADDR[13]
B7 GND
11 10
PCM_ADDR[13]
CI DETECT
+3.3V_CI
+3.3V_CI +3.3V_CI
R1939 R1941
10K 10K IC1904
CI CI 74LVC1G32GW
B 1 5 VCC
CI CONTROL INTERFACE /CI_CD2 CI
A 2 C1911 R1966
/CI_CD1 OPT 0.1uF CI 10K
GND 3 4 Y
16V
CI
GND
R1965
CI_DET
47
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
DUAL COMPONENT
OPTION TABLE H/NIM & F/NIM & T/C/S2 Combo Tuner
IC2204 1ST:T-AP2114H(EAN61573601) / 2ND:T-TJ3940S (EAN61573501)
H/NIM H/NIM H/NIM F/NIM_CN F/NIM_Brazil DVB-T/C/S2
F/NIM_T/C F/NIM_T2
(AU,Latin) (Brazil,Taiwan) (China) (Brazil) (Eu,Aisa)
(EU) NON_DVB_S: use H/NIM and F/NIM
Non_DVB_S Non_DVB_S Non_DVB_S Non_DVB_S Non_DVB_S Non_DVB_S Non_DVB_S DVB_S DVB_S: use DVB-T/C/S2 combo Tuner
THERMAL
C2215 PG GND
CN C2205 C2220 CN R2233 R2210
+B2[1.2V] +B2[1.2V] TD_1.2V C2218 C2210 C2214 R2229 100K POWER_ON/OFF2_1 R2213
B 10K
9
10uF 100pF 1000pF 4700pF Q2205 2 7 11K
13 13 13 0.1uF 100uF 100
NON_CN
50V 50V CN 50V CN C2217 TU_RESET MMBT3906(NXP) 1% R1
16V 16V 16V CN C2231 +2.5V_TU C SCART EN ADJ R2214
+B3[3.3V] +B3[3.3V] T_3.3V C2227 C2238 11K
10uF 100pF 0.1uF 0.1uF
14 14 14 3 6 1%
R2211
50V 16V 16V EU_F/NIM
16V
OPT 10K
0 VIN VOUT
RESET RESET T_TU_RESET R2240 C2289 C2291
15 15 15 H/NIM
0 10uF
0.1uF
OPT
4 2A 5
R2214-*1
10K
IF_AGC_CNTL +B4[2.5V] NC_6
R2241
IF_AGC OPTION:SCART 16V
+5V_Normal
VCTRL NC
1/16W
C2213
16 16 16 0.1uF EU_F/NIM EAN61387601 1% C2290
F/NIM 16V R2215 CN
DIF_1[N] SCL TD_SCL 10uF
R2204 0 close to Tuner 22
17 17 17 SCL1_3.3V 16V
R2216
DIF_2[P] SDA TD_SDA R2205
F/NIM
0 close to TUNER 22 OPT
18 18 18 SDA1_3.3V C2292
close to IF line 1uF
H/NIM
ERR T/C/S2_ERROR R2293 0
19 19 C2237 C2241
19 R2292H/NIM
0 18pF 18pF
SYNC T/C/S2_SYNC 50V
20 20 OPT 50V
OPT Vout=0.6*(1+R1/R2)
SHIELD
VALID T/C/S2_VALID IF_N
21 21
MCL T/C/S2_MCL
22 22 IF_P
TAIWAN_BR_V
TU2201-*1
LATIN_TUNER_H
TU2201-*2
AU_ASIA_H/NIM_H
TU2201-*3
D0 T/C/S2_D0
TDTR-T056F TDVJ-H031F TDTJ-S101D 23 23
AR2200 47
1
RF_S/W_CTL
1
ANT_PWR[OPT]
1
ANT_PWR D1 T/C/S2_D1 TU_TS_ERR +3.3V_TU +2.5V_TU
BST_CNTL BST_CNTL NC_1 24 24 FE_TS_DATA[0-7]
2 2 2
+B[5V] +B +B1[5V]
TU_TS_SYNC
3 3 3
4
NC_1[RF_AGC]
4
NC[RF_AGC]
4
RF_AGC D2 T/C/S2_D2 TU_TS_VAL
IC2204
5
NC_2
5
AS
5
MOPLL_AS 25 25 TU_TS_CLK AR2200-*1 AR2200-*2
SCL SCL SCL 0 33 AP2114H-2.5TRG1
6 6 6
EU_F/NIM CN DVB_S
7
SDA
7
SDA
7
SDA D3 T/C/S2_D3
8
NC_3
8
NC(IF_TP)
8
NC_2 26 26 VIN VOUT
9
SIF
9
SIF
9
SIF 3 2
10
NC_4
10
NC
10
NC_3 D4 T/C/S2_D4 1
11
VIDEO
11
VIDEO
11
VIDEO 27 27 R2270
GND GND GND GND 1
12 12 12
AR2201 C2268 EU_F/NIM
13
+B2[1.26V]
13
1.2V
13
+B2[1.2V] D5 T/C/S2_D5 47 OPT 0.1uF
14
+B3[3.3V]
14
3.3V
14
+B3[3.3V] 28 28 FE_TS_DATA[1] 16V C2276 C2279
15
RESET
15
RESET
15
RESET AR2201-*1 AR2201-*2 10uF 0.1uF
IF_AGC_CNTL IF_AGC_CNTL IF_AGC D6 T/C/S2_D6 FE_TS_DATA[0] 0 33
16 16 16
CN 10V 16V
17
DIF_1[N]
17
DIF_1
17
DIF_1[N] 29 29 FE_TS_DATA[3] DVB_S EU_F/NIM EU_F/NIM
DIF_2[P] DIF_2 DIF_2[P]
18 18 18 FE_TS_DATA[2]
D7 T/C/S2_D7
19 19 19
30 30 L2209 EU_F/NIM
SHIELD SHIELD SHIELD
31
S2_1.25V BLM18PG121SN1D
120-ohm
+1.25V_TU AR2202
31 47
DVB_S C2223 C2226 C2230 FE_TS_DATA[5]
S2_RESET 100pF 0.1uF 10uF FE_TS_DATA[4] AR2202-*1 AR2202-*2
SHIELD 32 50V 16V 10V 0 33 Max 217mA
FE_TS_DATA[6] CN
DVB_S DVB_S DVB_S DVB_S
S2_3.3V +3.3V_S2_LNB
33 +3.3V_TU
EU_F/NIM_DVB_T2_V
TU2202-*1
CN_VERTICAL_ALTOBEAM
TU2202-*2
CN_HORIZONTAL_ALTOBEAM
TU2202-*3
CN_VERTIAL_LG3911
TU2202-*4
CN_HORIZONTAL_LG3911
TU2202-*5
DVB_TCS_H
R2203
R2208 +1.8V_TU
TU2203-*1 2.2K EU_F/NIM
TDFR-G256D TDFR-C256D TDFR-C236D TDFR-C056D TDFR-C036D TDFQ-G001D
S2_F22 R2202 100 DVB_S IC2202 +3.3V_TU +3.3V_S2_LNB
51 LNB_TX S2_RESET
1
NC_1
1
RF_S/W_CNTL
1
RF_S/W_CNTL
1
RF_S/W_CNTL
1
RF_S/W_CNTL 1
NC_1 34 DVB_S C2207 AZ1117BH-1.8TRE1
2
NC_2 0.1uF L2204
BST_CNTL BST_CNTL BST_CNTL BST_CNTL BST_CNTL 1/16W DVB_S
2
+B1[5V]
2
+B1[+5V]
2
+B1[+5V]
2
+B1[+5V]
2
+B1[+5V]
3
NC_3
S2_TU[3.3V]
S2_SCL 5%DVB_S MLB-201209-0120P-N2
3 3 3 3 3 4
35 R2283 0 R2226 IN OUT
NC_2[RF_AGC] NC[RF_AGC] NC[RF_AGC] NC[RF_AGC] NC[RF_AGC] NC_4
FE_TS_DATA[7] R2226-*1 R2226-*2 3 DVB_S 2
4 4 4 4 4 5
TU_SCL
47 0 33
NC_3 NC_1 NC_1 NC_1 NC_1 6 DVB_S
5
SCLT
5
SCLT
5
SCLT
5
SCLT
5
SCLT 7
TU_SDA
S2_SDA EU_F/NIM
1 R2298
OPT
C2242 DVB_S C2245 C2248
6 6 6 6 6
8
T_1.8V
36 R2284 0 CN DVB_S 1 0.1uF 10uF 0.1uF
7
SDAT
7
SDAT
7
SDAT
7
SDAT
7
SDAT T_SIF ADJ/GND +3.3V_S2_DE
9
DVB_S 10V DVB_S
NC_4 NC_2 NC_2 NC_2 NC_2 10
NC_5 DVB_S +3.3V_S2_DE
8
SIF
8
SIF
8
SIF
8
SIF
8
SIF 11
T_CVBS GND_2 DVB_S
9
10
NC_5
9
10
NC_3
9
10
NC_3
9
10
NC_3
9
10
NC_3 12
GND_1
TD_1.2V
37 Close to the tuner L2202
13
VIDEO VIDEO VIDEO VIDEO VIDEO T_3.3
C2224 C2228 C2232 C2287 C2288 MLB-201209-0120P-N2
11
GND
11
GND
11
GND
11
GND
11
GND
14
15
T_TU_RESET S2_LNB 100pF 0.1uF 10uF 10uF 0.1uF
12
13
+B2[1.2V]
12
13
+B2[1.2V]
12
13
+B2[1.2V]
12
13
+B2[1.2V]
12
13
+B2[1.2V] 16
NC_6 38 50V
DVB_S
16V
DVB_S
10V
DVB_S 10V 16V
+B3[3.3V] +B3[3.3V] +B3[3.3V] +B3[3.3V] +B3[3.3V] 17
TD_SCL
DVB_S DVB_S DVB_S C2243 C2246
14 14 14 14 14 TD_SDA
RESET RESET RESET RESET RESET
18
T/C/S2_ERROR
10uF 0.1uF
15 15 15 15 15 19
39 +3.3V_S2_TU 10V
16
+B4[2.5V]
16
NC_4
16
NC_4
16
NC_4
16
NC_4 20
T/C/S2_SYNC
DVB_S DVB_S
T/C/S2_VALID
SCL SCL SCL SCL SCL 21
17 17 17 17 17
22
T/C/S2_MCL Surge protectioin L2203
SDA SDA SDA SDA SDA
18 18 18 18 18
23
T/C/S2_D0 Close to Tuner #38 pin MLB-201209-0120P-N2
ERR ERR ERR ERR ERR T/C/S2_D1
19 19 19 19 19 24
SYNC SYNC SYNC SYNC SYNC T/C/S2_D2
25
20
21
VALID
20
21
VALID
20
21
VALID
20
21
VALID
20
21
VALID 26
T/C/S2_D3 SHIELD DVB_S C2244 C2247
MCL MCL MCL MCL MCL 27
T/C/S2_D4
LNB_OUT 10uF 0.1uF
22 22 22 22 22 T/C/S2_D5 C2209 C2212 D2201 R2207 16V
D0 D0 D0 D0 D0
28
C2206 10V
23 23 23 23 23 29
T/C/S2_D6
33pF 33pF 3.0SMCJ20A(suzhougrande) 2.2K
D1 D1 D1 D1 D1 T/C/S2_D7 1000pF DVB_S DVB_S
24 24 24 24 24 30
S2_1.25V
OPT DVB_S DVB_S DVB_S
25
D2
25
D2
25
D2
25
D2
25
D2 31
S2_RESET
50V 6432
32
26
D3
26
D3
26
D3
26
D3
26
D3
33
S2_3.3V DVB_S
D4 D4 D4 D4 D4 S2_F22
27 27 27 27 27 34
D5 D5 D5 D5 D5 S2_SCL
28
D6
28
D6
28
D6
28
D6
28
D6
35
36
S2_SDA +5V_Normal +5V_TU +3.3V_Normal +3.3V_TU
29 29 29 29 29
37
GND_2 CHBO_TS_CLK
D7 D7 D7 D7 D7
30 30 30 30 30 S2_LNB
31 31 31 31 31 38
39
CHBO_TS_SERIAL L2208 L2207
SHIELD SHIELD SHIELD SHIELD SHIELD
SHIELD CHBO_TS_SYNC MLB-201209-0120P-N2 MLB-201209-0120P-N2
CHBO_TS_VAL_ERR
C2258 C2252 C2260 C2262 C2216 C2249 C2255 C2259 C2261
TU_RESET_SUB 22uF 0.1uF 22uF 0.1uF 22uF 0.1uF 22uF 0.1uF 0.1uF
16V 16V 16V 16V 16V 16V 16V 16V 16V
RF_SWITCH_CTL_2 CN
TW9910_RESET
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
DVB-S2 LNB Part Allegro
(Option:LNB)
D2301
LNB SMAB34 D2304
SMAB34
2A 40V 40V
LNB
3A
+12V_LNB
C2307 C2302 C2324 C2305
0.01uF 1uF 68uF 68uF
50V 50V 35V 35V LNB
LNB LNB LNB LNB L2301
33UH
SP-7850_33 C2311 C2312 DCDC_GND and A_GND are connected
close to Boost pin(#1)
10uF 0.1uF
2.4A
25V 50V DCDC_GND and A_GND are connected in pin#27
close to VIN pin(#25)
LNB LNB
DCDC_GND DCDC_GND PCB_GND and A_GND are connected
D2302 DCDC_GND
US1M(suzhou) A_GND
LNB_OUT
1000V
C2303 D2303 Input trace widths should be sized to conduct at least 3A
LNB SMAB34
0.1uF 40V
LNB 50V LNB
C2301 Ouput trace widths should be sized to conduct at least 2A
0.22uF
25V
GNDLX
[EP]
NC_9
A_GND
LNB
VIN
BFI
BFO
LX
A_GND
28
27
26
25
24
23
22
A_GND
BOOST 1 21 NC_8
C2304 0.1uF THERMAL
VCP 2 29 20 NC_7
11
12
13
14
8
+3.3V_Normal
GND
VREG
SDA
ADD
SCL
NC_2
IRQ
DCDC_GND
A_GND A_GND
R2304
Max 1.3A
4.7K
R2301 33
R2302 33
LNB
R2303 0
+12V +12V_LNB
LNB
LNB
LNB
0.22uF
L2302
BLM18PG121SN1D
27pF
27pF
LNB
OPT
OPT
LNB
C2308
C2309
C2310
A_GND
LNB_INT
SDA1_3.3V
SCL1_3.3V
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
DUAL COMPONENT
Q2502,Q2503
Q2504,Q2506 1ST : 0TRIY80001A 2ND : 0TR387500AA
Q2507,Q2508
+12V
R2514
10K CLOSE TO JUNCTION
EU
EU
R2525 L2506
SC_DET/COMP2_DET EU
1K EU R2545
EU E EU EU EU
D2511 MMBT3906(NXP) C2525 C2526 10K
R2536
5.6V Q2501 470 0.1uF 0.1uF
50V 50V DTV_ATV_SELECT
B
IC2502
C EU EU NLASB3157DFT2G
EU Q2502 R2537
R2577 C2511 R2522 C 2SC3052 47K
10 R2532
SC_CVBS_IN 390 B EU SELECT B1
C2524 6 1 ATV_OUT
D2501 0 EU
EU C2536 EU 0.1uF 47uF
5.5V R2504 47pF EU
EU E 16V
EU 75 50V CLOSE TO SOC VCC GND
1% EU 5 2
SHIELD EU R2533
390 L2507
19 Gain=1+Rf/Rg EU A B0 120-ohm
Rf EU R2538 4 3
Rg DTV/MNT_V_OUT
AV_DET JP2501 75 R2513 R2535 15K
180 BLM18PG121SN1D
18 D2502 +3.3V_Normal NON_DTV_OUT
EU C2532 C2534 R2551
COM_GND EU
5.5V C2515 180pF 180pF 75
17 L2507-*1
JP2502 EU 100uF 50V 50V 1%
R2580
SYNC_IN 0
16V +3.3V_Normal OPT OPT EU
16
10K
EU
SYNC_OUT JP2503 DVT_OUT
Selece = High ==> A = B1
15
R2579
14 C EU
R2581
RGB_IO JP2504 1K B Q2510
13
2SC3052
R_OUT JP2505 OPT EU
D2503 EU C
12 R2506 EU E
R2578
R_GND 30V 75 10K
1% B Q2509
11
2SC3052
G_OUT JP2506
10 E
G_GND
0 EU R2515
9 COMP2_Pr
ID JP2507 D2504
R2507
8 5.5V 75
B_OUT JP2508 1%
EU EU
7
AUDIO_L_IN
6
B_GND JP2509 0 EU R2516
5 COMP2_Y
AUDIO_GND D2505 EU
4 5.5V R2508
AUDIO_L_OUT D2513
JP2510 EU 75 1%
3 30V
AUDIO_R_IN REC_8
JP2511
2
AUDIO_R_OUT 0 EU R2517 EU
EU
COMP2_Pb
1 R2539
D2506 9.1K
JP2512 EU
5.5V R2509 SC_ID
EU 75 1/16W
1% OPT 1%
EU
DA1R018H91E CLOSE TO JUNCTION D2512 R2542
30V 1K C2528
JK2501 1% 1uF
EU 10V
EU
C2537
D2507
5.6V EU C2509
R2510 C2516
OPT 470K 560pF
50V 100pF
EU 50V
EU
C2538
1uF
25V
EU
D2508 R2511 C2510 TP2501
5.6V 470K 560pF INCM_VID_SC C2533
OPT CLOSE TO JUNCTION C2517
50V 0.1uF R2549
100pF
EU 16V 36
50V
EU
BLM18PG121SN1D
L2508
DTV/MNT_L_OUT
D2509 EU EU EU
5.6V C2518 C2522
OPT 1000pF 4700pF
50V
BLM18PG121SN1D
L2509
DTV/MNT_R_OUT
D2510 EU EU
EU C2523
5.6V C2519 4700pF
OPT 1000pF 0 R2534 AUDIO_R
50V HOTEL_OPT
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
NON CHB
TS Output
CHBO_TS_SERIAL
CHBO_TS_CLK
CHBO_TS_VAL_ERR
CHBO_TS_SYNC
CHB_RESET
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
DUAL COMPONENT
+24V_AMP
P2901
12505WS-09A00
CN_HOTEL
R2904 0
1
CN_HOTEL
C2901
0.1uF
CN_HOTEL 2
AUDIO_R 3
+3.3V_Normal
4
CN_HOTEL
R2903 0 5
AMP_RESET_N
R2902
10K
CN_HOTEL
AMP_MUTE_HOTEL 6
C
Q2901
R2901 200 B MMBT3904(NXP) 7
AMP_MUTE_HOTEL CN_HOTEL
CN_HOTEL
E
8
SPK_R+_HOTEL
9
SPK_R-_HOTEL
10
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
LVDS LOCAL DIMMING
P3501
[51Pin LVDS OUTPUT Connector]
FI-RE51S-HFK-A [41Pin LVDS OUTPUT Connector]
GND
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
VDDC10 +1.5V_FRC_DDR +1.5V_FRC_DDR
+1.26V_FRC VDDC10 [SPI FLASH(2Mbit)] +3.3V_FRC
L5205
CIC21J501NE
C5201 C5210 C5211 C5243 C5225 C5228 C5213 C5244 C5231 C5232 C5234 C5247
0.1uF 22uF 22uF 0.22uF 0.1uF 0.1uF 0.1uF 0.22uF 0.1uF 0.1uF 0.1uF 1uF
10V 10V 6.3V 6.3V 6.3V IC5202
R5244 R5246 W25X20BVSNIG
PLACE TERMINATION RESISTORS CLOSE TO URSA5 4.7K 10K
TXBCLKP
TXBCLKN
TXACLKP
TXACLKN
CS VCC
1 8
TXB2P
TXA1P
TXA4N
TXB0P
TXB0N
TXB1P
TXB1N
TXB2N
TXB3P
TXB3N
TXB4P
TXB4N
TXA0P
TXA0N
TXA1N
TXA2P
TXA2N
TXA3P
TXA3N
TXA4P
+1.26V_FRC DVDD_DDR_1V SPI_CS
13pF
13pF
10V 100 100
R5225 R5231 GND DIO
4 5 SPI_DI
Place Close to Bead 100 100
C5241
C5242
24MHz
DVDD_DDR_1V
X5201
R5226 R5232
+3.3V_FRC VDD33 VDD33 (VDDP)
100 100 URSA5_FLASH_WINBOND_2M
AVDD_LVDS_3.3V
L5202 R5227 R5233
GPIO[1]
3D_SYNC
GPIO[8]
+1.5V_FRC_DDR
CIC21J501NE
100 100 1M
L_VS
R5237
VDD33
C5203 C5207 C5214 C5219 C5245
AVDD_PLL
R5228 R5234
0.1uF 0.1uF 0.1uF 0.1uF 0.22uF IC5202-*1
AVDD33
VDDC10
6.3V 100 100 MX25L2006EM1I-12G, HF
0.1uF C5240
0
R5229 R5235
CS VCC
33
100 100 1 8
R5236
0
0
0
+3.3V_FRC AVDD33 AVDD33 SO/SIO1 HOL
R5238
R5239
R5240
R5241
R5242
2 7
L5206
CIC21J501NE WP SCL
3 6
F10
G10
F11
F12
G11
G12
K10
L10
M10
N10
N11
P10
P11
R13
T13
U15
R14
T14
U14
U13
R12
E11
R10
T11
R11
U11
F4
F5
D4
D5
E4
E5
M5
L4
L5
K9
M4
N4
N5
M9
N9
R2
R3
R4
R5
T4
U4
U3
T3
T2
U2
T1
R1
R6
R7
R8
R9
T8
U8
U7
T7
T6
U6
U5
T5
J1
J2
P9
K2
K1
P8
N2
M1
N1
N3
M3
L1
M2
L2
K3
L3
C5233 C5236 C5238 C5239 GND SI/S
0.1uF 0.1uF 0.1uF 0.1uF 4 5
AVDD_1
AVDD_2
AVDD_DDR_C_1
AVDD_DDR_C_2
AVDD_DDR_D_1
AVDD_DDR_D_2
AVDD_DDR_D_3
AVDD_DDR_D_4
AVDD_LVDS3.3V_1
AVDD_LVDS3.3V_2
AVDD_LVDS3.3V_3
AVDD_LVDS3.3V_4
AVDD_MPLL3.3V
AVDD_LPLL3.3V
AVDD_PLL3.3V
AVDDL_MOD1.26V
DVDD_DDR_1.26V
DVDD_HF1.26V
VD33_1
VD33_2
VD33_3
VDDC_1.26V_1
VDDC_1.26V_2
VDDC_1.26V_3
VDDC_1.26V_4
VDDC_1.26V_5
VDDC_1.26V_6
VDDC_1.26V_7
RXBCLKP
RXBCLKN
RXB0P
RXB0N
RXB1P
RXB1N
RXB2P
RXB2N
RXB3P
RXB3N
RXB4P
RXB4N
RXACLKP
RXACLKN
RXA0P
RXA0N
RXA1P
RXA1N
RXA2P
RXA2N
RXA3P
RXA3N
RXA4P
RXA4N
XTALO
XTALI
GPIO0/(UART_RX/S_PIF_DA0)
GPIO1
GPIO2/(S_PIF_CLK)
GPIO3/(LTD_DA1)
GPIO4/(LTD_DE)
GPIO5/(LTD_CLK)
GPIO6/(LTD_DA0)
GPIO7(3D_FLAG)
GPIO8
GPIO9/(UART_TX/S_PIF_DA1)
GPIO10/(S_PIF_FC)
GPIO11/(S_PIF_CS)
VSYNC_LIKE
M_S_PIF_CLK
M_S_PIF_CS
M_S_PIF_DA0
M_S_PIF_DA1
M_S_PIF_FC
S_M_PIF_CLK
S_M_PIF_CS
S_M_PIF_DA0
S_M_PIF_DA1
S_M_PIF_FC
SOFT_RST_L
SOFT_RST_R
OP_SYNC_L
OP_SYNC_R
URSA5_FLASH_MACRONIX_2M
FRC_A[0-13]
+3.3V_FRC AVDD_PLL AVDD_PLL FRC_A[0] P14 C8
DDR3_A0/DDR2_NC TXA0P/GCLK6/BLUE[7] LVDS_TXA0P
FRC_A[1] G15 C9
L5203 DDR3_A1/DDR2_A8 TXA0N/GCLK5/BLUE[6] LVDS_TXA0N
CIC21J501NE FRC_A[2] N14 B8
DDR3_A2/DDR2_NC TXA1P/OPT_N/LK3/BLUE[9] LVDS_TXA1P
FRC_A[3] L15 A8
C5204 C5208 C5215 C5217 DDR3_A3/DDR2_A10 TXA1N/FLK/BLUE[8] LVDS_TXA1N
FRC_A[4] H15 A7
0.1uF 0.1uF 10uF 0.1uF DDR3_A4/DDR2_A2 TXA2P/GREEN[1] LVDS_TXA2P
FRC_A[5] L14 B7
6.3V DDR3_A5/DDR2_A3 TXA2N/OPT_P/LK2/GREEN[0] LVDS_TXA2N
FRC_A[6] G14 C6
DDR3_A6/DDR2_A4 TXACLKP/RLV0N/GREEN[3] LVDS_TXACLKP
FRC_A[7] N12 C7
DDR3_A7/DDR2_A5 TXACLKN/RLV0P/GREEN[2] LVDS_TXACLKN
FRC_A[8] G13 B6
+3.3V_FRC AVDD_LVDS_3.3V AVDD_LVDS_3.3V DDR3_A8/DDR2_A6 TXA3P/RLV1N/GREEN[5] LVDS_TXA3P
FRC_A[9] N13 A6
DDR3_A9/DDR2_A9 TXA3N/RLV1P/GREEN[4] LVDS_TXA3N
L5204 FRC_A[10] H14 A5
CIC21J501NE DDR3_A10/DDR2_RASZ TXA4P/RLV2N/GREEN[7] LVDS_TXA4P
FRC_A[11] F15 B5
DDR3_A11/DDR2_A11 TXA4N/RLV2P/GREEN[6] LVDS_TXA4N
FRC_A[12] H13
C5205 C5209 C5216 C5220 C5223 C5227 DDR3_A12/DDR2_A0
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF FRC_A[13] P13 C4
DDR3_A13/DDR2_A12 TXB0P/RLV3N/GREEN[9] LVDS_TXB0P
C5
TXB0N/RLV3P/GREEN[8] LVDS_TXB0N
M12 B4
FRC_BA0 DDR3_BA0/DDR2_BA2 TXB1P/RLVCLKN/RED[1] LVDS_TXB1P
H12 A4
FRC_BA1 DDR3_BA1/DDR2_CASZ TXB1N/RLVCLKP/RED[0] LVDS_TXB1N
L13 A3
FRC_BA2 DDR3_BA2/DDR2_A1 TXB2P/RLV4P/RED[3]/EPI_A3P LVDS_TXB2P
B3
TXB2N/RLV4N/RED[2]/EPI_A3N LVDS_TXB2N
F16 C2
FRC_MCLK DDR3_MCLK/DDR2_MCLK TXBCLKP/RLV5N/RED[5]/EPI_A2P LVDS_TXBCLKP
GPIO1 : HI => B8/94, LOW => B4/98 F17 C3
FRC_MCLKB DDR3_MCLKZ/DDR2_MCLKZ TXBCLKN/RLV5P/RED[4]/EPI_A2N LVDS_TXBCLKN
CHIP_CONF : {GPIO8, PWM1, PWM0} J13 B2
FRC_CKE DDR3_CKE/DDR2_ODT TXB3P/RLV6N/RED[7]/EPI_A1P LVDS_TXB3P
CHIP_CONF = 3’d5 : boot from interal SRAM A2
TXB3N/RLV6P/RED[6]/EPI_A1N/ LVDS_TXB3N
CHIP_CONF = 3’d6 : boot from EEPROM K12 C1
FRC_ODT DDR3_ODT/DDR2_CKE TXB4P/RLV7N/RED[9]/EPI_A0P LVDS_TXB4P
CHIP_CONF = 3’d7 : boot from SPI Flash L12 B1
FRC_RASB DDR3_RASZDDR2_WEZ TXB4N/RLV7P/RED[8]/EPI_A0N LVDS_TXB4N
K13
FRC_CASB DDR3_CASZ/DDR2_BA1
K14 C16
URSA5 CONFIGURATION
+3.3V_FRC
FRC_WEB
M14
DDR3_WEZ/DDR2_BA0
IC5201 TXC0P/SOE
TXC0N/POL
B17
B16
LVDS_TXC0P
LVDS_TXC0N
FRC_DDR3_RESETB DDR3_RESET/DDR2_A7 TXC1P/GSP_R LVDS_TXC1P
A16
FRC_DQSL
N16
DDR3_DQSL/DDR2_DQSL
LGE7303C TXC1N/GSP/VST
TXC2P/GOE/GCLK1
A15
LVDS_TXC1N
LVDS_TXC2P
10K
R5211 10K
R5215 10K
M17 B15
10K
TXCCLKP/LLV0N LVDS_TXCCLKP
M16 C15
R5207
R5203
R5208 OPT10K
10K
10K
R5213 10K
R5217 10K
R5205 10K
OPT
MOD_GPIO3/PWM14/GCLK2/LDE 2D/3D_CTL
FRC_DQU[0-7] F14
DDR3_NC/DDR2_A13 R5253 3D-SG 33
+3.3V_FRC T16 3D_SYNC_RF
DDR3_NC/DDR2_DQL4
U12 R5250 33
URSA_MODEL_OPT_0 PWM0/SCAN_BLK1 PWM0
R5220 4.7K OPT T12 R5251 33
URSA_MODEL_OPT_1 PWM1/SCAN_BLK2 PWM1
D14
URSA_MODEL_OPT_2 R5221 4.7K OPT I2CM_SCL
L/DIM_EDGE_42/47/55
D15 G3
2D/3D_CTL I2CM_SDA LPLL_FBCLK
33 R5222 P1 E17
LVDS_S7M-PLUS
P2 H3
10K
33 R5223
10K
10K
TESTPIN_1
TESTPIN_2
TESTPIN_3
TESTPIN_4
TESTPIN_5
TESTPIN_6
TESTPIN_7
TESTPIN_8
HW_RESET
R5210 OPT
M0_SCLK
M0_MOSI
M1_SCLK
M1_MOSI
M2_SCLK
M2_MOSI
M3_SCLK
M3_MOSI
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
SPI_CK
SPI_CZ
SPI_DI
SPI_DO
PIN NAME PIN NO.
R5206
HIGH LOW
R5214
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
NC
MODEL_OPT_0 D10 L/DIM_10BLOCK L/DIM_16BLOCK
D6
D7
D8
D9
E6
E7
E8
E9
E10
E16
F3
F6
F7
F8
F9
G1
G2
G4
G5
G6
G7
G8
G9
G17
H1
H2
H4
H5
H6
H7
H8
H9
H10
H11
J4
J5
J6
J7
J8
J9
J10
J11
J12
J14
J16
K4
K5
K6
K7
K8
K11
L6
L7
L8
L11
L16
M6
M7
M8
M11
M13
N6
N7
N8
N17
P3
P4
P5
P6
P7
P12
U16
L9
J3
D1
D2
D3
E1
E2
E3
F1
F2
C17
D16
D17
E15
E14
E13
E12
F13
T9
33 U10
33 U9
T10
MODEL_OPT_1 D11 RESERVED RESERVED
33
MODEL_OPT_2 D12 LVDS_EXT_URSA5 LVDS_S7M_PLUS
NON USED
MODEL_OPT_3 D13 RESERVED RESERVED BCM35230 LVDS CHC/D
R5247
R5248
R5249
TXC0N
Debugging for URSA5 TXC0P
TXC1N
P5201 +3.3V_FRC
Q5202 TXC1P
12507WR-04L
SPI_SCLK
AO3407A
SPI_DI
M0_SCLK
M0_MOSI
M1_SCLK
M1_MOSI
M2_SCLK
M2_MOSI
M3_SCLK
SPI_CS
SPI_DO
M3_MOSI
TXC2N
S
TXC2P
URSA5_DEBUG
TXCCLKN
1 SW5201 C5212 URSA5_UO2_RESET
JS2235S R5255 TXCCLKP
G
22K 4.7uF
R5219 16V TXC3N
URSA5_UO2_RESET
10K URSA5_UO2_RESET TXC3P
2
OPT TXC4N
1 6 SDA2_3.3V
URSA5_DEBUG SCL2_3.3V
R5258 R5259 TXC4P
3 R5201 22 0 0 R5262
SCL2_+3.3V_DB URSA5_MP 2.2K TXD0N
URSA5_MP 2 5
SCL2_+3.3V_URSA SDA2_+3.3V_URSA URSA5_UO2_RESET TXD0P
URSA5_DEBUG R5260 R5261 C
R5202 22 URSA5_DEBUG TXD1N
4 0 0 R5254
SDA2_+3.3V_DB OPT OPT 4.7K
3 4 B Q5201 TXD1P
SCL2_+3.3V_DB SDA2_+3.3V_DB FRC_RESET 2SC3052
5 URSA5_UO2_RESET TXD2N
URSA5_UO2_RESET
R5256 E TXD2P
10K
OPT TXDCLKN
TXDCLKP
TXD3N
TXD3P
R5243 33
TXD4N
URSA5_UO3_RESET
TXD4P
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MStar URSA5 2010. 08.18
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. FRC block 52 55
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Close to DDR Pin
+1.5V_FRC_DDR
+1.5V_FRC_DDR
+1.5V_FRC_DDR DDR3 1.5V De-Cap Place near Memory
R5301
1K
0.1uF
C5305
1% C5303 C5304
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C5306
C5307
C5308
C5309
C5310
C5311
C5312
C5313
C5314
0.1uF 22uF
MVREFCA 16V 10V
R5302
Place the serail damping resistors
1K
1% C5301 Place Close to DDR Pin in the middle of DRAM pattern
0.1uF
R5311 22
FRC_DMU DDR3_DMU AR5306
+1.5V_FRC_DDR
FRC_DQL[4] DDR3_DQL[4]
R5312 22 FRC_DQL[6] DDR3_DQL[6]
FRC_DQSL DDR3_DQSL
FRC_DQL[2] DDR3_DQL[2]
R5303
IC5301 FRC_DQL[0] DDR3_DQL[0]
1K H5TQ1G63DFR-PBC DDR3_A[0-13] R5313 22
1% FRC_DQSLB DDR3_DQSLB 22
MVREFDQ
R5314 22
R5304 M8 N3 DDR3_A[0] FRC_DQSU DDR3_DQSU AR5307
1K MVREFCA VREFCA A0
P7 DDR3_A[1] FRC_DQU[5] DDR3_DQU[5]
1% A1
C5302 P3 DDR3_A[2] R5315 22 FRC_DQU[3] DDR3_DQU[3]
0.1uF A2 FRC_DQSUB DDR3_DQSUB
H1 N2 DDR3_A[3] FRC_DQU[7] DDR3_DQU[7]
MVREFDQ VREFDQ A3
P8 DDR3_A[4] FRC_DQU[1] DDR3_DQU[1]
A4 R5316 22
P2 DDR3_A[5] FRC_DML DDR3_DML 22
R5305 A5
L8 R8 DDR3_A[6]
ZQ A6
240 R2 DDR3_A[7] R5317 22
A7 FRC_ODT DDR3_ODT AR5308
1% T8 DDR3_A[8]
A8 FRC_DQU[4] DDR3_DQU[4]
B2 R3 DDR3_A[9]
VDD_1 A9 R5318 22 FRC_DQU[6] DDR3_DQU[6]
D9 L7 DDR3_A[10] FRC_RASB DDR3_RASB
VDD_2 A10/AP FRC_DQU[2] DDR3_DQU[2]
G7 R7 DDR3_A[11]
VDD_3 A11 FRC_DQU[0] DDR3_DQU[0]
K2 N7 DDR3_A[12] R5319 22
VDD_4 A12/BC FRC_CKE DDR3_CKE 22
K8 T3 DDR3_A[13] Place Close to DDR Pin
VDD_5 A13
N1
VDD_6 R5320 22
N9 M7 FRC_MCLK DDR3_MCK AR5309
VDD_7 A15 R5309
R1 56 FRC_DQL[3] DDR3_DQL[3]
VDD_8 DDR3_MCK
R9 M2 R5321 22 FRC_DQL[1] DDR3_DQL[1]
VDD_9 BA0 DDR3_BA0 R5310 FRC_MCLKB DDR3_MCKB
N8 FRC_DQL[5] DDR3_DQL[5]
BA1 DDR3_BA1 56
M3 C5315 DDR3_MCKB FRC_DQL[7] DDR3_DQL[7]
BA2 DDR3_BA2 R5322 22
A1 DDR3_MCK 0.01uF FRC_DDR3_RESETB DDR3_RESETB 22
VDDQ_1
R5307
A8 J7 25V
OPT
150
VDDQ_2 CK
C1 K7 AR5301
VDDQ_3 CK
C9 K9 DDR3_MCKB FRC_A[10] DDR3_A[10]
VDDQ_4 CKE
D2 DDR3_CKE FRC_BA1 DDR3_BA1
VDDQ_5
+1.5V_FRC_DDR E9 L2 FRC_A[12] DDR3_A[12]
VDDQ_6 CS
F1 K1 FRC_A[4] DDR3_A[4]
VDDQ_7 ODT DDR3_ODT
H2 J3 22
VDDQ_8 RAS DDR3_RASB +1.5V_FRC_DDR
H9 K3
VDDQ_9 CAS DDR3_CASB
L3
WE DDR3_WEB AR5302
J1 R5308 0
NC_1 FRC_A[6] DDR3_A[6]
J9 T2
NC_2 RESET DDR3_RESETB FRC_A[8] DDR3_A[8]
L1
NC_3 FRC_A[1] DDR3_A[1]
L9
NC_4 FRC_A[11] DDR3_A[11]
T7 F3
NC_6 DQSL DDR3_DQSL 22
G3
DQSL DDR3_DQSLB
A9 C7 AR5303
VSS_1 DQSU DDR3_DQSU
B3 B7 FRC_A[0] DDR3_A[0]
VSS_2 DQSU DDR3_DQSUB
E1 FRC_A[2] DDR3_A[2]
VSS_3
G8 E7 FRC_A[13] DDR3_A[13]
VSS_4 DML DDR3_DML
J2 D3 DDR3_DQL[0-7] FRC_A[9] DDR3_A[9]
VSS_5 DMU DDR3_DMU
J8 22
VSS_6
M1 E3 DDR3_DQL[0]
VSS_7 DQL0
M9 F7 DDR3_DQL[1]
VSS_8 DQL1 AR5304
P1 F2 DDR3_DQL[2]
VSS_9 DQL2
P9 F8 DDR3_DQL[3]
VSS_10 DQL3 FRC_A[7] DDR3_A[7]
T1 H3 DDR3_DQL[4]
VSS_11 DQL4 FRC_A[5] DDR3_A[5]
T9 H8 DDR3_DQL[5]
VSS_12 DQL5 FRC_A[3] DDR3_A[3]
G2 DDR3_DQL[6]
DQL6 22
H7 DDR3_DQL[7]
DQL7
B1
VSSQ_1
B9 D7 DDR3_DQU[0] AR5305
VSSQ_2 DQU0
D1 C3 DDR3_DQU[1] FRC_BA2 DDR3_BA2
VSSQ_3 DQU1
D8 C8 DDR3_DQU[2] FRC_BA0 DDR3_BA0
VSSQ_4 DQU2
E2 C2 DDR3_DQU[3] FRC_WEB DDR3_WEB
VSSQ_5 DQU3
E8 A7 DDR3_DQU[4] FRC_CASB DDR3_CASB
VSSQ_6 DQU4
F9 A2 DDR3_DQU[5] 22
VSSQ_7 DQU5
G1 B8 DDR3_DQU[6]
VSSQ_8 DQU6
G9 A3 DDR3_DQU[7]
VSSQ_9 DQU7
DDR3_DQU[0-7]
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
CORE +1.26V_FRC TYPICAL 980mA
+3.3V_FRC
+1.5V_FRC TYPICAL 350mA +1.5V_FRC_DDR
+12V +3.3V_FRC
IC5401 +1.26V_FRC
R5405 IC5403
AOZ1072AI 10K
L5403 AP7173-SPG-13 HF(DIODES)
POWER_ON/OFF2_2
L5402 3.6uH R5409 OPT10K
NR8040T3R6N [EP]
CIC21J501NE PGND LX_2
1 8 1 8 R1
THERMAL
IN OUT R5414
VIN LX_1 4.3K
2 7 R5406 1%
9
3.3K 2 7
C5406 C5407 R5404 1%
0.1uF 1uF 20K PG FB
AGND
3 2A 6
EN 10V
OPT
R5407
R1
3 6 R5415
3.9K C5412 C5414 3.9K
C5402 C5404 1% 22uF 22uF VCC SS 1%
10uF 10uF FB COMP 10V 10V R5413
25V 25V 4 5 C5410 10K 4 5 R2
R5402 C5408 100pF C5419 R5416 C5420 C5421
20K 3300pF 50V EN GND 560pF 1K 10uF 10uF
Placed on SMD-TOP 50V 1% 16V 16V
OPT EAN41406705
C5416 C5417
10uF 0.1uF
16V 16V C5418
R5408 1uF
12K 10V
1% R2
Vout=(1+R1/R2)*0.8 Vout=0.6*(1+R1/R2)
+3.3V_FRC
+12V
TYPICAL 300mA
L5401
CIC21J501NE
+3.3V_FRC
IC5402
AOZ1072AI-3
L5404
3.6uH
PGND LX_2 NR8040T3R6N
1 8
VIN LX_1
2 7 R5410
C5405 27K
1%
0.1uF R5403
AGND
3 2A 6
EN 10K POWER_ON/OFF2_2
R1
C5413
22uF
C5415
22uF
R5411 10V 10V
C5401 C5403 4.3K
1%
10uF 10uF FB COMP
25V 25V 4 5
C5411
R5401 C5409
20K 2200pF 100pF
EAN60922902 50V
OPT
R5412
10K
1% R2
Vout=0.8*(1+R1/R2)
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
USB / DVR Ready
+3.3V_Normal
IC5501 +5V_USB
AP2191DSG
L5501 R5501
NC 8 1 GND 4.7K
MLB-201209-0120P-N2 OPT
OUT_2 7 2 IN_1
120-ohm OUT_1 6 3 IN_2
C5505 R5502
C5501 FLG 5 C5502
100uF 10uF 4 EN 2.7K
16V 0.1uF
10V SIDE_USB_CTL2
3AU04S-305-ZC-(LG)
JK5501
SIDE_USB_OCD2
1
USB DOWN STREAM
WIFI_DM
RCLAMP0502BA
3
WIFI_DP
D5501 D5502
4
D5505
CDS3C05HDMI1 CDS3C05HDMI1
OPT
5.6V
5
5.6V
USB JP1201
JP1202
JP1203
+3.3V_Normal
JP1204
IC5502 +5V_USB
AP2191DSG
L5502 R5503
NC 8 1 GND
MLB-201209-0120P-N2 4.7K
OUT_2 7 OPT
2 IN_1
120-ohm OUT_1 6 3 IN_2
C5506 R5504
FLG 5 2.7K C5504
100uF C5503 4 EN
16V 10uF 0.1uF
3AU04S-305-ZC-(LG) 10V SIDE_USB_CTL1
JK5502
SIDE_USB_OCD1
1
USB DOWN STREAM
SIDE_USB_DM
RCLAMP0502BA
3
SIDE_USB_DP
D5503 D5504
D5506
4
CDS3C05HDMI1 CDS3C05HDMI1
OPT
5.6V 5.6V
5
/RST_HUB
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
THE
M1-*3 M1-*2 M1-*1 M1
MDS62110206 MDS62110204 MDS62110210 MDS62110208
GASKET_6.5T GASKET_5.5T GASKET_5.0T GASKET_4.5T
MDS62110205
GASKET_9.5T MDS62110209 GASKET_7.5T
GASKET_8.5T
M7-*6 M7-*4
MDS61887710 M7-*5 MDS62110205
GASKET_9.5T GASKET_7.5T
MDS62110209
GASKET_8.5T
M8-*6
M8-*4
MDS61887710 M8-*5 MDS62110205
GASKET_9.5T GASKET_7.5T
MDS62110209
GASKET_8.5T
M9-*6 M9-*4
MDS61887710 M9-*5 MDS62110205
GASKET_9.5T GASKET_7.5T
MDS62110209
M10-*6 GASKET_8.5T
M10-*4
MDS61887710 MDS62110205
M10-*5
GASKET_9.5T GASKET_7.5T
MDS62110209
M11-*6 GASKET_8.5T M11-*4
MDS61887710 M11-*5 MDS62110205
GASKET_9.5T GASKET_7.5T
MDS62110209
M12-*6 GASKET_8.5T
M12-*4
MDS61887710 MDS62110205
M12-*5
GASKET_9.5T GASKET_7.5T
MDS62110209
GASKET_8.5T
BCM35230
70SMD GASKET
2010. 09. 18
D
2SC3052
5V_PANEL
PANEL_DISCHARGE_REG
R558-*1
12V_PANEL12V_PANEL
R558
PANEL_DISCHARGE_REG
C560
10K
C552
OPT 1uF
25V
E L504
PWR ON 1 2 24V 10uF
MLB-201209-0120P-N2
22K
G
1/8W
1/8W
24V 24V 25V C563
R575
R576
2K
2K
3 4
GND GND 0.1uF
+3.5V_ST 5 6
L503 C519
OS Module OPT R555 50V
5V_PANEL
R559-*1
R559
1.8K
GND 7 8 GND 0.1uF
MLB-201209-0120P-N2 22K
3.5V 3.5V 50V
2.7K
9 10
3.5V 11 12 3.5V
C508 POWER_16_URSA_SCAN OPT
GND GND R574 0 C
0.1uF 13 14 L_VS R532 R554
GND GND/V-sync R573 0 100 POWER_18_INV_CTL 10K B Q506
16V 15 16 L/DIM0_VS
12V INV ON POWER_16_BCM_SCAN INV_CTL_18 2SC3052
17 18 INV_CTL_18 R533 POWER_18_A_DIM
12V A.DIM A_DIM C
19 20 A_DIM_20 0 R553 R557 E
+12V 12V 21 22 P.DIM1 47K B Q505 22K
PWM_DIM_22 POWER_20_A_DIM PANEL_CTL
L501 GND/P.DIM2 Err OUT 2SC3052
MLB-201209-0120P-N2 23 24 R531 0 A_DIM
A_DIM_20
SLIM_32~55 POWER_20_PWM_DIM E
POWER_16_GND
ERROR_OUT_24 PWM_DIM
C506 R538 0
25
R518
0.1uF
50V SMAW200-H24S2 +3.3V_Normal
0
P501
ERROR_OUT_PULL_UP
R523
4.7K
+3.5V_ST
ERROR_OUT +3.3V_Normal
#16/#20/#23
LD - GND OR USE
R529 0
POWER_20_ERROR_OUT R546
1K
R551
OPT
+1.5V_DDR Max 800mA
POWER_22_A_DIM 10K
LE(N.L.D.) - OPEN R535 0 A_DIM
PWM_DIM_22
LE(L.D.) - USE POWER_22_PWM_DIM R543
C
R547 +3.5V_ST
PWM_DIM INV_CTL
R526 0 R540 0 6.8K B 10K IC508
NON_OPC/NON_IOP +1.5V_DDR
R527 0 OPT Q504 AP7173-SPG-13 HF(DIODES)
2SC3052 L517
E R552
BLM18PG121SN1D [EP]
POWER_24_PWM_DIM 10K
OPT
Power_DET ERROR_OUT_24
POWER_24_INV_CTL IN
1 8
OUT
POWER_24_GND
100 R537
THERMAL
0
PG FB
R1
9
+12V +3.5V_ST 2 7
R517 ERROR_OUT
100K +3.5V_ST R541 0
R595
R524
POWER_24_ERROR_OUT
VCC SS 4.3K
PD_+12V PD_+3.5V R522 3 6 1%
R512 R515 10K C594 C591
2.7K 0 IC503
NCP803SN293
OPT R591
1.5A 22uF 0.1uF
1% 5% POWER_ON/OFF1 10K EN GND C593 10V 16V
<OS MODULE PIN MAP> 4 5
560pF
R593
R520 POWER_DET 3.9K
VCC RESET 100 50V 1%
3 2 R2
1 PIN No LGD CMO(09) AUO SHARP C590 R592
C580 10uF 1K
PD_+12V 0.1uF 1%
GND 10V
R513 16V
1.21K ESD INV_ON A-DIM INV_ON
18 INV_ON
1% C520
0.1uF
16V V4:VBR-A
20 V5:NC NC Err_out Err_out
PD_+18.5_20_24V
+24V R516 22 PWM_DIM PWM_DIM A-DIM PWM_DIM
100K
PD_+18.5V PD_+18.5_20_24V
not to RESET at 8kV ESD
24
Err_out
LED:GND INV_ON PWM_DIM GND Vout=0.8*(1+R1/R2)
PD_+20V
R510-*4 R510-*3 PD_24V IC502
5.6K 4.7K R510 NCP803SN293
1% 1% 8.2K
1% R519
CHECK PWR/MODULE PIN MAP
VCC 3 2 RESET 100 15V-->3.6V
20V-->3.5V
PD_+20V PD_+18.5V 1 PD_+18.5_20_24V
R511-*4 R511-*3
PD_24V C581 24V-->3.48V
1.3K
1%
1.21K
R511
1.5K
0.1uF
16V
GND
12V-->3.58V
ST_3.5V-->3.5V
+5V_Normal MAX 1A
1% 1% PD_+18.5_20_24V
+12V +3.3V_NORMAL MAX 2.8A
+5V_Normal
+12V IC507
L507
AOZ1073AIL-3
IC505
BLM18PG121SN1D [EP]PGND TPS54425PWPR +3.3V_Normal L516
+0.9V_CORE_BCM35230 VIN2 VO
L514
BLM18PG121SN1D
PGND
1 8
LX_2 3.6uH
14 1 NR8040T3R6N
VIN LX_1
THERMAL
+12V 2 7
R570
R534
1%
51K
15
3.6K
L502 VBST VREG5 C546 R566
1%
0
R571
OPT OPT 12 3 10K
BLM18PG121SN1D Max 7350 mA R2 10uF
FB COMP R564 12K
1/10W C512 16V
5% SW2
4A SS
1uF
25V R530
4 5
C557
OPT
C559
C511 11 4 33K 0.1uF C565
Placed on SMD-TOP 1% 2200pF 100pF
0.1uF R521 C595 16V
50V 22pF 50V
SW1 GND 0 R1
10 5 50V OPT
R509 C514 R525
3300pF 330
100K 1%
PGND2 PG 50V
C503 C505 9 6
10uF 10uF
R572
16V 16V
1%
10K
PGND1 EN R514 10K
8 7
C537
POWER_ON/OFF2_2
R2
0.1uF +3.3V_Normal
OPT
Vout=0.8*(1+R1/R2) Switching freq: 500K
POWER_ON/OFF2_2 Q503
AON7430
L508
2uH
R503
D 5 4
3
G
S_3
C517
22uF
10V
C518
22uF
10V +12V
+5V_USB+WIFI MAX 1.9A
1K
IC501
TPS40192DRCR EP_GND
C504
100pF
2 S_2
Vout=0.8*(1+R1/R2) L513 +5V_USB
+0.9V_CORE
50V ENABLE HDRV 1 S_1 CIC21J501NE
1 10 R577 4.7 L505 IC506
+2.5V_BCM35230 MP8706EN-C247-LF-Z
THERMAL
0.9V_CORE_FB +2.5V_BCM35230
Max 960 mA
11
FB SW
0.47uF
2 9 1uH OPT
OPT
C515
C523 IN GND
2K 0.01uF 22uF 22uF 47uF 10uF IC504 1 8
50V COMP BOOT
3 8 10V 10V 10V 10V AP2132MP-2.5TRG1 [EP] C528
R549
OPT
1%
33K
C509 50V 1uF C529
220pF G 4 5 D +3.5V_ST SW_1 VCC C530 C532 C534 C536
2 7 50V 100pF 100pF 22uF 0.1uF 0.1uF
VDD LDRV
+3.3V_Normal 4 7 R578 4.7 C521 50V 50V 10V 16V 16V
4.7uF
1 8 R1
3A R542
C516
S_2 2 2 7 1%
0.1uF POWER_ON/OFF2_1
C513 BST EN/SYNC
R550
6.2K
C507 0.1uF EN ADJ R545
1%
4 5
1000pF 16V S_1 1 56K R1
50V R506 3 6 1% R539 R548
330 22 10K
R536
EAN31346002
R2
10K
Vout=0.6*(1+R1/R2) Vout=0.8*(1+R1/R2)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS BCM35230
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER 5 58
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
LCD TV Repair Guide
`11 years New Models
T : UK T2/C
W : Nordic T2/C
S : Satellite
G : MHP
XXLW5500/T/W/S-ZA 1
XXLW650W/G/S-ZA
XXLW570G/S-ZA
XXLV5500/T/W/G-ZA 1
XXLV570G/S-ZA
2 Power Board
3
6 3 Soft touch + IR Key PCB
1
2 1
[Cables]
1 Main / PSU cable
T-con Driver
3 Main / Module LVDS cable
4 2
41&51PIN
3 LED driver / PSU
5 SPK Cable
2 Power Board
3
6 3 Soft touch + IR Key PCB
(LV570 only IR Assy)
1
2 1
[Cables]
1 Main / PSU cable
T-con Driver
3 Main / Module LVDS cable
4 2
41&51PIN
3 LED driver / PSU
2 Power Board
3
3 Soft touch + IR Key PCB
6 (LW570 only IR Assy)
LED Driver 1
2
1
2
[Cables]
1 Main / PSU cable
T-con Driver
Main / Module LVDS cable
5 4 2
3 41&51PIN
3 LED driver / PSU
5 SPK Cable
1 No video/Normal audio 1
2 No video/No audio 2
4 Color error 5
First of all, Check whether there is SVC Bulletin in GCSC System for these model.
Copyright © 2011 LG Electronics. Inc. All rights reserved.
LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error A. Video error date 2010. 12 .14
LCD TV symptom
No video/ Normal audio Revised date 1/14
First of all, Check whether all of cables between board is inserted properly or not.
(Main B/D↔ Power B/D, LVDS Cable,Speaker Cable,IR B/D Cable,,,)
☞A1 ☞A4
Y
No video Normal Check Back Light Y Check Power Normal Y Replace T-con
Normal audio On Board or module
audio On with naked eye Board voltage
12v,3.5v etc. And Adjust VCOM
N N N ☞A28
Move to No
☞A2 Check Power Board 24v output Repair Power
video/No audio Board or parts
Y
Repair Power
Board or parts
Established
Error A. Video error date 2010. 12 .14
LCD TV symptom
No video/ No audio Revised date 2/14
☞A4
Check various Check and
Normal Y
No Video/ voltages of Power replace
No audio Board ( 3.5V,12V,20V voltage?
MAIN B/D
or 24V…)
N End
Replace Power
Board and repair
parts
Established
Error A. Picture Problem date 2010. 12 .14
LCD TV symptom
Picture broken/ Freezing Revised date 3/14
N
■ Menu→Setup →Booster
☞ A7
Check RF Cable
Y N Booster menu Y
Connection Normal Check SVC Normal
On→Off: Check Close
1. Reconnection Picture? S/W Version Bulletin? Picture?
Off→On: Check
2. Install Booster
N Y N
Established
Error A. Picture Problem (DVB-S/S2) date 2011. 01 .24
LCD TV symptom
Tuning fail, Picture broken/ Freezing Revised date 4/14
Contact with
Change satellite setting N
signal distributor Normal
(match with installed ANT)
or broadcaster Picture?
(Cable or Air)
Y
Normal N
Picture? Close
Close
Y
Close
Established
Error A. Video error date 2010. 12 .14
LCD TV symptom
Color error Revised date 5/14
☞A8
☞ A10/ A11
※ Check Y
Check color by input
and replace
-External Input Y Y
Color Link Cable Color Color
-COMPONENT Replace Main B/D Replace module
error? (LVDS) and error? error?
-RGB
contact
-HDMI/DVI N N N
condition
☞A12 Check
External Input/ External device Y
external
Check Test pattern Component /Cable Replace Main B/D
device and
error normal
cable
N
Request repair
for external
device/cable
Established
Error B. Power error date 2010. 12 .14
LCD TV symptom
No power Revised date 7/14
☞A17 ☞A19
DC Power on
Check Power Y Normal N Check Power Y Replace
by pressing Power Key OK?
Power LED LED On? operation? On ‘”High” Power B/D
On Remote control
. Stand-By: Red N N
Y
. Operating: white
Check Power cord Replace Main B/D
was inserted properly
☞A4
Measure voltage of each
Normal? output of Power B/D
Y
Y
Y
※ Normal
voltage?
Replace Main B/D
Close Normal
Check ST-BY 3.5V
Y
voltage?
N
☞A18 N
Replace Power B/D
N
Replace Power
B/D
Established
Error B. Power error date 2010. 12 .14
LCD TV symptom
Off when on, off while viewing, power auto on/off Revised date 8/14
Check outlet
☞A22
N Y
Check A/C cord Error? Check Power Off CPU Normal? End
Replace Main B/D
Mode Abnormal
N
Check for all 3- phase
power out Y Abnormal Replace Power B/D
1
Established
Error C. Audio error date 2010. 12 .14
LCD TV symptom
No audio/ Normal video Revised date 9/14
☞A24 ☞A25
Check user N Check audio B+ Y
No audio Normal
menu > Off 24V of Power
Screen normal voltage
Speaker off Board
Y N
Check N
Disconnection Replace MAIN Board End
Speaker
disconnection
Y
Replace Speaker
Established
Error C. Audio error date 2010. 12 .14
LCD TV symptom
Wrecked audio/ discontinuation/noise Revised date 10/14
☞A25
Wrecked audio/
Check and replace
Discontinuation/ Check audio
speaker and
Noise for B+ Voltage (24V)
connector
Check input all audio
signal Y Y
Signal
-RF
normal? Wrecked audio/
-External Input Normal
signal Discontinuation/
N Replace Main B/D voltage?
Noise only
for D-TV
N
Wrecked audio/
Discontinuation/
Replace Power B/D
Noise only
for Analog
(When RF signal is not
received)
Request repair to external Wrecked audio/ Replace Main B/D End
cable/ANT provider Discontinuation/
Noise only
(In case of for External Input
N
External Input Connect and check Normal
signal error) other external audio?
Check and fix device
external device Y
Replace R/C
Established
Error D. Function error date 2010. 12 .14
LCD TV symptom
External device recognition error Revised date 12/14
Y Check technical
Check External Input and
Signal information Technical N
input Component Replace Main B/D
input? - Fix information information?
signal Recognition error
- S/W Version
N Y
RGB,HDMI/
Check and fix DVI, Optical
Fix in Replace Main B/D
external device/cable Recognition error
accordance
with technical
information
Established
Error E. Noise date 2010. 12 .14
LCD TV symptom
Circuit noise, mechanical noise Revised date 13/14
Established
Error F. Exterior defect date 2010. 12 .14
LCD TV symptom
Exterior defect Revised date 14/14
Cabinet
damage Replace cabinet
Remote
controller Replace remote controller
damage
Stand
dent Replace stand