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1
www.qdzbwx.com 1
Compal Confidential 2
Rev: 1.A
2017.04.18
4 4
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: W ednesday, May 03, 2017 Sheet 1 of 57
A B C D E
A B C D E
page 19
page 29 page 28 Memory BUS
1
DDI1 Dual Channel 1
260pin DDR4-SO-DIMM X1
www.qdzbwx.com HDMI x 4 lanes
eDP Intel Kabylake U 1.2V DDR4 1866/2133
DDI page 20
Kabylake U
Kabylake PCH-LP(MCP) USB 3.0 USB 2.0 CMOS USB TypeC
eMMC eMMC conn x2
conn x1 USB2 conn x1
page 34 (KBL-U_2+2) USB3 port 1
port3,4 Camera USB3 port 2,3
Nvidia N16S-GTR / on Sub/B USB2 port 7 USB2 port2
N17S-G1 (KBL-RU_4+2) USB2 port 1
with GDDR5page
x2 21~27
page 31
Processor
PCIe 3.0 x 4
8GT/s PCIE 3.0 x4 Dual Core + GT2
8GT/s Flexible IO
2
port 1-4 Port 9-12 Base-U PCIE2.0 Quad Core + GT2 2
Premium-U PCIE3.0
page 36 page 36 page 28 page 35
page 33
page 33
CLK=24MHz 64Mb page 9
ENE
KB9022 Int. Speaker Int. DMIC UAJ
page 37
on Camera on Sub/B
page 32 page 28 page 36
RTC CKT. Fan Control
page 39 Touch Pad
page 15
PS2 (from EC) / I2C (from SOC)
Int.KBD USB2 port 8 (FP)
page 40
LS-E892
Hall Sensor/B Security Classification Compal Secret Data Compal Electronics, Inc.
Power Circuit DC/DC page 38
Issued Date 2016/11/04 Deciphered Date 2018/11/04 Title
Block Diagrams
page 41~54 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 2 of 57
A B C D E
A B C D E
4 27K +/- 1% 0.691 V 0.702 V 0.713 V 0x31 - 0x3A 1.A(EA17PVT) S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
5 33K +/- 1% 0.807 V 0.819 V 0.831 V 0x3B - 0x45 1.A(EA17MP) S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF
6 43K +/- 1% 0.978 V 0.992 V 1.006 V 0x46 - 0x54
7 56K +/- 1% 1.169 V 1.185 V 1.200 V 0x55 - 0x64
Voltage Rails
Power Plane Description S0 S3 S4/S5
For Intel CMC CMC@ D7W01 EA17@ +1.2V_VDDQ DDR4 +1.2V Power Rail ON ON OFF
LAN Mode Select SWR@ / LDO@ D7W01 MB Stage EA17PVT@/EA17MP@ +1.8VALW_PRIM +1.8V Always power rail ON ON ON*1
EMI requirement EMI@ / @EMI@ N16SGTR or N17SG1 N16SGTR@ / N17SG1@ +1.8VS System +1.8V power rail ON OFF OFF
ESD requirement ESD@ / @ESD@ BOM Select X76@ +3VLP +19VB to +3VLP power rail for suspend power ON ON ON
RF requirement @RF@ VRAM BOM Select X7604@ ~ X7609@ +3VALW System +3VALW always on power rail ON ON ON*1
CPU Selection U42@/U22@ Memory Select X7601@ ~ X7603@ +3VS System +3V power rail ON OFF OFF
SkyLake or KabyLake SKL@ / KBL@ Memory Mode SDP@ / DDP@ +5VALW +5V Always power rail ON ON ON
TPM TPM@ +5VS System +5V power rail ON OFF OFF
Finger Print FP@/FPEMC@ CPU Code SR2UW@ +RTCVCC RTC Battery Power ON ON ON
UMA or DGPU UMA@/VGA@ QLDP@/QLDM@/QLDN@ +1.05VS_1.0VSDGPU +1.05VS power rail for N16X/ +1.0VS power rail for N17S ON*2 OFF OFF
DGPU Serial Select N16X@/N17S@ QLYK@/QLYJ@/QLYH@
+1.35VSDGPU +1.35VS power rail for GPU ON*2 OFF OFF
SR2ZW@/SR2ZU@/SR2ZV@ +3VS_1.8VSDGPU_AON +3VS power rail for N16X/ +1.8VS power rail for N17S(AON) ON*2 OFF OFF
SR343@/SR342@/SR341@ +3VS_1.8VSDGPU_MAIN +3VS power rail for N16X/ +1.8VS power rail for N17S(MAIN) ON*2 OFF OFF
QN5D@/QN5C@ +VGA_CORE Core power for descrete GPU ON*2 OFF OFF
3 3
Note : ON*1 means power plane is ON only when WOL enable and RTC wake at BIOS setting, otherwise it is OFF.
ON*2 power plane is ON when DGPU turn on
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 20, 2017 Sheet 3 of 57
A B C D E
A B C D E
NCP81253MNTBG
(PU902) U42@
JUMP
(PJ9001) U42 JUMP@ +VCC_GT_VCORE www.qdzbwx.com
NCP81151MNTBG JUMP
+VCC_GT (PJ9002) U22 JUMP@
(PU903)
NCP81253MNTBG R-Short
+TS_PWR
(PU904) +VCC_SA R-Short (RX8)
(RC208) +1.2V_VDDQC
ADAPTER
SYSON JUMP
AP2330W
1
JUMP R-Short +HDMI_5V_OUT 1
0 ohm
EN_1VALW JUMP (R2)EMMC@ +1.8VS_EMMC
SY8288RAC R-Short
3
(PU601) +1.0VALWP (PJ601) +1.0VALW_PRIM (RC148) +1.0VALW_APLL 3
JUMP
(JPC9) +1.0VALW_MPHYPLL
R-Short R-Short
(RC162) +1.0VALW_DTS (RC176) +1.0VALW_SRAM
R-Short R-Short
(RC169) +1.0VALW_CLK6_24TBT (RC156) +1.0VALW_APLLEBB
R-Short R-Short
(RC164) +1.0VALW_VCCCLK2 (RC209) +1.0VALW_MPHYGT
R-Short R-Short
(RC190) +1.0VALW_CLK4_F100OC (RC149) +1.0VALW_AMPHYPLL
R-Short
(RC152) +1.0VALW_CLK5_F24NS
R-Short R-Short
(RC175) +1.0VALW_MPHYAON (RC143) +1.0V_VCCSFR
SYSON EM5209VF R-Short
+1.0V_VCCSTU +1.0V_VCCST
(UC5) (RC140)
SUSP# AOZ1334DI-02 R-Short
(UC6) +1.0VS_VCCSTG_IO (RC188) +1.0VS_VCCSTG
JUMP
(JPC5) +VCCIO
1.35VS_DGPU_PWR_EN SY8286RAC JUMP
(PU1001) VGA@ +1.35VSDGPUP (PJ1002) +1.35VSDGPU
4 4
3_1.8VSDGPU_MAIN_EN RT8812AGQW
(PU1201)N16S_ VGA@ +VGA_CORE
RT8816AGQW
(PU1201) N17S_VGA@
EN_12VSP HCB2012KF
(LX1) EMI@ +INVPWR_B+ Security Classification Compal Secret Data Compal Electronics, Inc.
2016/11/04 2018/11/04 Title
Issued Date Deciphered Date Power Rail
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date : Thursday, April 06, 2017 Sheet 4 of 57
A B C D E
A B C D E
R7 SOC_SMBCLK
SOC_SMBDATA 2N7002DW
1 SO-DIMM 1
R8
Kabylake
SOC
SOC_SML0CLK 499
R9 G-Sensor
499
+3VALW_PRIM
W2 SOC_SML0DATA
2.2K
2.2K
2.2K
+3VSDGPU_AON
2.2K
+3VALW_PRIM
W3 SOC_SML1CLK I2CS_SCL
2N7002DW GPU
V3 SOC_SML1DATA I2CS_SDA
2 2
2.2K
2.2K
+3VLP_EC
9
8 Charger
SDA2 80 SOC_SML1DATA
3
KB9022 Need check
3
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SMBUS_Routing_Table
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 5 of 57
A B C D E
A B C D E
www.qdzbwx.com
PWR Sequence_SKL-U2+2_DDR3L_Value_NON CS
+RTCVCC
tPCH01_Min : 9 ms
SOC_RTCRST#
1 1
+19VB
+3VLP
EC_ON
tPCH04_Min : 9 ms
+5VALW/+3VALW(+3VALW_DSW...)
tPCH34_Max : 20 ms
SPOK tPCH06_Min : 200 us (+3VALW stable (@95% of full value) to +1.0VALW_PRIM starting to ramp)
+1.8VALW_PRIM
+1.8VALW_PG
+VCCPRIM_CORE/+1.0VALW_PRIM
tPCH03_Min : 10 ms
EC_RSMRST#
ON/OFF
2
PBTN_OUT# tPCH43_Min : 95 ms 2
Minimum duration of PWRBTN# assertion = 16mS. PWRBTN# can assert before or after RSMRST#
PM_SLP_S5#
tPCH18_Min : 90 us
ESPI_RST#
PM_SLP_S4#
SYSON
+1.0V_VCCSTU
+1.2V_VDDQ
PM_SLP_S3#
SUSP#
tCPU04 Min : 100 ns
+1.0VS_VCCSTG
tCPU10 Min : 1 ms
+VCCIO
3 3
+5VS/+3VS/+1.8VS/+1.5VS
tCPU00 Min : 1 ms
EC_VCCST_PG
VR_ON
tCPU19 Max : 100 ns
SM_PG_CTRL
tCPU18 Max : 35 us
+0.6VS_VTT
tCPU09 Min : 1 ms
+VCC_SA
VR_PWRGD
tCPU16 Min : 0 ns
PCH_PWROK (SYS_PWROK) tPLT05 Min : Platform dependent
H_CPUPWRGD
PLT_RST#
+VCC_CORE / +VCC_GT
4 4
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Sequence
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 6 of 57
A B C D E
A B C D E
www.qdzbwx.com
1 1
UC1A SKL-U
Rev_0.53
E55 C47
29 SOC_DP1_N0 F55 DDI1_TXN[0] EDP_TXN[0] C46 EDP_TXN0 28
29 SOC_DP1_P0 E58 DDI1_TXP[0] EDP_TXP[0] D46 EDP_TXP0 28
29 SOC_DP1_N1 F58 DDI1_TXN[1] EDP_TXN[1] C45 EDP_TXN1 28
29 SOC_DP1_P1 F53 DDI1_TXP[1] EDP_TXP[1] A45 EDP_TXP1 28
HDMI 29 SOC_DP1_N2 G53 DDI1_TXN[2] EDP_TXN[2] B45 EDP_TXN2 28 eDP
Functional Strap Definitions 29
29
SOC_DP1_P2
SOC_DP1_N3
F56 DDI1_TXP[2]
DDI1_TXN[3]
EDP_TXP[2]
EDP_TXN[3]
A47 EDP_TXP2
EDP_TXN3
28
28
G56 B47
29 SOC_DP1_P3 DDI1_TXP[3] EDP_TXP[3] EDP_TXP3 28
#543016 PDG2.0 P.844 C50 E45
EDP_AUXN 28
D50 DDI2_TXN[0] DDI EDP EDP_AUXN F45
DDPB_CTRLDATA C52 DDI2_TXP[0] EDP_AUXP EDP_AUXP 28
DDI2_TXN[1]
DDPC_CTRLDATA D52
A50 DDI2_TXP[1] EDP_DISP_UTIL
B52
4 4
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SKL-U(1/12)DDI,MSIC,XDP,EDP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 7 of 57
A B C D E
A B C D E
Interleaved Memory
UC1B SKL-U
Rev_0.53
DDR_A_CLK#0
www.qdzbwx.com
UC1C
SKL-U
Rev_0.53
AU53
19 DDR_A_D[0..15] DDR_A_D0 DDR0_CKN[0] DDR_A_CLK0 DDR_A_CLK#0 19 20 DDR_B_D[0..15] DDR_B_D0 DDR_B_CLK#0
AL71 AT53 AF65 AN45
DDR_A_D1 DDR0_DQ[0] DDR0_CKP[0] DDR_A_CLK#1 DDR_A_CLK0 19 DDR_B_D1 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] DDR_B_CLK#1 DDR_B_CLK#0 20
AL68 AU55 AF64 AN46
DDR_A_D2 DDR0_DQ[1] DDR0_CKN[1] DDR_A_CLK1 @ T240 DDR_B_D2 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[1] DDR_B_CLK0 DDR_B_CLK#1 20
AN68 AT55 AK65 AP45
DDR_A_D3 DDR0_DQ[2] DDR0_CKP[1] @ T241 DDR_B_D3 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[0] DDR_B_CLK1 DDR_B_CLK0 20
AN69 AK64 AP46
DDR_A_D4 DDR0_DQ[3] DDR_A_CKE0 DDR_B_D4 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] DDR_B_CLK1 20
AL70 BA56 AF66
DDR_A_D5 DDR0_DQ[4] DDR0_CKE[0] DDR_A_CKE1 DDR_A_CKE0 19 DDR_B_D5 DDR1_DQ[4]/DDR0_DQ[20] DDR_B_CKE0
AL69 BB56 AF67 AN56
DDR_A_D6 DDR0_DQ[5] DDR0_CKE[1] @ T247 DDR_B_D6 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKE[0] DDR_B_CKE1 DDR_B_CKE0 20
AN70 AW56 AK67 AP55
1 DDR_A_D7 DDR0_DQ[6] DDR0_CKE[2] @ T14 DDR_B_D7 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1] DDR_B_CKE1 20 1
AN71 AY56 AK66 AN55
DDR_A_D8 DDR0_DQ[7] DDR0_CKE[3] @ T15 DDR_B_D8 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKE[2] @ T17
AR70 AF70 AP53
DDR_A_D9 DDR0_DQ[8] DDR_A_CS#0 DDR_B_D9 DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3] @ T18
AR68 AU45 AF68
DDR_A_D10 DDR0_DQ[9] DDR0_CS#[0] DDR_A_CS#1 DDR_A_CS#0 19 DDR_B_D10 DDR1_DQ[9]/DDR0_DQ[25] DDR_B_CS#0
AU71 AU43 AH71 BB42
DDR_A_D11 DDR0_DQ[10] DDR0_CS#[1] DDR_A_ODT0 @ T242 DDR_B_D11 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[0] DDR_B_CS#1 DDR_B_CS#0 20
AU68 AT45 AH68 AY42
DDR_A_D12 DDR0_DQ[11] DDR0_ODT[0] DDR_A_ODT1 DDR_A_ODT0 19 DDR_B_D12 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CS#[1] DDR_B_ODT0 DDR_B_CS#1 20
AR71 AT43 AF71 BA42
DDR_A_D13 DDR0_DQ[12] DDR0_ODT[1] @ T243 DDR_B_D13 DDR1_DQ[12]/DDR0_DQ[28] DDR1_ODT[0] DDR_B_ODT1 DDR_B_ODT0 20
AR69 AF69 AW42
DDR_A_D14 DDR0_DQ[13] DDR_A_MA5 DDR_B_D14 DDR1_DQ[13]/DDR0_DQ[29] DDR1_ODT[1] DDR_B_ODT1 20
AU70 BA51 AH70
DDR_A_D15 DDR0_DQ[14] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR_A_MA9 DDR_A_MA5 19 DDR_B_D15 DDR1_DQ[14]/DDR0_DQ[30] DDR_B_MA5
AU69 BB54 AH69 AY48
19 DDR_A_D[16..31] DDR_A_D16 DDR0_DQ[15] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR_A_MA6 DDR_A_MA9 19 20 DDR_B_D[16..31] DDR_B_D16 DDR1_DQ[15]/DDR0_DQ[31] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR_B_MA9 DDR_B_MA5 20
BB65 BA52 AT66 AP50
DDR_A_D17 DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR_A_MA8 DDR_A_MA6 19 DDR_B_D17 DDR1_DQ[16]/DDR0_DQ[48] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR_B_MA6 DDR_B_MA9 20
AW65 AY52 AU66 BA48
DDR_A_D18 DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR_A_MA7 DDR_A_MA8 19 DDR_B_D18 DDR1_DQ[17]/DDR0_DQ[49] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR_B_MA8 DDR_B_MA6 20
AW63 AW52 AP65 BB48
DDR_A_D19 DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR_A_BG0 DDR_A_MA7 19 DDR_B_D19 DDR1_DQ[18]/DDR0_DQ[50] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR_B_MA7 DDR_B_MA8 20
AY63 AY55 AN65 AP48
DDR_A_D20 DDR0_DQ[19]/DDR0_DQ[35] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR_A_MA12 DDR_A_BG0 19 DDR_B_D20 DDR1_DQ[19]/DDR0_DQ[51] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR_B_BG0 DDR_B_MA7 20
BA65 AW54 AN66 AP52
DDR_A_D21 DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR_A_MA11 DDR_A_MA12 19 DDR_B_D21 DDR1_DQ[20]/DDR0_DQ[52] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR_B_MA12 DDR_B_BG0 20
AY65 BA54 AP66 AN50
DDR_A_D22 DDR0_DQ[21]/DDR0_DQ[37] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR_A_ACT# DDR_A_MA11 19 DDR_B_D22 DDR1_DQ[21]/DDR0_DQ[53] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR_B_MA11 DDR_B_MA12 20
BA63 BA55 AT65 AN48
DDR_A_D23 DDR0_DQ[22]/DDR0_DQ[38] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR_A_BG1 DDR_A_ACT# 19 DDR_B_D23 DDR1_DQ[22]/DDR0_DQ[54] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] DDR_B_ACT# DDR_B_MA11 20
BB63 AY54 AU65 AN53
DDR_A_D24 DDR0_DQ[23]/DDR0_DQ[39] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR_A_BG1 19 DDR_B_D24 DDR1_DQ[23]/DDR0_DQ[55] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR_B_BG1 DDR_B_ACT# 20
BA61 AT61 AN52
DDR_A_D25 DDR0_DQ[24]/DDR0_DQ[40] DDR_A_MA13 DDR_B_D25 DDR1_DQ[24]/DDR0_DQ[56] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR_B_BG1 20
AW61 AU46 AU61
DDR_A_D26 DDR0_DQ[25]/DDR0_DQ[41] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDR_A_MA15 DDR_A_MA13 19 DDR_B_D26 DDR1_DQ[25]/DDR0_DQ[57] DDR_B_MA13
BB59 AU48 AP60 BA43
DDR_A_D27 DDR0_DQ[26]/DDR0_DQ[42] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDR_A_MA14 DDR_A_MA15 19 DDR_B_D27 DDR1_DQ[26]/DDR0_DQ[58] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] DDR_B_MA15 DDR_B_MA13 20
AW59 AT46 AN60 AY43
DDR_A_D28 DDR0_DQ[27]/DDR0_DQ[43] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] DDR_A_MA16 DDR_A_MA14 19 DDR_B_D28 DDR1_DQ[27]/DDR0_DQ[59] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] DDR_B_MA14 DDR_B_MA15 20
BB61 AU50 AN61 AY44
DDR_A_D29 DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDR_A_BA0 DDR_A_MA16 19 DDR_B_D29 DDR1_DQ[28]/DDR0_DQ[60] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] DDR_B_MA16 DDR_B_MA14 20
AY61 AU52 AP61 AW44
DDR_A_D30 DDR0_DQ[29]/DDR0_DQ[45] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR_A_MA2 DDR_A_BA0 19 DDR_B_D30 DDR1_DQ[29]/DDR0_DQ[61] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] DDR_B_BA0 DDR_B_MA16 20
BA59 AY51 AT60 BB44
DDR_A_D31 DDR0_DQ[30]/DDR0_DQ[46] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR_A_BA1 DDR_A_MA2 19 DDR_B_D31 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] DDR_B_MA2 DDR_B_BA0 20
AY59 AT48 AU60 AY47
19 DDR_A_D[32..47] DDR_A_D32 DDR0_DQ[31]/DDR0_DQ[47] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR_A_MA10 DDR_A_BA1 19 20 DDR_B_D[32..47] DDR_B_D32 DDR1_DQ[31]/DDR0_DQ[63] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] DDR_B_BA1 DDR_B_MA2 20
AY39 AT50 AU40 BA44
DDR_A_D33 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR_A_MA1 DDR_A_MA10 19 DDR_B_D33 DDR1_DQ[32]/DDR1_DQ[16] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR_B_MA10 DDR_B_BA1 20
AW39 BB50 AT40 AW46
DDR_A_D34 DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR_A_MA0 DDR_A_MA1 19 DDR_B_D34 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] DDR_B_MA1 DDR_B_MA10 20
AY37 AY50 AT37 AY46
DDR_A_D35 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR_A_MA3 DDR_A_MA0 19 DDR_B_D35 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR_B_MA0 DDR_B_MA1 20
AW37 BA50 AU37 BA46
DDR_A_D36 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] DDR_A_MA4 DDR_A_MA3 19 DDR_B_D36 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] DDR_B_MA3 DDR_B_MA0 20
BB39 BB52 AR40 BB46
DDR_A_D37 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] DDR_A_MA4 19 DDR_B_D37 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[3] DDR_B_MA4 DDR_B_MA3 20
BA39 AP40 BA47
DDR_A_D38 DDR0_DQ[37]/DDR1_DQ[5] DDR_A_DQS#0 DDR_B_D38 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[4] DDR_B_MA4 20
BA37 AM70 AP37
2 DDR_A_D39 DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQSN[0] DDR_A_DQS0 DDR_A_DQS#0 19 DDR_B_D39 DDR1_DQ[38]/DDR1_DQ[22] DDR_B_DQS#0 2
BB37 AM69 AR37 AH66
DDR_A_D40 DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQSP[0] DDR_A_DQS#1 DDR_A_DQS0 19 DDR_B_D40 DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQSN[0]/DDR0_DQSN[2] DDR_B_DQS0 DDR_B_DQS#0 20
AY35 AT69 AT33 AH65
DDR_A_D41 DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQSN[1] DDR_A_DQS1 DDR_A_DQS#1 19 DDR_B_D41 DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQSP[0]/DDR0_DQSP[2] DDR_B_DQS#1 DDR_B_DQS0 20
AW35 AT70 AU33 AG69
DDR_A_D42 DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQSP[1] DDR_A_DQS#2 DDR_A_DQS1 19 DDR_B_D42 DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[1]/DDR0_DQSN[3] DDR_B_DQS1 DDR_B_DQS#1 20
AY33 BA64 AU30 AG70
DDR_A_D43 DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQSN[2]/DDR0_DQSN[4] DDR_A_DQS2 DDR_A_DQS#2 19 DDR_B_D43 DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[1]/DDR0_DQSP[3] DDR_B_DQS#2 DDR_B_DQS1 20
AW33 AY64 AT30 AR66
DDR_A_D44 DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQSP[2]/DDR0_DQSP[4] DDR_A_DQS#3 DDR_A_DQS2 19 DDR_B_D44 DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQSN[2]/DDR0_DQSN[6] DDR_B_DQS2 DDR_B_DQS#2 20
BB35 AY60 AR33 AR65
DDR_A_D45 DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQSN[3]/DDR0_DQSN[5] DDR_A_DQS3 DDR_A_DQS#3 19 DDR_B_D45 DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQSP[2]/DDR0_DQSP[6] DDR_B_DQS#3 DDR_B_DQS2 20
BA35 BA60 AP33 AR61
DDR_A_D46 DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQSP[3]/DDR0_DQSP[5] DDR_A_DQS#4 DDR_A_DQS3 19 DDR_B_D46 DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQSN[3]/DDR0_DQSN[7] DDR_B_DQS3 DDR_B_DQS#3 20
BA33 BA38 AR30 AR60
DDR_A_D47 DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQSN[4]/DDR1_DQSN[0] DDR_A_DQS4 DDR_A_DQS#4 19 DDR_B_D47 DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQSP[3]/DDR0_DQSP[7] DDR_B_DQS#4 DDR_B_DQS3 20
BB33 AY38 AP30 AT38
19 DDR_A_D[48..63] DDR_A_D48 DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQSP[4]/DDR1_DQSP[0] DDR_A_DQS#5 DDR_A_DQS4 19 20 DDR_B_D[48..63] DDR_B_D48 DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQSN[4]/DDR1_DQSN[2] DDR_B_DQS4 DDR_B_DQS#4 20
AY31 AY34 AU27 AR38
DDR_A_D49 DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQSN[5]/DDR1_DQSN[1] DDR_A_DQS5 DDR_A_DQS#5 19 DDR_B_D49 DDR1_DQ[48] DDR1_DQSP[4]/DDR1_DQSP[2] DDR_B_DQS#5 DDR_B_DQS4 20
AW31 BA34 AT27 AT32
DDR_A_D50 DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQSP[5]/DDR1_DQSP[1] DDR_A_DQS#6 DDR_A_DQS5 19 DDR_B_D50 DDR1_DQ[49] DDR1_DQSN[5]/DDR1_DQSN[3] DDR_B_DQS5 DDR_B_DQS#5 20
AY29 BA30 AT25 AR32
DDR_A_D51 DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQSN[6]/DDR1_DQSN[4] DDR_A_DQS6 DDR_A_DQS#6 19 DDR_B_D51 DDR1_DQ[50] DDR1_DQSP[5]/DDR1_DQSP[3] DDR_B_DQS#6 DDR_B_DQS5 20
AW29 AY30 AU25 AR25
DDR_A_D52 DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQSP[6]/DDR1_DQSP[4] DDR_A_DQS#7 DDR_A_DQS6 19 DDR_B_D52 DDR1_DQ[51] DDR1_DQSN[6] DDR_B_DQS6 DDR_B_DQS#6 20
BB31 AY26 AP27 AR27
DDR_A_D53 DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQSN[7]/DDR1_DQSN[5] DDR_A_DQS7 DDR_A_DQS#7 19 DDR_B_D53 DDR1_DQ[52] DDR1_DQSP[6] DDR_B_DQS#7 DDR_B_DQS6 20
BA31 BA26 AN27 AR22
DDR_A_D54 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSP[7]/DDR1_DQSP[5] DDR_A_DQS7 19 DDR_B_D54 DDR1_DQ[53] DDR1_DQSN[7] DDR_B_DQS7 DDR_B_DQS#7 20
BA29 AN25 AR21
DDR_A_D55 DDR0_DQ[54]/DDR1_DQ[38] DDR_A_ALERT# DDR_B_D55 DDR1_DQ[54] DDR1_DQSP[7] DDR_B_DQS7 20
BB29 AW50 AP25
DDR_A_D56 DDR0_DQ[55]/DDR1_DQ[39] DDR0_ALERT# DDR_A_PAR DDR_A_ALERT# 19 DDR_B_D56 DDR1_DQ[55] DDR_B_ALERT#
AY27 AT52 AT22 AN43
DDR_A_D57 DDR0_DQ[56]/DDR1_DQ[40] DDR0_PAR DDR_A_PAR 19 DDR_B_D57 DDR1_DQ[56] DDR1_ALERT# DDR_B_PAR DDR_B_ALERT# 20
AW27 AU22 AP43
DDR_A_D58 DDR0_DQ[57]/DDR1_DQ[41] +0.6V_A_VREFCA DDR_B_D58 DDR1_DQ[57] DDR1_PAR DDR_B_PAR 20
AY25 AY67 AU21 AT13
DDR_A_D59 DDR0_DQ[58]/DDR1_DQ[42] DDR_VREF_CA +0.6V_A_VREFCA DDR_B_D59 DDR1_DQ[58] DRAM_RESET# SM_RCOMP0 DDR_DRAMRST# 19,20
AW25 AY68 AT21 AR18
DDR_A_D60 BB27 DDR0_DQ[59]/DDR1_DQ[43] DDR CH - A
DDR0_VREF_DQ BA67 +0.6V_B_VREFCA DDR_B_D60 AN22 DDR1_DQ[59] DDR_RCOMP[0] AT18 SM_RCOMP1
DDR_A_D61 DDR0_DQ[60]/DDR1_DQ[44] DDR1_VREF_DQ +0.6V_B_VREFCA DDR_B_D61 DDR1_DQ[60] DDR CH - B DDR_RCOMP[1] SM_RCOMP2
BA27 AP22 AU18
DDR_A_D62 BA25 DDR0_DQ[61]/DDR1_DQ[45] AW67 DDR_PG_CTRL DDR_B_D62 AP21 DDR1_DQ[61] DDR_RCOMP[2]
DDR_A_D63 BB25 DDR0_DQ[62]/DDR1_DQ[46] DDR_VTT_CNTL #543016 PDG2.0 P.190 DDR_B_D63 AN21 DDR1_DQ[62]
DDR0_DQ[63]/DDR1_DQ[47] 2 OF 20 Trace width/Spacing >= 20mils DDR1_DQ[63] 3 OF 20
Place componment near SODIMM
SKL-U_BGA1356 SKL-U_BGA1356
@ @
UC1 +3VS
1
PCB C5V01 LA-E892P LS-E891P/E892P PCB D7W01 LA-E892P LS-E892P/E893P PCB 20X LA-E892P REV1A MB 2 SR2UW@
UC7 RC10 SM_RCOMP0 RC38 1 2 121_0402_1%
DAZ20X00203 DAZ24C00100 DA8001AU01A SA0000ACL30 SM_RCOMP1
EA15@ EA17@ @ 1 5 100K_0402_5% RC39 1 2 80.6_0402_1%
NC VCC SM_RCOMP2 RC40 1 2 100_0402_1%
DDR_PG_CTRL 2
2
A 4
3 Y SM_PG_CTRL 45
Kabylake U42 CPU Part Number GND #543016 PDG2.0 P.139
W=12-15 Space= 20/25 L=500mil
2
74AUP1G07SE-7_SOT353_5P DDR_VTT_CNTL to DDR
RC16
UC1 UC1 @ 1M_0402_5% VTT supplied ramped @ESD@
Change PN to SA00007WE00 <35uS DDR_DRAMRST# CC70 1 2 .1U_0402_16V7K
(tCPU18)
1
CPU_KBL_Y0_U42_I5_1.4G CPU_KBL_Y0_U42_I7_1.8G
QN5D@ QN5C@
SA0000AR010 SA0000AQZ10 2015MOW02, Can't install Cap on DRAMRST
DVT 02/07
Kabylake CPU Part Number Kabylake CPU Part Number
Intel DOC: 549352
UC1 UC1 UC1 UC1 UC1 UC1
HDCP1.4 HDCP1.4 HDCP1.4 HDCP1.4 HDCP1.4 HDCP1.4
www.qdzbwx.com +3VS
+3VALW_PRIM
1 1
RPC7
SOC_SML1CLK 1 8
SOC_SML1DATA 2 7
SOC_SMBCLK 3 6
SOC_SMBDATA 4 5
SKL-U
UC1E 2.2K_0804_8P4R_5%
SPI - FLASH +3VS
SMBUS, SMLINK
SOC_SPI_CLK AV2
SOC_SPI_SO AW3 SPI0_CLK R7 SOC_SMBCLK
SOC_SPI_SI AV3 SPI0_MISO GPP_C0/SMBCLK R8 SOC_SMBDATA
SPI0_MOSI GPP_C1/SMBDATA SMB (to DDR, G sensor)
5
SOC_SPI_IO2 AW2 R10 SOC_SMBALERT#
SPI ROM
G
SOC_SPI_IO3 SPI0_IO2 GPP_C2/SMBALERT# @ T239
AU4 QC2B
SOC_SPI_CS#0 AU3 SPI0_IO3 R9 SOC_SML0CLK +3VALW_PRIM 2N7002KDW_SOT363-6
AU2 SPI0_CS0# GPP_C3/SML0CLK W2 SOC_SML0DATA Strap Pin
AU1 SPI0_CS1# GPP_C4/SML0DATA W1 SOC_SML0ALERT# 4.7K_0402_5% 2 ESPI@ 1 RC202 SOC_SMBCLK 3 4 SOC_SMBCLK_1
S
SPI0_CS2# GPP_C5/SML0ALERT# SOC_SMBCLK_1 20,33
2
W3 SOC_SML1CLK
G
SPI - TOUCH GPP_C6/SML1CLK SOC_SML1DATA SOC_SML1CLK 21,37
V3 SML1 ( to EC, Thermal sensor) QC2A
GPP_C7/SML1DATA SOC_SML1ALERT# SOC_SML1DATA 21,37
M2 AM7 2N7002KDW_SOT363-6
GPP_D1/SPI1_CLK GPP_B23/SML1ALERT#/PCHHOT# @ T234
M3
J4 GPP_D2/SPI1_MISO SOC_SMBDATA 6 1 SOC_SMBDATA_1
SOC_SMBDATA_1 20,33
S
V1 GPP_D3/SPI1_MOSI
D
SPI Touch V2 GPP_D21/SPI1_IO2
Change RC144~RC147, RC45 to 15ohm when use ESPI
M1 GPP_D22/SPI1_IO3
GPP_D0/SPI1_CS#
LPC
AY13 LPC_AD0 RC144 1 @ 2 0_0402_5%
ESPI / LPC Bus
GPP_A1/LAD0/ESPI_IO0 BA13 LPC_AD1 1 2 LPC_AD0_R 37,38
RC145 @ 0_0402_5% ESPI : +1.8V
C LINK GPP_A2/LAD1/ESPI_IO1 BB13 LPC_AD2 1 2 LPC_AD1_R 37,38
RC146 @ 0_0402_5%
G3
G2 CL_CLK
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
AY12
BA12
LPC_AD3
LPC_FRAME#
RC147 1 @ 2 0_0402_5%
LPC_AD2_R
LPC_AD3_R
37,38
37,38 * LPC : +3.3V +1.8VS_3VS_PGPPA
2 G1 CL_DATA GPP_A5/LFRAME#/ESPI_CS# BA11 ESPI_RST# LPC_FRAME# 37,38 2
CL_RST# GPP_A14/SUS_STAT#/ESPI_RESET# ESPI_RST# 37
PM_CLKRUN# RC107 1 2 10K_0402_5%
AW13 AW9 CLKOUT_LPC0 RC45 2 LPC@ 1 22_0402_5%
GPP_A0/RCIN# GPP_A9/CLKOUT_LPC0/ESPI_CLK CLK_LPC_TPM_R RC46 2 TPM@ 1 22_0402_5% CLK_LPC_EC 37 To EC TPM_SERIRQ
AY9 RC112 1 2 10K_0402_5%
TPM_SERIRQ AY11 GPP_A10/CLKOUT_LPC1 AW11 PM_CLKRUN# CLK_LPC_TPM 38
37,38 TPM_SERIRQ GPP_A6/SERIRQ GPP_A8/CLKRUN# PM_CLKRUN# 38
5 OF 20
LPC Mode
SKL-U_BGA1356
@
SML0ALERT# / GPP_C5 (Internal Pull Down):
(Sampled: Rising edge of RSMRST# )
eSPI or LPC
*0 = LPC is selected for EC --> For KB9022/9032 Use
1 = eSPI is selected for EC --> For KB9032 Only.
SMBALERT# / GPP_C2 (Internal Pull Down):
(Sampled: Rising edge of RSMRST# )
+3VALW_SPI
SPI ROM ( 8MByte ) CC8
0.1U_0201_10V6K
TLS Conf i dent ial i ty
SOC_SPI_CS#0 1
UC2
8
1 2 * 0 = Disable Intel ME Crypto Transport Layer Security
SOC_SPI_SO_0_R 2 /CS VCC 7 SOC_SPI_IO3_0_R (TLS) cipher suite (no conf i dent ial i ty).
DO(IO1) /HOLD(IO3)
SOC_SPI_IO2_0_R 3
4 /WP(IO2) CLK
6
5
SOC_SPI_CLK_0_R
SOC_SPI_SI_0_R
1 = Enable Intel ME Crypto (TLS) (with conf i dent ial i ty).
3 RPC5 and RC52 are close UC2 GND DI(IO0) Must be pulled up to support Intel AMT with TLS and Intel 3
RPC5
SOC_SPI_IO3 8 1 SOC_SPI_IO3_0_R
W25Q64JVSSIQ_SO8 2015MOW06 no need PU1K on SPI_IO2/IO3 SBA (Small Business Advantage) with TLS.
SOC_SPI_SI 7 2 SOC_SPI_SI_0_R +3VALW_SPI
SOC_SPI_CLK 6 3 SOC_SPI_CLK_0_R
SOC_SPI_SO 5 4 SOC_SPI_SO_0_R SOC_SPI_CLK_0_R 1 @EMI@ 2 1 2
RC24 0_0402_5% CC9 @EMI@ SOC_SPI_IO2 RC47 1 @ 2 1K_0402_1%
15_0804_8P4R_5% 10P_0402_50V8J
SOC_SPI_IO3 RC48 1 @ 2 1K_0402_1%
SOC_SPI_IO2 2 1 SOC_SPI_IO2_0_R
RC52 15_0402_5%
4 4
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SKL-U(3/12)SPI,ESPI,SMB,LPC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 9 of 57
A B C D E
A B C D E
www.qdzbwx.com
1 1
UC1G SKL-U
Rev_0.53
AUDIO
SKL-U_BGA1356
pull-up in manufacturing/debug environments ONLY. @
1
D38 D32
C36 CSI2_DP1 CSI2_CLKP1 C29 RC133
D36 CSI2_DN2 CSI2_CLKN2 D29 UMA@
CSI2_DP2 CSI2_CLKP2 10K_0402_5%
A38 B26
B38 CSI2_DN3 CSI2_CLKN3 A26
Intel HD Audio link capabilit i es #543016 PDG2.0 P.551
2
CSI2_DP3 CSI2_CLKP3
> Two SDI signals to support two external codecs. C31 E13 CSI2_COMP RC80 2 1 100_0402_1% DGPU_PRSNT#
> Drivers variable requency (5MHz to 24MHz) BCLK to support: D31 CSI2_DN4 CSI2_COMP B7 DGPU_PRSNT#
CSI2_DP4 GPP_D4/FLASHTRIG
-- SDO double pumped up to 48 Mb/s C33
CSI2_DN5
D33
-- SDI's single pumped up to 24 Mb/s CSI2_DP5
1
EMMC
A31
> Provides cadence for 44.1 kHz based sample rate output. B31 CSI2_DN6 AP2 EMMC_D0 RC134
CSI2_DP6 GPP_F13/EMMC_DATA0 EMMC_D1 EMMC_D0 34
> Support 1.5V, 1.8V, and 3.3V modes. A33
CSI2_DN7 GPP_F14/EMMC_DATA1
AP1
EMMC_D1 34
VGA@ 10K_0402_5%
B33 AP3 EMMC_D2
3 CSI2_DP7 GPP_F15/EMMC_DATA2 AN3 EMMC_D3 EMMC_D2 34 3
2
A29 GPP_F16/EMMC_DATA3 AN1 EMMC_D4 EMMC_D3 34
B29 CSI2_DN8 GPP_F17/EMMC_DATA4 AN2 EMMC_D5 EMMC_D4 34
C28 CSI2_DP8 GPP_F18/EMMC_DATA5 AM4 EMMC_D6 EMMC_D5 34
D28 CSI2_DN9 GPP_F19/EMMC_DATA6 AM1 EMMC_D7 EMMC_D6 34
A27 CSI2_DP9 GPP_F20/EMMC_DATA7 EMMC_D7 34
B27 CSI2_DN10 AM2 EMMC_RCLK
CSI2_DP10 GPP_F21/EMMC_RCLK EMMC_RCLK 34 DGPU_PRSNT#
C27 AM3 EMMC_CLK
CSI2_DN11 GPP_F22/EMMC_CLK EMMC_CMD EMMC_CLK 34
D27 AP4
CSI2_DP11 GPP_F12/EMMC_CMD EMMC_CMD 34 DIS,Optimus 0
9 OF 20 AT1 EMMC_RCOMP 2 1
EMMC_RCOMP RC89 200_0402_1%
UMA 1
SKL-U_BGA1356
@ #543016 PDG2.0 P.393
4 4
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SKL-U(4/12)HDA,EMMC,SDIO,CSI2
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 10 of 57
A B C D E
A B C D E
www.qdzbwx.com
PVT 03/20
SOC_XTAL24_IN RC235 1 U22@ 2 33_0402_1% SOC_XTAL24_IN_R
+RTCVCC
U22@
RC91 1 2 20K_0402_5% SOC_SRTCRST# SOC_XTAL24_OUT RC236 1 U22@ 2 33_0402_1% SOC_XTAL24_OUT_R 1 2
RC92 1M_0402_5%
CC10 1 2 1U_0402_6.3V6K
YC1 U22@
1 563377 Intel MOW 33 24MHZ_18PF_XRCGB24M000F2P51R0 1
UC1J SKL_ULT
RC93 1 2 20K_0402_5% SOC_RTCRST# Rev_0.53 3 1
SOC_RTCRST# 37 3 1
CLOCK SIGNALS
CC11 1 2 1U_0402_6.3V6K NC NC
CLK_PCIE_N0 1 1
D42
21 CLK_PCIE_N0 CLK_PCIE_P0 CLKOUT_PCIE_N0 4 2
JCMOS1 1 @ 2 0_0603_5% CLR CMOS DGPU C42
21 CLK_PCIE_P0 CLKREQ_PCIE#0 AR10 CLKOUT_PCIE_P0 CC12 CC13
21 CLKREQ_PCIE#0 GPP_B5/SRCCLKREQ0# 2 2
Place at RAM DOOR U22@ U22@
CLK_PCIE_N1 B42 27P_0402_50V8J 27P_0402_50V8J
30 CLK_PCIE_N1 CLK_PCIE_P1 A42 CLKOUT_PCIE_N1 F43 CLK_CPU_ITP#
SM_INTRUDER# GLAN 30 CLK_PCIE_P1 CLKREQ_PCIE#1 CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N CLK_CPU_ITP T164 @
RC941 2 1M_0402_5%
30 CLKREQ_PCIE#1
AT7 E43 T165 @
GPP_B6/SRCCLKREQ1# CLKOUT_ITPXDP_P
CLK_PCIE_N2 D41 BA17 SUSCLK
31 CLK_PCIE_N2 CLK_PCIE_P2 CLKOUT_PCIE_N2 GPD8/SUSCLK T185 @
WLAN C41
+3VS 31 CLK_PCIE_P2 CLKREQ_PCIE#2 AT8 CLKOUT_PCIE_P2 E37 SOC_XTAL24_IN
31 CLKREQ_PCIE#2 GPP_B7/SRCCLKREQ2# XTAL24_IN SOC_XTAL24_OUT
E35
RC121 1 2 10K_0402_5% CLKREQ_PCIE#1 CLK_PCIE_N3 D40 XTAL24_OUT
31 CLK_PCIE_N3 CLK_PCIE_P3 C40 CLKOUT_PCIE_N3 E42 XCLK_BIASREF Follow 2014MOW48
CLKREQ_PCIE#0
M.2/SSD 31 CLK_PCIE_P3 CLKREQ_PCIE#3 AT10 CLKOUT_PCIE_P3 XCLK_BIASREF Skylake U PU 2.7k ohm to 1V
R115 1 2 10K_0402_5%
31 CLKREQ_PCIE#3 GPP_B8/SRCCLKREQ3#
RTCX1
AM18 SOC_RTCX1 Cannonlake U PD 60.4 ohm
B40 AM20 SOC_RTCX2 +1.0VALW_CLK5_F24NS
RPC12 A40 CLKOUT_PCIE_N4 RTCX2
8 1 CLKREQ_PCIE#5 CLKREQ_PCIE#4 AU8 CLKOUT_PCIE_P4 AN18 SOC_SRTCRST# XCLK_BIASREF RC96 1 2 2.7K_0402_1%
7 2 CLKREQ_PCIE#4 GPP_B9/SRCCLKREQ4# SRTCRST# AM16 SOC_RTCRST#
6 3 CLKREQ_PCIE#3 E40 RTCRST#
5 4 CLKREQ_PCIE#2 E38 CLKOUT_PCIE_N5 RC136 1 @ 2 60.4_0402_1%
CLKREQ_PCIE#5 AU7 CLKOUT_PCIE_P5
10K_0804_8P4R_5% GPP_B10/SRCCLKREQ5#
10 OF 20
XCLK_BIASREF
+1.0V_VCCST T:50ohm S:12/15 L:1000 Via:2
2 SKL-U_BGA1356 2
@
From EC(open-drain)
1
RC113
1K_0402_5%
RC116
2014MOW48:
60.4_0402_1% UC1K SKL-U Skylake-U use 24M 50 ohm ESR
2
2 @ 1 PBTN_OUT#_R +3VALW_DSW
37 PBTN_OUT#
RC109 0_0402_5% PCH internal PU
PBTN_OUT#_R RC111 1 @ 2 100K_0402_5%
EC_RSMRST# 2 @ 1 PCH_DPWROK
+3VALW_DSW RC114 0_0402_5%
AC_PRESENT RC106
EC1 internal
@
PU
2 10K_0402_5%
RC104 1 2 1K_0402_5% WAKE# SYS_PWROK 2 @ 1 PCH_PWROK
RC122 0_0402_5%
PM_BATLOW# RC103 1 2 10K_0402_5%
WAKE# (DSX wake event)
10 KΩ pull- up t o Vcc DS W3_3.
The pull-up is required even if PCIe* interface
is not used on the plat f or m
. +3VALW_PRIM
5
@ESD@
CC51 2 1 .1U_0402_16V7K SYS_RESET# PLT_RST# 2
P
B 4 PLT_RST_BUF#
1 Y PLT_RST_BUF# 21,30,31
ESD@ 1000P_0402_50V7K
A
1
2 1 CC50 H_CPUPWRGD @
DVT 02/13
UC3 3 RC118
@ESD@ MC74VHC1G08DFT2G_SC70-5 100K_0402_5%
CC66 2 1 .1U_0402_16V7K SYS_PWROK PLT_RST_BUF#
1
2
ESD@ 1000P_0402_50V7K 2 1
4 2 1 CC65 PCH_PWROK_R @ RC125 0_0402_5% CC130 4
DVT 02/13
100P_0402_50V8J
@ESD@ 2 @ESD@
CC69 2 1 .1U_0402_16V7K EC_RSMRST#
1
RC215
10K_0402_5%
U22@
2
CPU_ID
1
1 1
CPU_ID RC214
U22 1 10K_0402_5%
U42@
U42 0
2
+3VALW_1.8VALW_PGPPD
RC178
0_0402_5%2 @ 1
1
1
1
1
* 0 = Disable No Reboot mode. --> AAX05 Use RC151 RC150 RC153 RC224
1 = Enable No Reboot Mode. (PCH will disable the TCO 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% +3VS
Timer system reboot feature). This function is useful X76@ X76@ X76@ X76@
2
2
2
RAM_ID0
when running ITP/XDP. RAM_ID1 DGPU_PWR_EN RC231 1 VGA@ 2 10K_0402_5%
RAM_ID2
RAM_ID3
GSPI1_MOSI / GPP_B22 (Internal Pull Down):
1
1
DGPU_HOLD_RST#
(Rising edge of PCH_PWROK) RC155 RC225 RC226 RC227
RC219 1 VGA@ 2 10K_0402_5%
2
GPU_EVENT# 21
RC204 0_0402_5%
1 = LPC Mode GC6_FB_EN 1 @ 2 GC6_FB_EN3V3
GC6_FB_EN3V3 21
RC195 0_0402_5%
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SKL-U(6/12)GPIO
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Wednesday, April 19, 2017 Sheet 12 of 57
A B C D E
A B C D E
www.qdzbwx.com
UC1H SKL-U
Rev_0.53
SSIC / USB3
PCIE/USB3/SATA
H8
USB3_1_RXN USB3_CRX_DTX_N1 36
G8
PCIE_CRX_GTX_N1 USB3_1_RXP USB3_CRX_DTX_P1 36
H13 C13 USB3 MB
21 PCIE_CRX_GTX_N1 PCIE_CRX_GTX_P1 PCIE1_RXN/USB3_5_RXN USB3_1_TXN USB3_CTX_DRX_N1 36
G13 D13
1 21 PCIE_CRX_GTX_P1 PCIE_CTX_GRX_N1 PCIE1_RXP/USB3_5_RXP USB3_1_TXP USB3_CTX_DRX_P1 36 1
CC17 VGA@1 2 0.22U_0402_16V7K B17
21 PCIE_CTX_C_GRX_N1 PCIE_CTX_GRX_P1 PCIE1_TXN/USB3_5_TXN
CC21 VGA@1 2 0.22U_0402_16V7K A17 J6
21 PCIE_CTX_C_GRX_P1 PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_1_RXN USB3_CRX_DTX_N2 35
H6
PCIE_CRX_GTX_N2 USB3_2_RXP/SSIC_1_RXP USB3_CRX_DTX_P2 35
G11 B13
21 PCIE_CRX_GTX_N2 PCIE_CRX_GTX_P2 PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_1_TXN USB3_CTX_DRX_N2 35
F11 A13
21 PCIE_CRX_GTX_P2 PCIE_CTX_GRX_N2 PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_1_TXP USB3_CTX_DRX_P2 35
CC18 VGA@1 2 0.22U_0402_16V7K D16 USB TypeC
21 PCIE_CTX_C_GRX_N2 PCIE_CTX_GRX_P2 PCIE2_TXN/USB3_6_TXN
CC19 VGA@1 2 0.22U_0402_16V7K C16 J10
21 PCIE_CTX_C_GRX_P2 PCIE2_TXP/USB3_6_TXP USB3_3_RXN/SSIC_2_RXN USB3_CRX_DTX_N3 35
DGPU H10
PCIE_CRX_GTX_N3 USB3_3_RXP/SSIC_2_RXP USB3_CRX_DTX_P3 35
H16 B15
21 PCIE_CRX_GTX_N3 PCIE_CRX_GTX_P3 PCIE3_RXN USB3_3_TXN/SSIC_2_TXN USB3_CTX_DRX_N3 35
G16 A15
21 PCIE_CRX_GTX_P3 PCIE_CTX_GRX_N3 PCIE3_RXP USB3_3_TXP/SSIC_2_TXP USB3_CTX_DRX_P3 35
CC20 VGA@1 2 0.22U_0402_16V7K D17
21 PCIE_CTX_C_GRX_N3 2 0.22U_0402_16V7K PCIE_CTX_GRX_P3 C17 PCIE3_TXN E10
CC22 VGA@1
21 PCIE_CTX_C_GRX_P3 PCIE3_TXP USB3_4_RXN F10
PCIE_CRX_GTX_N4 G15 USB3_4_RXP C15
21 PCIE_CRX_GTX_N4 PCIE_CRX_GTX_P4 PCIE4_RXN USB3_4_TXN
F15 D15
21 PCIE_CRX_GTX_P4 PCIE_CTX_GRX_N4 PCIE4_RXP USB3_4_TXP
CC23 VGA@1 2 0.22U_0402_16V7K B19
21 PCIE_CTX_C_GRX_N4 2 0.22U_0402_16V7K PCIE_CTX_GRX_P4 A19 PCIE4_TXN AB9 USB20_N1
CC24 VGA@1
21 PCIE_CTX_C_GRX_P4 PCIE4_TXP USB2N_1 AB10 USB20_P1 USB20_N1 36
PCIE_CRX_DTX_N5 F16 USB2P_1 USB20_P1 36 USB3 MB
30 PCIE_CRX_DTX_N5 PCIE_CRX_DTX_P5 E16 PCIE5_RXN AD6 USB20_N2
30 PCIE_CRX_DTX_P5 PCIE_CTX_DRX_N5 PCIE5_RXP USB2N_2 USB20_P2 USB20_N2 35
GLAN CC25 2 1 .1U_0402_16V7K C19 AD7 USB TypeC
30 PCIE_CTX_C_DRX_N5 PCIE_CTX_DRX_P5 PCIE5_TXN USB2P_2 USB20_P2 35
CC26 2 1 .1U_0402_16V7K D19
30 PCIE_CTX_C_DRX_P5 PCIE5_TXP AH3 USB20_N3
PCIE_CRX_DTX_N6 G18 USB2N_3 AJ3 USB20_P3 USB20_N3 36
31 PCIE_CRX_DTX_N6 PCIE_CRX_DTX_P6 F18 PCIE6_RXN USB2P_3 USB20_P3 36
31 PCIE_CRX_DTX_P6 1 2 .1U_0402_16V7K PCIE_CTX_DRX_N6 D20 PCIE6_RXP AD9 USB20_N4 TO D/B USB2
NGFF WLAN+BT(Key E) CC60
31 PCIE_CTX_C_DRX_N6 1 2 .1U_0402_16V7K PCIE_CTX_DRX_P6 C20 PCIE6_TXN USB2N_4 AD10 USB20_P4 USB20_N4 36
CC62
31 PCIE_CTX_C_DRX_P6 PCIE6_TXP USB2P_4 USB20_P4 36
F20 AJ1 USB20_N5
33 SATA_CRX_DTX_N0 E20 PCIE7_RXN/SATA0_RXN USB2N_5 AJ2 USB20_P5 USB20_N5 31
33 SATA_CRX_DTX_P0 B21 PCIE7_RXP/SATA0_RXP USB2P_5 USB20_P5 31 BT
HDD 33 SATA_CTX_DRX_N0 PCIE7_TXN/SATA0_TXN
USB2
USB20_N6
A21 AF6
2 33 SATA_CTX_DRX_P0 PCIE7_TXP/SATA0_TXP USB2N_6 AF7 USB20_P6 USB20_N6 28 2
G21 USB2P_6 USB20_P6 28 TS
33 SATA_CRX_DTX_N1 F21 PCIE8_RXN/SATA1A_RXN AH1 USB20_N7
33 SATA_CRX_DTX_P1 D21 PCIE8_RXP/SATA1A_RXP USB2N_7 AH2 USB20_P7 USB20_N7 28
ODD 33 SATA_CTX_DRX_N1 PCIE8_TXN/SATA1A_TXN USB2P_7 USB20_P7 28 Camera
C21
33 SATA_CTX_DRX_P1 PCIE8_TXP/SATA1A_TXP AF8 USB20_N8
E22 USB2N_8 AF9 USB20_P8 USB20_N8 38
31 PCIE_CRX_DTX_N9 E23 PCIE9_RXN USB2P_8 USB20_P8 38 FP
31 PCIE_CRX_DTX_P9 B23 PCIE9_RXP AG1
31 PCIE_CTX_DRX_N9 PCIE9_TXN USB2N_9 DVT 02/07
A23 AG2
31 PCIE_CTX_DRX_P9 PCIE9_TXP USB2P_9
F25 AH7
31 PCIE_CRX_DTX_N10 E25 PCIE10_RXN USB2N_10 AH8
31 PCIE_CRX_DTX_P10 D23 PCIE10_RXP USB2P_10 2015MOW10, USB2_ID Connected to GND Directly
31 PCIE_CTX_DRX_N10 C23 PCIE10_TXN AB6 USB2_COMP RC119 1 2 113_0402_1%
31 PCIE_CTX_DRX_P10 PCIE10_TXP USB2_COMP AG3 USB2_ID RC130 1 2 0_0402_5%
RC1201 2 100_0402_1% PCIE_RCOMPN F5 USB2_ID AG4 USB2_VBUSSENSE RC131 1 2 0_0402_5%
PCIE_RCOMPP E5 PCIE_RCOMPN USB2_VBUSSENSE
NGFF SSD(Key M) #543016 PDG2.0 P.285 PCIE_RCOMPP USB_OC0#
A9
(Need Lane Reversal) PCIE_RCOMPN/PCIE_RCOMPP +3VALW_PRIM
@ T196
XDP_PRDY# D56 GPP_E9/USB2_OC0# C9
USB_OC0# 36
BO=4 W=12 S=12 R=100ohm XDP_PREQ# D61 PROC_PRDY# GPP_E10/USB2_OC1# D9
RC135 2 @
@ T197
1 10K_0402_5% PIRQA# BB11 PROC_PREQ# GPP_E11/USB2_OC2# B9
Unused OC pin need set to GPI.
GPP_A7/PIRQA# GPP_E12/USB2_OC3# +3VALW_PRIM
E28 J1
31 PCIE_CRX_DTX_N11 E27 PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 J2
31 PCIE_CRX_DTX_P11 D24 PCIE11_RXP/SATA1B_RXP GPP_E5/DEVSLP1 J3 SSD_DEVSLP2 USB_OC0# RC132 1 2 10K_0402_5%
31 PCIE_CTX_DRX_N11 PCIE11_TXN/SATA1B_TXN GPP_E6/DEVSLP2 SSD_DEVSLP2 31
C24
31 PCIE_CTX_DRX_P11 E30 PCIE11_TXP/SATA1B_TXP H2
31 PCIE_CRX_DTX_N12 F30 PCIE12_RXN/SATA2_RXN GPP_E0/SATAXPCIE0/SATAGP0 H3
31 PCIE_CRX_DTX_P12 A25 PCIE12_RXP/SATA2_RXP GPP_E1/SATAXPCIE1/SATAGP1 G4 SATA_GP2
31 PCIE_CTX_DRX_N12 B25 PCIE12_TXN/SATA2_TXN GPP_E2/SATAXPCIE2/SATAGP2 SATA_GP2 31
31 PCIE_CTX_DRX_P12 PCIE12_TXP/SATA2_TXP H1 1 2
3 GPP_E8/SATALED# +3VS 3
8 OF 20 RH16
SKL-U_BGA1356 10K_0402_5%
@ M.2 SSD PCIE/SATA select pin
SSD_DET# (SATA_GP0)
SATA Device 0
PCIE Device 1
GPIO DEVICE CONTROL
USB_OC0# USB2 Port 1
SATA_GP2 NA
‧If mec hani cal presence s wit c hes will not be used on t he pl atf or m , SATAGP[ 2: 0]
signals can be configured as GPP_E[2:0] GPIOs signals.
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SKL-U(7/12)PCIE,USB,SATA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Tuesday, April 18, 2017 Sheet 13 of 57
A B C D E
A B C D E
1U_0402_6.3V6K
1 1 1 2 AU23 AK28
VDDQ_AU23 VCCIO
CC98
CC97
1U_0402_6.3V6K
1 @ AU28 AK30
VDDQ_AU28
JUMP_43X118 AU35
VDDQ_AU35
2.73A VCCIO
VCCIO
AL30
CC96 AU42 AL42
2 2 0.1U_0201_10V6K JPC2 BB23 VDDQ_AU42 VCCIO AM28
VDDQ_BB23
6.35A VCCIO
2 1 2 BB32 AM30
@ BB41 VDDQ_BB32 VCCIO AM42
1 UC5 JUMP_43X118 BB47 VDDQ_BB41 VCCIO 1
CC105 2 1 .1U_0402_16V7K 1 14 BB51 VDDQ_BB47 AK23
VIN1 VOUT1 VDDQ_BB51 VCCSA +VCC_SA
2 13 AK25
VIN1 VOUT1 VCCSA G23
RC142 1 2 20K_0402_5% EN_1.0V_VCCSTU 3 12 1 2 AM40 VCCSA G25
ON1 CT1 +1.2V_VDDQC VDDQC
0.09A VCCSA
37,40,45 SYSON CC95 G27
4 11 1000P_0402_50V7K A18 VCCSA G28
VBIAS GND +1.0V_VCCST VCCST
0.04A VCCSA
6A J22
RC168 1 2 49.9K_0402_1% EN_1.8VS 5 10 1 2 A22 VCCSA J23
ON2 CT2 +1.0VS_VCCSTG VCCSTG_A22
0.04A VCCSA
37,40,43,45,47 SUSP# CC94 J27
2 1 CC104 6 9 1000P_0402_50V7K AL23 VCCSA K23
VIN2 VOUT2 +1.2V_VCCSFR_OC VCCPLL_OC
0.26A VCCSA
.1U_0402_16V7K +1.8VALW_VS 7 8 K25
VIN2 VOUT2 +1.8VS K20 VCCSA K27
+1.0V_VCCSFR VCCPLL_K20
0.12A VCCSA
15 K21 K28
1 2 GPAD VCCPLL_K21 VCCSA K30
+1.8VALW_PRIM 1 2 VCCSA
EM5209VF_DFN14_2X3
VCCIO_SENSE
1U_0402_6.3V6K
JPC8 1 1 AM23 T124 @
VCCIO_SENSE VSSIO_SENSE
CC99
JUMP_43X39 AM22 T125 @
@ CC100 VSSIO_SENSE
0.1U_0201_10V6K H21 VSSSA_SENSE
2
+1.8VALW_PRIM TO +1.8VS 2 VSSSA_SENSE
14 OF 20VCCSA_SENSE
H20 VCCSA_SENSE VSSSA_SENSE 48
VCCSA_SENSE 48
SKL-U_BGA1356
@
+1.0VALW_PRIM TO +1.0VS_VCCSTG
+1.0VALW_PRIM
+1.0VALW_PRIM_JP
2 2
JPC4
1 2 +1.2V_VDDQ_CPU +1.2V_VDDQC
1 2 +1.0VS_VCCSTG PSC Side
#543016 PDG2.0 P.750
1U_0402_6.3V6K
AOZ1334DI-02_DFN8-7_3X3
RC143 1 @ 2 0_0402_5% CC55 1 2 1U_0402_6.3V6K +1.0V_VCCSFR : 1x 1uF Reference GND as possible.
@ Rds_on 3.6m ohm
2 Rise time 0.5ms
+1.2V_VDDQ_CPU +1.2V_VCCSFR_OC BSC Side
#543016 PDG2.0 P.750
RC141 1 @ 2 0_0402_5% CC49 1 2 1U_0402_6.3V6K +1.35V_VCCSFR_OC : 1x 1uF
BSC Side
www.qdzbwx.com
+VCCIO +1.2V_VDDQ_CPU
DVT 02/07 BSC Side PSC Side PSC Side BSC Side
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CC59
CC58
CC37
CC41
CC54
CC27
CC28
CC34
CC36
CC38
CC39
CC43
CC44
CC42
CC45
CC46
CC33
CC35
CC40
@ @ @ @ @ @ @
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SKL-U(8/12)Power
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 14 of 57
A B C D E
A B C D E
+1.8VALW_PRIM
CC91 Rev_0.53
CPU POWER 4 OF 4
2 1 1U_0402_6.3V6K
+1.0VALW_MPHYAON @ AB19 0_0402_5% 2 ESPI@ 1 RC196
+1.0VALW_PRIM AB20 VCCPRIM_1P0 AK15 0_0402_5% 2 @ 1 RC197
Near AB19 (<10 mm) VCCPRIM_1P0
0.89A VCCPGPPA +3VALW_1.8VALW_PGPPA SPI Touch
P18 AG15
VCCPRIM_1P0 VCCPGPPB +3VALW_PGPPB
RC175 1 @ 2 0_0402_5% 1 2 CC87 Y16
+1.0VALW_PRIM VCCPGPPC +3VALW_PGPPC
1U_0402_6.3V6K AF18 Y15
VCCPRIM_CORE VCCPGPPD +3VALW_1.8VALW_PGPPD +3VALW_PRIM
2 1 CC76 AF19 2.57A T16 +3VALW_PGPPB
CC87 near K17 (<3 mm) @ 1U_0402_6.3V6K V20 VCCPRIM_CORE VCCPGPPE AF16
+3VALW_PGPPE
VCCPRIM_CORE VCCPGPPF +1.8VALW_PRIM
V21 AD15
1 +1.0VALW_PRIM +1.0VALW_APLL near AF18 (<10 mm) VCCPRIM_CORE VCCPGPPG +3VALW_PGPPG No use CC102 2 1 0_0402_5% 2 @ 1 RC161 1
CC85 2 1 DCPDSW_1P0 AL1 V19 1U_0402_6.3V6K @
DVT 02/07 DCPDSW_1P0 VCCPRIM_3P3_V19 +3VALW_PRIM
1U_0402_6.3V6K CC102 near AG15 (<3 mm)
RC148 1 @ 2 0_0603_5% 1 2 CC123 K17 T1
+1.0VALW_MPHYAON VCCMPHYAON_1P0 VCCPRIM_1P0_T1 +1.0VALW_DTS +3VALW_PRIM
10U_0603_6.3V6M L1 +3VALW_PGPPC
VCCMPHYAON_1P0 AA1
VCCATS_1P8 +1.8VALW_PRIM
N15
+1.0VALW_MPHYGT VCCMPHYGT_1P0_N15
N16 AK17 CC73 2 1 0_0402_5% 2 @ 1 RC163
+3VALW VCCMPHYGT_1P0_N16 VCCRTCPRIM_3P3 +3VALW_RTC
+3VALW_DSW N17 HSIO 1U_0402_6.3V6K @
P15 VCCMPHYGT_1P0_N17 AK19
VCCMPHYGT_1P0_P15
2.1A VCCRTC_AK19 +RTCVCC CC73 near Y16 (<10 mm)
P16 BB14
RC173 1 @ 2 0_0402_5% VCCMPHYGT_1P0_P16 VCCRTC_BB14 +3VALW_1.8VALW_PGPPD +3VALW_PRIM
K15 BB10 CC71 1 2 0.1U_0201_10V6K +1.8VALW_PRIM
+1.0VALW_AMPHYPLL VCCAMPHYPLL_1P0 HSIO DCPRTC
L15
VCCAMPHYPLL_1P0 A14 0_0402_5% 1 @ 2 RC206
+3VALW_PRIM +3VALW_HDA VCCCLK1 +1.0VALW_CLK6_24TBT
V15 CC103 2 1 0_0402_5% 2 @ 1 RC172
+1.0VALW_APLL VCCAPLL_1P0 K19 1U_0402_6.3V6K
VCCCLK2 +1.0VALW_VCCCLK2
RC198 1 @ 2 0_0402_5% 1 2 CC63 AB17
+1.0VALW_PRIM VCCPRIM_1P0_AB17 +3VALW_PRIM
@ 1U_0402_6.3V6K Y18 L21 +3VALW_PGPPE
VCCPRIM_1P0_Y18 VCCCLK3 +1.0VALW_APLL
CC63 near AJ19 (<10 mm) AD17 N20
+3VALW_DSW VCCDSW_3P3_AD17 VCCCLK4 +1.0VALW_CLK4_F100OC
+3VALW_SPI AD18 CC74 2 1 0_0402_5% 2 @ 1 RC167
AJ17 VCCDSW_3P3_AD18 L19 1U_0402_6.3V6K @
VCCDSW_3P3_AJ17 VCCCLK5 +1.0VALW_CLK5_F24NS
RC154 1 @ 2 0_0402_5%
AJ19 A10
CC74 near T16 (<10 mm)
+3VALW_HDA VCCHDA VCCCLK6 +1.0VALW_CLK6_24TBT
+3VALW_PRIM
AJ16 AN11 PRIMCORE_VID0 +3VALW_PGPPG
+3VALW_SPI VCCSPI GPP_B0/CORE_VID0 PRIMCORE_VID1 T136 @
AN13 T138 @
AF20 GPP_B1/CORE_VID1 CC83 2 1 0_0402_5% 2 @ 1 RC187
+3VALW +3VALW_PRIM +1.0VALW_SRAM VCCSRAM_1P0
AF21 HSIO 1U_0402_6.3V6K @
JPC7 T19 VCCSRAM_1P0
1 2 T20 VCCSRAM_1P0
2 1 2 VCCSRAM_1P0 CC67 2 1 2
+3VALW_PRIM
JUMP_43X39 AJ21 1U_0402_6.3V6K @
+3VALW_PRIM VCCPRIM_3P3_AJ21
@ CC67 near V19 (<3 mm)
AK20
+1.0VALW_PRIM VCCPRIM_1P0_AK20
N18 +1.0VALW_DTS +1.0VALW_PRIM
+1.0VALW_APLLEBB VCCAPLLEBB HSIO 15 OF 20
0_0402_5% 2 @ 1 RC162
SKL-U_BGA1356
@
#543016 PDG2.0 P.764 CC72 2 1
+1.8VALW_PRIM
1U_0402_6.3V6K
HSIO +1.0VALW_MPHYPLL CC72 near AA1 (<10 mm)
+1.0VALW_PRIM +1.0VALW_MPHYGT
Imax : 3.5 A +3VALW_RTC +3VALW_PRIM
JPC9
1 2 RC209 1 @ 2 0_0603_5% CC82 1 2 22U_0603_6.3V6M CC78 2 1 0_0402_5% 2 @ 1 RC171
1 2 @ 0.1U_0201_10V6K
JUMP_43X79 CC77 2 1
@ CC80 1 2 1U_0402_6.3V6K #543016 PDG2.0 P.758 1U_0402_6.3V6K
+1.0VALW_PRIM +3VALW_PRIM +1.8VALW_PRIM CC77,CC78 near AK17 (<3 mm)
CC80 near N15 (<3mm)
CC82 near N15 (<10mm) +1.0VALW_CLK6_24TBT +1.0VALW_PRIM
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
+1.0VALW_AMPHYPLL 1 1 1 1 1 1 CC86 2 1 0_0402_5% 2 @ 1 RC169
CC111
CC113
CC112
CC114
CC116
CC115
1U_0402_6.3V6K @
CC61 near K15 (<3 mm) @ @ @ @ @ @
CC86 near A10 (<3 mm)
RC149 1 @ 2 0_0603_5% CC61 1 2 1U_0402_6.3V6K 2 2 2 2 2 2
@ +1.0VALW_VCCCLK2 +1.0VALW_PRIM
+1.0VALW_SRAM
3 CC75 2 1 0_0603_5% 2 @ 1 RC164 3
CC122 near AF20 (<10mm) 1U_0402_6.3V6K @
RC176 1 @ 2 0_0603_5% CC1221 2 1U_0402_6.3V6K CC124 2 1
@ 22U_0603_6.3V6M @
+1.0VALW_APLLEBB
+1.0VALW_CLK4_F100OC +1.0VALW_PRIM
CC68 near N18 (<3mm)
RC156 1 @ 2 0_0402_5% CC68 1 2 1U_0402_6.3V6K CC125 2 1 0_0603_5% 2 @ 1 RC190
22U_0603_6.3V6M @
CC133 @
1 2 0.1U_0201_10V6K +1.0VALW_CLK5_F24NS +1.0VALW_PRIM
JRTC1
1
Power Rail Voltage 2 1
+RTCBATT 2
RH163 3
+CHGRTC 3.383V(MAX) 1K_0402_5% DC1 +RTCVCC 4 GND
1 2 3 GND
BAT54C(VF) 240 mV 1
ACES_50271-0020N-001
CONN@
1
2
+RTCVCC 3.143V +CHGRTC
CC84
SP02000RO00
0.1U_0201_10V6K
4 CHN202UPT_SC70-3 2 4
Result : Pass
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SKL-U(9/12)Power
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 15 of 57
A B C D E
A B C D E
RC179 RC181
56_0402_5% 100_0402_1%
3 3
Place the PU
resistors close to CPU
2
RC180
220_0402_5%
SOC_SVID_ALERT# 1 2
SOC_SVID_ALERT#_R 48
SOC_SVID_DAT To VR
SOC_SVID_DAT 48
4 4
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SKL-U(10/12)Power,SVID
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 16 of 57
A B C D E
A B C D E
www.qdzbwx.com
1 1
UC1P SKL-U UC1Q SKL-U
Rev_0.53 Rev_0.53 UC1R SKL-U
GND 1 OF 3 GND 2 OF 3
GND 3 OF 3 Rev_0.53
A5 AL65 AT63 BA49 F8 L18
A67 VSS VSS AL66 AT68 VSS VSS BA53 G10 VSS VSS L2
A70 VSS VSS AM13 AT71 VSS VSS BA57 G22 VSS VSS L20
AA2 VSS VSS AM21 AU10 VSS VSS BA6 G43 VSS VSS L4
AA4 VSS VSS AM25 AU15 VSS VSS BA62 G45 VSS VSS L8
AA65 VSS VSS AM27 AU20 VSS VSS BA66 G48 VSS VSS N10
AA68 VSS VSS AM43 AU32 VSS VSS BA71 G5 VSS VSS N13
AB15 VSS VSS AM45 AU38 VSS VSS BB18 G52 VSS VSS N19
AB16 VSS VSS AM46 AV1 VSS VSS BB26 G55 VSS VSS N21
AB18 VSS VSS AM55 AV68 VSS VSS BB30 G58 VSS VSS N6
AB21 VSS VSS AM60 AV69 VSS VSS BB34 G6 VSS VSS N65
AB8 VSS VSS AM61 AV70 VSS VSS BB38 G60 VSS VSS N68
AD13 VSS VSS AM68 AV71 VSS VSS BB43 G63 VSS VSS P17
AD16 VSS VSS AM71 AW10 VSS VSS BB55 G66 VSS VSS P19
AD19 VSS VSS AM8 AW12 VSS VSS BB6 H15 VSS VSS P20
AD20 VSS VSS AN20 AW14 VSS VSS BB60 H18 VSS VSS P21
AD21 VSS VSS AN23 AW16 VSS VSS BB64 H71 VSS VSS R13
AD62 VSS VSS AN28 AW18 VSS VSS BB67 J11 VSS VSS R6
AD8 VSS VSS AN30 AW21 VSS VSS BB70 J13 VSS VSS T15
AE64 VSS VSS AN32 AW23 VSS VSS C1 J25 VSS VSS T17
AE65 VSS VSS AN33 AW26 VSS VSS C25 J28 VSS VSS T18
AE66 VSS VSS AN35 AW28 VSS VSS C5 J32 VSS VSS T2
AE67 VSS VSS AN37 AW30 VSS VSS D10 J35 VSS VSS T21
AE68 VSS VSS AN38 AW32 VSS VSS D11 J38 VSS VSS T4
2 AE69 VSS VSS AN40 AW34 VSS VSS D14 J42 VSS VSS U10 2
AF1 VSS VSS AN42 AW36 VSS VSS D18 J8 VSS VSS U63
AF10 VSS VSS AN58 AW38 VSS VSS D22 K16 VSS VSS U64
AF15 VSS VSS AN63 AW41 VSS VSS D25 K18 VSS VSS U66
AF17 VSS VSS AP10 AW43 VSS VSS D26 K22 VSS VSS U67
AF2 VSS VSS AP18 AW45 VSS VSS D30 K61 VSS VSS U69
AF4 VSS VSS AP20 AW47 VSS VSS D34 K63 VSS VSS U70
AF63 VSS VSS AP23 AW49 VSS VSS D39 K64 VSS VSS V16
AG16 VSS VSS AP28 AW51 VSS VSS D44 K65 VSS VSS V17
AG17 VSS VSS AP32 AW53 VSS VSS D45 K66 VSS VSS V18
AG18 VSS VSS AP35 AW55 VSS VSS D47 K67 VSS VSS W13
AG19 VSS VSS AP38 AW57 VSS VSS D48 K68 VSS VSS W6
AG20 VSS VSS AP42 AW6 VSS VSS D53 K70 VSS VSS W9
AG21 VSS VSS AP58 AW60 VSS VSS D58 K71 VSS VSS Y17
AG71 VSS VSS AP63 AW62 VSS VSS D6 L11 VSS VSS Y19
AH13 VSS VSS AP68 AW64 VSS VSS D62 L16 VSS VSS Y20
AH6 VSS VSS AP70 AW66 VSS VSS D66 L17 VSS VSS Y21
AH63 VSS VSS AR11 AW8 VSS VSS D69 VSS VSS
AH64 VSS VSS AR15 AY66 VSS VSS E11
AH67 VSS VSS AR16 B10 VSS VSS E15 18 OF 20
AJ15 VSS VSS AR20 B14 VSS VSS E18
AJ18 VSS VSS AR23 B18 VSS VSS E21 SKL-U_BGA1356
AJ20 VSS VSS AR28 B22 VSS VSS E46 @
AJ4 VSS VSS AR35 B30 VSS VSS E50
AK11 VSS VSS AR42 B34 VSS VSS E53
AK16 VSS VSS AR43 B39 VSS VSS E56
AK18 VSS VSS AR45 B44 VSS VSS E6
AK21 VSS VSS AR46 B48 VSS VSS E65
AK22 VSS VSS AR48 B53 VSS VSS E71
3 AK27 VSS VSS AR5 B58 VSS VSS F1 3
AK63 VSS VSS AR50 B62 VSS VSS F13
AK68 VSS VSS AR52 B66 VSS VSS F2
AK69 VSS VSS AR53 B71 VSS VSS F22
AK8 VSS VSS AR55 BA1 VSS VSS F23
AL2 VSS VSS AR58 BA10 VSS VSS F27
AL28 VSS VSS AR63 BA14 VSS VSS F28
AL32 VSS VSS AR8 BA18 VSS VSS F32
AL35 VSS VSS AT2 BA2 VSS VSS F33
AL38 VSS VSS AT20 BA23 VSS VSS F35
AL4 VSS VSS AT23 BA28 VSS VSS F37
AL45 VSS VSS AT28 BA32 VSS VSS F38
AL48 VSS VSS AT35 BA36 VSS VSS F4
AL52 VSS VSS AT4 F68 VSS VSS F40
AL55 VSS VSS AT42 BA45 VSS VSS F42
AL58 VSS VSS AT56 VSS VSS BA41
AL64 VSS VSS AT58 VSS
VSS VSS
16 OF 20 17 OF 20
SKL-U_BGA1356 SKL-U_BGA1356
@ @
4 4
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SKL-U(11/12)GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 17 of 57
A B C D E
A B C D E
www.qdzbwx.com
1 1
UC1S SKL-U
Rev_0.53
RESERVED SIGNALS-1
2
B2
RSVD_B2 Rev_0.53
@ T183 CFG16 E63 C2 @ RC57 SPARE
CFG17 F63 CFG[16] RSVD_C2
@ T184 CFG[17] 0_0402_5%
B3 AW69 F6
CFG18 E66 RSVD_B3 A3 AW68 RSVD_AW69 RSVD_F6 E3 SOC_XTAL24_IN_U42
@ T186
1
CFG19 F66 CFG[18] RSVD_A3 AU56 RSVD_AW68 RSVD_E3 C11
@ T188 CFG[19] RSVD_AU56 RSVD_C11
AW1 AW48 B11
CFG_RCOMP E60 RSVD_AW1 SOC_XTAL24_OUT_U42 C7 RSVD_AW48 RSVD_B11 A11
CFG_RCOMP E1 U12 RSVD_C7 RSVD_A11 D12
XDP_ITP_PMODE E8 RSVD_E1 E2 U11 RSVD_U12 RSVD_D12 C12
2
@ T189 ITP_PMODE RSVD_E2 RSVD_U11 RSVD_C12 2
H11 F52
AY2 BA4 RSVD_H11 RSVD_F52
AY1 RSVD_AY2 RSVD_BA4 BB4 20 OF 20
RSVD_AY1 RSVD_BB4 1
D1 A4 CC79 SKL-U_BGA1356
D3 RSVD_D1 RSVD_A4 C4 @
RSVD_D3 RSVD_C4 1U_0402_6.3V6K
2
@
K46 BB5 T199 @
K45 RSVD_K46 TP4
RSVD_K45 A69
CC79 near U11,U12 (<10 mm)
AL25 RSVD_A69 B69
AL27 RSVD_AL25 RSVD_B69
RSVD_AL27 AY3 RC182 1 @ 2 0_0402_5%
14MOW52, Connect U11, U12 to 1.8V for
C71 RSVD_AY3 Cannonlake-U PCH compat i bili t y
B70 RSVD_C71 D71
RSVD_B70 RSVD_D71 C70
F60 RSVD_C70
RSVD_F60 C54
A52 RSVD_C54 D54
RSVD_A52 RSVD_D54
BA70 AY4
For 2+3e Solut i on
T213 @ RSVD_TP_BA70 TP1 T214 @
BA68 BB3 T216 @
T215 @ RSVD_TP_BA68 TP2 PM_ZVM#
J71 AY71 RC183 1 @ 2 0_0402_5% Zero Voltage Mode: Control Signal to OPC
2 1 CFG_RCOMP RC237 J68 RSVD_J71 VSS_AY71 AR56 PM_ZVM#
49.9_0402_1% RC185 0_0201_5% RSVD_J68 ZVM# T225 @ VR, when low OPC VR output is 0V.
1 @ 2 F65 AW71 T221 @
2 1 CFG4 G65 VSS_F65 RSVD_TP_AW71 AW70 PM_MSM#
VSS_G65 RSVD_TP_AW70 T223 @
1K_0402_1% RC193 Minimum Speed Mode: Control signal to
F61 AP56 PM_MSM# +1.0V_VCCST
E61 RSVD_F61 MSM# C64
T230 @ VccEOPIO VR (connected only in 2 VR
RSVD_E61 PROC_SELECT# solut i on f or OPC).
3 19 OF 20 SKL_CNL# 1 @ 2 3
RC184 100K_0402_5%
SKL-U_BGA1356
@ #544669 CRB1.1 P.54
#544924 SKL EDS1.2 P.125
PROC_SELECT#
Display Port Presence Strap This pin is for compatibility with future
platforms. It should be unconnected for
1 : Disabled; No Physical Display Port the processor.
CFG4 at t ac hed t o E mbedded Dis pl ay Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port 568813_KBL_U42 Rev0.5
PVT 03/20
SOC_XTAL24_IN_U42 RC233 1 U42@ 2 33_0402_1% SOC_XTAL24_IN_U42_R
YC3 U42@
563377 Intel MOW 33 24MHZ_18PF_XRCGB24M000F2P51R0
3 1
3 1
NC NC
1 1
4 2
4 CC128 CC129 4
U42@ 2 U42@ 2
27P_0402_50V8J 27P_0402_50V8J
DVT 02/08
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SKL-U(12/12)RSVD
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 18 of 57
A B C D E
5 4 3 2 1
U2 U3
U4 U5
M1 G2 DDR_A_D5 M1 G2 DDR_A_D25
VREFCA DQL0 VREFCA DQL0
0.047U_0402_25V7K
DDR_A_D6
0.047U_0402_25V7K
F7 F7 DDR_A_D29 M1 G2 DDR_A_D40 M1 G2 DDR_A_D56
DQL1 DDR_A_D1 DQL1 DDR_A_D27 VREFCA DQL0 VREFCA DQL0
0.047U_0402_25V7K
DDR_A_D43
0.047U_0402_25V7K
H3 H3 F7 F7 DDR_A_D58
DDR_A_MA0 P3 DQL2 H7 DDR_A_D2 DDR_A_MA0 P3 DQL2 H7 DDR_A_D26 DQL1 H3 DDR_A_D44 DQL1 H3 DDR_A_D57
A0 DQL3 A0 DQL3 DQL2 DQL2
1
DDR_A_MA1 P7 H2 DDR_A_D4 DDR_A_MA1 P7 H2 DDR_A_D24 DDR_A_MA0 P3 H7 DDR_A_D42 DDR_A_MA0 P3 H7 DDR_A_D59
CD124
CD125
A1 DQL4 A1 DQL4 A0 DQL3 A0 DQL3
1
DDR_A_MA2 R3 H8 DDR_A_D7 DDR_A_MA2 R3 H8 DDR_A_D31 DDR_A_MA1 P7 H2 DDR_A_D41 DDR_A_MA1 P7 H2 DDR_A_D61
CD126
CD127
DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D0 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D28 DDR_A_MA2 R3 A1 DQL4 H8 DDR_A_D46 DDR_A_MA2 R3 A1 DQL4 H8 DDR_A_D62
2
DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D3 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D30 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D45 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D60
2
DDR_A_MA5 P8 A4 DQL7 DDR_A_MA5 P8 A4 DQL7 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D47 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D63
DDR_A_MA6 P2 A5 DDR_A_MA6 P2 A5 DDR_A_MA5 P8 A4 DQL7 DDR_A_MA5 P8 A4 DQL7
DDR_A_MA7 R8 A6 A3 DDR_A_D13 DDR_A_MA7 R8 A6 A3 DDR_A_D16 DDR_A_MA6 P2 A5 DDR_A_MA6 P2 A5
DDR_A_MA8 R2 A7 DQU0 B8 DDR_A_D14 DDR_A_MA8 R2 A7 DQU0 B8 DDR_A_D18 DDR_A_MA7 R8 A6 A3 DDR_A_D37 DDR_A_MA7 R8 A6 A3 DDR_A_D52
D DDR_A_MA9 A8 DQU1 DDR_A_D9 DDR_A_MA9 A8 DQU1 DDR_A_D17 DDR_A_MA8 A7 DQU0 DDR_A_D39 DDR_A_MA8 A7 DQU0 DDR_A_D55 D
R7 C3 R7 C3 R2 B8 R2 B8
DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D15 DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D23 DDR_A_MA9 R7 A8 DQU1 C3 DDR_A_D32 DDR_A_MA9 R7 A8 DQU1 C3 DDR_A_D53
DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D8 DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D20 DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D35 DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D54
DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D10 DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D22 DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D34 DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D49
DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D12 DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D21 DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D33 DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D50
DDR_A_MA14 L2 A13 DQU6 D7 DDR_A_D11 DDR_A_MA14 L2 A13 DQU6 D7 DDR_A_D19 DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D36 DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D48
A14/WE DQU7 A14/WE DQU7 DDR_A_MA14 L2 A13 DQU6 D7 DDR_A_D38 DDR_A_MA14 L2 A13 DQU6 D7 DDR_A_D51
DDR_A_BA0 N2 DDR_A_BA0 N2 A14/WE DQU7 A14/WE DQU7
8 DDR_A_BA0 DDR_A_BA1 BA0 DDR_A_BA1 BA0 DDR_A_BA0 DDR_A_BA0
8 DDR_A_BA1 N8 B3 +1.2V_VDDQ N8 B3 +1.2V_VDDQ N2 N2 +1.2V_VDDQ
BA1 VDD B9 BA1 VDD B9 DDR_A_BA1 N8 BA0 B3 DDR_A_BA1 N8 BA0 B3
VDD VDD BA1 VDD +1.2V_VDDQ BA1 VDD
+1.2V_VDDQ E2 D1 +1.2V_VDDQ E2 D1 B9 B9
E7 DMU/DBIU VDD G7 E7 DMU/DBIU VDD G7 E2 VDD D1 E2 VDD D1
DML/DBIL VDD DML/DBIL VDD +1.2V_VDDQ DMU/DBIU VDD +1.2V_VDDQ DMU/DBIU VDD
J1 J1 E7 G7 E7 G7
VDD J9 VDD J9 DML/DBIL VDD J1 DML/DBIL VDD J1
VDD L1 VDD L1 VDD J9 VDD J9
DDR_A_CLK0 K7 VDD L9 DDR_A_CLK0 K7 VDD L9 VDD L1 VDD L1
8 DDR_A_CLK0 DDR_A_CLK#0 CK_t VDD DDR_A_CLK#0 CK_t VDD DDR_A_CLK0 VDD DDR_A_CLK0 VDD
8 DDR_A_CLK#0 K8 R1 K8 R1 K7 L9 K7 L9
DDR_A_CKE0 K2 CK_c VDD T9 DDR_A_CKE0 K2 CK_c VDD T9 DDR_A_CLK#0 K8 CK_t VDD R1 DDR_A_CLK#0 K8 CK_t VDD R1
8 DDR_A_CKE0 CKE VDD CKE VDD DDR_A_CKE0 CK_c VDD DDR_A_CKE0 CK_c VDD
K2 T9 K2 T9
CKE VDD CKE VDD
A1 A1
VDDQ A9 VDDQ A9 A1 A1
VDDQ C1 VDDQ C1 VDDQ A9 VDDQ A9
VDDQ D9 VDDQ D9 VDDQ C1 VDDQ C1
VDDQ F2 VDDQ F2 VDDQ D9 VDDQ D9
VDDQ F8 VDDQ F8 VDDQ F2 VDDQ F2
DDR_A_ODT0 K3 VDDQ G1 DDR_A_ODT0 K3 VDDQ G1 VDDQ F8 VDDQ F8
8 DDR_A_ODT0 DDR_A_CS#0 ODT VDDQ DDR_A_CS#0 ODT VDDQ DDR_A_ODT0 VDDQ DDR_A_ODT0 VDDQ
8 DDR_A_CS#0 L7 G9 L7 G9 K3 G1 K3 G1
DDR_A_MA16 L8 CS VDDQ J2 DDR_A_MA16 L8 CS VDDQ J2 DDR_A_CS#0 L7 ODT VDDQ G9 DDR_A_CS#0 L7 ODT VDDQ G9
DDR_A_MA15 M8 RAS VDDQ J8 DDR_A_MA15 M8 RAS VDDQ J8 DDR_A_MA16 L8 CS VDDQ J2 DDR_A_MA16 L8 CS VDDQ J2
CAS VDDQ CAS VDDQ DDR_A_MA15 M8 RAS VDDQ J8 DDR_A_MA15 M8 RAS VDDQ J8
B2 RD206 B2 RD207 CAS VDDQ CAS VDDQ
VSS 10mils VSS 10mils
E1 240_0402_1% E1 240_0402_1% B2 10mils RD208 B2 10mils
VSS E9 VSS_E9_U2 1 DDP@ 2 VSS E9 VSS_E9_U3 1 DDP@ 2 VSS E1 240_0402_1% VSS E1
VSS G8 VSS G8 VSS E9 VSS_E9_U4 1 DDP@ 2 VSS E9 VSS_E9_U5
DDR_A_DQS#1 A7 VSS K1 RD79 DDR_A_DQS#2 A7 VSS K1 VSS G8 VSS G8
DDR_A_DQS1 DQSU_c VSS 10mils DDR_A_DQS2 DQSU_c VSS 10mils DDR_A_DQS#4 VSS DDR_A_DQS#6 VSS
B7 K9 0_0402_5% B7 K9 A7 K1 10mils A7 K1
DDR_A_DQS#0 F3 DQSU_t VSS M9 DDR_A_BG1_R 1 SDP@ 2 DDR_A_DQS#3 F3 DQSU_t VSS M9 DDR_A_BG1_R DDR_A_DQS4 B7 DQSU_c VSS K9 DDR_A_DQS6 B7 DQSU_c VSS K9
DQSL_c VSS DQSL_c VSS DQSU_t VSS DQSU_t VSS
1
DDR_A_DQS0 DDR_A_DQS3 DDR_A_DQS#5 DDR_A_BG1_R DDR_A_DQS#7
240_0402_1%
RD209
G3 N1 G3 N1 F3 M9 F3 M9
DQSL_t VSS DQSL_t VSS DDR_A_DQS5 DQSL_c VSS DDR_A_DQS7 DQSL_c VSS
DDP@
T1 RD78 T1 G3 N1 G3 N1
DDR_A_BG1_R
MEMRST# P1 VSS 0_0201_1% MEMRST# P1 VSS DQSL_t VSS T1 DQSL_t VSS T1
RESET 1 DDP@ 2 DDR_A_BG1 RESET MEMRST# P1 VSS MEMRST# P1 VSS
1 2 RD210 F9 1 2 RD211 F9 RESET RESET
2
240_0402_1% ZQ 240_0402_1% ZQ 1 2 RD212 F9 1 2 RD213 F9
DDR_A_BG1(RD78, Intel:549352) ZQ ZQ
C 1. Near SOC side 240_0402_1% 240_0402_1% C
DDR_A_ACT# L3 A2 DDR_A_ACT# L3 A2
8 DDR_A_ACT# DDR_A_BG0 ACT VSSQ 2. BO1+BO2+M small then other DDR_A_BG0 ACT VSSQ DDR_A_ACT# DDR_A_ACT# 10mils
8 DDR_A_BG0 M2 A8 CMD 25mils M2 A8 L3 A2 L3 A2
N9 BG0 VSSQ C9 N9 BG0 VSSQ C9 DDR_A_BG0 M2 ACT VSSQ A8 DDR_A_BG0 M2 ACT VSSQ A8
DDR_A_ALERT# TEN VSSQ 3. BO1+BO2 small then 800mils DDR_A_ALERT# TEN VSSQ BG0 VSSQ BG0 VSSQ
8 DDR_A_ALERT# P9 D2 P9 D2 N9 C9 N9 C9
DDR_A_PAR T3 ALERT VSSQ D8 DDR_A_PAR T3 ALERT VSSQ D8 DDR_A_ALERT# P9 TEN VSSQ D2 DDR_A_ALERT# P9 TEN VSSQ D2
8 DDR_A_PAR PAR VSSQ PAR VSSQ DDR_A_PAR ALERT VSSQ DDR_A_PAR ALERT VSSQ
E3 E3 T3 D8 T3 D8
T7 VSSQ E8 T7 VSSQ E8 PAR VSSQ E3 PAR VSSQ E3
B1 NC VSSQ F1 B1 NC VSSQ F1 T7 VSSQ E8 T7 VSSQ E8
+2.5V VPP VSSQ +2.5V VPP VSSQ NC VSSQ NC VSSQ
R9 H1 R9 H1 +2.5V B1 F1 +2.5V B1 F1
VPP VSSQ H9 VPP VSSQ H9 R9 VPP VSSQ H1 R9 VPP VSSQ H1
8 DDR_A_MA[0..16] VSSQ VSSQ VPP VSSQ VPP VSSQ
96-BALL 96-BALL H9 H9
SDRAM DDR4 SDRAM DDR4 96-BALL VSSQ 96-BALL VSSQ
8 DDR_A_DQS#[0..7]
K4A8G165WB-BCPB_FBGA96 K4A8G165WB-BCPB_FBGA96 SDRAM DDR4 SDRAM DDR4
X76@ X76@ K4A8G165WB-BCPB_FBGA96 K4A8G165WB-BCPB_FBGA96
8 DDR_A_DQS[0..7]
X76@ X76@
8 DDR_A_D[0..63]
8 DDR_A_BG1
TERMINATION
+0.6VS_VTT
DDR4 mapping SDP DDP +1.2V_VDDQ +0.6VS_VTT RP17
DDR_A_MA14 1 8
E9 VSS UZQ +0.6V_A_VREFCA DDR_A_CLK0 RD214 1 2 36_0402_1% DDR_A_CS#0 2 7
DDR_A_CLK#0 RD215 1 2 36_0402_1% DDR_A_MA15 3 6
M9 VSS BG1
2
DDR_A_MA12 4 5
NC VSS RD195
T7 +0.6VS_VTT 36_0804_8P4R_5%
1.8K_0402_1%
RD11 +DDR_VREF_CA
RCOMP[0] 2.7_0402_1% RP18
(SOC side) 200_1% 121_1%
1
2 1 DDR_A_BG1_R RD86 1 DDP@ 2 36_0402_1% DDR_A_MA13 1 8
DDR_A_MA8 2 7
DDR_A_PAR 3 6
+1.2V_VDDQ DDR_A_MA11 4 5
4 as near each on board RAM device as possible Follow MA51 1
+1.2V_VDDQ SDP@ SDP@
RD206 RD208 CD24 36_0804_8P4R_5%
DDR_A_ALERT#
CD212
CD230
CD227
CD228
CD231
CD232
CD235
CD211
CD216
CD217
CD218
CD225
CD226
CD233
CD234
CD236
CD210
CD213
CD214
CD215
CD229
2
+ CD237 SDP@ SDP@ DDR_A_MA5 2 7
DDR_A_MA7
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
1
9mohm POLY
RP20
DDR_A_BG0 1 8
DDR_A_MA10 2 7
DDR_A_MA3 3 6
DDR_A_BA1 4 5
36_0804_8P4R_5%
DVT 01/23
RP21
DDR_A_CKE0 1 8
DDR_DRAMRST# 1 2 MEMRST# DDR_A_MA16 2 7
8,20 DDR_DRAMRST# DDR_A_ODT0
RD202 0_0402_5% 3 6
DDR_A_ACT# 4 5
1
36_0804_8P4R_5%
@ CD219
+2.5V
.1U_0402_16V7K
2
CD241
CD238
CD242
CD244
CD243
CD221
CD222
CD239
CD240
CD245
CD220
DDR_A_MA2 1 2 RD216
1 1 1 1 1 1 1 1 1 1 1
36_0402_1%
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
2 2 2 2 2 2 2 2 2 2 2
RP24
DDR_A_MA4 1 8
DDR_A_BA0 2 7
DDR_A_MA0 3 6
DDR_A_MA6 4 5
36_0804_8P4R_5%
2 as near each on board RAM device as possible
+0.6VS_VTT Page12
A A
RAM_ID3 RAM_ID2 *RAM_ID1 *RAM_ID0 PartNumber - Description
CD224
CD223
CD249
CD253
CD246
CD252
CD247
CD248
CD250
CD251
1U_0402_6.3V6K
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2 2 2 2 2 2 2 2 2 2
Samsung 4GB 0 0 1 0 SA00009U420 (S IC D4 512M16 K4A8G165WB-BCRC FBGA 96P ABO !)
0 0 1 1
No OnBoard No On Board Memory
Memory 1 1 1 1
Security Classification
2016/11/04
Compal Secret Data Compal Electronics, Inc.
2 as near each on board RAM device as possible Issued Date Deciphered Date 2018/11/04 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR4 ON BOARD CHIPS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 19 of 57
5 4 3 2 1
A B C D E
8 DDR_B_DQS#[0..7]
DDR_B_CLK0 137
JDIMM2A
STD 8
www.qdzbwx.com
DDR_B_D10
Standard Type
8 DDR_B_D[0..63] DDR_B_CLK#0 139 CK0(T) DQ0 7 DDR_B_D14
DDR_B_CLK1 138 CK0#(C) DQ1 20 DDR_B_D9
8 DDR_B_DQS[0..7] DDR_B_CLK#1 140 CK1(T) DQ2 21 DDR_B_D12
CK1#(C) DQ3 4 DDR_B_D11 2-3A to 1 DIMMs/channel
DDR_B_CKE0 109 DQ4 3 DDR_B_D15
8 DDR_B_MA[0..16] DDR_B_CKE1 110 CKE0 DQ5 16 DDR_B_D13
DDR_B_BA0 +3VS CKE1 DQ6 17 DDR_B_D8
8 DDR_B_BA0 DDR_B_BA1 DDR_B_CS#0 149 DQ7 13 DDR_B_DQS1
8 DDR_B_BA1 DDR_B_BG0 DDR_B_CS#1 157 S0# DQS0(T) 11 DDR_B_DQS#1
8 DDR_B_BG0 DDR_B_BG1 162 S1# DQS0#(C) +1.2V_VDDQ +1.2V_VDDQ
8 DDR_B_BG1 S2#/C0
1
1 DDR_B_ACT# 165 28 DDR_B_D1 JDIMM2B 1
8 DDR_B_ACT# DDR_B_ALERT# S3#/C1 DQ8 DDR_B_D0
0_0402_5%
RD52
29 STD
8 DDR_B_ALERT# DDR_B_PAR DDR_B_ODT0 155 DQ9 41 DDR_B_D7 111 141
8 DDR_B_PAR DDR_B_ODT1 161 ODT0 DQ10 42 DDR_B_D2 112 VDD1 VDD11 142
@ ODT1 DQ11 24 DDR_B_D5 117 VDD2 VDD12 147
2
DDR_B_BG0 115 DQ12 25 DDR_B_D4 118 VDD3 VDD13 148
DDR_B_CLK0 DDR_B_BG1 113 BG0 DQ13 38 DDR_B_D3 +1.2V_VDDQ 123 VDD4 VDD14 153
8 DDR_B_CLK0 DDR_B_CLK#0 DDR_B_SA2 DDR_B_BA0 150 BG1 DQ14 37 DDR_B_D6 124 VDD5 VDD15 154
8 DDR_B_CLK#0 DDR_B_CLK1 DDR_B_SA1 DDR_B_BA1 145 BA0 DQ15 34 DDR_B_DQS0 +0.6V_B_VREFCA 129 VDD6 VDD16 159
8 DDR_B_CLK1 BA1 DQS1(T) VDD7 VDD17
1
DDR_B_CLK#1 DDR_B_SA0 32 DDR_B_DQS#0 130 160
8 DDR_B_CLK#1 DDR_B_MA0 144 DQS1#(C) RD46 135 VDD8 VDD18 163
A0 VDD9 VDD19
1
DDR_B_MA1 DDR_B_D17
0_0402_5%
RD54
0_0402_5%
RD56
133 50 1K_0402_1% 136
DDR_B_CKE0 DDR_B_MA2 132 A1 DQ16 49 DDR_B_D21 +0.6V_DDRB_VREFCA VDD10
8 DDR_B_CKE0 DDR_B_CKE1 DDR_B_MA3 131 A2 DQ17 62 DDR_B_D19 255 258
RD49 +3VS +0.6VS_VTT
2
8 DDR_B_CKE1 DDR_B_CS#0 DDR_B_MA4 128 A3 DQ18 63 DDR_B_D23 VDDSPD VTT
@ @ 2_0402_1% 10mils
8 DDR_B_CS#0 DDR_B_CS#1 DDR_B_MA5 126 A4 DQ19 46 DDR_B_D16 2 1 164 257
+2.5V
2
8 DDR_B_CS#1 DDR_B_MA6 127 A5 DQ20 45 DDR_B_D20 VREFCA VPP1 259
DDR_B_MA7 A6 DQ21 DDR_B_D18 1 VPP2
122 58
SOC_SMBDATA_1 DDR_B_MA8 125 A7 DQ22 59 DDR_B_D22 CD66 1 99
9,33 SOC_SMBDATA_1 A8 DQ23 1 VSS VSS
1
SOC_SMBCLK_1 DDR_B_MA9 121 55 DDR_B_DQS2 0.022U_0402_16V7K 2 102
9,33 SOC_SMBCLK_1 DDR_B_MA10 146 A9 DQS2(T) 53 DDR_B_DQS#2 2 5 VSS VSS 103
RD47 CD65
DDR_B_MA11 120 A10_AP DQS2#(C) 1K_0402_1% 0.1U_0201_10V6K 6 VSS VSS 106
A11 VSS VSS
1
DDR_B_ODT0 DDR_B_MA12 119 70 DDR_B_D25 2 9 107
8 DDR_B_ODT0 DDR_B_ODT1 DDR_B_MA13 158 A12 DQ24 71 DDR_B_D28 10 VSS VSS 167
RD50
2
8 DDR_B_ODT1 DDR_B_MA14 151 A13 DQ25 83 DDR_B_D31 14 VSS VSS 168
A14_WE# DQ26 24.9_0402_1% VSS VSS
DDR_B_MA15 156 84 DDR_B_D27 15 171
DDR_B_MA16 152 A15_CAS# DQ27 66 DDR_B_D24 18 VSS VSS 172
2
A16_RAS# DQ28 67 DDR_B_D29 19 VSS VSS 175
DDR_B_ACT# 114 DQ29 79 DDR_B_D30 22 VSS VSS 176
ACT# DQ30 80 DDR_B_D26 23 VSS VSS 180
DDR_B_PAR 143 DQ31 76 DDR_B_DQS3 26 VSS VSS 181
DDR_B_ALERT# 116 PARITY DQS3(T) 74 DDR_B_DQS#3 27 VSS VSS 184
Layout Note:
2
Place near JDIMM2 +1.2V_VDDQ RD63 2 1 240_0402_1% DDR_B_EVENT# 134
DDR_DRAMRST# 108
ALERT#
EVENT#
DQS3#(C)
DDR_B_D37
Place near to SO-DIMM connector. 30 VSS
VSS
VSS
VSS
185 2
174 31 188
8,19 DDR_DRAMRST# RESET# DQ32 173 DDR_B_D32 35 VSS VSS 189
RD1 1 2 470_0402_5% DQ33 187 DDR_B_D39 36 VSS VSS 192
+1.2V_VDDQ SOC_SMBDATA_1 254 DQ34 DDR_B_D35 VSS VSS
186 39 193
CD30 2 1 .1U_0402_16V7K SOC_SMBCLK_1 253 SDA DQ35 170 DDR_B_D36 40 VSS VSS 196
@ESD@ SCL DQ36 169 DDR_B_D33 43 VSS VSS 197
+1.2V_VDDQ DDR_B_SA2 166 DQ37 183 DDR_B_D38 44 VSS VSS 201
DDR_B_SA1 260 SA2 DQ38 182 DDR_B_D34 47 VSS VSS 202
DDR_B_SA0 256 SA1 DQ39 179 DDR_B_DQS4 48 VSS VSS 205
SA0 DQS4(T) DDR_B_DQS#4 VSS VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
177 51 206
DQS4#(C) 52 VSS VSS 209
1 1 1 1 1 1 1 1 DDR_B_D41 VSS VSS
92 195 56 210
CB0_NC DQ40 DDR_B_D45 VSS VSS
CD32
CD33
CD36
CD37
CD35
CD34
CD69
CD70
91 194 57 213
101 CB1_NC DQ41 207 DDR_B_D46 60 VSS VSS 214
2 2 2 2 2 2 2 2 105 CB2_NC DQ42 208 DDR_B_D42 61 VSS VSS 217
88 CB3_NC DQ43 191 DDR_B_D40 64 VSS VSS 218
87 CB4_NC DQ44 190 DDR_B_D44 65 VSS VSS 222
100 CB5_NC DQ45 203 DDR_B_D43 68 VSS VSS 223
104 CB6_NC DQ46 204 DDR_B_D47 69 VSS VSS 226
RD61 2 1 240_0402_1% DDR_B_DQS8 97 CB7_NC DQ47 200 DDR_B_DQS5 72 VSS VSS 227
+1.2V_VDDQ DDR_B_DQS#8 DQS8(T) DQS5(T) DDR_B_DQS#5 VSS VSS
RD62 2 1 240_0402_1% 95 198 73 230
DQS8#(C) DQS5#(C) 77 VSS VSS 231
+1.2V_VDDQ 216 DDR_B_D53 78 VSS VSS 234
12 DQ48 215 DDR_B_D49 81 VSS VSS 235
+1.2V_VDDQ DM0#/DBI0# DQ49 DDR_B_D54 VSS VSS
33 228 82 238
54 DM1#/DBI1# DQ50 229 DDR_B_D51 85 VSS VSS 239
75 DM2#/DBI2# DQ51 211 DDR_B_D48 86 VSS VSS 243
DM3#/DBI3# DQ52 DDR_B_D52 VSS VSS
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CD42
CD44
CD38
CD39
CD41
CD43
CD45
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1
CD64
CD63
CD62
+2.5V +3VS
2 2 2
4 4
10U_0603_6.3V6M
1U_0402_6.3V6K
2.2U_0402_6.3V6M
1 1
1
CD68
CD67
CD55
2
2 2
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR4_DIMMB
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 20 of 57
A B C D E
A B C D E
www.qdzbwx.com
RP2001
AE12 NC PEX_RX4_N GPIO9 C5 VRAM_VREF_CTL 10K_0804_8P4R_5% GPIO9 I/O THERM_ALERT
1 NC PEX_RX5 GPIO10 NV_GPIO11 VRAM_VREF_CTL 26 GPU_EVENT#_1 1
AF12 E7 8 1
AG12 NC PEX_RX5_N GPIO11 D7 ACIN_BUF 3_1.8VSDGPU_MAIN_EN 7 2
GPIO10 O MEM_VREF_CTL
AG13 NC PEX_RX6 GPIO12 B4 NV_GPIO13 NV_GPIO8 RV178 1 N16X@ 2 0_0402_5% SYS_PEX_RST_MON#_R GPU_PEX_RST_HOLD# 6 3 GPIO11 O PWM_VID
GPIO
AF13 NC PEX_RX6_N GPIO13 B3
23 NV_GPIO8 GC6_FB_EN1V8 5 4 GPIO12 I PWR_LEVEL
+3VS_1.8VSDGPU_AON AE13 NC PEX_RX7 GPIO14 C3
NC PEX_RX7_N GPIO15 NV_GPIO1 VRAM_VDD_CTL GPIO13 O PSI
AE15 D5 RV180 1 N16X@ 2 0_0402_5% VGA@
AF15 NC PEX_RX8 GPIO16 D4 NV_GPIO8 RV179 1 N17S@ 2 0_0402_5% VRAM_VDD_CTL 51 GPIO14 I HPD_A
AG15 NC PEX_RX8_N GPIO17 C2 GPIO15 I HPD_C
AG16 NC PEX_RX9 GPIO18 F7
NC PEX_RX9_N GPIO19 GPIO16 I FRAME_LOCK#
AF16 E6 +3VS_1.8VSDGPU_AON
NV_I2CB_SCL RV183 1 N17S@ 2 1.8K_0402_1% AE16 NC PEX_RX10 GPIO20 C4 GPU_PEX_RST_HOLD# GPIO17 I HPD_D
NV_I2CB_SDA RV184 1 N17S@ 2 1.8K_0402_1% AE18 NC PEX_RX10_N GPIO21 UV11 N16X@ GPIO18 I HPD_E
AF18 NC PEX_RX11 NC AB6 MC74VHC1G08DFT2G_SC70-5
NV_I2CC_SCL NC PEX_RX11_N PEX_WAKE_NC GPIO19 I HPD_F or HPD_B
RV185 1 N17S@ 2 1.8K_0402_1% AG18 SA00000OH00 R2000
NV_I2CC_SDA RV186 1 N17S@ 2 1.8K_0402_1% AG19 NC PEX_RX12 VCC: 2.0 ~ 5.5V I2CS_SDA 1 VGA@ 2 1.8K_0402_1% GPIO20 Reserved
AF19 NC PEX_RX12_N +3VS_1.8VSDGPU_AON QV5 N16X@ R2001
NC PEX_RX13
Push Pull Output GPIO21 O GPU_PEX_RST_HOLD#
AE19 2N7002KDW_SOT363-6 I2CS_SCL 1 VGA@ 2 1.8K_0402_1%
AE21 NC PEX_RX13_N AG3 +3VS_1.8VSDGPU_AON SB00000EO00 R2052
GPIO22
2
AF21 NC PEX_RX14 NC AF4 DGPU_PSI 2 VGA@ 1 10K_0402_5% GPIO23
AG21 NC PEX_RX14_N NC AF3 VCC: 1.65 ~ 5.5V RV83
AG22 NC PEX_RX15 NC
NC PEX_RX15_N
Push Pull Output 10K_0402_5% CLKREQ_PCIE#0 11
5
@ N17 GPU
PH at PCH side GPU_EVENT#_12 1
VCC
GPU_EVENT# 12 GPIO I/O USAGE
3
CV11 VGA@ 1 2 0.22U_0402_16V7K PCIE_CRX_C_GTX_P1 AC9 AE3 1VS_DGPU_PG 1 D2011 VGA@
13 PCIE_CRX_GTX_P1 PEX_TX0 NC IN B
DACs
CV12 VGA@ 1 2 0.22U_0402_16V7K PCIE_CRX_C_GTX_N1 AB9 AE4 4 ALL_GPWRGD 5 G
D
QV5A RB751V-40_SOD323-2 GPIO0 O PWM_VID
13 PCIE_CRX_GTX_N1 PCIE_CRX_C_GTX_P2 PEX_TX0_N NC OUT Y ACIN_BUF
CV13 VGA@ 1 2 0.22U_0402_16V7K AB10 2 PJT138KA 2N SOT363-6 2 1 GC6_FB_EN
GND
13 PCIE_CRX_GTX_P2 40,51 1.35VS_DGPU_PG S
GPIO1 O
CV14 VGA@ 1 2 0.22U_0402_16V7K PCIE_CRX_C_GTX_N2 AC10 PEX_TX1 IN A N17S@ D2000 VGA@ DGPU_AC_DETECT 12,37
13 PCIE_CRX_GTX_N2
4
2
PCIE_CRX_C_GTX_P3 PEX_TX1_N GPIO2 I GPU_EVENT#
PCI EXPRESS
13 PCIE_CRX_GTX_P3 CV15 VGA@ 1 2 0.22U_0402_16V7K AD11 UV11 RV165 RB751V-40_SOD323-2
CV16 VGA@ 1 2 0.22U_0402_16V7K PCIE_CRX_C_GTX_N3 AC11 PEX_TX2 W5 NL17SZ08DFT2G_SC70-5 10K_0402_5% GPIO3 I/O NVVDDS_PWM
13 PCIE_CRX_GTX_N3
3
CV17 VGA@ 1 2 0.22U_0402_16V7K PCIE_CRX_C_GTX_P4 AC12 PEX_TX2_N NC AE2 N17S@ VGA@ DGPU_CLKREQ#
13 PCIE_CRX_GTX_P4 PCIE_CRX_C_GTX_N4 PEX_TX3 TS_VREF TSEN_VREF GPIO4 O 1V8_MAIN_EN
13 PCIE_CRX_GTX_N4 CV18 VGA@ 1 2 0.22U_0402_16V7K AB12 AF2
AB13 PEX_TX3_N NC GPIO5 I FRAME_LOCK#
1
AC13 NC PEX_TX4 1 @ 2 GPIO6 O PSI
2
DA-08329-001_V02 AD14
AC14
NC PEX_TX4_N
NC PEX_TX5
RV166
0_0402_5%
PLTRST_VGA# GPIO7 O LCD_BL_PWM
2
2
AB16 NC PEX_TX6_N B7 NV_I2CA_SCL R2003 1 N16X@ 2 1.8K_0402_1%
GPIO23 I2CA_SCL N17S@ GPIO10 O MEM_VREF_CTL
AC16 NC PEX_TX7 A7 NV_I2CA_SDA R2004 1 N16X@ 2 1.8K_0402_1%
G
NC PEX_TX7_N GPIO22 I2CA_SDA A6_OVERT# GPIO11 O LCD_VDD
AD17 1 6 GPU_OVERT# 22,37
NC PEX_TX8 NV_I2CB_SCL PLTRST_VGA#
D
AC17 C9 R2005 1 N16X@ 2 1.8K_0402_1% GPIO12 I PWR_LEVEL
AC18 NC PEX_TX8_N I2CB_SCL C8 NV_I2CB_SDA R2006 1 N16X@ 2 1.8K_0402_1%
NC PEX_TX9 I2CB_SDA GPIO13 O LCD_BLEN
I2C
AB18 QV9
AB19 NC PEX_TX9_N A9 NV_I2CC_SCL R2007 1 N16X@ 2 1.8K_0402_1% GPIO14 I HPD_IFPA
BSS138W-7-F_SOT323-3
2
NC PEX_TX10 I2CC_SCL NV_I2CC_SDA
G
AC19 B9 R2008 1 N16X@ 2 1.8K_0402_1% GPIO15 I HPD_IFPB
NC PEX_TX10_N I2CC_SDA @
AD20 GPIO16 Reserved
AC20 NC PEX_TX11 D9 I2CS_SCL GPIO9_ALERT 3 1
NC PEX_TX11_N I2CS_SCL I2CS_SDA GPU_ALERT 37 GPIO17 I HPD_IFPD
AC21 D8
D
AB21 NC PEX_TX12 I2CS_SDA GPIO18 I HPD_IFPE
AD23 NC PEX_TX12_N
AE23 NC PEX_TX13 Place Under L6 GPIO19 O 3D_VISION
NC PEX_TX13_N GPIO20 Reserved
AF24 C2000
AE24 NC PEX_TX14 XS_PLLVDD L6 +PLLVDD 1 2 .1U_0402_16V7K VGA@ GPIO21 Reserved (OC_WARN)
AG24 NC PEX_TX14_N PLLVDD M6 +GPU_PLLVDD
GPIO22 Reserved
AG25 NC PEX_TX15 SP_PLLVDD +3VS_1.8VSDGPU_AON Q2001 N16X@
NC PEX_TX15_N N6 1 N17S@ 2 2N7002KDW_SOT363-6 GPIO23 Reserved
R2009 VID_PLLVDD NC RV187 SB00000EO00
VCC: 1.65 ~ 5.5V
5
10K_0402_5% 0_0402_5% Push Pull Output VGA_GATE
1 VGA@ 2 AE8 C2001 Q2001B
VCC
+3VS_1.8VSDGPU_AON 11 CLK_PCIE_P0
2
AD8 PEX_REFCLK VGA@ PLTRST_VGA# 1 PJT138KA 2N SOT363-6
DGPU_CLKREQ# 11 CLK_PCIE_N0 PEX_REFCLK_N IN B VGA_GATE
AC6 1 2 .1U_0402_16V7K 4 N17S@
G
PEX_CLKREQ_N C2750 1 2 .1U_0402_16V7K 2 OUT Y I2CS_SCL 1 6
1
GND
PEX_TSTCLK_OUT+ +3VS_1.8VSDGPU_MAIN IN A SOC_SML1CLK 9,37
D
AF22 NC VGA@
CLK
3
XTAL_OUT NL17SZ08DFT2G_SC70-5 2 @ Q2001A
GC6 2.0 function
5
3 PLTRST_VGA# AC7 A10 XTAL_SSIN R2012 1 VGA@ 2 10K_0402_5% PJT138KA 2N SOT363-6 3
2 VGA@ 1 PEX_TREMP AF25 PEX_RST_N XTAL_SSIN C10 XTAL_OUTBUFF R2013 1 VGA@ 2 10K_0402_5% N17S@
G
R2011 2.49K_0402_1% PEX_TERMP XTAL_OUTBUFF 1 VGA@ 2 VGA_GATE I2CS_SDA 4 3
SOC_SML1DATA 9,37
D
RV161
GM108-ES-S-A1_FCBGA595 0_0402_5%
@
+3VS
RV113 +GPU_PLLVDD
1 N17S@ 2 GC6_FB_EN3V3 R4966
GC6_FB_EN3V3 12
10K_0402_5% 0_0402_5%
3
1 1.35VSDGPU_PWR_EN 38mA
1.35VSDGPU_PWR_EN 40,51
S
6
QV8A 3 VGA@
4
GC6_FB_EN1V8 2 G
D
N17S@ +PLLVDD 1 2 N16X@
1
15P_0402_50V8J
+3VS_1.8VSDGPU_AON R4967 +GPU_PLLVDD NC NC
15P_0402_50V8J
17mA SM01000AG00 2A 300ohm@100mhz DCR 0.1
2
1
0_0402_5% 1 2 N16X@ VGA@ C2005
1
VCC: 1.65 ~ 5.5V 1 N16X@ 2 SYS_PEX_RST_MON#_R L2003 HCB1608KF-301T20_2P VGA@ 4 2 VGA@
SP_PLLVDD+VID_PLLVDD
5
2
R2017 22U_0603_6.3V6M L2001 PBY160808T-300Y-N_2P
22U_0603_6.3V6M
4.7U_0402_6.3V6M
300ohm(ESR0.2)x1
VCC
2
PLT_RST_BUF# 1
N17S@ C2752
C2007
C2006
12 DGPU_HOLD_RST# IN A +3VS_1.8VSDGPU_AON
4 NL17SZ08DFT2G_SC70-5 2016/11/10 4
2 2 2
N16X@
VGA@
1. NV reference design
3
+3VS_1.8VSDGPU_AON R2019
UV2 N16X@ 0_0402_5% RV100
2. Top side only 1.2mm high
MC74VHC1G08DFT2G_SC70-5 U2002 N17S@ 10K_0402_5% Near GPU
5
SA00000OH00 N16X@ @
1
B 4
Push Pull Output
GPU_PEX_RST_HOLD# 1 Y PLTRST_VGA# 22 Security Classification Compal Secret Data Compal Electronics, Inc.
1
G
A
Issued Date 2016/11/04 Deciphered Date 2018/11/04 Title
MC74VHC1G08DFT2G_SC70-5 R2018
N16X PEG 1/9
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, April 20, 2017 Sheet 21 of 57
A B C D E
A B C D E
26 MDA[15..0] MDA[31..16]
26 MDA[31..16] MDA[47..32]
27 MDA[47..32] MDA[63..48]
27 MDA[63..48]
S IC N16S-GTR-S-A2 BGA 595P GPU ABO ! S IC N17S-G1-A1 BGA 595P GPU ABO !
www.qdzbwx.com
UGPU1B N16SGTR@ N17SG1@
SA00009FP40 SA0000ANV10
Part 2 of 6
CMDA[31..0] 26,27
MDA0 E18 C27 CMDA0
1 FBA_D00 FBA_CMD0 1
MDA1 F18 C26 CMDA1
MDA2 E16 FBA_D01 FBA_CMD1 E24 CMDA2
MDA3 F17 FBA_D02 FBA_CMD2 F24 CMDA3
MDA4 D20 FBA_D03 FBA_CMD3 D27 CMDA4
MDA5 D21 FBA_D04 FBA_CMD4 D26 CMDA5
MDA6 F20 FBA_D05 FBA_CMD5 F25 CMDA6
MDA7 E21 FBA_D06 FBA_CMD6 F26 CMDA7
MDA8 E15 FBA_D07 FBA_CMD7 F23 CMDA8
MDA9 D15 FBA_D08 FBA_CMD8 G22 CMDA9
MDA10 F15 FBA_D09 FBA_CMD9 G23 CMDA10 +1.35VSDGPU
MDA11 F13 FBA_D10 FBA_CMD10 G24 CMDA11
MDA12 C13 FBA_D11 FBA_CMD11 F27 CMDA12 +3VS
MDA13 B13 FBA_D12 FBA_CMD12 G25 CMDA13 CMDA14 2 VGA@ 1
MDA14 E13 FBA_D13 FBA_CMD13 G27 CMDA14 RV87 10K_0402_5%
MDA15 D13 FBA_D14 FBA_CMD14 G26 CMDA15 CMDA30 2 VGA@ 1
MDA16 B15 FBA_D15 FBA_CMD15 M24 CMDA16 RV88 10K_0402_5%
1
MDA17 C16 FBA_D16 FBA_CMD16 M23 CMDA17
1
MDA18 A13 FBA_D17 FBA_CMD17 K24 CMDA18 RV108
MDA19 A15 FBA_D18 FBA_CMD18 K23 CMDA19 CMDA13 2 VGA@ 1 RV106 10K_0402_5%
MDA20 B18 FBA_D19 FBA_CMD19 M27 CMDA20 RV89 10K_0402_5% 10K_0402_5% @
MDA21 A18 FBA_D20 FBA_CMD20 M26 CMDA21 CMDA29 2 VGA@ 1 @
2
MDA22 A19 FBA_D21 FBA_CMD21 M25 CMDA22 RV90 10K_0402_5% DVT 01/23
PJT138KA 2N SOT363-6
2
MDA23 C19 FBA_D22 FBA_CMD22 K26 CMDA23
3
MDA24 B24 FBA_D23 FBA_CMD23 K22 CMDA24
FBA_D24 FBA_CMD24 Power Side PU to +3VS_1.8VSDGPU_AON
C23 J23 5
D
MDA25 CMDA25 G RV188
MDA26 A25 FBA_D25 FBA_CMD25 J25 CMDA26 S 0_0402_5%
6
MDA27 A24 FBA_D26 FBA_CMD26 J24 CMDA27 QV7A 1 VGA@ 2 VGA_CORE_PG
4
MDA28 A21 FBA_D27 FBA_CMD27 K27 CMDA28 2 G
D
@
MDA29 B21 FBA_D28 FBA_CMD28 K25 CMDA29 QV7B S
1
MDA31 C21 FBA_D30 FBA_CMD30 J26 CMDA31 @ UV10 N16X@
MDA32 R22 FBA_D31 FBA_CMD31 MC74VHC1G08DFT2G_SC70-5
MDA33 R24 FBA_D32 D19 FBA_DBI0 SA00000OH00
FBA_D33 FBA_DQM0 FBA_DBI0 26 DVT 02/09
INTERFACE A
5
MDA40 V23 FBA_D39 FBA_DQM6 U25 FBA_DBI7 RV103
FBA_D40 FBA_DQM7 FBA_DBI7 27
MDA41 V22 10K_0402_1%
VCC
MDA42 T23 FBA_D41 F19 DQSA#0 T254 @ 2 @ 1 DGPU_MAIN_EN 1
FBA_D42 FBA_DQS_RN0 21,40 3_1.8VSDGPU_MAIN_EN IN B PEX_VDD_EN
MDA43 U22 C14 DQSA#1 T249 @ 1 4
FBA_D43 FBA_DQS_RN1 OUT Y PEX_VDD_EN 40,52
MDA44 Y24 A16 DQSA#2 T252 @ 2
GND
MDA45 AA24 FBA_D44 FBA_DQS_RN2 A22 DQSA#3 T253 @ CV231 @ IN A UV10
MDA46 Y22 FBA_D45 FBA_DQS_RN3 P25 DQSA#4 T255 @ N17S@
FBA_D46 FBA_DQS_RN4 .1U_0402_16V7K
MDA47 AA23 W22 DQSA#5 T256 @ 2 NL17SZ08DFT2G_SC70-5
DVT 01/23
3
MDA48 AD27 FBA_D47 FBA_DQS_RN5 AB27 DQSA#6 T250 @
MDA49 AB25 FBA_D48 FBA_DQS_RN6 T27 DQSA#7 T251 @
MDA50 AD26 FBA_D49 FBA_DQS_RN7 DV7 VGA@
FBA_D50 FBA_EDC0 DGPU_PWR_EN 12,40
MDA51 AC25 E19 RB751S40T1G_SOD523-2
FBA_D51 FBA_DQS_WP0 FBA_EDC1 FBA_EDC0 26 GPU_OVERT#
MDA52 AA27 C15 1 2 RV189 N17S@ PVT 03/09
FBA_D52 FBA_DQS_WP1 FBA_EDC2 FBA_EDC1 26 21,37 GPU_OVERT#
MDA53 AA26 B16 2.2K_0402_5%
FBA_D53 FBA_DQS_WP2 FBA_EDC3 FBA_EDC2 26
MDA54 W26 B22 SD028220180
FBA_D54 FBA_DQS_WP3 FBA_EDC4 FBA_EDC3 26
MDA55 Y25 R25
FBA_D55 FBA_DQS_WP4 FBA_EDC5 FBA_EDC4 27
MDA56 R26 W23 +3VS_1.8VSDGPU_AON RV189 1 N16X@ 2 1K_0402_1%
FBA_D56 FBA_DQS_WP5 FBA_EDC6 FBA_EDC5 27 NVVDD_EN 53
MDA57 T25 AB26 CV230
FBA_D57 FBA_DQS_WP6 FBA_EDC7 FBA_EDC6 27
MDA58 N27 T26 0.1U_0201_10V6K 2 1
FBA_D58 FBA_DQS_WP7 FBA_EDC7 27
MDA59 R27 2 1 1
MDA60 V26 FBA_D59 VGA@ N17S@ DV11 CV263
FBA_D60
5
MDA61 V27 RB751S40T1G_SOD523-2 .1U_0402_16V7K
MDA62 W27 FBA_D61 QV6A VGA@
VCC
FBA_D62
3
MDA63 W25 PLTRST_VGA# 1 PJT138KA 2N SOT363-6 2
FBA_D63 21 PLTRST_VGA# IN B
D24 4 5
D
G N17S@ DVT 02/10
FBA_CLK0 FBA_CLK0 26 OUT Y
F16 D25 1 VGA@ 2 2 Near Power PWM IC
GND
+3VS_1.8VSDGPU_AON
S
+FB_PLLAVDD FB_PLLAVDD_1 FBA_CLK0_N FBA_CLK0# 26 IN A
P22 RV102
4
6
3 FB_PLLAVDD_2 N22 10K_0402_5% 3
FBA_CLK1 FBA_CLK1 27 VGA_CORE_PG
D23 M22 2
D
T97 @ FB_VREF G UV9
FBA_CLK1# 27 21 GC6_FB_EN1V8 VGA_CORE_PG 53
3
FB_VREF_PROBE FBA_CLK1_N NL17SZ08DFT2G_SC70-5
S
1
R2028 H22 FB_REFPLL_AVDD FBA_WCK01 C18 PJT138KA 2N SOT363-6
FB_DLLAVDD FBA_WCK01_N FBA_WCK01# 26 Push Pull Output
10K_0402_5% D17 N17S@
FB_CLAMP GNDS_SENSE FBA_WCK23 FBA_WCK23 26
1 N16X@ 2 F3 D16
FB_CLAMP FBA_WCK23_N FBA_WCK23# 26
T24
FBA_WCK45 FBA_WCK45 27
R2020 60.4_0402_1% U24 Thermal shutdown protection
FBA_CMD34 FBA_WCK45_N FBA_WCK45# 27
1 @ 2 F22 V24
FBA_CMD35 FBA_CMD34 FBA_WCK67 FBA_WCK67 27
+1.35VSDGPU 1 @ 2 J22 V25
FBA_CMD35 FBA_WCK67_N FBA_WCK67# 27
R2022 60.4_0402_1%
UV9 N16X@ QV6 N16X@
MC74VHC1G08DFT2G_SC70-5 2N7002KDW_SOT363-6
SA00000OH00 SB00000EO00
GM108-ES-S-A1_FCBGA595 VCC: 2.0 ~ 5.5V
@ Push Pull Output
+PEX_IOVDDQ
15+55mA
Place Under F16 P22
1
L2002
2 VGA@
PBY160808T-300Y-N_2P
+FB_PLLAVDD
NV 15x DG-06803-V03
22U_0603_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
NV 16x DG-07158-V04
VGA@
VGA@
C2009 N17S@
C2736 N17S@
.1U_0402_16V7K
.1U_0402_16V7K
1 1 1 1 1
C2008 DA-08329-001_V01
C2011
C2010
VGA@
2 2 2 2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N16X VRAM 2/9
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 22 of 57
A B C D E
A B C D E
R4965
0_0402_5%
UGPU1C GPCPLL_AVDD 1 N17S@ 2
+GPU_PLLVDD MULTI LEVEL STRAPS
+3VS_1.8VSDGPU_MAIN R4974 1 N16X@ 2 0_0402_5%
Part 3 of 6 F11 C2751 1 2 0.1U_0201_10V6K
GPCPLL_AVDD NC +3VS_1.8VSDGPU_AON
AC3 AD10 N17S@ +3VS_1.8VSDGPU_AON R4973 1 N17S@ 2 0_0402_5%
AC4 NC IFPA_L3 NC AD7
Y4 NC IFPA_L3_N NC B19 strap0 strap1 strap2 strap3 strap4 strap5 +3VS_1.8VSDGPU_R
Y3 NC IFPA_L2 FBA_CMD32 V5
NC IFPA_L2_N RSV_XVDD_63 NC
1
AA3 V6
AA2 NC IFPA_L1 RSV_XVDD_64 NC G1 R2029 R2030 R2031 R2032 R2033 R4972 R2035 R2036 R2037
AB1 NC IFPA_L1_N XVDD NC G2 N16X@ X76@ X76@ @ @ @ N17S@ N17S@ N17S@
NC IFPA_L0 XVDD NC
NC
AA1 G3 49.9K_0402_1% 4.99K_0402_1% 10K_0402_1% 4.99K_0402_1% 10K_0402_1% 10K_0402_1% 100K_0402_5% 100K_0402_5% 100K_0402_5%
AA4 NC IFPA_L0_N XVDD NC G4
2
AA5 NC IFPA_AUX_SCL XVDD NC G5
1 NC IFPA_AUX_SDA_N XVDD NC G6 STRAP0
1
XVDD NC G7 STRAP1
AB5 XVDD NC V1 ROM_SI
IFPB_L3 STRAP2
AB4 NC XVDD NC V2 STRAP3 ROM_SO
IFPB_L3_N
AB3 NC XVDD NC W1 STRAP4 ROM_SCLK
NC IFPB_L2 XVDD NC
AB2 IFPB_L2_N W2 STRAP5
AD3 NC XVDD NC W3
NC IFPB_L1 XVDD NC
AD2 IFPB_L1_N W4
1
AE1 NC XVDD NC
NC IFPB_L0
AD1 IFPB_L0_N R2038 R2039 R2040 R2041 R2042 R4971 R2044 R2045 R2046 R2046 N17S@
AD4 NC X76@ X76@ X76@ N17S@ N17S@ N17S@ X76@ N16X@ N16X@ 100K_0402_5%
NC IFPB_AUX_SCL
AD5 IFPB_AUX_SDA_N D11 R2050 1 @ 2 10K_0402_5% 4.99K_0402_1% 45.3K_0402_1% 15K_0402_1% 100K_0402_5% 100K_0402_5% 100K_0402_5% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% SD028100380
NC BUFRST_N
2
2
2
NC NC D10
T2
T3 NC XVDD
E9 NV_GPIO8
T1 NC XVDD GPIO8 NV_GPIO8 21 N17X Straps N16X Straps
NC XVDD
R1 E10
NC XVDD NC
GENERAL
R2
LVDS/TMDS
NC XVDD
R3 F10
N2 NC XVDD NC
NC XVDD
N3 XVDD
NC D1 STRAP0
STRAP0 D2 STRAP1
Decive ID : N16S-GTR 0x134D
V3 STRAP1 E4 STRAP2
Multi strap table
V4 NC XVDD STRAP2 E3 STRAP3 GPU VRAM RANK X76 Freq Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 strap5 ROM_SI ROM_SO ROM_SCLK
U3 NC XVDD STRAP3 D3 STRAP4 Voltage
U4 NC XVDD STRAP4 C1 STRAP5
NC XVDD STRAP5 NC
T4 R2051 0x7 (SA00009TT30) Samsung K4G41325FE-HC28 PD 45.3K
T5 NC XVDD 40.2K_0402_1%
R4 NC XVDD NC F6 MULTI_STRAP_REF0_GND 1 N16X@ 2 128Mx32x2
1G 0x6 (SA000085V70) Hynix H5GC4H24AJR-T2C PD 34.8K
R5 NC XVDD MULTI_STRAP_REF0_GND F4
NC XVDD VDDS_SENSE NC N16S- 0x3 (SA00007D880) Samsung K4G41325FC-HC03 PD 20K
F5
2 NC NC GTR +1.35V 2
N1 2.5GHz 0x4 () Micron PU 49.9K NC NC NC NC NC PD 24.9K PD 4.99K PD 4.99K
M1 NC XVDD
NC XVDD
M2 F12
M3 NC XVDD THERMDP X76739BOL04
XVDD 0x0 (SA000094R30) Samsung K4G80325FB-HC03 PD 4.99K
K2 NC E12
NC XVDD THERMDN 256Mx32x2
K3 X76739BOL05 2G 0x5(SA00009ZG20) Hynix H5GC8H24MJR-T2C PD 30.1K
K1 NC XVDD
NC XVDD
J1 X76739BOL06 0x1 (SA000096K30) Micron MT51J256M32HF-60:A PD 10K
NC XVDD
M4 F2 VCCSENSE_VGA
M5 NC XVDD VDD_SENSE VCCSENSE_VGA 53
NC XVDD
L3
NC XVDD
Multi strap table Decive ID : N17S-G1-A1 0x1D10
L4
K4 NC XVDD GPU VRAM RANK X76 Freq Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 strap5 ROM_SI ROM_SO ROM_SCLK
NC XVDD Voltage
K5 PU 100K PU 100K PU 100K
J4 NC XVDD F1 VSSSENSE_VGA 0x7 (SA00009TT30) Samsung K4G41325FE-HC28
NC XVDD GND_SENSE VSSSENSE_VGA 53
PD 100K PU 100K PU 100K
128Mx32x2 0x6 (SA00008HQ10) Hynix H5GC4H24AJR-R0C
1G
PU 100K
J5 N17S- +1.35V 0x8 (SA00009E300) Micron EDW4032BABG-70-F-R PD 100K
PD 100K PD 100K
NC XVDD PU 100K
N4
NC XVDD TEST G1 3.0GHz PD 100K PU 100K PU 100K
N5 PD 100K
NC XVDD
P3 AD9 TESTMODE R2054 1 VGA@ 2 10K_0402_5% X76739BOL07 0x0 (SA000092D00) Samsung K4G80325FB-HC28 PD 100K PD 100K PD 100K
P4 NC XVDD NVJTAG_SEL TESTMODE
AE5 JTAG_TCK_VGA PAD @ T258
NC XVDD JTAG_TCK AE6 JTAG_TDI PAD @ T257 X76739BOL08 256Mx32x2 0x2 (SA00009U110) Hynix H5GC8H24MJR-R0C PD 100K PU 100K PD 100K
JTAG_TDI JTAG_TDO 2G
AF6 PAD @ T260
J2 JTAG_TDO AD6 JTAG_TMS PAD @ T259 X76739BOL09 0x1 (SA00009TV10) Micron MT51J256M32HF-70:A PU 100K PD 100K
PD 100K
J3 NC XVDD JTAG_TMS AG4 JTAG_RST R2053 1 VGA@ 210K_0402_5%
NC XVDD JTAG_TRST_N
3 3
H3
H4 NC XVDD
NC XVDD SERIAL
D12
ROM_CS_N B12 ROM_SI
ROM_SI A12 ROM_SO
ROM_SO C12 ROM_SCLK
ROM_SCLK
NV 16x DG-07158-V05
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N16X LVDS 3/9
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 23 of 57
A B C D E
A B C D E
DA-08329-001_V02
1 1
+3VS_1.8VSDGPU_MAIN
+1.35VSDGPU
UGPU1D
+PEX_IOVDDQ +1.05VS_1.0VSDGPU
NV 16x DG-07158-V05
3.24A Part 4 of 6
1.275A RV149
B26 PEX_HVDD AA10 0_0805_5% 2 N16X@ 1
.1U_0402_16V7K
.1U_0402_16V7K
FBVDDQ_01 PEX_IOVDDQ_1
VGA@
VGA@
VGA@
VGA@
C25 AA12
N17S@
N17S@
N17S@
N17S@
N17S@
RV150
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
FBVDDQ_02 PEX_IOVDDQ_2
N17S@ C2727
N17S@ C2726
VGA@ C2032
VGA@ C2033
N16X@ C2021
N16X@ C2022
N16X@ C2039
N16X@ C2040
1 1 1 1 1 1 1 1 2 2 E23 AA13 1 1 1 1 1 1 1 1 1 0_0805_5% 2 N17S@ 1
FBVDDQ_03 PEX_IOVDDQ_3
N17S@ C2732
N17S@ C2733
E26 AA16
F14 FBVDDQ_04 PEX_IOVDDQ_4 AA18
F21 FBVDDQ_05 PEX_IOVDDQ_5 AA19
2 2 2 2 2 2 2 2 1 1 FBVDDQ_06 PEX_IOVDDQ_6 2 2 2 2 2 2 2 2 2
C2013
C2737
C2754
C2755
C2738
C2014
C2016
C2739
C2017
G13 AA20
G14
G15
FBVDDQ_07
FBVDDQ_08
PEX_IOVDDQ_7
PEX_IOVDDQ_8
AA21
AB22
NV 16x DG-07158-V05
Under GPU G16 FBVDDQ_09 PEX_IOVDDQ_9 AC23
FBVDDQ_10 PEX_IOVDDQ_10 Under GPU Near GPU
G18 AD24
G19 FBVDDQ_11 PEX_IOVDDQ_11 AE25
10U_0603_6.3V6M
FBVDDQ_12 PEX_IOVDDQ_12
N17S@ C2734
VGA@ C2045
N17S@ C2735
VGA@ C2047
G20 AF26
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1 1 1 1 FBVDDQ_13 PEX_IOVDDQ_13 Midway GPU & Power supply
Under GPU G21 AF27
H24 FBVDDQ_14 FBVDDQ PEX_IOVDDQ_14
H26 FBVDDQ_AON
2 2 2 2 FBVDDQ_AON Near GPU Midway GPU & Power supply
C2021 N17S@ C2039 N17S@ J21 PEX_DVDD AA22 +1.05VS_1.0VSDGPU
1U_0402_6.3V6K 1U_0402_6.3V6K K21 FBVDDQ_AON PEX_IOVDD_1 AB23
22U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1U_0402_6.3V6K
FBVDDQ_AON PEX_IOVDD_2
N17S@ C2741
N17S@ C2746
VGA@ C2740
VGA@ C2742
N17S@ C2743
N17S@ C2744
N17S@ C2745
SE000000K80 SE000000K80 L22 AC24 1 1 1 1 1 1 1
L24 FBVDDQ_19 PEX_IOVDD_3 AD25
Near GPU
POWER
C2022 N17S@ C2040 N17S@ L26 FBVDDQ_20 PEX_IOVDD_4 AE26
1U_0402_6.3V6K 1U_0402_6.3V6K M21 FBVDDQ_21 PEX_IOVDD_5 AE27
2 SE000000K80 SE000000K80 N21 FBVDDQ_22 PEX_IOVDD_6 2 2 2 2 2 2 2 2
R21 FBVDDQ_23
T21 FBVDDQ_24
RV156 +1.35VSDGPU V21 FBVDDQ_25 +3VS_1.8VSDGPU_AON
0_0402_5% W21 FBVDDQ_26
FBVDDQ_27 Under GPU
1 @ 2 1V8_AON G10
51 FB_VDDQ_SENSE 1V8_AON3V3_AON G12
0.1U_0201_10V6K
0.1U_0201_10V6K
1U_0402_6.3V6K
4.7U_0402_6.3V6M
56mA
VDD18 3V3_AON DA-08329-001_V01
VGA@ C2048
N17S@ C2753
VGA@ C2049
VGA@ C2050
Near DGPU G8 2 2 1 1
VDD18 VDD33_3 G9
DA-08329-001_V02 VDD33_4
V7 1 1 2 2
W7 NC +1.35VSDGPU
AA6 NC
W6 NC FB_CAL_PD_VDDQ D22 FB_CAL_PD_VDDQ 1 VGA@ 2
NC FB_CAL_PD_VDDQ Under GPU Near GPU
Y6 40.2_0402_1% R2078 +3VS_1.8VSDGPU_MAIN
NC
FB_CAL_PU_GND C24 FB_CAL_PU_GND 1 VGA@ 2
FB_CAL_PU_GND 40.2_0402_1% R2079
0.1U_0201_10V6K
1U_0402_6.3V6K
0.1U_0201_10V6K
4.7U_0402_6.3V6M
B25 FB_CAL_TERM_GND 2 VGA@
C2052
VGA@ C2053
VGA@ C2054
C2051
M7 FB_CAL_TERM_GND 1 2 2 1 1
N7 NC FB_CAL_TERM_GND 60.4_0402_1% R2080
T6 NC
P6 NC
NC 1 1 2 2
VGA@
VGA@
+3VS_1.8VSDGPU_MAIN
T7
R7 IFPD_PLLVDD_2 Under GPU Near GPU +3VS_1.8VSDGPU_AON
NV 16x DG-07158-V05
U6 NC
R6 IFPD_RSET AA8
286mA +PEX_PLL_HVDD RV158 2 N16X@ 1 0_0603_5%
NC PEX_PLL_HVDD_1 AA9 RV153
.1U_0402_16V7K
PEX_PLL_HVDD_2
VGA@ C2034
0_0402_5% 2 RV159 2 N17S@ 1 0_0603_5%
3 NC AB8 +PEX_SVDD 1 N16X@ 2 3
PEX_SVDD_3V3
C2036 1 2 4.7U_0402_6.3V6M N16X@
J7 C2035 1 2 4.7U_0402_6.3V6M N16X@ 1
NC Near GPU
K7
K6 NC NC AA14
H6 NC NC PEX_PLLVDD_1 AA15
J6 NC PEX_PLLVDD_2 +PEX_PLLVDD
NC
130mA RV146 2 N16X@ 1 0_0603_5% +1.05VS_1.0VSDGPU
4.7U_0402_6.3V6M
N16X@ C2041
N16X@ C2042
N16X@ C2043
GM108-ES-S-A1_FCBGA595
.1U_0402_16V7K
1U_0402_6.3V6K
2 1 1
@
NV 16x DG-07158-V05
1 2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N16X POWER & GND 4/9
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 24 of 57
A B C D E
A B C D E
NV 16x DG-07158-V05
UGPU1F
+VGA_CORE +VGA_CORE
Part 6 of 6
POWER
AB17 GND_004 GND_060 L10 L13 VDD_006VDDS VDDS VDD_036 U15
AB20 GND_005 GND_061 L12 L15 VDD_007 VDD_035 U13
AB24 GND_006 GND_062 L14 L17 VDD_008 VDD_034 U11
GND_007 GND_063 VDD_009VDDS VDDS VDD_033
AC2 L16 M10 T18
AC22 GND_008 GND_064 L18 M12 VDD_010 VDD_032 T16
AC26 GND_009 GND_065 L2 M14 VDD_011 VDD_031 T14
GND_010 GND_066 VDD_012VDDS VDDS VDD_030
AC5 L23 M16 T12
AC8 GND_011 GND_067 L25 M18 VDD_013 VDD_029 T10
AD12 GND_012 GND_068 L5 N11 VDD_014 VDD_028 R17
AD13 GND_013 GND_069 M11 N13 VDD_015 VDD_027 R15
AD15 GND_014 GND_070 M13 N15 VDD_016 VDD_026 R13
AD16 GND_015 GND_071 M15 N17 VDD_017 VDD_025 R11
AD18 GND_016 GND_072 M17 P10 VDD_018 VDD_024 P18
AD19 GND_017 GND_073 N10 P12 VDD_019 VDDS VDDS VDD_023 P16
AD21 GND_018 GND_074 N12 VDD_020 VDDS VDDS VDD_022 P14
AD22 GND_019 GND_075 N14 VDD_021
AE11 GND_020 GND_076 N16
AE14 GND_021 GND_077 N18
AE17 GND_022 GND_078 P11
AE20 GND_023 GND_079 P13
AF1 GND_024 GND_080 P15
GND_025 GND_081
DA-07750-000-V02
GND
AF11 P17
AF14 GND_026 GND_082 P2
AF17 GND_027 GND_083 P23
AF20
AF23
GND_028
GND_029
GND_084
GND_085
P26
P5
GM108-ES-S-A1_FCBGA595
@
DA-08329-001_V01
AF5 GND_030 GND_086 R10
AF8 GND_031 GND_087 R12
AG2 GND_032 GND_088 R14
AG26 GND_033 GND_089 R16
B1 GND_034 GND_090 R18
B11 GND_035 GND_091 T11
2 B14 GND_036 GND_092 T13 2
B17 GND_037 GND_093 T15
B20 GND_038 GND_094 T17
B23 GND_039 GND_095 U10
B27 GND_040 GND_096 U12
B5 GND_041 GND_097 U14
B8 GND_042 GND_098 U16
E11 GND_043 GND_099 U18
E14 GND_044 GND_100 U2
E17 GND_045 GND_101 U23
E2 GND_046 GND_102 U26
E20 GND_047 GND_103 U5
E22 GND_048 GND_104 V11
E25 GND_049 GND_105 V13
E5 GND_050 GND_106 V15
E8 GND_051 GND_107 V17
H2 GND_052 GND_108 Y2
H23 GND_053 GND_109 Y23
H25 GND_054 GND_110 Y26
H5 GND_055 GND_111 Y5
GND_056 GND_112
AA7
GND AB7
GND
GM108-ES-S-A1_FCBGA595
@
3 3
DA-07751-000-V02
SP-08318-001_V03
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N16X POWER & GND 5/9
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 25 of 57
A B C D E
A B C D E
K1 B14
RV63 RV95 B5 VSS VDDQ D14
40.2_0402_1% 40.2_0402_1% G5 VSS VDDQ F14
VGA@ VGA@ L5 VSS VDDQ M14
T5 VSS VDDQ P14
2
VGA@ G10
VSS
CV190
L10 A1
+1.35VSDGPU P10 VSS VSSQ C1
2 T10 VSS VSSQ E1
H14 VSS VSSQ N1
1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
H5GC4H24AJR-R0C_BGA170
CV76
CV192
CV197
CV198
CV199
CV200
22U_0603_6.3V6M
22U_0603_6.3V6M
1 1 1 1 1 1 1 1
N17S@ CV72
N17S@ CV196
N17S@
N17S@
N17S@
N17S@
2 2 2 2 2 2 2 2 10U x2
1U x 8
0.1U x 6
4 4
+1.35VSDGPU +1.35VSDGPU
CV202
CV203
CV207
CV206
CV208
CV210
CV209
N16X@ CV249
N16X@ CV251
N16X@ CV250
CV201
CV204
CV205
N16X@ CV246
CV247
CV248
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
N16X@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
N17S@
N17S@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2018/11/04
Issued Date 2016/11/04 Deciphered Date Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N16X Lower Rank0 6/9
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 26 of 57
A B C D E
A B C D E
L5 M14
RV96 RV62 T5 VSS VDDQ P14
40.2_0402_1% 40.2_0402_1% B10 VSS VDDQ T14
VGA@ VGA@ D10 VSS VDDQ
G10 VSS
2
2
L10 VSS A1
P10 VSS VSSQ C1
1 VSS VSSQ
0.01U_0402_16V7K
VGA@ T10 E1
VSS VSSQ
CV191
H14 N1
K14 VSS VSSQ R1
2 +1.35VSDGPU VSS VSSQ U1
VSSQ H2
G1 VSSQ K2
3
L1 VDD VSSQ A3 3
G4 VDD VSSQ C3
L4 VDD VSSQ E3
C5 VDD VSSQ N3
R5 VDD VSSQ R3
C10 VDD VSSQ U3
R10 VDD VSSQ C4
D11 VDD VSSQ R4
G11 VDD VSSQ F5
L11 VDD VSSQ M5
P11 VDD VSSQ F10
G14 VDD VSSQ M10
L14 VDD VSSQ C11
VDD VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
170-BALL VSSQ U12
DA8335 Cap Q'ty VSSQ H13
22U x2 SGRAM GDDR5 VSSQ K13
10U x 6 VSSQ A14
+1.35VSDGPU +1.35VSDGPU VSSQ
1U x 10 VSSQ
C14
22U x 3 (unPOP) E14
VSSQ N14
VSSQ R14
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
VSSQ U14
CV217
CV218
CV220
CV221
CV219
CV222
22U_0603_6.3V6M
22U_0603_6.3V6M
VSSQ
1 1 1 1 1 1 1 1 N16X Cap Q'ty
H5GC4H24AJR-R0C_BGA170
N17S@ CV216
N17S@ CV215
10U x2
1U x 8
VGA@
VGA@
N17S@
N17S@
N17S@
N17S@
2 2 2 2 2 2 2 2
0.1U x 6
4 +1.35VSDGPU 4
+1.35VSDGPU
N16X@ CV255
N16X@ CV257
N16X@ CV256
N16X@ CV252
CV253
CV254
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
CV223
CV224
CV226
CV212
CV225
CV228
CV227
CV211
CV213
CV214
1 1 1 1 1 1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1
N16X@
N16X@
2 2 2 2 2 2
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
N17S@
N17S@
2 2 2 2 2 2 2 2 2 2
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2016/11/04 Deciphered Date 2018/11/04 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N16X Lower Rank1 7/9
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 27 of 57
A B C D E
A B C D E
www.qdzbwx.com
LCD POWER CIRCUIT
+3VS +LCDVDD +19VB_CPU +INVPW R_B+ Place closed to JEDP1
UX1
W=80mils +LCDVDD
1U_0402_6.3V6K
CX1
5 1
1
IN OUT W=60mils LX1 W=60mils +3VS
2 1 1 HCB2012KF-221T30_0805
GND CX4 1 2
1 1
4 3 0.1U_0201_10V6K 3S@ 1 1
2 EN OC
1000P_0402_50V7K
CX5
@ SM01000EJ00 3000ma 1 1
SY6288C20AAC_SOT23-5 CX3 2 2 CX2 CX6 CX7
220ohm@100mhz
4.7U_0402_6.3V6M DCR 0.04 68P_0402_50V8J 0.1U_0201_10V6K .1U_0402_16V7K
2 2
@EMI@
@EMI@ @
7 SOC_ENVDD 2 2
1
RX9
100K_0402_5%
@
2
7 EDP_TXP0
CX8 1 2 .1U_0402_16V7K EDP_TXP0_C
EDP_TXN0_C
LED PANEL Conn.
CX9 1 2 .1U_0402_16V7K
7 EDP_TXN0 EDP_TXP1_C
CX10 1 2 .1U_0402_16V7K W=60mils JEDP1
7 EDP_TXP1 EDP_TXN1_C
CX11 1 2 .1U_0402_16V7K +INVPW R_B+ 1
7 EDP_TXN1 EDP_TXP2_C 1
CX17 1 2 .1U_0402_16V7K 2
7 EDP_TXP2 EDP_TXN2_C SOC_BKL_PW M 2
CX16 1 2 .1U_0402_16V7K RX1 1 @ 2 100K_0402_5% 3
7 EDP_TXN2 EDP_TXP3_C 7 SOC_BKL_PW M 3
CX19 1 2 .1U_0402_16V7K 4
7 EDP_TXP3 EDP_TXN3_C 4
CX18 1 2 .1U_0402_16V7K @EMI@ 5
7 EDP_TXN3 SOC_BKL_PW M 5
CX12 1 2 220P_0402_50V7K 6
CX14 1 2 .1U_0402_16V7K EDP_AUXP_C @EMI@ BKOFF# 7 6
7 EDP_AUXP EDP_AUXN_C EDP_HPD 7
7 EDP_AUXN CX15 1 2 .1U_0402_16V7K BKOFF# CX13 1 2 220P_0402_50V7K 8
37 BKOFF# 8
2
+LCDVDD 9 2
RX2 1 @ 2 10K_0402_5% 10 9
+3VS 11 10
W=60mils 12 11
100K_0402_5% 1 @ 2 RX3 EDP_AUXN_C 13 12
100K_0402_5% 1 @ 2 RX4 EDP_AUXP_C EDP_AUXN_C 14 13
RX5 EDP_AUXP_C 15 14
0_0402_5% 16 15
1 @ 2 EDP_HPD EDP_TXP0_C 17 16
7 CPU_EDP_HPD EDP_TXN0_C 17
18
RX6 19 18
100K_0402_5% EDP_TXP1_C 20 19
2 1 EDP_TXN1_C 21 20
22 21
EDP_TXP2_C 23 22
Touch Screen EDP_TXN2_C 24 23
24
25
+5VS +3VS +TS_PW R EDP_TXP3_C 26 25
EDP_TXN3_C 27 26
RX7 1 @ 2 0_0603_5% 28 27
RX8 1 @ 2 0_0603_5% USB20_P6 29 28
13 USB20_P6 USB20_N6 29
30
13 USB20_N6 30
31
32 31
Touch Screen +TS_PW R 32
33
TS_EN 34 33
12,37 TS_EN 34
+3VS 35
USB20_N7_CAMERA 36 35 41
USB20_P7_CAMERA 37 36 G1 42
3 Camera For Camera DMIC_CLK_R
38 37
38
G2
G3
43 3
39 44
32 DMIC_CLK_R DMIC_DATA_R 39 G4
@EMI@ 40 45
USB20_N7 USB20_N7_CAMERA 32 DMIC_DATA_R 40 G5
RX10 1 2 0_0402_5%
13 USB20_N7
ACES_50398-04041-001
@EMI@ CONN@
USB20_P7 RX11 1 2 0_0402_5% USB20_P7_CAMERA
13 USB20_P7 DMIC_DATA_R
DMIC_CLK_R
SP010013I00
3
DX1
@ESD@
YSLC05CH_SOT23-3
1
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
eDP Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 28 of 57
A B C D E
A B C D E
www.qdzbwx.com
+5VS W=40mils +HDMI_5V_OUT @EMI@ DY2 ESD@
HDMI_C_CLK- RY1 1 2 0_0402_5% HDMI_R_CK- HDMI_R_D0- 1 1 10 9 HDMI_R_D0-
UY1 HDMI_R_D0+ HDMI_R_D0+
@EMI@ 2 2 9 8
HDMI_C_CLK+ RY2 1 2 0_0402_5% HDMI_R_CK+
3 HDMI_R_CK- 4 4 7 7 HDMI_R_CK-
OUT
1
1 HDMI_R_CK+ 5 5 6 6 HDMI_R_CK+
IN CY9
1 1
2 0.1U_0201_10V6K 3 3
GND 2
8
AP2330W -7_SC59-3
@EMI@ TVW DF1004AD0
HDMI_C_TX0- RY3 1 2 0_0402_5% HDMI_R_D0-
@EMI@
HDMI_C_TX0+ RY4 1 2 0_0402_5% HDMI_R_D0+ DY3 ESD@
HDMI_R_D1- 1 1 10 9 HDMI_R_D1-
HDMI_R_D1+ 2 2 9 8 HDMI_R_D1+
HDMI_R_D2- 4 4 7 7 HDMI_R_D2-
RPY1
470_8P4R_5% HDMI_R_D2+ 5 5 6 6 HDMI_R_D2+
7 SOC_DP1_N1 CY4 2 1 .1U_0402_16V7K HDMI_C_TX1- 1 8
7 SOC_DP1_P1 CY3 2 1 .1U_0402_16V7K HDMI_C_TX1+ 2 7 3 3
7 SOC_DP1_N0 CY2 2 1 .1U_0402_16V7K HDMI_C_TX2- 3 6 @EMI@
7 SOC_DP1_P0 CY1 2 1 .1U_0402_16V7K HDMI_C_TX2+ 4 5 HDMI_C_TX1- RY5 1 2 0_0402_5% HDMI_R_D1- 8
HDMI_GND
7 SOC_DP1_N2 CY6 2 1 .1U_0402_16V7K HDMI_C_TX0- 1 8 @EMI@ TVW DF1004AD0
7 SOC_DP1_P2 CY5 2 1 .1U_0402_16V7K HDMI_C_TX0+ 2 7 HDMI_C_TX1+ RY7 1 2 0_0402_5% HDMI_R_D1+
7 SOC_DP1_N3 CY8 2 1 .1U_0402_16V7K HDMI_C_CLK- 3 6
7 SOC_DP1_P3 CY7 2 1 .1U_0402_16V7K HDMI_C_CLK+ 4 5
RPY2
470_8P4R_5%
2 2
6
D
+3VS 2 QY1A
G 2N7002KDW _SOT363-6 @EMI@
HDMI_C_TX2- RY8 1 2 0_0402_5% HDMI_R_D2-
S
1
@EMI@
HDMI_C_TX2+ RY10 1 2 0_0402_5% HDMI_R_D2+
+3VS
+3VS
1
RY6
G
1M_0402_5%
HDMI connector
2
4 3 HDMI_HPD
S
7 SOC_DP1_HPD JHDMI1
D
HDMI_HPD 19
QY1B RY9 18 HP_DET
2N7002KDW _SOT363-6 +HDMI_5V_OUT +5V
100K_0402_5% 17
HDMI_SDATA 16 DDC/CEC_GND
HDMI_SCLK 15 SDA
2
14 SCL
13 Reserved
HDMI_R_CK- 12 CEC
11 CK-
3 HDMI_R_CK+ 10 CK_shield 3
DY1 ESD@ HDMI_R_D0- 9 CK+
HDMI_HPD 6 3 HDMI_SDATA 8 D0-
RPY3 I/O4 I/O2 HDMI_R_D0+ D0_shield
7
1 8 SOC_DP1_CTRL_CLK HDMI_R_D1- 6 D0+
+3VS HDMI_SDATA D1-
+HDMI_5V_OUT 2 7 5
3 6 SOC_DP1_CTRL_DATA 5 2 HDMI_R_D1+ 4 D1_shield 20
HDMI_SCLK +HDMI_5V_OUT VDD GND HDMI_R_D2- D1+ GND
4 5 3 21
2 D2- GND 22
HDMI_R_D2+ 1 D2_shield GND 23
2.2K_0804_8P4R_5% HDMI_SCLK 4 1 D2+ GND
I/O3 I/O1
AZC199-04S.R7G_SOT23-6 CCM_C100042GR019M298ZL
CONN@
+3VS
DC232003500
2
G
1 6 HDMI_SDATA
7 SOC_DP1_CTRL_DATA
S
QY2B
PJT138KA-2N_SOT363-6
5
G
4 HDMI_SCLK 4
4 3
7 SOC_DP1_CTRL_CLK
S
QY2A
PJT138KA-2N_SOT363-6
Security Classification Compal Secret Data Compal Electronics, Inc.
Intel spec Ron/Cout : 3ohm/10pF. Issued Date 2016/11/04 Deciphered Date 2018/11/04 Title
SB000016K00, S TR PJT138KA 2N SOT363-6 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI CONN.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 29 of 57
A B C D E
A B C D E
LDO mode
RL1 2 LDO@ 1 0_0603_5%
W=60mil W=60mil
LAN-RTL8411B +LAN_VDD +3V_LAN
W=60mil
300mA 1.4A
LL1 SWR@ IDC=1200mA
+REGOUT 1 2
2.2UH_HPC252012NF-2R2M_20%
1U_0402_6.3V6K
CL8
4.7U_0402_6.3V6M
CL1
+3VALW +3V_LAN Using for Switch mode
1 1 1 1 1 1 1 1 1 1 1 1 1 1
0.1U_0201_10V6K
CL2 LDO@
0.1U_0201_10V6K
CL28 SWR@
0.1U_0201_10V6K
CL3
0.1U_0201_10V6K
CL4
0.1U_0201_10V6K
CL5
0.1U_0201_10V6K
CL6
0.1U_0201_10V6K
CL7
0.1U_0201_10V6K
CL9
0.1U_0201_10V6K
CL11
0.1U_0201_10V6K
CL12
0.1U_0201_10V6K
CL13
RL2 The trace length from
0_0805_5% Lx to PIN48 (REGOUT)
1 2 2 2 2 2 2 2 2 2 2 2 CL10 2 2 2 2
and from C to Lx must
< 200mils. 4.7U_0402_6.3V6M
1
60mil 60mil 1
UL1
5 1
IN OUT
Place near Pin 3,8,33,46 Place near Pin 20 Using for Switch mode Place near Pin 11,32,48
2 11/27: P/N change to SH00000RT00
GND
The trace length
4 3 ( S COIL 2.2UH +-20% from C to
EN OC HPC252012NF-2R2M 1.3A)
2 PIN34,35(VDDREG)
SY6288C20AAC_SOT23-5 must < 200mils.
CL14 @
1U_0402_6.3V6K LAN_PWR_EN
1 LAN_PWR_EN 37
UL2
From EC reserve EC_PME# pull high 100K to +3VALW_EC Power Manahement/Isolation
ISOLATEB 31
1 2 0_0402_5% LAN_PME# 39 ISOLATEBPIN
High active. 37 EC_PME# RL3 @
LANWAKEB
EN threshold voltage min:1.2V Card Reader
DVT modify 12/04 RL8 1 2 10K_0402_5% 15 SD_D0 RL9 1 @ 2 0_0402_5% SD_D0_R
typ:1.6V max:2.0V for WOL pull high to +3V_LAN +3V_LAN SD_D0/MS_D1 SD_D1 SD_D1_R
Current limit threshold 1.5~2.8A PCI-Express 14 RL4 1 @ 2 0_0402_5%
CLK_PCIE_P1 23 SD_D1 16 SD_CLK RL10 1 2 10_0402_5% SD_CLK_R
11 CLK_PCIE_P1 CLK_PCIE_N1 REFCLK_P SD_CLK/MS_D0 SD_CMD SD_CMD_R
+3V_LAN Rising time must >0.5ms and <100ms 24 17 RL5 1 @ 2 0_0402_5%
11 CLK_PCIE_N1 REFCLK_N SD_CMD/MS_D2 SD_D3 SD_D3_R
18 RL6 1 @ 2 0_0402_5% 2
PLT_RST_BUF# 30 SD_D3/MS_D3 19 SD_D2 RL7 1 @ 2 0_0402_5% SD_D2_R
11,21,31 PLT_RST_BUF# CLKREQ_PCIE#1 29 PERSTBPIN SD_D2/MS_CLK 28 SD_WP
PU at PCH side CL16
11 CLKREQ_PCIE#1 CLKREQBPIN SD_WP/MS_BS
5P_0402_50V8C
CL17 1 2 .1U_0402_16V7K PCIE_CRX_C_DTX_P5 25 1
13 PCIE_CRX_DTX_P5 PCIE_CRX_C_DTX_N5 HSOP @EMI@
CL15 1 2 .1U_0402_16V7K 26
13 PCIE_CRX_DTX_N5 21 HSON 42 SD_CD#
13 PCIE_CTX_C_DRX_P5 HSIP SD_CD# close to pin17
22 43
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13 PCIE_CTX_C_DRX_N5 HSIN MS_CD#
Transceiver Interface
2 LAN_MIDI0+ 1 2
LAN_MIDI0- 2 MDIP0
LAN_MIDI1+ 4 MDIN0
+3V_LAN LAN_MIDI1- 5 MDIP1 48 +3V_LAN
SWR mode LAN_MIDI2+ 6 MDIN1 AVDD33 11 Protect cotact Card contact
+3V_LAN LAN_MIDI2- 7 MDIP2 AVDD33 12
MDIN2 DVDD33
1400mA
RL11 1 SWR@2 0_0402_5% LAN_MIDI3+ 9 32
MDIP3 DVDD33 Write protect Write Enable
1
LAN_MIDI3- 10
MDIN3
RL12 RL13 1 LDO@2 0_0402_5% ENSWREG PreMP 04/18 (Lock) (Unlock)
10K_0402_5% RL14
LDO mode 330_0402_1% XTLI 44 33
@
GPO XTLO_R 1 2 XTLO 45 CKXTAL1 Clock DVDD10 3
+LAN_VDD Card Uninsert Open Open Open
2
0.1U_0201_10V6K
CL20
41
2
NC NC LED0
0.1U_0201_10V6K
CL22
ISOLATEB RL17 1 @ 2 GPO 38 1 1 1
37 LAN_GPO LED1/GPO
1
1
0_0402_5% 37 LEDs
LED3
2
E_Pad 2 2 CL21 2
15K_0402_5%
4.7U_0402_6.3V6M
1
3 3
Place near Pin 27
RTL8411B-CGT_QFN48_6X6
0.1U_0201_10V6K
CL24
7 7
4 21 MCT2 PR4+ 5 CLK
LAN_MIDI1+ TCT2 MCT2 RJ45_MIDI1+ RJ45_MIDI1- 1 1 VSS1
5 20 6 +3VS +3V_LAN 8
LAN_MIDI1- 6 TD2+ MX2+ 19 RJ45_MIDI1- PR2- CL23 VSS2
TD2- MX2- RJ45_MIDI2- 5 4.7U_0402_6.3V6M SD_D0_R 9
PR3- 2 2 SD_D1_R DAT0
100K_0402_5%
RL21
RL20
100K_0402_5%
7 18 MCT3 IC side 10
LAN_MIDI2+ 8 TCT3 MCT3 17 RJ45_MIDI2+ RJ45_MIDI2+ 4 SD_D2_R 1 DAT1
TD3+ MX3+ PR3+ DAT2
1
1
LAN_MIDI2- 9 16 RJ45_MIDI2- SD_D3_R 2
B88069X9231T203_4P5X3P2-2
1
LAN_MIDI3- 12 13 RJ45_MIDI3- RJ45_GND D SD_WP#
10 LANGND 2 1 11
2
2
1 2 4
PR1+ CD
1
1 9 G QL1
GND
3
3
4
3
2
1
ESD@
4 RL19 4
5
6
7
8
RL22 0_0402_5%
Close to JREAD1 for EMI
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN RTL8411B
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Tuesday, April 18, 2017 Sheet 30 of 57
A B C D E
A B C D E
+3VALW
UM1 W=60mils
1U_0402_6.3V6K
CM4
5 1
KEY E +3VS_WLAN
1
IN OUT
2
GND 1 1 1
1 JNGFF1 @ CM1 1
1 2 4 3 @ CM3
USB20_P5 3 GND_1 3.3VAUX_2 4 2 EN OC 4.7U_0402_6.3V6M CM2 0.1U_0201_10V6K
13 USB20_P5 USB20_N5 5 USB_D+ 3.3VAUX_4 6 2 2 2
SY6288C20AAC_SOT23-5
For BT 13 USB20_N5 7 USB_D- LED1# 8 BYOC@ 0.1U_0201_10V6K
9 GND_7 PCM_CLK 10
11 SDIO_CLK PCM_SYNC 12
13 SDIO_CMD PCM_OUT 14 37 WLAN_ON
15 SDIO_DAT0 PCM_IN 16
17 SDIO_DAT1 LED2# 18
19 SDIO_DAT2 GND_18 20
21 SDIO_DAT3 UART_WAKE 22 UART_2_CRXD_DTXD
23 SDIO_WAKE UART_TX UART_2_CRXD_DTXD 12
SDIO_RST
24
PH +3VS at SOC
UART_2_CTXD_DRXD side, for win7 USB3 debug
25 UART_RX 26 UART_2_CTXD_DRXD 12
PCIE_CTX_C_DRX_P6 27 GND_33 UART_RTS 28 RM3 1 2 100K_0402_5%
13 PCIE_CTX_C_DRX_P6 PCIE_CTX_C_DRX_N6 29 PET_RX_P0 UART_CTS 30 E51TXD_P80DATA_R RM2 2 @ 1 0_0402_5%
13 PCIE_CTX_C_DRX_N6 31 PET_RX_N0 CLink_RST 32 E51RXD_P80CLK_R E51TXD_P80DATA 37
RM7 2 @ 1 0_0402_5%
PCIE_CRX_DTX_P6 33 GND_39 CLink_DATA 34 E51RXD_P80CLK 37
13 PCIE_CRX_DTX_P6 PCIE_CRX_DTX_N6 PER_TX_P0 CLink_CLK
35 36
13 PCIE_CRX_DTX_N6 PER_TX_N0 COEX3
37 38
CLK_PCIE_P2 39 GND_45 COEX2 40
11 CLK_PCIE_P2 CLK_PCIE_N2 41 REFCLK_P0 COEX1 42 SUSCLK_R
11 CLK_PCIE_N2 REFCLK_N0 SUSCLK(32KHz) WL_RST#_R T205 @ PLT_RST_BUF#
43 44 RM4 1 @ 2 0_0402_5%
CLKREQ_PCIE#2 45 GND_51 PERST0# 46 BT_ON PLT_RST_BUF# 11,21,30
11 CLKREQ_PCIE#2 WLAN_PME# CLKREQ0# W_DISABLE2# WL_OFF# BT_ON 37
47 48
37 WLAN_PME# 49 PEWAKE0# W_DISABLE1# 50 WL_OFF# 37
51 GND_57 I2C_DAT 52
RM6 53 RSVD/PCIE_RX_P1 I2C_CLK 54
+3VS_WLAN
2 1 10K_0402_5% 55 RSVD/PCIE_RX_N1 I2C_IRQ 56 P80CLK and BT_ON enable seperate.
57 GND_63 RSVD_64 58
2 59 RSVD/PCIE_TX_P1 RSVD_66 60 2
61 RSVD/PCIE_TX_N1 RSVD_68 62
63 GND_69 RSVD_70 64
65 RSVD_71 3.3VAUX_72 66
67 RSVD_73 3.3VAUX_74
GND_75 68
69 GND1
GND2
BELLW_80152-3221
CONN@
SP070013E00
mSATA/SSD JSSD1
KEY M
+3VS
DVT 01/23
+3VS_SSD_NGFF
1 2 @ RM9
GND 3P3VAUX +3VS_SSD_NGFF
3 4 0_0805_5%
PCIE_CRX_DTX_N9 5 GND 3P3VAUX 6 1 2
13 PCIE_CRX_DTX_N9 PCIE_CRX_DTX_P9 7 PERn3 NC 8
13 PCIE_CRX_DTX_P9 PERp3 NC SSD_LED#
10U_0603_6.3V6M
9 10 CM141 2 1
PCIE_CTX_C_DRX_N9 GND DAS/DSS# @ T245
CM5 1 2 0.22U_0402_16V7K 11 12
13 PCIE_CTX_DRX_N9 CM6 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_P9 13 PETn3 3P3VAUX 14 + CS29
13 PCIE_CTX_DRX_P9 15 PETp3 3P3VAUX 16 150U_B2_6.3VM_R35M
PCIE_CRX_DTX_N10 17 GND 3P3VAUX 18 2 1 CM13 SGA00009M00
13 PCIE_CRX_DTX_N10 PCIE_CRX_DTX_P10 19 PERn2 3P3VAUX 20 2
3 13 PCIE_CRX_DTX_P10 21 PERp2 NC 22 0.1U_0201_10V6K 3
CM7 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_N10 23 GND NC 24
13 PCIE_CTX_DRX_N10 CM8 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_P10 25 PETn2 NC 26
13 PCIE_CTX_DRX_P10 27 PETp2 NC 28
PCIE_CRX_DTX_N11 29 GND NC 30
13 PCIE_CRX_DTX_N11 PCIE_CRX_DTX_P11 31 PERn1 NC 32
13 PCIE_CRX_DTX_P11 PERp1 NC DVT 01/23
33 34
CM9 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_N11 35 GND NC 36
13 PCIE_CTX_DRX_N11 CM10 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_P11 37 PETn1 NC 38 RM21 1 @ 2 0_0402_5%
13 PCIE_CTX_DRX_P11 39 PETp1 DEVSLP 40 SSD_DEVSLP2 13
RM16 1 2 0_0402_5% PCIE_CRX_R_DTX_P12 41 GND NC 42 RM20 1 2 0_0402_5%
13 PCIE_CRX_DTX_P12 RM17 1 2 0_0402_5% PCIE_CRX_R_DTX_N12 43 PERn0/SATA-B+ NC 44
13 PCIE_CRX_DTX_N12 45 PERp0/SATA-B- NC 46 CM15 1 2 1000P_0402_50V7K
CM11 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_N12 47 GND NC 48 ESD@
13 PCIE_CTX_DRX_N12 CM12 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_P12 49 PETn0/SATA-A- NC 50 NGFF_SSD_RST#_R RM18 1 @ 2 0_0402_5% PLT_RST_BUF#
13 PCIE_CTX_DRX_P12 51 PETp0/SATA-A+ PERST# 52 NGFF_CLKREQ#_R RM5 1 @ 2 0_0402_5%
GND CLKREQ# CLKREQ_PCIE#3 11
53 54
11 CLK_PCIE_N3 REFCLKN PEWake#
Port P and N follow SATA 55 56
11 CLK_PCIE_P3 REFCLKP NC
57 58
GND NC
+3VS_SSD_NGFF 59 60 SUSCLK_SSD
NC SUSCLK(32kHz) @ T246
RM22 61 62
10K_0402_5% 63 PEDET(NC-PCIE/GND-SATA) 3P3VAUX 64
1 @ 2 65 GND 3P3VAUX 66
GND 3P3VAUX +3VS_SSD_NGFF
67
@ GND 68
1 2 SSD_DET# GND1 69
13 SATA_GP2 GND2
DVT 01/23 RM23 BELLW_80159-3221
4 0_0402_5% 4
CONN@
1
D
QM1 2
SP070018L00
BSS138W-7-F_SOT323-3 G
@ S
3
SSD_DET# (SATA_GP0)
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2016/11/04 Deciphered Date 2018/11/04 Title
SATA Device 0
PCIE Device 1 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
M.2 Key E (WLAN)/Key M(SSD)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 31 of 57
A B C D E
A B C D E
SM01000EJ00 3000mA 220ohm@100mhz DCR 0.04 +5VS (output = 300 mA) +VDDA
40mil 40mil JPA1 40mil Int. Speaker Conn.
+VDDA
LA1 2 1 1
1 2
2 40mil SPK_R+
JSPK1
HCB2012KF-221T30_0805 1 1 1 SPKR+ LA2 EMI@ 1 2 PBY160808T-121Y-N_2P 1
1
1
SPK_R-
10U_0603_6.3V6M
CA1
0.1U_0201_10V6K
CA2
0.1U_0201_10V6K
CA3
.1U_0402_16V7K
CA4
JUMP_43X79 4.75V SPKR- LA3 EMI@ 1 2 PBY160808T-121Y-N_2P 2
@ SPKL+ LA4 EMI@ 1 2 PBY160808T-121Y-N_2P SPK_L+ 3 2
SPKL- LA5 EMI@ 1 2 PBY160808T-121Y-N_2P SPK_L- 4 3
2
2 2 @ +AVDD1_HDA 2 5 4
@ESD@ 6 G1
GND & GNDA moat EMI request for solve EMI noise, SM01000OW00. G2
GND GND
3
GND ACES_50278-00401-001
Place near Pin41 Place near Pin46 GND CONN@
@ESD@ @ESD@
1
DA1 DA2 SP02000RR00 1
TVNST52302AB0_SOT523-3 TVNST52302AB0_SOT523-3
20mil
1
CA5 1 2 10U_0603_6.3V6M RA1 1 @ 2
GND +VDDA
10U_0603_6.3V6M
CA9
1
1
0.1U_0201_10V6K
CA8
Pin9 need to matching with SOC HDA CA6 1 2 0.1U_0201_10V6K 0_0603_5% GND GND
interface. +3VS_DVDDIO
RA2 2 @ 1 0_0402_5% Place near Pin9
+3VS
2
2 @
+3VS_DVDD GND & GNDA moat
20mil GNDA
RA5 2 @ 1 0_0402_5% Place near Pin26
+3VS
1 1 +1.8VS_VDDA
0.1U_0201_10V6K
CA11
CA10 RA6 2 @ 1 +1.8VS
1
1
0.1U_0201_10V6K
CA12
CA13
10U_0603_6.3V6M
10U_0603_6.3V6M 0_0402_5%
2 2
2
2 @
1 2 DMIC_CLK Place near Pin1 GND GNDA
CA32 @EMI@
10P_0402_50V8J
41
46
26
40
1
9
UA1 Place near Pin40
Reserved for EMI
DVDD
DVDD-IO
PVDD1
PVDD2
AVDD1
AVDD2
GND
LINE1-L 22
LINE1-R 21 LINE1-L(PORT-C-L) 43 SPKL-
UA1 LINE1-R(PORT-C-R) SPK-OUT-L- 42 SPKL+
24 SPK-OUT-L+
23 LINE2-L(PORT-E-L) 45 SPKR+
LINE2-R(PORT-E-R) SPK-OUT-R+ 44 SPKR-
2 RING2 17 SPK-OUT-R- 2
40mil SLEEVE 18 MIC2-L(PORT-F-L) /RING2
ALC233-VB2-CG_MQFN48_6X6 MIC2-R(PORT-F-R) /SLEEVE 32 HP_LEFT
Combo MIC
233@ +MICBIAS +MICBIAS 31
LINE1-VREFO-L
HPOUT-L(PORT-I-L)
HPOUT-R(PORT-I-R)
33 HP_RIGHT Digital MIC
SA00007BF10 30
LINE1-VREFO-R 10 HDA_SYNC_R
DMIC_DATA SYNC HDA_BIT_CLK_R HDA_SYNC_R 10
2 6
DMIC_CLK 3 GPIO0/DMIC-DATA BCLK HDA_BIT_CLK_R 10
GPIO1/DMIC-CLK 1 @EMI@ 2 1 2 CA15 @EMI@ PCH_DMIC_DATA 2 @ 1
GND 10 PCH_DMIC_DATA
RA10 0_0402_5% 22P_0402_50V8J 33_0402_5% RA36
EC_MUTE# 47 5 HDA_SDOUT_R PCH_DMIC_CLK 2 @ 1
37 EC_MUTE# HDA_RST#_R 11 PDB SDATA-OUT 8 HDA_SDIN0_AUDIO 1 RA33 2
HDA_SDOUT_R 10 10 PCH_DMIC_CLK
33_0402_5% RA11
TO eDP Conn
10 HDA_RST#_R RESETB SDATA-IN HDA_SDIN0 10
33_0402_5%
48 DMIC_DATA 2 EMI@ 1 RA35 DMIC_DATA_R
MONO_IN 12 SPDIF-OUT/GPIO2 0_0402_5% DMIC_DATA_R 28
10mil Close codec1
PCBEEP 16 DMIC_CLK 2 1 DMIC_CLK_R
HP_PLUG# RA13 2 200K_0402_1% SENSE_A 13 MONO-OUT RA34 DMIC_CLK_R 28
36 HP_PLUG# SENSE A +MIC2_VREFO
RA14 2 1 100K_0402_1% 14 BLM15PX221SN1D
+3VS SENSE B
1 29 10U_0603_6.3V6M 2 1 CA18 GND DVT 01/23 EMI@
37 MIC2-VREFO
CA19 35 CBP 7 10U_0603_6.3V6M 2 1 CA20
CBN LDO3-CAP GNDA
2.2U_0402_6.3V6M 39
2 LDO2-CAP 27 10U_0603_6.3V6M 2 1 CA21
LDO1-CAP GNDA
36
+3VS_DVDD CPVDD 1 RA15 2
Pin20 28 CODEC_VREF 100K_0402_5% 10mil
RA16 1 @ 2 0_0402_5% 20 VREF
1 1
ALC283 : NC +3VALW CPVREF Headphone Out
0.1U_0201_10V6K
CA23
2.2U_0402_6.3V6M
CA24
15
ALC255/256/233 : Power for combo jack depop 10U_0603_6.3V6M 2 1 CA22 19 JDREF 34 CPVEE
GNDA MIC-CAP CPVEE
circuit at system shutdown mode 2 2
1 @
4 +MIC2_VREFO
Pin4 49 DVSS 25 CA26
ALC283 : DVSS Thermal PAD AVSS1 38 2.2U_0402_6.3V6M
ALC255/256/233 : DC DET (For Japen customer only) AVSS2 2
3 3
ALC255-CG_MQFN48_6X6
Place near pin28
1
SA000082700 GND
GND 255@ RA19 RA20
GNDA 2.2K_0402_5% 2.2K_0402_5%
GNDA
2
RA21 CA27 SLEEVE SLEEVE 36
DOS mode 22K_0402_5% .1U_0402_16V7K Pin15 RING2 RING2 36
2 1 BEEP#_R 1 2 MONO_IN
37 BEEP# ALC283 : Ref. Resistor for Jack Detect
ALC255/256/233 : Jack Detect for SPDIF-OUT and SPK-OUT port
2
OS mode 22K_0402_5%
4.7K_0402_5%
RA23
2 1
10 PCH_SPKR
2
1
GND
LINE1-L 1 2
CA29 4.7U_0402_6.3V6M
www.qdzbwx.com
LINE1-R 1 2
CA30 4.7U_0402_6.3V6M
+MICBIAS DA5
2 2 RA29 1
GND & GNDA moat 4.7K_0402_5%
JPA2 JPA3 1
JUMP_43X39 JUMP_43X39
1 2 1 2 3 2 RA32 1
@ 1 2 @ 1 2 4.7K_0402_5%
BAT54A-7-F_SOT23-3
4 JPA4 JPA5 JUMP_43X39 4
JUMP_43X39 1 2
1 2 @ 1 2
@ 1 2
JPA6 JUMP_43X39
CA31 @EMI@ 1 2
.1U_0402_16V7K @ 1 2
1 2
JPA7 JUMP_43X39
1 2
RA25 1 @EMI@ 2 0_0402_5% @ 1 2 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2016/11/04 Deciphered Date 2018/11/04 Title
HD Audio Codec ALC255/ALC233 Colay
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
GND GNDA GND GNDA AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 32 of 57
A B C D E
A B C D E
1
1 2
RZ1 +3VS ODD@ CO5 1 2 0.01U_0402_16V7K SATA_CTX_C_DRX_P1 3 1 2 4
13 SATA_CTX_DRX_P1 SATA_CTX_C_DRX_N1 3 4
10K_0402_5% 13 SATA_CTX_DRX_N1 ODD@ CO6 1 2 0.01U_0402_16V7K 5 6
BA@ UZ1 BA@ 7 5 6 8
1 CZ1 1 2 10U_0603_6.3V6M ODD@ CO7 1 2 0.01U_0402_16V7K SATA_CRX_C_DTX_N1 9 7 8 10
1 13 SATA_CRX_DTX_N1 1
2
8 Vdd_IO ODD@ CO8 1 2 0.01U_0402_16V7K SATA_CRX_C_DTX_P1 11 9 10 12
CS 13 SATA_CRX_DTX_P1 11 12
4 14 CZ2 1 2 BA@ 13 14
9,20 SOC_SMBCLK_1 SCLSPC Vdd 13 14
6 0.1U_0201_10V6K 15 16
9,20 SOC_SMBDATA_1 SDA/SDI/SDO +5VS +5VS_ODD 15 16
+3VS RZ2 1 @ 2 10K_0402_5% 7 @ RO2 17 18
RO25 1 BA@ 2 10K_0402_5% SDO/SA0 11 G_INT# 0_0805_5% 19 17 18 20
16 INT1 9 G_INT2 G_INT# 12
1 2 +5VS_ODD 80mils 21 19 20 22
15 ADC1 INT2 23 21 22 24
ADC2 23 24
10U_0603_6.3V6M
13 10 INT1/2 all High Active 1 1
ADC3 RES
CO9
CO10 25 26
2 0.1U_0201_10V6K GNDGND
3 NC 5 ODD@ ODD@ ACES_50673-0120N-P01
NC GND 12 2 2
GND CONN@
LIS3DHTR_LGA16_3X3 SP01002HK00
BA@
LIS3DH
SA0 ->0, Address is 0011 000 (0x30h)
SA0 ->1, Address is 0011 001 (0x32h)
B_EQ1
A_EQ2
A_EQ1
CO14
DEW
2 1 JHDD2
1
0.01U_0402_16V7K 20 UO2 2 1
19
18
17
16
PS8527CTQFN20GTR2A_TQFN20_4X4 3 2
SA00007JU10 4 3
VDD2
B_EQ1
A_EQ2
A_EQ1
DEW
+3VS 4
5
6 5
CO16 2 1 SATA_CTX_C_DRX_P0 0.01U_0402_16V7K 1 15 RDSATA_CTX_DRX_P0 7 6
13 SATA_CTX_DRX_P0 SATA_CTX_C_DRX_N0 A_INP A_OUTP RDSATA_CTX_DRX_N0 7
13 SATA_CTX_DRX_N0 CO17 2 1 0.01U_0402_16V7K 2 14 8
3 A_INN A_OUTN 13 B_EQ2 +5VS_HDD 9 8
CO18 2 1 SATA_CRX_C_DTX_N0 0.01U_0402_16V7K 4 GND1 B_EQ2 12 RDSATA_CRX_DTX_N0 10 9
13 SATA_CRX_DTX_N0 SATA_CRX_C_DTX_P0 B_OUTN B_INN RDSATA_CRX_DTX_P0 10
CO19 2 1 0.01U_0402_16V7K 5 11 0_0402_5% 11
13 SATA_CRX_DTX_P0 B_OUTP B_INP G_INT2 JHDD_P9 11
21 RO4 1 @ 2 12
GND2 12
REXT
VDD1
B_DE
A_DE
13
14 13
EN
CO12
10U_0603_6.3V6M
RO18 1 2 4.7K_0402_5% RO6 2 1 0_0805_5% 1 22
G2
1
+3VS 4.99K_0402_1% 2 CO13 23
RO14 1 @ 2 4.7K_0402_5% A_EQ2 0.1U_0201_10V6K 24 G3
3 RO19 1 2 4.7K_0402_5% RO5 1 @ 2 @ G4 3
2
4.7K_0402_5% 2 ACES_50406-02071-001
RO11 1 @ 2 4.7K_0402_5% B_DE CONN@
RO16 1 @ 2 4.7K_0402_5% SP010016L00
RO12 1 @ 2 4.7K_0402_5% B_EQ1
RO17 1 2 4.7K_0402_5%
PVT 03/13
PS8527C EQ and DE
*
*
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/ODD/ HDD Re-Driver
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 33 of 57
A B C D E
5 4 3 2 1
AA3
AA5
T10
W4
M6
N5
U9
K6
Y4
D U6 D
A4
VCCQ
VCCQ
VCCQ
VCCQ
VCCQ
VCC
VCC
VCC
VCC
A6 NC
A9 NC
A11 NC W5 EMMC_CMD_R R3 1 EMMC@ 2 0_0402_5% EMMC_CMD
NC CMD EMMC_CMD 10
U6 B2
B13 NC
D1 NC
D14 NC EMMC@
H1 NC U5 EMMC_PLT_RST# C76 1 2 .1U_0402_16V7K
H2 NC RST_n
EMMC32G-M525-A01 H6 NC W6 EMMC_CLK_R R5 1 EMMC@ 2 0_0402_5% EMMC_CLK
NC CLK EMMC_CLK 10
KINGSTON32G@ H7
H8 NC
SA00009KE10 NC
H9
H10 NC
H11 NC H3 EMMC_D0_R R36 1 EMMC@ 2 0_0402_5% EMMC_D0
NC DAT0 EMMC_D1_R EMMC_D1 EMMC_D0 10
H12 H4 R39 1 EMMC@ 2 0_0402_5%
NC DAT1 EMMC_D2_R EMMC_D2 EMMC_D1 10
H13 H5 R40 1 EMMC@ 2 0_0402_5%
NC DAT2 EMMC_D3_R EMMC_D3 EMMC_D2 10
H14 J2 R34 1 EMMC@ 2 0_0402_5%
NC DAT3 EMMC_D4_R EMMC_D4 EMMC_D3 10
J1 J3 R41 1 EMMC@ 2 0_0402_5%
NC DAT4 EMMC_D5_R EMMC_D5 EMMC_D4 10
J7 J4 R38 1 EMMC@ 2 0_0402_5%
NC DAT5 EMMC_D6_R EMMC_D6 EMMC_D5 10
J8 J5 R35 1 EMMC@ 2 0_0402_5%
NC DAT6 EMMC_D7_R EMMC_D7 EMMC_D6 10
J9 J6 R37 1 EMMC@ 2 0_0402_5%
NC DAT7 EMMC_D7 10 +1.8VS_EMMC
J10
J11 NC
J12 NC EMMC@
J13 NC K2 EMMC_VDDI C75 1 2 .1U_0402_16V7K EMMC_D0_R R46 1 EMMC@ 2 20K_0402_5%
J14 NC VDDi EMMC_D1_R R50 1 EMMC@ 2 20K_0402_5%
C K1 NC EMMC_D2_R R44 1 EMMC@ 2 20K_0402_5% C
K3 NC U1 EMMC_D3_R R43 1 EMMC@ 2 20K_0402_5%
K5 NC NC U2 EMMC_D4_R R51 1 EMMC@ 2 20K_0402_5%
K7 NC NC U3 EMMC_D5_R R45 1 EMMC@ 2 20K_0402_5%
K8 NC NC U6 EMMC_D6_R R42 1 EMMC@ 2 20K_0402_5%
K9 NC NC U7 EMMC_D7_R R49 1 EMMC@ 2 20K_0402_5%
K10 NC NC U10
K11 NC NC U12 EMMC_CMD_R R47 1 EMMC@ 2 20K_0402_5%
K12 NC NC U13
K13 NC NC U14 EMMC_CLK_R R52 1 EMMC@ 2 20K_0402_5%
K14 NC NC V1
L1 NC NC V2 EMMC_RCLK_R R48 1EMMC V5.0@
2 20K_0402_5%
L2 NC NC V3
L3 NC NC V12
L4 NC NC V13 Check if need pop for 5.0
L12 NC NC V14
L13 NC NC W1
L14 NC NC W2
M1 NC NC W3
M2 NC NC W7
M3 NC
NC
NC
NC
W8 Level shif t +1.8VS_EMMC
M5 W9
M8 NC NC W10
EMMC_VSF2 M9 NC NC W11 +3VS
@ T2 NC NC
1
EMMC_VSF3 M10 W12
@ T3 NC NC
M12 W13 U7 R23
M13 NC NC W14 1 5 10K_0402_5%
M14 NC NC Y1 NC VCC EMMC@
N1 NC NC Y3 2
11,37,38 PLT_RST#
2
B N2 NC NC Y6 IN A 4 EMMC_PLT_RST# B
N3 NC NC Y7 3 Y
N10 NC NC Y8 GND
N12 NC NC Y9 NL17SZ07DFT2G_SC70-5
N13 NC NC Y10 @
N14 NC NC Y11
P1 NC NC Y12
P2 NC NC Y13
P3 NC NC Y14 +1.8VS_EMMC
P10 NC NC AA1
P12 NC NC AA2
P13 NC NC AA7
P14 NC NC AA8
NC NC
2
R1 AA9
G
R2 NC NC AA10
For eMMC5.0 EMMC V5.0@ R3 NC NC AA11 PLT_RST# 1 3 EMMC_PLT_RST#
2 1 EMMC_RCLK_R R5 NC NC AA12
S
10 EMMC_RCLK NC NC
0_0402_5% R53 R12 AA13
R13 NC NC AA14 Q8 EMMC@
R14 NC NC AE1 MESS138W -G_SOT323-3
T1 NC NC AE14
T2 NC NC AG2
T3 NC NC AG13
PN : SB00000T000
T5 NC NC AH4
T12 NC NC AH6
T13 NC NC AH9
T14 NC NC AH11
NC NC
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
A A
M7
P5
R10
U8
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EMMC STORAGE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 34 of 57
5 4 3 2 1
5 4 3 2 1
USB3.0 (Port 3)
DVT LS1,LS3,LS4,LS6 cover solder mask 02/07
RS1
RS2
1
1
@
@
2 0_0402_5%
2 0_0402_5%
www.qdzbwx.com
USB3_CTX_C_DRX_N3 USB3_CTX_L_DRX_N3 For ESD request
13 USB3_CTX_DRX_N3 CS1 1 2 3 4
.1U_0402_16V7K
DS1 ESD@
13 USB3_CTX_DRX_P3 CS2 1 2 USB3_CTX_C_DRX_P3 2 1 USB3_CTX_L_DRX_P3 TBTA_SBU1 1 1 10 9
TBTA_SBU1
.1U_0402_16V7K
LS1 @EMI@ SM070003V00 TBTA_SBU2 2 2 9 8 TBTA_SBU2
HCM1012GH900BP_4P
USB3_CRX_L_DTX_P3 4 7 7 USB3_CRX_L_DTX_P3
INPAQ_HCM1012GH900BP_4P-NPM 4
USB3_CRX_L_DTX_N3 5 6 6
USB3_CRX_L_DTX_N3
D 5 D
RS3 1 @ 2 0_0402_5% 3 3
RS4 1 @ 2 0_0402_5%
8
USB3_CRX_DTX_P3 2 1 USB3_CRX_L_DTX_P3
13 USB3_CRX_DTX_P3
TVWDF1004AD0
USB3_CRX_DTX_N3 3 4 USB3_CRX_L_DTX_N3
13 USB3_CRX_DTX_N3 DS2 ESD@
LS3 @EMI@ SM070003V00 USB3_CTX_L_DRX_P2 1 USB3_CTX_L_DRX_P2
1 10 9
HCM1012GH900BP_4P
USB3_CTX_L_DRX_N2 2 8 USB3_CTX_L_DRX_N2
INPAQ_HCM1012GH900BP_4P-NPM 2 9
USB3_CTX_L_DRX_P3 4 7 7 USB3_CTX_L_DRX_P3
4
USB3_CTX_L_DRX_N3 5 6 6 USB3_CTX_L_DRX_N3
5
8
CS3 1 2 USB3_CTX_C_DRX_N2 3 4 USB3_CTX_L_DRX_N2 USB20_P2 2 1 USB20_P2_L
13 USB3_CTX_DRX_N2 13 USB20_P2
.1U_0402_16V7K TVWDF1004AD0
4 4 7 7
RS7 1 @ 2 0_0402_5%
RS8 1 @ 2 0_0402_5% CC1_VCONN 5 5 6 6 CC1_VCONN
USB3_CRX_DTX_N2 2 1 USB3_CRX_L_DTX_N2 3 3
C 13 USB3_CRX_DTX_N2 C
8
USB3_CRX_DTX_P2 3 4 USB3_CRX_L_DTX_P2
13 USB3_CRX_DTX_P2
TVWDF1004AD0
LS6 @EMI@ SM070003V00
HCM1012GH900BP_4P
DS4 ESD@
INPAQ_HCM1012GH900BP_4P-NPM USB20_P2_L 1 1 USB20_P2_L
10 9
USB20_N2_L 2 2 9 8
USB20_N2_L
USB3_CRX_L_DTX_N2 4 7 7 USB3_CRX_L_DTX_N2
4
USB3_CRX_L_DTX_P2 5 6 6 USB3_CRX_L_DTX_P2
5
3 3
0.01U_0402_16V7K
CS10
JUMP_43X79 1 1 2 1 10U_0603_6.3V6M
@ CS5 + CS6 CS7
10U_0603_6.3V6M 150U_B2_6.3VM_R35M 10U_0603_6.3V6M 2
SGA00009M00
2 2 2 1 2
+USB3_VCCC +USB3_VCCC
@ JPS1
1 2 PVT 03/10
B 1 2 B
+3VALW_CC JUMP_43X118
RPS1 +USB3_VCCC CC1_VCONN/CC2_VCONN 20mils JUSB4
100K_0804_8P4R_5% +5VALW_CC +5VALW_CC_VOUT A1 B12
1 8 CC_AUDIO# US1
30V 10mOhm
@ QS1 AON6405L 1P DFN GND GND
2 7 CC_POL# +3VALW_CC 120mils 3A 120mils 3A 1
120mils 3A USB3_CTX_L_DRX_P3 A2 B11 USB3_CRX_L_DTX_P3
3 6 CC_UFP# 2 14 2 USB3_CTX_L_DRX_N3 A3 SSTXP1 SSRXP1 B10 USB3_CRX_L_DTX_N3
4 5 CC_LD_DET# 3 IN1 OUT 15 5 3 0.47U_0402_25V6K 2 1 CS11 SSTXN1 SSRXN1
4 IN1 OUT A4 B9 CS12 1 2 0.47U_0402_25V6K
1
IN2 VBUS VBUS
3
5 RS15 RS12 CC1_VCONN A5 B8 TBTA_SBU2
4
1
+3VALW_CC 1 CC_FAULT# +3VALW_CC 100K_0402_5% @ 1M_0402_5% CS13
@ FAULTb 20 CC_LD_DET# @ 10U_0805_25V6K USB20_P2_L A6 B7 USB20_N2_L
DVT 01/23 CC_EN LD_DETb USB20_N2_L DP1 DN2 USB20_P2_L
37 EC_TYPEC_EN
1 2 6 A7 B6
2
1
1
RS40 1 @ 2 100K_0402_5% CC_CHG_HI 5 QS2B MESC5V02BD03_SOT23-3 USB3_CRX_L_DTX_N2 A10 B3 USB3_CTX_L_DRX_N2
16 CC_DEBUG# G 2N7002KDW_SOT363-6 USB3_CRX_L_DTX_P2 A11 SSRXN2 SSTXN2 B2 USB3_CTX_L_DRX_P2
RS41 1 @ 2 100K_0402_5% CC_EN CC_REF 10 DEBUGb 17 CC_AUDIO# @ SSRXP2 SSTXP2
REF AUDIOb
6
18 CC_POL# D S A12 B1
4
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CC+USB TYPE C
Note : 2017 BIOS SPEC define DC mode 30% stop charge AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 35 of 57
5 4 3 2 1
A B C D E
USB3.0 (Port 1)
www.qdzbwx.com
+5VALW
For ESD request +USB3_VCCA
CS23
DS21 ESD@ 1U_0402_6.3V6K US21
@RF@ USB3_CTX_L_DRX_P1 1 1 10 9 USB3_CTX_L_DRX_P1 1 2 5 1
USB3_CTX_C_DRX_N1 USB3_CTX_L_DRX_N1 IN OUT W=100mils
13 USB3_CTX_DRX_N1 CS21 1 2 RS21 1 2 0_0402_5%
.1U_0402_16V7K USB3_CTX_L_DRX_N1 2 2 9 8 USB3_CTX_L_DRX_N1 2
@RF@ GND
CS22 1 2 USB3_CTX_C_DRX_P1 RS22 1 2 0_0402_5% USB3_CTX_L_DRX_P1 USB3_CRX_L_DTX_P1 4 4 7 7 USB3_CRX_L_DTX_P1 4 3 RS23 1 @ 2 0_0402_5%
1 13 USB3_CTX_DRX_P1 37 USB_CHARGE_2A EN OC USB_OC0# 13 1
.1U_0402_16V7K
USB3_CRX_L_DTX_N1 5 6 6 USB3_CRX_L_DTX_N1 SY6288C20AAC_SOT23-5
5 1
CS24
3 3 1000P_0402_50V7K
ESD@
8 2
DVT 02/13
TVWDF1004AD0
+USB3_VCCA
@RF@
USB3_CRX_DTX_N1 RS24 1 2 0_0402_5% USB3_CRX_L_DTX_N1
13 USB3_CRX_DTX_N1 W=100mils
@RF@ DVT 02/15 1 1
USB3_CRX_DTX_P1 RS25 1 2 0_0402_5% USB3_CRX_L_DTX_P1
13 USB3_CRX_DTX_P1 + CS26
CS25 470P_0402_50V7K
150U_B2_6.3VM_R35M 2 @
SGA00009M00 2
DS22 ESD@
U2DN1_L
USB3.0 Conn.
6 3
I/O4 I/O2 JUSB1
+USB3_VCCA 1
U2DN1_L 2 VBUS
LS23 5 2 U2DP1_L 3 D-
U2DP1 2 1 U2DP1_L VDD GND 4 D+
USB3_CRX_L_DTX_N1 5 GND
USB3_CRX_L_DTX_P1 6 SSRX- 10
U2DN1 3 4 U2DN1_L 4 1 U2DP1_L 7 SSRX+ GND 11
I/O3 I/O1 USB3_CTX_L_DRX_N1 8 GND GND 12
MCM1012B900F06BP_4P AZC099-04S.R7G_SOT23-6 USB3_CTX_L_DRX_P1 9 SSTX- GND 13
EMI@ SSTX+ GND
2 ACON_TARB5-9V1391 2
CONN@
DC23300NH00
+3VLP
1
USB20_N1 RS96 1 NCHG@ 2 0_0402_5% U2DN1 CHG@
USB20_P1 RS97 1 NCHG@ 2 0_0402_5% U2DP1 RS94
10K_0402_5%
2
USB_CB 8 1 USB_CEN
37 USB_CB USB20_N1 CB CEN USB_CEN 37
CB SELCDP 7 2 U2DN1
13 USB20_N1 USB20_P1 6 TDM DM 3 U2DP1
13 USB20_P1 5 TDP DP 4
0 X DCP(Dedicated Charging Port) +5VALW VDD SELCDP USB_SELCDP 37
autodetect with mouse/keyboard wakeup 1 9
CS89 Thermal Pad
1 0 S0 charging with SDP(Standard Downstream Port) only 0.1U_0201_10V6K SLG55594AVTR_TDFN8_2X2
CHG@ SA00006L600
2 CHG@
1 1 S0 charging with CDP(Charging Downstream Port) or
SDP only
3 3
1
D
www.qdzbwx.com
EC_CLR_CMOS 2 QB6
0.1U_0201_10V6K
CB1
0.1U_0201_10V6K
CB2
0.1U_0201_10V6K
CB3
+3VALW_1.8VALW_PGPPA G L2N7002LT1G_SOT23-3
1 1 1
1
S
3
1
0_0402_5%
RB26
RB2
10K_0402_5%
+3VLP_EC 2 2 RB3 @ 2
0_0402_5%
2
@ ECAGND
2
1 2 EC_PME# ECAGND 42
@
2
1 RB5 47K_0402_5% +3VCC_LPC 1
EC_PME# PU +3V_LAN at LAN side
+3VS
111
125
22
33
96
67
9
+3VLP_EC UB1
GPU_ALERT RB23 1 2 10K_0402_5%
VCC0
VCC_LPC
VCC
VCC
VCC
VCC
AVCC
RB13 1 2 2.2K_0402_5% EC_SMB_CK1
RB14 1 2 2.2K_0402_5% EC_SMB_DA1
ESPI Bus Pin : 1~5.7.8.10.12.14 GPU_OVERT#RB24 1 2 10K_0402_5%
LPC Bus Pin : 3~5.7.8.10.12.13 SUSPWRDNACK 1 21 EC_VCCST_PG_R
11 SUSPWRDNACK USB_CEN 2 GATEA20/GPIO00 EC_VCCST_PG/GPIO0F 23 EC_VCCST_PG_R 11,40
BEEP#
36 USB_CEN TPM_SERIRQ 3 KBRST#/GPIO01 BEEP#/GPIO10 26 FAN_PWM1 BEEP# 32
9,38 TPM_SERIRQ LPC_FRAME# 4 SERIRQ EC_FAN_PWM/GPIO12 27 USB_CB FAN_PWM1 39
9,38 LPC_FRAME# LPC_AD3_R LPC_FRAME# PWM Output AC_OFF/GPIO13 USB_CB 36
For turn off internal LPC module of KB9032 5
9,38 LPC_AD3_R LPC_AD2_R 7 LPC_AD3
9,38 LPC_AD2_R LPC_AD1_R 8 LPC_AD2 63 BATT_TEMP
ESPI@
1 2 ESPI_RST# 9,38 LPC_AD1_R LPC_AD0_R 10 LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 64 VCIN1_BATT_DROP BATT_TEMP 42 +3VLP_EC
9,38 LPC_AD0_R LPC_AD0LPC & MISC VCIN1_BATT_DROP/AD1/GPIO39 ADP_I VCIN1_BATT_DROP 42
RB8 47K_0402_5% 65
CLK_LPC_EC 12 ADP_I/AD2/GPIO3A 66 AD_BID ADP_I 42,43
9 CLK_LPC_EC PLT_RST# CLK_PCI_EC AD Input AD_BID/AD3/GPIO3B WLAN_PME# LID_SW#
ESPI@ 13 75 RB15 1 2 100K_0402_1%
1 2 PLT_RST# 11,34,38 PLT_RST# EC_RST# 37 PCIRST#/GPIO05 AD4/GPIO42 76 EC_PME# WLAN_PME# 31
39 EC_RST# EC_SCI# 20 EC_RST# AD5/GPIO43 EC_PME# 30
RB9 47K_0402_5% Combine w/ SMI
7 EC_SCI# WLAN_ON 38 EC_SCI#/GPIO0E
1 2 31 WLAN_ON CLKRUN#/GPIO1D
CB5 @ESD@ 100P_0402_50V8J 68 LAN_PWR_EN
38 KSI[0..7] DA0/GPIO3C 70 EC_TP_INT# LAN_PWR_EN 30
DA Output EN_DFAN1/DA1/GPIO3D VR_PWRGD EC_TP_INT# 7,38
KSI0 55 71
KSI1 56 KSI0/GPIO30 DA2/GPIO3E 72 KBL_EN VR_PWRGD 48
1 2 AC_IN 57 KSI1/GPIO31 DA3/GPIO3F KBL_EN 38
KSI2
CB6 100P_0402_50V8J KSI3 58 KSI2/GPIO32 83 EC_MUTE#
59 KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A 84 USB_EN EC_MUTE# 32
KSI4
KSI5 60 KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B 85 EC_TYPEC_EN USB_EN 36
@EMI@ @EMI@
2 2 1 2 1 CLK_LPC_EC KSI6 61 KSI5/GPIO35 PSCLK2/GPIO4C 86 USB_CHARGE_2A EC_TYPEC_EN 35 2
KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D TP_CLK USB_CHARGE_2A 36 SYS_PWROK_R
CB7 RB10 33_0402_5% KSI7 62 87 1 @ 2 SYS_PWROK 11,40
38 KSO[0..17] 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA TP_CLK 38
22P_0402_50V8J KSO0 RB11 0_0402_5%
40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA 38 PU at PTP side
KSO1
KSO2 41 KSO1/GPIO21
KSO3 42 KSO2/GPIO22 97 ENBKL
43 KSO3/GPIO23 ENKBL/GPXIOA00 98 TP_PWR_EN ENBKL 7
KSO4
44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 ME_EN TP_PWR_EN 38
KSO5
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH ME_EN 10
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 VCIN0_PH 42
DB1
For Thermal Portect Shutdown
KSO8 47 KSO7/GPIO27 RB751V-40_SOD323-2
KSO8/GPIO28 SPI Device Interface 3V_EN
KSO9 48 119 MAINPWON 1 2
49 KSO9/GPIO29 MISO/GPIO5B 120 BT_ON 3V_EN 44
KSO10
50 KSO10/GPIO2A MOSI/GPIO5C 126 EC_CLR_CMOS BT_ON 31
KSO11 SPI Flash ROM SPICLK/GPIO58
KSO12 51 KSO11/GPIO2B 128 FP_PWR_EN 3V_EN_R 1 2 RB17 1 2
KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A FP_PWR_EN 38
RB16 1M_0402_5%
KSO14 53 KSO13/GPIO2D 1K_0402_5%
KSO15 54 KSO14/GPIO2E 73 GPU_ALERT
81 KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 74 SYS_PWROK_R GPU_ALERT 21
KSO16
KSO17 82 KSO16/GPIO48 SYS_PWROK/AD7/GPIO41 89 BATT_4S
KSO17/GPIO49 GPIO50 90 BATT_BLUE_LED# BATT_4S 43
BATT_CHG_LED#/GPIO52 91 BATT_BLUE_LED# 36
EC_SMB_CK1 77 CAPS_LED#/GPIO53 92 PWR_LED#
42,43 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CLK1/GPIO44 GPIO PWR_LED#/GPIO54 BATT_AMB_LED# PWR_LED# 36
78 93
42,43 EC_SMB_DA1 SOC_SML1CLK 79 EC_SMB_DAT1/GPIO45 BATT_LOW_LED#/GPIO55 95 SYSON BATT_AMB_LED# 36
9,21 SOC_SML1CLK SOC_SML1DATA 80 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 121 VR_ON SYSON 14,40,45
PU at CPU side 9,21 SOC_SML1DATA EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 127 USB_SELCDP VR_ON 40,48
DPWROK_EC/GPIO59 USB_SELCDP 36
SM Bus
PM_SLP_S3# 6 100 EC_RSMRST#
11,40 PM_SLP_S3# ESPI_RST# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 DGPU_AC_DETECT EC_RSMRST# 11
9 ESPI_RST# SPOK_3V_5V 15 GPIO07 GPXIOA04 102 VCIN1_ADP_PROCHOT DGPU_AC_DETECT 12,21
3 44,47 SPOK_3V_5V TP_EN 16 GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 103 VCOUT1_PROCHOT# VCIN1_ADP_PROCHOT 42 3
38 TP_EN TS_EN 17 GPIO0A VCOUT1_PROCHOT#/GPXIOA06 104 MAINPWON
12,28 TS_EN WL_OFF# 18 GPIO0B VCOUT0_MAIN_PWR_ON/GPXIOA07 105 BKOFF# MAINPWON 39,42,44
31 WL_OFF# AC_PRESENT 19 GPIO0C BKOFF#/GPXIOA08 106 LAN_GPO BKOFF# 28
11 AC_PRESENT GPU_OVERT# AC_PRESENT/GPIO0D GPIO GPO GPXIOA09 3V_EN_R LAN_GPO 30
25 107
21,22 GPU_OVERT# FAN_SPEED1 28 PWM2/GPIO11 PCH_PWR_EN/GPXIOA10 108 PM_SLP_S0#
For abnormal shutdown PM_SLP_S0# 11
39 FAN_SPEED1 TYPEC_3A_1P5A# 29 FAN_SPEED1/GPIO14 PWR_VCCST_PG/GPXIOA11
35 TYPEC_3A_1P5A# E51TXD_P80DATA FANFB1/GPIO15 T85 @
DB2 30
31 E51TXD_P80DATA E51RXD_P80CLK 31 EC_TX/GPIO16 110 AC_IN
RB751V-40_SOD323-2
SPOK_3V_5V 1 2 EC_RSMRST# 31 E51RXD_P80CLK PCH_PWROK 32 EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01 112 EC_ON AC_IN 43
11,40 PCH_PWROK PWR_SUSP_LED# 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 EC_ON 44
ON/OFFBTN#
36 PWR_SUSP_LED# 36 SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03 115 LID_SW# ON/OFFBTN# 38 1 2 VCOUT1_PROCHOT#
DB3 GPI
NUM_LED#/GPIO1A LID_SW#/GPXIOD04 116 SUSP# LID_SW# 38
RB751V-40_SOD323-2 RB25 0_0402_5%
1 2 PCH_PWROK SUSP#/GPXIOD05 117 SW_PROCHOT# SUSP# 14,40,43,45,47 DGPU_AC_DETECT SW_PROCHOT#
GPXIOD06 118 H_PECI_R 1 2
PBTN_OUT# PECI/GPXIOD07 H_PECI 7 QB1A @
122 RB19 43_0402_1%
11 PBTN_OUT# PBTN_OUT#/GPIO5D
3
DB4 PM_SLP_S4# 123 124 2N7002KDW_SOT363-6 D D
11,40 PM_SLP_S4# PM_SLP_S4#/GPIO5E V18R/VCC_IO2 +3VLP_EC VCOUT1_PROCHOT# VCOUT1_PROCHOT#
RB751V-40_SOD323-2 2 5
EC_VCCST_PG_R
AGND
1 2 G G
GND
GND
GND
GND
GND
VCOUT1_PROCHOT# is QB1B
high active when QB1 S S 2N7002KDW_SOT363-6
4
KB9022QD_LQFP128_14X14 mount @
11
24
35
94
113
ECAGND 69
RB4 MP@
1
1 H_PROCHOT#
RB4 CB4 RB21 1 @ 2 0_0402_5% SW_PROCHOT#
7 H_PROCHOT#
Rb 0_0402_5% 0.1U_0201_10V6K
EVT@ @
2
2
2
KSO6 20 CK1 2 1 JTP1
KSO7 19 20 4 3 1
19 EN OC 4.7U_0402_6.3V6M 1
4 3 KSO8 18 2 RK4 TP_CLK 2
18 2 TP_DATA 2
Test Only KSO9 17 SY6288C20AAC_SOT23-5 10K_0402_5% 3
SWK1 EVT@ KSO10 16 17 CK3
EC PS2 4 3
1
SKRPABE010_4P KSO11 15 16 1U_0402_6.3V6K EC_TP_INT# I2C_1_SDA_R 5 4
TOP 2 1 KSO12 14 15 1 I2C_1_SCL_R 6 5
KSO13 13 14 TP_PWR_EN 37 PCH I2C EC_TP_INT# 7 6
KSO14 12 13 7,37 EC_TP_INT# TP_EN 8 7
12 37 TP_EN 8
KSO15 11 9
KSO16 10 11 TP_PWR_EN follow SYSON behavior 10 GND
KSO17 9 10 GND
KSI0 8 9 ACES_51524-00801-001
KSI1 7 8 CONN@
KSI[0..7] KSI2 6 7
KSI[0..7] 37 KSI3 5 6 SP01001A910
KSO[0..17] KSI4 4 5 +3V_PTP +3V_PTP
KSO[0..17] 37 3 4 +3V_PTP
KSI5
KSI6 2 3
KSI7 1 2
1
1
RK7 RK10
1
2.2K_0402_5% 2.2K_0402_5%
G
KB BackLight
ACES_85201-2805 QK1B RK5 RK6
CONN@ 2N7002KDW_SOT363-6 4.7K_0402_5% 4.7K_0402_5%
SP01000GO00
2
3 4 I2C_1_SCL_R
2
+5VS 12 I2C_1_SCL
JBL1
D
U1 1
5 1 +5VS_BL 2 1 1 2 TP_CLK
IN OUT 3 2 37 TP_CLK TP_DATA
RK8 @ 0_0402_5%
3 37 TP_DATA
2
2 4
G
2 GND 4 2
4 3 5 QK1A
37 KBL_EN EN OC GND
6 2N7002KDW_SOT363-6
SY6288C20AAC_SOT23-5 GND 6 1 I2C_1_SDA_R
S
12 I2C_1_SDA
ACES_51524-0040N-001
D
1 CONN@
1 @ 2
C3 SP010022M00 RK9 0_0402_5%
0.1U_0201_10V6K
2
Lid Switch
TPM Finger Print
(Hall Effect Switch)
Power Souce Check
EGIS ETU801 +FP_VCC=5V +3VLP
0.1U_0201_10V6K
CW2 TPM@
10U_0603_6.3V6M
0.1U_0201_10V6K
CW4 TPM@
0.1U_0201_10V6K
CW5 TPM@
0.1U_0201_10V6K
CW6 TPM@
1 1 1 1 1 1 1 4
4
CW1
CW3
2 FP@
GND CK12 5
4 3 6 GND
2 TPM@ 2 near pin5 2 TPM@ 2 2 2 EN OC 2
4.7U_0402_6.3V6M GND
2
3 FP@ SY6288C20AAC_SOT23-5 ACES_51524-0040N-001 3
CK11 FP@ CONN@
1U_0402_6.3V6K
1
FP_PWR_EN 37
SP010022M00
near pin10, 19, 24
1
2 1 @ @
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80
@ @ @ @ @ @ @
FD3 FD4
H13 H14 H15 H26 H27 H28 H29 H30 H33
H_3P8 H_3P8 H_3P8 H_3P8 H_3P8 H_3P8 H_3P2 H_3P2 H_2P5
@ @
1
+3VS FIDUCIAL_C40M80 FIDUCIAL_C40M80
1
1
RF2 @ @ @ @ @ @ @ @ @
10K_0402_5% DVT 01/23
40mil
JFAN1
2
+VCC_FAN1 1
FAN_SPEED1 2 1
37 FAN_SPEED1 FAN_PWM1 3 2
37 FAN_PWM1 4 3
1 H23 H35 H25
5 4 H_2P7X2P0N H_2P7X2P0N H_2P0N
6 G1
CF3 G2
2 1000P_0402_50V7K ACES_50278-00401-001 @ @ @
1
@EMI@ CONN@
SP02000RR00
2 2
Reset Circuit
+3VLP
RG1 1 @ 2 0_0402_5%
MAINPWON 37,42,44
2
RG3 RG2 1 @ 2 0_0402_5%
EC_RST# 37
10K_0402_5%
6
D
BI_GATE# 2
G 2N7002KDW_SOT363-6
BI_GATE PH to +RTCVCC at PWR side QG1A
3
D S
1
1
BI_GATE 5
3 42 BI_GATE G C70 3
QG1B 0.1U_0201_10V6K
2N7002KDW_SOT363-6 S 2
4
BI SW
Reset Button
3 SWG1 1
SWG2 BI_S 42
BI_GATE 1 2 BI_GATE 4 2
ATE-2-V-TR_4P
3 4 H : 3.8mm
SKRPABE010_4P Release : Battery Off
Push : Battery ON
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FAN & Screw Hole & Reset
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 39 of 57
A B C D E
A B C D E
2
1 2
G
1
Q1A
UQ1 R24 2N7002KDW_SOT363-6
1 14 @ JPQ2 100K_0402_5%
+5VALW VIN1 VOUT1 +5VS_OUT1
2 13 2 1 6
S
VIN1 VOUT1 1 2 +5VS EC_VCCST_PG_R 11,37
D
2
RQ2 2 @ 1 0_0402_5% 5VS_ON 3 12 1 2 JUMP_43X118 MOW14, For tCPU28 200us(max)
ON1 CT1 CQ1 1000P_0402_50V7K SLP_S3# to VCCST_PWRGD deassertion
5
1 2 @ CQ4 4 11
G
1 +5VALW VBIAS GND 1
.1U_0402_16V7K
SUSP# 1 @ 2 3VS_ON 5 10 1 2 1000P_0402_50V7K Q1B
RQ1 0_0402_5% ON2 CT2 CQ3 @ JPQ1 Q2A 2N7002KDW_SOT363-6
6 9 +3VS_OUT
1 2 2N7002KDW_SOT363-6 4 3
S
+3VALW VIN2 VOUT2 1 2 +3VS VR_ON 37,48
D
1 2 @ CQ2 7 8 D
.1U_0402_16V7K VIN2 VOUT2 JUMP_43X118 2
11,37 PM_SLP_S3# MOW14, For tPLT17 200us(max)
15 G SLP_S3# to IMVP VR_ON deassertion
GPAD
5
1 2
G
EM5209VF_DFN14_2X3 S
1
CQ6 Q2B
.1U_0402_16V7K 2N7002KDW_SOT363-6
4 3 SUSP#
D
MOW14, For tPLT18 200us(max)
SLP_S3# to VCCIO VR disable
2
G
Q3A @
+5VALW +0.6VS_VTT +1.2V_VDDQ +5VALW 2N7002KDW_SOT363-6
+2.5V 1 6
S
SYS_PWROK 11,37
2
2
D
2
R25 R26 R27 R28
2
100K_0402_5% @ @ 470_0603_5% 470_0603_5% 100K_0402_5%
5
R31 @ @
G
470_0603_5% +3VALW Q3B @
+0.6VS_VTT_R
1
1
SUSP @ 2N7002KDW_SOT363-6
1
1
1
Q4A @ Q4B @ +1.2V_VDDQ_R SYSON# 4 3
S
PCH_PWROK 11,37
D
2N7002KDW_SOT363-6 2N7002KDW_SOT363-6 R29
6
1
D
2 5 SUSP 2N7002KDW_SOT363-6 2N7002KDW_SOT363-6
14,37,43,45,47 SUSP#
3
6
G G SYSON# 2 D D
2
2 G SYSON# 2 5 SYSON Q6A PM_SLP_S4 2
SYSON 14,37,45
1
S S Q7 S G G 2N7002KDW_SOT363-6
1
5
R30 L2N7002LT1G_SOT23-3 D
G
10K_0402_5% @ S S 2 Q6B
4
1
11,37 PM_SLP_S4# G
@ 2N7002KDW_SOT363-6
2
S 4 3 SYSON
S
1
D
MOW14, For tPLT15 200us(max)
SLP_S4# to VDDQ ramp down
+5VS +1.05VS_1.0VSDGPU
2
2
0_0805_5%
1 N17S@ 2 +3VS_1.8VALW_VIN R4916 R574 R574 N17S@
+3VS 100K_0402_5% 47_0603_5% 10_0603_1%
VGA@ N16X@ SD014100A80
RV163 1 N16X@ 2 0_0603_5% CV236 VGA@
1
1
UV16 .1U_0402_16V7K
CV258 1 2 1 14 1 2 PEX_VDD_EN# +1.05VSDGPU_R
DV9 VGA@ VGA@ 1U_0402_6.3V6K 2 VIN1 VOUT1 13
VIN1 VOUT1 +3VS_1.8VSDGPU_AON
2 BAV70W_SOT323-3
12,22 DGPU_PWR_EN
6
3
1 DGPU_PWR_EN_AON 3 12 1 2 680P_0402_50V7K
3 ON1 CT1 CV238 VGA@ PEX_VDD_EN 5 G
D D
G 2 PEX_VDD_EN#
21,51 1.35VS_DGPU_PG +5VALW 22,52 PEX_VDD_EN
RV164 CV259 1 2 4 11 DVT 02/07 Q2515A S S Q2515B
2 VGA@ 1 100K_0402_5% VGA@ 1U_0402_6.3V6K VBIAS GND PJT138KA 2N SOT363-6 PJT138KA 2N SOT363-6
1
4
3 3_1.8VSDGPU_MAIN_EN 5 10 1 2 680P_0402_50V7K N17S@ N17S@ 3
21,22 3_1.8VSDGPU_MAIN_EN ON2 CT2
CV235 1 2 CV239 VGA@
@ .1U_0402_16V7K 6 9 Q2515 N16X@
+3VS_1.8VALW_VIN VIN2 VOUT2 +3VS_1.8VSDGPU_MAIN
7 8 1 2 2N7002KDW_SOT363-6
VIN2 VOUT2 SB00000EO00
CV262 1 2 15 CV237 +5VS +VGA_CORE
@ 1U_0402_6.3V6K GPAD .1U_0402_16V7K
EM5209VF_DFN14_2X3 VGA@
2
VGA@
R4911 R4910
100K_0402_5% 47_0603_5%
@ @
1
VGA_CORE_EN# +VGA_CORE_R +5VS +1.35VSDGPU
2
2
@
R1007 R571
100K_0402_5% 47_0603_5%
6
3
@
3_1.8VSDGPU_MAIN_EN 5 G
D D
G 2 VGA_CORE_EN#
1
1
Q2516A S S Q2516B
PJT138KA 2N SOT363-6 PJT138KA 2N SOT363-6 1.35VSDGPU_PWR_EN# +1.35VSDGPU_R
1
4
@
@
6
D D
1.35VSDGPU_PWR_EN 5 2 1.35VSDGPU_PWR_EN#
21,51 1.35VSDGPU_PWR_EN G G
S S
1
Q2513B Q2513A
2N7002KDW_SOT363-6 2N7002KDW_SOT363-6
4 @ @ 4
+3VS to +3VSDGPU_AON for GPU
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC Interface
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 40 of 57
A B C D E
A B C D E
www.qdzbwx.com
1 1
1 2
+19V_ADPIN HCB2012KF-121T50_0805
EMI@ PL101 +19V_VIN
1 2
@ PJP101
ACES_50305-00441-001_4P
1
1
1
EMI@ EMI@ PC104
2 EMI@ PC105 PC102 1000P_0603_50V7K
2
3 1000P_0603_50V7K 100P_0603_50V8
2
4
GND
GND
2 2
@ PR101
0_0402_5%
1 2
+3VLP +CHGRTC
3 3
4 4
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR DCIN / Pre-charge
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 41 of 57
A B C D E
A B C D E
2013/07/23
change PC5 and PC6 function field from 37.1 to 47.1 www.qdzbwx.com
+3VLP
1 1
1
@ PC205
1
PR207 100_0402_1% 0.1U_0603_25V7K
MB:Battery Con Put TOP Side
2
1 2
EC_SMB_DA1 37,43
PR205 100_0402_1% @ PR215 @ PR214
1 2 10K_0402_1% 10K_0402_1%
EC_SMB_CK1 37,43 <45,47>
2
1
@ PU201
Battery Bot Side PR202 @ PR213 1 8
200K_0402_1% 100K_0402_1% VCC TMSNS1
1 2 2 7 2 1
PIN1 GND @ PJP201 +3VLP GND RHYST1
2
PIN2 GND 1 2
1
37,39,44 MAINPWON
MAINPWON 3
OT1 TMSNS2
6 @ PR216
1
1 2 47K_0402_1%
PIN3 SMD 2 3
3 4
EC_SMB_DA1-1
EC_SMB_CK1-1
BATT_TEMP 37 4
OT2 RHYST2
5
PR203 1K_0402_1% @ PH202
PIN4 SMC 4 5 BATT_TS G718TM1U_SOT23-8 100K_0402_1%_NCP15WF104F03RC
5 6
PIN5 TEMP BATT_B/I
2
6 7
PIN6 BI 7 8
8 9 +RTCVCC
PIN7 Batt+ GND 10
PIN8 Batt+ GND
CVILU_CI9908M2HR0-NH
2016/11/16 update
1
PR212
100K_0402_5%
PQ201 Change to SB00000QO00, For KB9022
sense 20mΩ Active Recovery
SB501380010(BSS138LT1G Del)
2
2 2
1
D
39 BI_GATE 2 PQ201
G LBSS139LT1G 1N SOT-23-3 45W PR206 58.5W,0.61V Active=recovery
+17.4V_BATT+ S
10K ohm
3
EMI@ PL201 BI_S 39
2
HCB2012KF-121T50_0805
1 2 @ PR217
change PL201, PL202 +17.4V_BATT 65W PR206
SM01000C000 to comm
0_0402_1% 84.5W,0.61V
EMI@ PL202
HCB2012KF-121T50_0805
19.1K ohm Active=recovery
part SM01000P200
1
1 2
ADP_I 37,43
+19VB_5V
VAL50/ZAL20 Battery is 3-cell NVDC design.
1
B+=9V PR204
Change PR12=50k if Battery is 2-cell NVDC design 16.9K_0402_1%
90W@ PR206
B+=6V
1
30.1K_0402_1%
2
PR209
VCIN0_PH 37
750K_0402_1% 65W@
PR206
@ PR210 19.1K_0402_1%
2
0_0402_5%
1
1
1 2
VCIN1_BATT_DROP 37 PC203 must close to EC pin
2
PH201
VCIN1_ADP_PROCHOT 37
@ PC203
100K_0402_1%_NCP15WF104F03RC 0.1U_0402_25V6
1
1
1
2
2
2
T201@
ECAGND 37
4 4
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-BATTERY CONN/OTP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 42 of 57
A B C D E
A B C D
1
PQ301 D
2
Vds = 60V +19VB
G Id = 250mA
S 2N7002KW _SOT323-3
3
PR302
PR301
1 2 1 2
1M_0402_5% 3M_0402_5%
1 1
2200P_0402_25V7K
10U_0805_25V6K
10U_0805_25V6K
2 3
2200P_0402_50V7K
0.1U_0402_25V6
0.1U_0402_25V6
4
EMI@ PC306
1
1
PC303
PC304
EMI@ PC305
0_0402_5%
0.01U_0402_50V7K
PC301
@ PR304
4
1
1
+19V_VIN
PC302
PC307
2
2
2
VF = 0.5V
2
2
3
2
PD301
BQ24725A_ACDRV_1
BAS40CW _SOT323-3
0.1U_0402_25V6
BQ24725A_BATDRV 1 2BQ24725A_BATDRV_1
0.1U_0402_25V6
Rds(on) = 30mohm max
1
1
PC308
PR305
PC310
Vgs = 20V
1 1
1 2
10_1206_1%
PC311 4.12K_0603_1%
0.047U_0402_25V7K Vds = 30V
PR306
2
PC309 1 2 ID = 7A (Ta=70C)
0.1U_0402_25V6 VF = 0.37V PQ305
1
1
5
AON7506_DFN33-8-5
2.2_0603_5%
PR307
PD302
BQ24725A_VCC2
RB751V-40_SOD323-2 Support max charge 3.5A
@ PR308 5*5*3
BQ24725A_ACP
0_0603_5%
Power loss: 0.245W
BQ24725A_REGN
2
BQ24725A_BST2
DH_CHG 1 2 4 CSR rating: 1W
BQ24725A_LX
VSRP-VSRN spec < 81.28mV
4.12K_0603_1%
4.12K_0603_1%
2 2
1
PR310
DH_CHG
1 2 4.7UH_5.5A_20%_7X7X3_M
1 2 PR311
3
2
1
1U_0603_25V6K 0.01_1206_1%
BQ24725A_ACN
PC313 BQ24725A_LX 1 2 CHG1 4
2
1U_0603_25V6K
5
2 3
20
19
18
17
16
PQ306
PU301
AON7506_DFN33-8-5
CSON1
1
CSOP1
4.7_1206_5%
VCC
PHASE
HIDRV
BTST
REGN
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
@EMI@
PR312
21
PAD
0.1U_0402_25V6
0.1U_0402_25V6
PC324
PC314
PC315
1
1
1
1 15 DL_CHG 4
ACN LODRV
PC316
PC317
2
2
2
2
2 14
680P_0402_50V7K
ACP GND PR313
3
2
1
2
1
@EMI@
BQ24735RGRR_QFN20_3P5X3P5 10_0603_1%
PC318
BQ24725A_CMSRC 3 13 SRP1 2 CSOP1
CMSRC SRP
1
PR314
2
6.8_0603_1%
BQ24725A_ACDRV 4 12 SRN1 2 CSON1
2
ACDRV SRN PC319
0.1U_0603_16V7K
1 2 5 11 BQ24725A_BATDRV
+3VLP ACOK BATDRV
PR315 100K_0402_1%
ACDET
IOUT
SDA
SCL
ILIM
+3VLP
37 AC_IN
6
10
3 3
BQ24725A_ACDET
BQ24725A_ILIM 1 2
PR324
100K_0402_1%
BQ24725A_ACDET PR318 316K_0402_1%
0.01U_0402_25V7K
1
422K_0402_1%
PC320
PR317
1
1 2
+19V_VIN
1
2
PR321
2
2M_0402_1%
2
1
2200P_0402_50V7K
66.5K_0402_1%
PR322 @
EC_SMB_CK1 37,42
0_0402_5%
100P_0402_50V8J
1
1
PC321
1
PC322
PR319
1 2
EC_SMB_DA1 37,42
2
PQ307 PR320
2
PC323
2.2U_0402_6.3V6M
3
2
1
PQ308 D
4
2 Close EC chip 4
+3VLP
PC401
1U_0603_10V6K
1 2
PR403 PR404
20K_0402_1% 20K_0402_1% +19VB_5V
1 2 1 2 +19VB @ PJ401
JUMP_43X79
1 2
1 2
PR405 PR406
71.5K_0402_1% 105K_0402_1%
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
2 2
0.1U_0402_25V6
@ PJ402 1 2 1 2
+19VB JUMP_43X79
1
+19VB_3V
EMI@ PC404
PC406
EMI@ PC405
PC422
1 2
1 2
CS2_3V
CS1_5V
+3VLP
FB_3V
FB_5V
POK need pull high, it
2
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
transfer circuit
EMI@ PC407
EMI@ PC408
PC409
PC421
PU401
21
5
1
PR407 RT6575DGQW(2)_WQFN20_3X3
2
20K_0402_1%
CS2
FB2
LDO3
FB1
CS1
GND
1
PQ402 6 20 5V_EN PQ401
37 3V_EN EN2 EN1
AON7934_DFN3X3A8-10 AON7934_DFN3X3A8-10
7 19
37,47 SPOK_3V_5V PGOOD VCLK
4
4
PL402 LX_3V 8 18 LX_5V
D1
D1
D1
G1
G1
D1
D1
D1
3.3UH_6.3A_20%_7X7X3_M PR408 PHASE2 PHASE1 PR409 PL401
PC411
2.2_0603_5% 2.2_0603_5% 3.3UH_PCMB103T-3R3MS_9A_20%
2 1 LX_3V 10 9 1 2 BST_3V_R 1 2 BST_3V 9 17 BST_5V 1 2 BST_5V_R 1 2 9 10 LX_5V 2 1
+3VALWP D1 D2/S1 BOOT2 BOOT1 D2/S1 D1 +5VALWP
PC410
0.1U_0603_25V7K
0.1U_0603_25V7K
1
UG_3V UG_5V
680P_0603_50V8J 4.7_1206_5%
4.7_1206_5%
10 16
G2
G2
S2
S2
S2
S2
S2
S2
UGATE2 UGATE1
@EMI@ PR411
@EMI@ PR410
LGATE2
LGATE1
220U_6.3V_ESR18M_6.3X4.5
5
5
220U_6.3V_ESR18M_6.3X4.5
LDO5
BYP1
VIN
1 1
2
2
PC413
PC414
+ +
11
VIN_3/5V 12
13
14
15
680P_0603_50V8J
3 3
1
1
2 LG_3V LG_5V 2
@EMI@ PC416
@EMI@ PC417
PR412
2.2_1206_1% +5VALWP
2
2
+19VB 1 2
+5VLP
1U_0603_10V6K
1U_0603_25V6K
1
1
PC419
@ PC418
2
2
PR413 @ PJ403
2.2K_0402_5% +3VALWP 1 2 +3VALW
1 2 1 2
37 EC_ON
@ PR414 JUMP_43X118
0_0402_5%
1 2 5V-OCP=13.5A
37,39,42 MAINPWON
3V-OCP=8.9A
@ PJ404
4 5V_EN 1 2 4
+5VALWP 1 2 +5VALW
1M_0402_1%
4.7U_0402_6.3V6M
JUMP_43X118
1
1
PR415
PC420
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-3.3VALWP/5VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 44 of 57
A B C D E
A B C D E
www.qdzbwx.com
Pin19 need pull separate from +1.35VP.
+19VB_1.2VP If you have +1.35V and +0.675V sequence question, 0.6Volt +/- 5%
@ PJ503 you can change from +1.35VP to +1.35VS. TDC 0.7A
1 JUMP_43X79 1
1 2 +19VB_1.2VP PR502 Peak Current 1A
+19VB 1 2 2.2_0603_5%
BST_1.2VP_R 1 2 BST_1.2VP
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
+1.2VP
1
PC504
EMI@ PC502
EMI@ PC503
PC505
UG_1.2VP +0.6VSP
2
PQ503
AON7408L_DFN8-5
LX_1.2VP
10U_0603_6.3V6M
10U_0603_6.3V6M
5
1
PC506
1
PC507
PC508
0.1U_0603_25V7K
16
17
18
19
20
2
2
VLDOIN
PHASE
UGATE
BOOT
VTT
4 21
PAD
LG_1.2VP 15 1
LGATE VTTGND
PL502
1
2
3
14 2
1UH_11A_20%_7X7X3_M PR503 PGND VTTSNS
16K_0402_1% PU501
1 2LX_1.2VP 1 2 CS_1.2VP 13 3
+1.2VP PC509 CS RT8207PGQW _W QFN20_3X3 GND
5
1U_0402_10V6K
1 2 12 4 VTTREF_1.2VP
@EMI@ PR504 PR505 VDDP VTTREF
2 4.7_1206_5% 5.1_0603_5% 2
1 2 VDD_1.2VP 11 5
1 2
+5VALW VDD VDDQ
+1.2VP
1
PGOOD
4 PC516
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
1
TON
1
1
@EMI@ PC518 PC517 0.033U_0402_16V7K
PC511
PC513
PC515
PC510
PC512
PC514
FB
S5
S3
2
680P_0402_50V7K PQ502
2
2
2
1
2
3
10
6
2.2_0402_1%
FB_1.2VP
TON_1.2VP
EN_1.2VP
PR506
EN_0.6VSP
6.19K_0402_1%
+5VALW PR507 1 2 +1.2VP
470K_0402_1%
+19VB_1.2VP 1 2
1
@ PR501
0_0402_5%
Vout=0.75V* (1+Rup/Rdown)
14,37,40 SYSON
SYSON 1 2 PR508 =0.75*(1+(6.19/10))
10K_0402_1%
=1.21V
2
1
@ PC501
+5VALW 0.1U_0402_10V7K
2
+3VALW @ PR509
0_0402_5%
1 2
14,37,40,43,47 SUSP#
@ PJ505
3 JUMP_43X39 @ PR510 @ PJ501 3
1
1
1
@ PC519 @ PJ502
PC521 JUMP_43X39
4.7U_0402_6.3V6M 0.1U_0402_10V7K 1 2
+0.6VSP +0.6VS_VTT
2
2
PU502 1 2
G9661MF11U_SO8
@ PR515 4 5
0_0402_5% 3 VPP NC 6
EN_2.5V VIN VO +2.5VP MOSFET: 3x3 DFN
SYSON 1 2 2 7
GND
1 VEN ADJ 8
H/S Rds(on): 27mohm(Typ), 32mohm(Max)
22U_0603_6.3V6M
0.01U_0402_25V7K
POK GND
1
1
1
PR517
PC522
9
1
1
PR516
PC523
PC520
21.5K_0402_1%
Rup L/S Rds(on): 13mohm(Typ), 15.8mohm(Max)
Vout=0.8V* (1+(21.5/10)) = 2.52V 0.8%Idsm: 12A@Ta=25C, 10.5A@Ta=70C
2
1M_0402_5%
2
2
2
@ FB_2.5V
Choke: 7x7x3
Rdc=14mohm(Typ), 15mohm(Max)
1
4
OVP: 110%~120% 4
@ PJ504 VFB=0.75V, Vout=1.365V
JUMP_43X39 Note: S3 - sleep ; S5 - power off
1 2 MOSFET footprint: SIS412DN
+2.5VP 1 2 +2.5V
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RT8207P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 45 of 57
A B C D E
A B C D E
www.qdzbwx.com
EN pin don't floating
If have pull down resistor at HW side, pls delete PR702
10U_0805_25V6K
0.1U_0402_25V6
3 1 BST_1VALW 1 2 BST_1VALW_R1 2 PL602
2200P_0402_50V7K
IN BS
1
1UH_6.6A_20%_5X5X3_M
EMI@ PC605
PC606
EMI@ PC604
LDO_3V LX_1VALW
4
IN LX
6
0.1U_0603_25V7K
1 2
+1.0VALWP
220U_B2_4VM_R35M
2
2
5 19 1
13.7K_0402_1%
330P_0402_50V7K
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
IN LX
PR608
1
@ PR607 7 20 +
PC608
PC609
PC612
PC616
PC610
PC611
PC615
GND LX
0_0402_5% 8 14 FB_1VALW Rup
2
GND FB 2 @
2
2
ILMT_1VALW 18 17 LDO_3V
GND VCC
1
1
EN_1VALW 11 10
@ PR609 EN NC PC613 FB = 0.6V
1
ILMT_1VALW 13 12 2.2U_0402_6.3V6M
2
ILMT NC PR610
0_0402_5%
15 16
+3VALW Rdown
2
BYP NC 20K_0402_1%
21
Ipeak=9.5A
2
PAD Imax=6.65A
SY8288RAC_QFN20_3X3 Pin 7 BYP is for CS.
1
The current limit is set to 6A, 8A or 12A when this pin Common NB can delete +3VALW and PC15
PC614
is pull low, floating or pull high 1U_0402_6.3V6K
2
Vout=0.6V* (1+Rup/Rdown)
+3VALW =0.6*(1+(14/20))
Vout=1.02V
2 2
2
@ PR603
10K_0402_1%
1
@ PR602
0_0402_5%
EN_1VALW 1 2
+1.8VALW_PG 47
1
@ PC601
PR601
0.22U_0402_10V6K
2
1M_0402_1%
2
3 3
4 4
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VCCP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 46 of 57
A B C D E
A B C D E
1
2 1 @N17S_VGA@
+3VALW @N17S_VGA@ PC703
PR703 0.1U_0402_16V7K @ PJ702
2
1M_0402_5% JUMP_43X39
1 2
+1.8VALWP +1.8VALW_PRIM
2
1 2
46 +1.8VALW_PG
@N17S_VGA@
PU701
1 1
9
1 PGND 8
FB SGND (Common Part) SH00000YG00
+3VALW VIN_1.8V 2 7 4*4*2
PG EN
3 6 LX_1.8V 1 2
@ PJ701 IN LX +1.8VALWP
@N17S_VGA_EMI@
1 2 4 5 @N17S_VGA@
20.5K_0402_1%
68P_0402_50V8J
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
1 2 PGND NC PL703
4.7_0603_5%
@N17S_VGA@
@N17S_VGA@
@N17S_VGA@
@N17S_VGA@
1
1UH_2.8A_30%_4X4X2_F
PR717
PR702
PC704
1
JUMP_43X79 SY8003ADFC_DFN8_2X2
PC705
PC727
Rup
1
@N17S_VGA@
2
PC702
2
22U_0603_6.3V6M
2
FB_1.8V
680P_0402_50V7K
@N17S_VGA_EMI@
1
@N17S_VGA@
1
FB=0.6V PR704
PC726
Note:Iload(max)=3A 10K_0402_1%
Rdown
2
Function Field :
PWR.Plane.Regulator_1.8V - 35.15
Rest of support elements - 35.16
+3VALW
2
+5VALW
@ PJ704
2
JUMP_43X39
2 @ PJ705 2
1
JUMP_43X39
VIN_1.8VALW +1.8VALWP
1 2
+1.8VALW_PRIM
1
1
1 2
VIN_1.8VALW PC701
1U_0402_6.3V6K
2
1
PC730
4.7U_0402_6.3V6M
2
PU702
G9661MF11U_SO8
@ 4 5
PR718 VPP NC
3 6
SPOK_3V_5V 1 2 EN_1.8VALW 2 VIN VO 7 +1.8VALWP
GND
1 VEN ADJ 8
0.01U_0402_25V7K
POK GND
PC729
1
1
0_0402_5% PR721
9
@ 12.7K_0402_1%
PC728
Rup
2
2
PR719 0.1U_0402_16V7K
1
1M_0402_1% FB_1.8VS
2
+3VALW PC731
22U_0603_6.3V6M
2
1
2
PR720
PR722 10K_0402_1%
10K_0402_1%
Rdown
2
1
+1.8VALW_PG
Vout=0.8V* (1+Rup/Rdown)
Vout=0.8V* (1+(12.7/10)) = 1.816V
3 3
5*5*H1.5
@ PJ703
Idc: 3A
JUMP_43X79 Isat: 4A
1 2
+5VS 1 2 @2s_battery_EMI@ @2s_battery_EMI@
PC711 PR710
680P_0603_50V7K 4.7_1206_5%
P-MOS 2 1 2 1
2s_battery@
PQ701 2s_battery@ PD701
AON7403L_DFN8-5 SS1P4-M3-84A_DO-220AA2
1 2s_battery@ PL702
2 5 4.7UH_PCME051E-4R7MS_3A_20%
3 1 2 2 1 +12VSP 1 2
+5VALW +INVPWR_B+
SH00000OG00
10U_0805_25V6K
2s_battery@ PC714
1
1
PL701
2s_battery@ PC713
PC716
1
PC719
PC718
PC720
PC721
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2200P_0402_50V7K
2
0.022U_0402_25V7K
2
2
2
1
2 1
@2s_battery@
2
LX
LX
1
2s_battery@
2s_battery@
2s_battery@
2
2s_battery_EMI@
@2s_battery_EMI@
8 2FB_12VSP
2s_battery@ PR713 Vin FB
10K_0402_1%
9 10 SS_12VSP 1 2
2
FREQ SS
2s_battery@ PC722
1
1COMP_12VSP 0.01U_0402_16V7K
COMP
1
G 2N7002KW_SOT323-3 PR715
Vout=1.24*(1+88.7/10)=12.2V
GND
GND
PAD
PC723 SA00004JV00
2
0.1U_0402_10V7K
1
2s_battery@
PC724
4700P_0402_25V7K
Security Classification Compal Secret Data Compal Electronics, Inc.
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SY8032
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 47 of 57
A B C D E
A B C D E
PC802
8200P_0402_25V7K
COMP_1b 1 2 1
www.qdzbwx.com
PR802
1.5K_0402_1%
2
1 2
PC804
15P_0402_50V8J
PC836
1
2200P_0402_50V7K
2
1 1
PC803 PR875
1000P_0402_50V7K 10_0402_1%
RDRPSP 1 2
1000P_0402_50V7K
PR803 100_0402_1% 1 2
24K_0402_1%
CSN_1b 49
2
1 2 @ PR804 PR805
+VCC_SA
1
0_0402_5% 1.69K_0402_1%
PC806
PR808
1 2 VSPP_1b 1 2 VSP_1b PH802
14 VCCSA_SENSE
0.01U_0402_25V7K
1
100K_0402_1%_NCP15WF104F03RC
1200P_0402_50V7K
1
PC805 PR807
2
1000P_0402_50V7K 1K_0402_1% place close to SA chock
1 2
2
1
1 2 VSNN_1b 1 2VSN_1b ILIM_1b
PC809
PC833
14 VSSSA_SENSE
2
1 2 @ PR806 1 2 PR816
2
PR809 100_0402_1% 0_0402_5% PR811 PC807 12K_0402_1%
20K_0402_1% 2200P_0402_50V7K
1 2 @ PR812 1 2 PSYS PR819
+VCC_CORE
2
PR810 100_0402_1% 0_0402_5% 66.5K_0402_1% 2 1
VSP_2ph SW_1b 49 +3VS
Iout_1b
16 VCCSENSE 1 2 2 1 PR818
1
PC811 7.5K_0603_1% PR821
@ PR813 PC808 PR814 470P_0402_50V7K 10K_0402_1%
0_0402_5% 1000P_0402_50V7K 806_0402_1% 1 2
2
1 2 VSNN_2ph 1 2 VSN_2ph
16 VSSSENSE VR_PWRGD 37
1
1 2 KB_U42@ 1 2 1 2
PR815 PR817 PR822 PC810
VR_ON 37,40 +1.0V_VCCST
604_0402_1%
1
100_0402_1% 49.9_0402_1% 23.2K_0402_1% 3300P_0402_50V7-K @ PR863 close to the longer distance phase(81208 or 81210)
SK_U22@ 0_0402_5% PWM_1b_SA 49
PR820
Alert,Data,Clk.
PH803place close to IA chock PR822
12
THERM_ 220K 5% 0402 PC812 28.7K_0402_1%
100_0402_1%
110_0402_1%
45.3_0402_1%
470P_0402_50V7K
0.1U_0402_16V7K
1 2 470P_0402_50V7K DRVON 49
1
1
1
KB_U22@ PR822
110_0402_1%
2
1
PU801
PC813
PC815
PR828
4.75K_0402_1%
26.1K_0402_1%
2
PR829
2
2
PR874 PR830 NCP81218MNTXG_QFN48_6X6 7.5K_0603_1%
PR823
49
48
47
46
45
44
43
42
41
40
39
38
37
2
97.6K_0603_1% 165K_0402_1% PC814 PR834 @ 1 2 SWN_GT1 49
2
2
2
2
SW_1a 1 2 1 2 1 2 15P_0402_50V8J 49.9_0402_1% PR835
PR866
PR824
PR826
VSN_2ph
VSP_2ph
VSP_1b
VSN_1b
COMP_1b
ILIM_1b
CSN_1b
CSP_1b
IOUT_1b
EN
TAB
PSYS
VR_RDY
VR_HOT# 37
1
1 2 12K_0402_1%
1
1 1
2 PR831 1 2 2
1000P_0402_50V7K
U42@ PR825 75K_0402_1% U42@ PR833 IOUT_2ph 1 36 @ PR860 @ PC819
SOC_SVID_CLK 16
8200P_0402_25V7K
2
0.022U_0402_25V7K
IOUT_2ph PWM_1b
1
1
97.6K_0603_1% 16.9K_0402_1% PC816 2 35 10_0402_5% 2 470P_0402_50V7K
PC818
2
SW_2a 1 2 2200P_0402_50V7K 3 DIFFOUT_2ph DRVON 34 SCLK 1 2 U42@ PR836
PC834
SOC_SVID_ALERT#_R 16
1
PC817 U22@ PR833 4 FB_2ph SCLK 33 ALERT# PR862 78.7K_0402_1%
2
2 COMP_2ph ALERT#
1
1000P_0402_50V7K @ 9.76K_0402_1%1 2 5 32 SDIO 110_0402_1%2 U22@ PR836 PH804
PC820
ILIM_2ph SDIO SOC_SVID_DAT 16
PR873 6 31 1 2 63.4K_0402_1% 100K_0402_1%_NCP15WF104F03RC
10_0402_1% 7 CSCOMP_2ph VR_HOT# 30 IOUT_1a PR869 100_0402_1% 2 1
2
1 2 8 CSSUM_2ph IOUT_1a 29 CSP_1a
49 CSN_1a
2
9 CSREF_2ph CSP_1a 28 1 2
CSP2_2ph CSN_1a ILIM_1a CSN_GT1 49
10 27 PR876
PC835
ROSC_COREGT
0.1U_0402_16V7K
0.22U_0402_16V7K
ADDR_VBOOT
0.1U_0402_16V7K
1500P_0402_50V7K
TSENSE_2ph COMP_1a
1
TSENSE_1ph
RSOC_SAUS
ICCMAX_2ph
1 2 1 2 12 25
PC821
PC825
+19VB
100K_0402_1%_NCP15WF104F03RC
ICCMAX_1a
ICCMAX_1b
49 CSN_2a
PWM1_2ph
PWM2_2ph
1
1
@ PR864 PR801 VRMP VSN_1a PC837
PC822
36.5K_0402_1%
1
PWM_1a
1
1
1
0_0402_5%
VSP_1a
U42@ PR872 1K_0402_1% PC824 2200P_0402_50V7K
U42@
2
1
10_0402_1% PC827 3300P_0402_50V7-K
PH801
PR842
61.9K_0402_1%
VCC
2
1 2
1000P_0402_50V7K 1 2 @ PR865 PR840 PC829
2
2
2
PC801 0_0402_5% 100_0402_1% 15P_0402_50V8J PC826
2
1 2 0.01U_0402_50V7K VSN_1a 1 2 1 2 2 1 1000P_0402_50V7K
49 SW_1a
2
13
14
15
16
17
18
19
20
21
22
23
24
2
1
@ PR850 place close to GTchock
PR844
1
PR845 1 2 PR843 PR848
2.15K_0402_1% +5VS 2_0402_1% 499_0402_1% PC828 1000P_0402_50V7K
VSSGT_SENSE 16
2.49K_0402_1%
2
24K_0402_1%
33.2K_0402_1%
2
1
1
100度place close to GT high side
PR853
PR854
U42@ PR871 +5VALW 2_0402_1%
VCCGT_SENSE 16
2.15K_0402_1% VSP_1a 1 2 1 2 @ PR847 2 1
PC830 PR867 0_0402_5% PR851 +VCC_GT
2
1
1000P_0402_50V7K 3.09K_0402_1% 100_0402_1%
PC831
1 2 1U_0603_10V6K
+5VS
2
1 2
FSW FOR SA
FSW FOR GT AND IA
U22@ PR868
1
0_0402_5% @ PR852
1000P_0402_50V7K
0_0402_5%
PC832
61.9K_0402_1%
1
1
PWM_1a_GT 49
2
PH805
100K_0402_1%_NCP15WF104F03RC
3 3
PR855
place
2
close
to GT high side
51.1K_0402_1%
97.6K_0402_1%
35.7K_0402_1%
15.8K_0402_1%
1
1
1
KB_U22@ PR856
U22@ PR857
PR859
PR858
2
2
2
SK_U22@ PR856 VBOOT
45.3K_0402_1% KB_U42@ PR856 U42@ PR857
100K_0402_1% 88.7K_0402_1%
PWM2_2ph_IA 49
PWM1_2ph_IA 49
4 4
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
IMVP8, NCP81206
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 48 of 57
A B C D E
A B C D E
www.qdzbwx.com
change PL9002, PL9003
SM01000C000 to comm
part SM01000P200
@ PJ901 +19VB
JUMP_43X79
1 2
1 2
1 1
+19VB_CPU
+19VB_CPU InputCapacitor:
10uF_0805_X5R_25V
InputCapacitor:
10uF_0805_X5R_25V
PC904
2200P_0402_50V7K
PC911
PC909
PC907
PC917
PC902
0.1U_0402_25V6
5
U42@ PR902 U42@ PC906
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
1
2.2_0603_5% 0.22U_0603_16V7K
PQ902
EMI@ PC913
EMI@ PC914
1
0.1U_0402_25V6
AON6428L_DFN8-5
5
1 2 1 2 @U42@
PC912
PC910
PC908
PC915
U42_EMI@
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
1
1
PR903 PC905 + PC901 PR904
U42@
U42@
U42@
U42@
PQ901
U42_EMI@
2
2
AON6380_DFN5X6-8-5
2.2_0603_5% 0.22U_0603_16V7K 33U_25V_NC_6.3X4.5 0_0603_5%
1 2 1 2 @ PR901 1 2 4
U42@
2
2
0_0603_5% 2
1 2 4 U42@ PU902
3
2
1
NCP81151MNTBG_DFN8_2X2 BST FLAG
2 8 HG_VCORE_IA SH000011H00 7*7*4
48 PWM2_2ph_IA
3
2
1
1 9 PWM DRVH PL903 0.22UH 20% FDUE0640J -H 25A
BST FLAG (Common Part) +VCC_CORE 3 7 SW_VCORE_IA
DRVON U42@ 1 4
2 8 HG_VCORE SH000011H00 7*7*4 EN SW
48 PWM1_2ph_IA PWM DRVH PL904 0.22UH 20% FDUE0640J -H 25A 4 6 2 3
+5VS VCC GND
5
3 7 SW_VCORE 1 4
PR906
48 DRVON EN SW 5
1
DRVL
AON6314_N_DFN56-8-5
4 6 2 3
PQ905
+5VS
4.7_1206_5%
VCC GND
1
U42@ PC919
4.7U_0402_6.3V6M
5 NCP81151MNTBG_DFN8_2X2 CSN_2a 48
PR905
PC921 @U42_EMI@
2
DRVL
5
1
LG_VCORE_IA 4
DCR=0.98m ohm +-5%
4.7_1206_5%
1
U42@
PC918
AON6314_N_DFN56-8-5
CSN_1a 48
PQ903
2
2
@EMI@
DCR=0.98m ohm +-5%
Common part SH000011H00
3
2
1
LG_VCORE 4
680P_0603_50V7K
2
1
1 2
PC920
2 2
680P_0603_50V7K
2
1
SW_2a 48
@U42_EMI@
3
2
1
@ PR913
1 2 0_0603_5%
2 SW_1a 48
@ PR912
@EMI@
0_0603_5%
PC923
EMI@ PC924
EMI@ PC925
1
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25VAK
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
33U_25V_NC_6.3X4.5
U22
PC926
PC927
PC928
PC929
1
1
1
+
VCC:
Imax=21A Ipeak=32A Iocp=40A @
2
2
2
2
U42
VCC: PQ906
Imax=42A Ipeak=64A Iocp=70A AON6992_DFN5X6D-8-7
PU903 +VCC_GT InputCapacitor:
1
NCP81253MNTBG_DFN8_2X2
10uF_0805_X5R_25V
VCCGT:
D1
G1
1 8 HG1_GT
Imax=18A Ipeak=31A Iocp=39A BST DRVH PL906 0.22UH 20% FDUE0640J -H 25A
2 7 SW1_GT 7 1 4 +VCC_GT
VCCSA: 48 PWM_1a_GT PWM SW D2/S1
Imax=4A Ipeak=5A Iocp=9.5A DRVON 3 6 2 3 DCR=0.98m ohm +-5%
1
3 EN GND PR908
3
G2
S2
S2
S2
@ PC930 4 5 0_0402_5%
Common part SH000011H00
PR909
+5VS
PAD
VCC DRVL
1
100P_0402_25V8K @ 1 2
4.7_1206_5%
2
1
PC931 CSN_GT1 48
1
100P_0402_25V8K
2
@EMI@
PC932
4.7U_0402_6.3V6M
1 2
2
SWN_GT1 48
2
@ PR914
LG1_GT 0_0603_5%
PC933
680P_0603_50V7K
1
InputCapacitor:
10uF_0805_X5R_25V
2
+19VB_CPU
@EMI@
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
EMI@ PC937
EMI@ PC936
0.1U_0402_25V6
1
1
PC934
PC935
PR910 PC938
2
2.2_0603_5% 0.22U_0603_16V7K
1 2 1 2
HG_SA
AON7934
Rds(on)=12.4~15.8m ohm
PU904 PQ907 DCR=6.2m ohm +-5%
4
NCP81253MNTBG_DFN8_2X2 AON7934_DFN3X3A8-10
Common part SH000015M00 +VCC_SA
D1
D1
D1
G1
1 8
BST DRVH PL907
2 7 10 9 SW_SA 1 4
48 PWM_1b_SA PWM SW D1 D2/S1
DRVON 3 6 2 3
PR911
EN GND
G2
4
S2
S2
S2
4
4.7_1206_5%
1
4 5
+5VS
PAD
@EMI@
1
9
PC939
4.7U_0402_6.3V6M
CSN_1b 48
2
PC940
680P_0603_50V7K
1
SW_SA SW_1b 48
Security Classification Compal Secret Data Compal Electronics, Inc.
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Train
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 49 of 57
A B C D E
1
0.1
Rev
57
of
50
Compal Electronics, Inc.
Sheet
C5V01 M/B LA-E892P
E
E
Thursday, April 06, 2017
Power Train
Document Number
+VCC_SA
PC9079
1U_0201_4V6M
+VCC_SA
1 2
PC9078
Date:
Title
Size
PC9052 1U_0201_4V6M
22U_0603_6.3V6M
C
1 2
1 2 PC9077
PC9051 1U_0201_4V6M
22U_0603_6.3V6M
22uF_0603*3
22uF_0603*9
1 2
PC9076
1uF_0201*7
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PC9050 1U_0201_4V6M
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
22U_0603_6.3V6M
1 2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1 2 PC9075
2018/11/04
PC9049 1U_0201_4V6M
unpop:
22U_0603_6.3V6M
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
1 2 PC9074
pop:
22U_0603_6.3V6M 22U_0603_6.3V6M
1 2
SA
PC9073
1 2 1 2
@
D
0.47uF*4
22uF*36
22uF *8
220uF*1
unpop:
1uF*9
1uF*1
2016/11/04
+VCC_GT
+VCC_GT
Security Classification
1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9019 PC9045 PC9071 PC9094 @ PC9108 PC9128 PC9152
Issued Date
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M
1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9018 PC9044 PC9070 PC9093 @ PC9107 PC9127 PC9151
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 0.47U_0201_4V6M 1U_0201_4V6M
1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9017 PC9043 PC9069 PC9092 @ PC9106 PC9126 PC9150
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 0.47U_0201_4V6M 1U_0201_4V6M
1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9016 PC9042 PC9063 PC9091 PC9125
@
C
C
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M
+VCC_GTX_VCORE
1 2 1 2 1 2 1 2 1 2
+VCC_GT_VCORE
PC9015 PC9041 PC9062 PC9090 PC9124
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M
1 2 1 2 1 2 1 2 1 2
PC9014 PC9040 PC9061 @ PC9089 PC9123
@
0.0002_0805_5%
0.0002_0805_5%
U22@ PR9003
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 0.47U_0201_4V6M
0.0002_0805_5%
2
U42@ PR9002
+
1
U42@ PR9001
1 2 1 2 1 2 1 2 1 2
220U_D2 SX_2VY_R9M
PC9105
SGA20221D40
+VCC_GT
+VCC_CORE
B
B
22uF_0603*33
@
1uF_0201*35
PC9001 PC9036 PC9068 PC9099 PC9104 PC9119 PC9139 PC9149 PC9158
+VCC_CORE
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M
2016/10/26
22_0603*9
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
220uF *3
PC9010 PC9035 PC9067 PC9098 PC9103 PC9118 PC9138 PC9148 PC9157
@
@
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9009 PC9034 PC9066 PC9080 PC9117 PC9137 PC9147
UNPOP
@
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M
+
1
U22
1 2 1 2 1 2 1 2 1 2 1 2 1 2
220U_D2 SX_2VY_R9M
PC9008 PC9033 PC9065 PC9097 PC9116 PC9136 PC9146
U42@ PC9102
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M
+
1
2
1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9064
220U_D2 SX_2VY_R9M
PC9007 PC9032 PC9115 PC9135 PC9145
22U_0603_6.3V6M
U42@ PC9101
22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M
+
1
2
+VCC_GT_VCORE
1 2 1 2 1 2 1 2 1 2 1 2
+VCC_GTX_VCORE
1 2 1 2 1 2 U42@ PC9082 1 2 1 2 1 2
PC9003 PC9028 PC9054 22U_0603_6.3V6M PC9111 PC9131 PC9141
@
A
A
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M
1 2
1 2 1 2 1 2 U42@ PC9081 1 2 1 2 1 2
22uF_0603*39
@ PC9002 PC9027 PC9053 22U_0603_6.3V6M PC9110 PC9130 PC9140
1uF_0201*35
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M
2016/10/26
1 2
1 2 1 2 1 2 PC9156 1 2 1 2 1 2
22_0603*3
1U_0201_4V6M
220uF *3
U42@ PC9096
1 2 22U_0603_6.3V6M
PC9155
1U_0201_4V6M 1 2
U42@ PC9085
UNPOP
1 2 22U_0603_6.3V6M
PC9154
U42
1U_0201_4V6M 1 2
1 2
4
A B C D E
www.qdzbwx.com
1 1
21,40 1.35VS_DGPU_PG
PR1014
1 2
+3VS 10K_0402_5%
10U_0805_25V6K
3 1 BST_1.35VSDGPUP
1 2 1 2 1 2 SNB_1.35VSDGPUP 1 2
VGA_EMI@ PC1003
VGA_EMI@ PC1004
0.1U_0402_25V6
2200P_0402_50V7K
1
1
IN BS
VGA@ PC1005
4 6 TDC=4.7A
IN LX
2
Ipeak=7.2A +1.35VSDGPUP
2
5 19 VGA@ PL1002
IN LX
7 20 LX_1.35VSDGPUP 1 2
GND LX
8 14 FB_1.35VSDGPUP PCMB063T-1R0MS 12A
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
@VGA@ GND FB
1
2 18 17 LDO_3V_1.35VSDGPUP 2
PR1002 GND VCC
VGA@ PC1011
VGA@ PC1012
VGA@ PC1013
@VGA@ PC1016
VGA@ PC1017
@VGA@ PC1010
1
21,40 1.35VSDGPU_PWR_EN 1 2 11 10 VGA@
2
1
EN NC PC1014 @VGA@
ILMT_1.35VSDGPUP 13 12 2.2U_0402_6.3V6M PR1013
2
0_0402_5% ILMT NC
0_0402_5%
1
15 16
+3VALW BYP NC
1
VGA@ PC1015
1U_0402_6.3V6K
2
100K_0402_1% PC1002 21
1
0.1U_0402_16V7K PAD
GM4G need 1.35V
2
1 2
GT/GM2G need 1.5V
2
SY8286RAC_QFN20_3X3 FB_VDDQ_SENSE 24
2
LDO_3V_1.35VSDGPUP
1
@VGA@ @VGA@ PR1012 0_0402_5%
PR1015
0_0402_5%
1
1
VGA@
@ PR1005
1 2
PR1007 25.5K_0402_1%
0_0402_5% VGA@
PC1018
2
2
ILMT_1.35VSDGPUP
330P_0402_50V7K
2
1
1
@ @N17S_VGA@
PR1008 PR1010
0_0402_5% 105K_0402_1%
FB = 0.6V
2
@N17S_VGA@
(R1)
1
PR1009
0_0402_5% @N17S_VGA@ VGA@
VFB=0.6V
1
D PQ1001 PR1006
1 2 2 20K_0402_1%
Vout=0.6V* (1+R1/R2)
The current limit is set to 8A, 12A or 16A when this pin 21 VRAM_VDD_CTL G 2N7002KW_SOT323-3
Rdown=25.5K Vout=1.365V
2
1
is pull low, floating or pull high S (R2)
3
@N17S_VGA@ Rdown=97.6K Vout=1.525V
PC9159
0.1U_0402_16V7K
1
PR1011
10K_0402_1%
2
3 3
@N17S_VGA@
@
PJ1002
+1.35VSDGPUP 1 2 +1.35VSDGPU
1 2
JUMP_43X118
4 4
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Train
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 51 of 57
A B C D E
A B C D E
www.qdzbwx.com
1 1
@ PJ1101
JUMP_43X79
1 2
+1.05VSDGPUP 1 2 +1.05VS_1.0VSDGPU
VIN_1.05VS
VGA@
PC1101
22U_0603_6.3V6M (Common Part)
VGA@
2 1 2 PU1101 SH00000YG00 4*4*2 2
SY8032ABC_SOT23-6
@ PJ1102 PL1101 VGA@
JUMP_43X79 1UH_2.8A_30%_4X4X2_F
1 2 VIN_1.05VS 4 3 LX_1.05VS 1 2
+3VS 1 2 IN LX +1.05VSDGPUP Imax= 0.8A, Ipeak= 2.1A
VGA@
5 2 PR1102
PG GND
1
21 1VS_DGPU_PG 1 2
+3VS
68P_0402_50V8J
6 1 @VGA_EMI@
N16S_VGA@ PR1103
7.68K_0402_1%
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
PR1107 FB EN
PC1102
1
10K_0402_5% 4.7_0603_5%
PC1103
PC1104
2
2
@VGA@
2
PR1101
2
0_0402_5%
SNUB_1.05VS
1 2 EN_1.05VS Rup
VGA@
VGA@
22,40 PEX_VDD_EN
FB_1.05VS
1
1
1 2 1M_0402_1% PC1105 PC1106
+3VS_1.8VSDGPU_AON Function Field :
1
0.1U_0402_16V7K @VGA_EMI@ PR1106 N17S_VGA@
2
2
Note:
When design Vin=5V, please stuff snubber
to prevent Vin damage
Vout=0.6V* (1+Rup/Rdown)
=>0.6V*(1+(7.68/10)=1.061 (1.01%)
=>0.6V*(1+(7.87/10)=1.072 (2.1%)
3 3
Vout=0.6V*(1+(6.81/10)=1.0086V
4 4
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Train
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 52 of 57
A B C D E
A B C D E
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
21 DGPU_VID
20.5K_0402_1% PR1231
@EMI@ PC1220
EMI@ PC1221
VGA@ PC1222
VGA@ PC1223
VGA@ PC1224
VGA@ PC1225
1
1
0_0402_5% JUMP_43X118
2 1
R1 VGA_EN 2 1
1 R1 R2 NVVDD_EN 22 1
105
105
N17S_VGA@
0_0402_5%
10K_0402_5%
.1U_0402_16V7K
2
2
105
105
N16S_VGA@ PR1209 N16S_VGA@ PR1208 PR1209
@VGA@
@VGA@ PR1203
PR1204
R3
10K_0402_5%
2
1
20K_0402_1% 20K_0402_1% N17S_VGA@ 6.19K_0402_1%
@VGA@
@VGA@ PR1205
PC1209
2 1 2 1
PR1211
R3 R4
2
4.32K_0402_1%
2
1
N16S_VGA@ PR1211 N16S_VGA@ PR1210
1
2K_0402_1% 18K_0402_1%
N17S_VGA@
R4 PR1210 UG1_VGA VGA@
R5 C
1
16.5K_0402_1% N17S_VGA@
1 2
N16S_VGA@ PR1224 N16S_VGA@ PC1210 PC1210 PQ1201
C
1
0_0402_5% 2700P_0402_50V7K 4700P_0402_50V7K AON6992_DFN5X6D-8-7
2
N17S_VGA@ BST1_VGA 1 2 BST1_VGA_R
D1
G1
PR1224 PL1202
R5 309_0402_1% @VGA@ PR1201 0.22UH_PCME064T-R22MS0R985_28A_20% +VGA_CORE
0_0603_5% 7 LX1_VGA 2 1
2
D2/S1
1
NVVDD_GND_SENSE_R VGA@ PC1201
UGATE1
BOOT1
VID
PSI
EN
2
0.1U_0603_25V7K
G2
@VGA_EMI@
S2
S2
S2
4.7_1206_5%
2
REFADJ 6 20 LX1_VGA
PR1212
3
6
REFADJ PHASE1
1SNUB_VGA1 1
REFIN_VGA 7 19
REFIN LGATE1 @VGA@ PR1213
N16S_VGA@ LG1_VGA 0_0402_5%
1
VREF_VGA 8 PU1201 18 PVCC_VGA 1 2
VREF RT8812AGQW_WQFN20_3X3 PVCC +5VS
10.5K_0402_1%
1
VGA@ PC1214
N16S_VGA@
1
PR1225
PC1213 499K_0402_1% TON LGATE2 1U_0603_10V6K PC1215
2
1U_0402_6.3V6K +19VB_GPU_NVVDD 2 1
+19VB_GPU_NVVDD 680P_0603_50V7K
2
2
10 16 +19VB_GPU_NVVDD
RGND PHASE2
UGATE2
PGOOD
BOOT2
VSNS
N17S_VGA@
GND
PU1201
SS
2 VGA@ PR1216 RT8816AGQW_WQFN20_3X3 LX2_VGA 2
100_0402_1%
21
11
12
13
14
15
1 2
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2200P_0402_50V7K
EMI@ PC1227
PC1228
PC1229
PC1230
PC1231
@EMI@ PC1226
1
1
1
VGA@ PC1216
@VGA@ PR1218 @VGA@
0_0402_5% PR1217 0.1U_0603_25V7K
2
2
2
NVVDD_GND_SENSE_R
105
105
105
105
23 VSSSENSE_VGA 1 2 0_0603_5%
BST2_VGA 1 2 BST2_VGA_R UG2_VGA
VGA@
PC1218
@N16S_VGA@
.1U_0402_16V7K
1
1
@VGA@ PC1217
PQ1202
1
@VGA@ PR1220 1000P_0402_50V7K UG2_VGA AON6992_DFN5X6D-8-7
2
2
0_0402_5%
D1
G1
23 VCCSENSE_VGA 1 2 PL1203
NVVDD_SENSE_R
VGA_CORE_PG 22 LX2_VGA
0.22UH_PCME064T-R22MS0R985_28A_20% +VGA_CORE
7 2 1
VGA@ PR1221 D2/S1
@VGA_EMI@
4.7_1206_5%
2
100_0402_1%
1 2 VGA@ PR1232
PR1222
G2
S2
S2
S2
+VGA_CORE 1 2 10K_0402_1%
2 1 +3VS_1.8VSDGPU_AON
6
N17S_VGA@
1SNUB_VGA2 1
PR1228
0_0402_5% @VGA@ PR1223
10K_0402_1%
1 2 2 1 +3VS
N16S_VGA@
PR1226 LG2_VGA @VGA_EMI@
1
PR1230 680P_0603_50V7K
2
N17S_VGA@ 93.1K_0402_1%
PC1232
2
0.033U_0402_16V7K
2
3 3
4 4
Security Classification
2016/11/04
Compal Secret Data
2018/11/04 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Train
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 53 of 57
A B C D E
4
3
2
1
A
A
2 1 2 1
2 1
VGA@ PC1315 VGA@ PC1301
@VGA@ PC1319 1U_0402_10V7 4.7U_0402_6.3V6M
0.1U_0402_25V6 2 1 2 1
+VGA_CORE
0.1U_0402_25V6
VGA@ PC1317 VGA@ PC1332
B
B
2 1 1U_0402_10V7 4.7U_0402_6.3V6M
+VGA_CORE Under
2 1 2 1
@VGA@ PC1321
0.1U_0402_25V6 VGA@ PC1318 VGA@ PC1324
1U_0402_10V7 4.7U_0402_6.3V6M
2 1 2 1 2 1
0.1U_0402_25V6 2 1
2 1 VGA@ PC1307
4.7U_0402_6.3V6M
ESD_VGA@ PC1304 2 1
0.1U_0402_25V6
VGA@ PC1308
2 1
GB4-128 package
4.7U_0402_6.3V6M
2 1
ESD_VGA@ PC1325
0.1U_0402_25V6 VGA@ PC1309
2 1 4.7U_0402_6.3V6M
2 1
ESD_VGA@ PC1302
0.1U_0402_25V6 VGA@ PC1310
4.7U_0402_6.3V6M
2 1
N17S_VGA@ PC1330
4.7U_0402_6.3V6M
2 1
N17S_VGA@ PC1337
4.7U_0402_6.3V6M
C
C
2 1
22U_0603_6.3V6M
PC1339 N17S_VGA@
2 1 2 1
10U_0603_6.3V6M 22U_0603_6.3V6M
PC1340
N17S_VGA@
PC1335 VGA@
2 1 2 1
10U_0603_6.3V6M 22U_0603_6.3V6M
+VGA_CORE
PC1341 PC1328
N17S_VGA@
VGA@
Issued Date
2 1 2 1
10U_0603_6.3V6M 22U_0603_6.3V6M
Security Classification
PC1342
N17S_VGA@
PC1327 VGA@
2 1
2 1 PC1311
10U_0603_6.3V6M
220U_D2 SX_2VY_R9M
PC1343
N17S_VGA@ VGA@ PC1329 VGA@
2
1
+
2 1 4.7U_0402_6.3V6M
2 1
10U_0603_6.3V6M
PC1344
N17S_VGA@ VGA@ PC1336
2 1 4.7U_0402_6.3V6M VGA@
2
1
+
2 1
2016/11/04
10U_0603_6.3V6M
+VGA_CORE
PC1345
N17S_VGA@ N17S_VGA@ PC1331 PC1312
2 1 4.7U_0402_6.3V6M 220U_D2 SX_2VY_R9M
2 1
Near GPU Core
10U_0603_6.3V6M
VGA@
2
1
+
PC1346
N17S_VGA@ N17S_VGA@ PC1303
2 1 4.7U_0402_6.3V6M
2 1 PC1313
10U_0603_6.3V6M
220U_D2 SX_2VY_R9M
PC1347
N17S_VGA@ N17S_VGA@ PC1333
2 1 4.7U_0402_6.3V6M VGA@
2
1
+
2 1
10U_0603_6.3V6M
PC1348
N17S_VGA@ N17S_VGA@ PC1334 PC1314
D
D
Deciphered Date
PC1349
N17S_VGA@
2 1
10U_0603_6.3V6M
PC1350
N17S_VGA@
www.qdzbwx.com
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2018/11/04
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
C
Size
Title
Date:
Document Number
Power Train
54
of
57
Rev
0.1
4
3
2
1
5 4 3 2 1
03 voltage level too high 3.37V change to 3.33V PR402 change to 13.3K from 13.7K 1/23 DVT
04 SPOK voltage level PR407 change to 20K from 100K 1/23 DVT
05 SMT close SMT stencil problem PJ9001, PJ9002, PJ9003 change to 0.2m ohm 1/23 DVT
06 DC S5 power consumption meet DC S5 2.5mA spec PR209 change to 750K from 10K
PR211 change to 150K from 2K 1/23 DVT
11 CPU transient meet CPU spec PR805 change to 1.69K from 1.78K
PR814 change to 806ohm from 1K
PR874 change to 97.6k from 93.1K
PC821 change to 0.22u from 0.1uF 2/8
PC820 change to 8200P from 0.01uF
PR836 change to 63.4K from 69.8K
PR846 and PR867 change to 3.09K from 3.32K
PC9002.PC9003,PC9099,PC9098.PC9014,PC9091.PC9048 change to dummy
B B
12 1. PR701,,PR1204,PR718,PR1201,PR1217 change to 0ohm from R-short 2/9
1. prevent N17S design change 2. PR401 change to 31.6K from 30.9K
2. 5V voltage change to 5.2V 3. add PR1232 for VGA_CORE_PG and PU to +3VS_1.8VSDGPU_AON.
3. HW request 4. PR1223 change to un-pop
4. add filter PC836 and PC837 change to pop
5. for mode change PR875 and PR876 change to 10ohm
PR908 change to 0 ohm
5. PU901 and PU902 change toNCP81151MNTBG_DFN8_2X2
PU903 change to NCP81253MNTBG_DFN8_2X2
12 22 2/7 1.0 Add N17S Component for BOM Select Add UGPU1 SA0000ANV00 with N17SG1@
22 Change BOM structure from GTR@ to N16SGTR@
22 Del UGPU1 for GMR1@
26 Add X7607@,X7608@,X7609@
13 12,35 2/7 1.0 Change 0 ohm to R-Short RC195, RC204, RS1,RS2,RS3,RS4,RS5,RS6,RS7,RS8 change to R-Short
14 33 2/7 1.0 Adjust SATA TX redirver EQ for Parada IC RO17, RO18 and RO19 change to X76PAR@
15 33 2/7 1.0 Update SATA redriver circuit for TI IC Reserved RO26, RO27 with BOM strurture @
Add RO17, RO18 (4.7K), RO19, RO21 (0 ohm) with X76TI@
16 29,22 2/7 1.0 BOM Change Pop CC58 with 10uF, unpop CC59
17 40 2/7 1.0 Update VGA Power Sequence CV238, CV239 change to 680PF
18 8 2/7 1.0 Add CPU PN for DVT Add UC1 PN for Intel i3,i5,i7 CPU
B
19 13,35 2/7 1.0 Remove un-use USB port(Port9) Del LS24 B
20 35 2/7 1.0 Bom Change , pull up resistor change to 100K ohm RS20, RS40,RS41 value change to 100k ohm
21 36 2/7 1.0 Cancel solder mask on co-lay pin LS1,LS3,LS4,LS6 cover solder mask (footprint update)
22 36 2/8 1.0 For acer lesson learnt V1.7 CC65.1 change to PCH_PWROK_R
23 18 2/8 1.0 Adjust Crystal Cap value CC128,CC129 change to 27pF
24 8 2/8 1.0 Update PCB PN Add DAZ20X00201 and DA8001AU010 for PCB
25 32 2/8 1.0 Update BOM Structure Change RA35 BOM Structure to EMI@
26 22 2/10 1.0 For N17S GC6 Discharge Sequence Add DV10
Add RV189, CV263, DV11
27 9 2/10 1.0 Remove BIOM ROM socket (Debug only) Del JC1
28 7,11,36 2/13 1.0 For acer lesson learnt V1.7 Add CC132
Change to 1000pF --> CC50, CC53,CC131,CS24,CC65
29 36 2/13 1.0 Change Cap material for Z-High issue Change CS25 to SGA00009M00
A
30 21,30 2/15 1.0 Change R for 25M/27M Crystal Change R4961 and RL14 to 1K A
31 21 2/16 1.0 Change 27MHz Material X2000 change from SJ10000UI00 to SJ10000TQ00
32 18 2/16 1.0 Connect UC1.F65/G65 to GND, Change AY3, AY71 NC Add RC237, Change RC182,RC183 to 0 ohm(@)
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2016/11/04 Deciphered Date 2018/11/04 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW-P.I.R page1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 06, 2017 Sheet 56 of 57
5 4 3 2 1
5 4 3 2 1
35 22 3/9 1.A Update for N17S power down sequence Change RV189 from 15K to 2.2K for N17S
36 35 3/9 1.A Update Type-c footprint JUSB4 change symbol to LOTES_AUSB0181-P001A
37 8 3/13 1.A RCOMP 0 121 ohm for Mixed MD and SO-DIMM RC38 121 ohm and cancel DDP@ and SDP@
38 33 3/13 1.A Cancel SATA X76 level Change RO22 to @
Del X76TI@ component (UO2, RO17, RO18 , RO19, RO21)
Cancel X76PAR@ (RO17, RO18, RO19, RO21,UO2)
39 22 3/13 1.A Change N17S IC to R3 PN UGPU1 PN change to SA0000ANV10
40 8 3/13 1.A Update PCB (DAZ, DA) Part number Update DAZ to DAZ20X00203, DAZ24C00100, DA to DA8001AU01A
Add U42 CPU PN Add UC1 for QN5C@/QN5D@
41 15 3/20 1.A For acer lesson learnt V1.7 Reserved CC133 0.1U_0201
42 11 3/20 1.A Crystal dampling resistor adjust RC235,RC236 change to 33 ohm 1%
18 RC233,RC234 change to 33 ohm 1%
C
21 R4961 Change to N16X@ C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW-P.I.R page1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C5V01 M/B LA-E892P
Date: Thursday, April 20, 2017 Sheet 57 of 57
5 4 3 2 1